8 files changed, 49 insertions, 16 deletions

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4c51a2f8fd3..39ae3d0e3a4 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -47,7 +47,7 @@
 #endif
 
 static int __initdata acpi_force = 0;
-
+u32 acpi_rsdt_forced;
 #ifdef  CONFIG_ACPI
 int acpi_disabled = 0;
 #else
@@ -1359,6 +1359,17 @@ static void __init acpi_process_madt(void)
                                "Invalid BIOS MADT, disabling ACPI\n");
                         disable_acpi();
                 }
+        } else {
+                /*
+                 * ACPI found no MADT, and so ACPI wants UP PIC mode.
+                 * In the event an MPS table was found, forget it.
+                 * Boot with "acpi=off" to use MPS on such a system.
+                 */
+                if (smp_found_config) {
+                        printk(KERN_WARNING PREFIX
+                                "No APIC-table, disabling MPS\n");
+                        smp_found_config = 0;
+                }
         }
 #endif
         return;
@@ -1783,6 +1794,10 @@ static int __init parse_acpi(char *arg)
                         disable_acpi();
                 acpi_ht = 1;
         }
+        /* acpi=rsdt use RSDT instead of XSDT */
+        else if (strcmp(arg, "rsdt") == 0) {
+                acpi_rsdt_forced = 1;
+        }
         /* "acpi=noirq" disables ACPI interrupt routing */
         else if (strcmp(arg, "noirq") == 0) {
                 acpi_noirq_set();
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index c2502eb9aa8..a4805b3b409 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -56,6 +56,7 @@ static struct cstate_entry *cpu_cstate_entry;	/* per CPU ptr */
 static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];
 
 #define MWAIT_SUBSTATE_MASK     (0xf)
+#define MWAIT_CSTATE_MASK       (0xf)
 #define MWAIT_SUBSTATE_SIZE     (4)
 
 #define CPUID_MWAIT_LEAF (5)
@@ -98,7 +99,8 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
         cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
 
         /* Check whether this particular cx_type (in CST) is supported or not */
-        cstate_type = (cx->address >> MWAIT_SUBSTATE_SIZE) + 1;
+        cstate_type = ((cx->address >> MWAIT_SUBSTATE_SIZE) &
+                        MWAIT_CSTATE_MASK) + 1;
         edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
         num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
 
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index a7b6dec6fc3..0a60d60ed03 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -235,8 +235,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
         status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
         writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
 
-        if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit()))
-                printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n");
+        if (unlikely(i == EXIT_LOOP_COUNT))
+                panic("AMD IOMMU: Completion wait loop failed\n");
+
 out:
         spin_unlock_irqrestore(&iommu->lock, flags);
 
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 30ae2701b3d..c6cc22815d3 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -427,6 +427,10 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
         memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
                         &entry, sizeof(entry));
 
+        /* set head and tail to zero manually */
+        writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
+        writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
+
         iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
 
         return cmd_buf;
@@ -1074,7 +1078,8 @@ int __init amd_iommu_init(void)
                 goto free;
 
         /* IOMMU rlookup table - find the IOMMU for a specific device */
-        amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL,
+        amd_iommu_rlookup_table = (void *)__get_free_pages(
+                        GFP_KERNEL | __GFP_ZERO,
                         get_order(rlookup_table_size));
         if (amd_iommu_rlookup_table == NULL)
                 goto free;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 4b031a4ac85..1c838032fd3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -510,12 +510,9 @@ static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c)
  */
 void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
 {
-        static cpumask_t mce_cpus = CPU_MASK_NONE;
-
         mce_cpu_quirks(c);
 
         if (mce_dont_init ||
-            cpu_test_and_set(smp_processor_id(), mce_cpus) ||
             !mce_available(c))
                 return;
 
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 82fb2809ce3..c4b5b24e021 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -272,13 +272,18 @@ static struct attribute_group mc_attr_group = {
         .name = "microcode",
 };
 
-static void microcode_fini_cpu(int cpu)
+static void __microcode_fini_cpu(int cpu)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
-        mutex_lock(&microcode_mutex);
         microcode_ops->microcode_fini_cpu(cpu);
         uci->valid = 0;
+}
+
+static void microcode_fini_cpu(int cpu)
+{
+        mutex_lock(&microcode_mutex);
+        __microcode_fini_cpu(cpu);
         mutex_unlock(&microcode_mutex);
 }
 
@@ -306,12 +311,16 @@ static int microcode_resume_cpu(int cpu)
          * to this cpu (a bit of paranoia):
          */
         if (microcode_ops->collect_cpu_info(cpu, &nsig)) {
-                microcode_fini_cpu(cpu);
+                __microcode_fini_cpu(cpu);
+                printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n",
+                                cpu);
                 return -1;
         }
 
-        if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) {
-                microcode_fini_cpu(cpu);
+        if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) {
+                __microcode_fini_cpu(cpu);
+                printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n",
+                                cpu);
                 /* Should we look for a new ucode here? */
                 return 1;
         }
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 622dc4a2178..a8e62792d17 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock);
 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 {
         struct cpuinfo_x86 *c = &cpu_data(cpu_num);
+        unsigned long flags;
         unsigned int val[2];
 
         memset(csig, 0, sizeof(*csig));
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
                 csig->pf = 1 << ((val[1] >> 18) & 7);
         }
 
+        /* serialize access to the physical write to MSR 0x79 */
+        spin_lock_irqsave(&microcode_update_lock, flags);
+
         wrmsr(MSR_IA32_UCODE_REV, 0, 0);
         /* see notes above for revision 1.07.  Apparent chip bug */
         sync_core();
         /* get the current revision from MSR 0x8B */
         rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
+        spin_unlock_irqrestore(&microcode_update_lock, flags);
+
         pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
                         csig->sig, csig->pf, csig->rev);
 
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index ba7ad83e20a..a35eaa379ff 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -745,10 +745,8 @@ void __init gart_iommu_init(void)
         unsigned long scratch;
         long i;
 
-        if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) {
-                printk(KERN_INFO "PCI-GART: No AMD GART found.\n");
+        if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)
                 return;
-        }
 
 #ifndef CONFIG_AGP_AMD64
         no_agp = 1;