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Diffstat (limited to 'arch/x86/kernel/cpu/cpu_debug.c')
-rwxr-xr-xarch/x86/kernel/cpu/cpu_debug.c150
1 files changed, 106 insertions, 44 deletions
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
index 21c0cf8ced1..46e29ab96c6 100755
--- a/arch/x86/kernel/cpu/cpu_debug.c
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -64,6 +64,8 @@ static struct cpu_debug_base cpu_base[] = {
64 { "vmx", CPU_VMX, 0 }, 64 { "vmx", CPU_VMX, 0 },
65 { "call", CPU_CALL, 0 }, 65 { "call", CPU_CALL, 0 },
66 { "base", CPU_BASE, 0 }, 66 { "base", CPU_BASE, 0 },
67 { "ver", CPU_VER, 0 },
68 { "conf", CPU_CONF, 0 },
67 { "smm", CPU_SMM, 0 }, 69 { "smm", CPU_SMM, 0 },
68 { "svm", CPU_SVM, 0 }, 70 { "svm", CPU_SVM, 0 },
69 { "osvm", CPU_OSVM, 0 }, 71 { "osvm", CPU_OSVM, 0 },
@@ -177,54 +179,59 @@ static struct cpu_debug_range cpu_intel_range[] = {
177 179
178/* AMD Registers Range */ 180/* AMD Registers Range */
179static struct cpu_debug_range cpu_amd_range[] = { 181static struct cpu_debug_range cpu_amd_range[] = {
180 { 0x00000010, 0x00000010, CPU_TIME, CPU_ALL, }, 182 { 0x00000000, 0x00000001, CPU_MC, CPU_K10_PLUS, },
181 { 0x0000001B, 0x0000001B, CPU_APIC, CPU_ALL, }, 183 { 0x00000010, 0x00000010, CPU_TIME, CPU_K8_PLUS, },
182 { 0x000000FE, 0x000000FE, CPU_MTRR, CPU_ALL, }, 184 { 0x0000001B, 0x0000001B, CPU_APIC, CPU_K8_PLUS, },
183 185 { 0x0000002A, 0x0000002A, CPU_POWERON, CPU_K7_PLUS },
184 { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_ALL, }, 186 { 0x0000008B, 0x0000008B, CPU_VER, CPU_K8_PLUS },
185 { 0x00000179, 0x0000017A, CPU_MC, CPU_ALL, }, 187 { 0x000000FE, 0x000000FE, CPU_MTRR, CPU_K8_PLUS, },
186 { 0x0000017B, 0x0000017B, CPU_MC, CPU_ALL, }, 188
187 { 0x000001D9, 0x000001D9, CPU_DEBUG, CPU_ALL, }, 189 { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_K8_PLUS, },
188 { 0x000001DB, 0x000001DE, CPU_LBRANCH, CPU_ALL, }, 190 { 0x00000179, 0x0000017B, CPU_MC, CPU_K8_PLUS, },
189 191 { 0x000001D9, 0x000001D9, CPU_DEBUG, CPU_K8_PLUS, },
190 { 0x00000200, 0x0000020F, CPU_MTRR, CPU_ALL, }, 192 { 0x000001DB, 0x000001DE, CPU_LBRANCH, CPU_K8_PLUS, },
191 { 0x00000250, 0x00000250, CPU_MTRR, CPU_ALL, }, 193
192 { 0x00000258, 0x00000259, CPU_MTRR, CPU_ALL, }, 194 { 0x00000200, 0x0000020F, CPU_MTRR, CPU_K8_PLUS, },
193 { 0x00000268, 0x0000026F, CPU_MTRR, CPU_ALL, }, 195 { 0x00000250, 0x00000250, CPU_MTRR, CPU_K8_PLUS, },
194 { 0x00000277, 0x00000277, CPU_PAT, CPU_ALL, }, 196 { 0x00000258, 0x00000259, CPU_MTRR, CPU_K8_PLUS, },
195 { 0x000002FF, 0x000002FF, CPU_MTRR, CPU_ALL, }, 197 { 0x00000268, 0x0000026F, CPU_MTRR, CPU_K8_PLUS, },
196 198 { 0x00000277, 0x00000277, CPU_PAT, CPU_K8_PLUS, },
197 { 0x00000400, 0x00000417, CPU_MC, CPU_ALL, }, 199 { 0x000002FF, 0x000002FF, CPU_MTRR, CPU_K8_PLUS, },
198 200
199 { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_ALL, }, 201 { 0x00000400, 0x00000413, CPU_MC, CPU_K8_PLUS, },
200 { 0xC0000081, 0xC0000084, CPU_CALL, CPU_ALL, }, 202
201 { 0xC0000100, 0xC0000102, CPU_BASE, CPU_ALL, }, 203 { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_AMD_ALL, },
202 { 0xC0000103, 0xC0000103, CPU_TIME, CPU_ALL, }, 204 { 0xC0000081, 0xC0000084, CPU_CALL, CPU_K8_PLUS, },
203 205 { 0xC0000100, 0xC0000102, CPU_BASE, CPU_K8_PLUS, },
204 { 0xC0000408, 0xC000040A, CPU_MC, CPU_ALL, }, 206 { 0xC0000103, 0xC0000103, CPU_TIME, CPU_K10_PLUS, },
205 207
206 { 0xc0010000, 0xc0010007, CPU_PMC, CPU_ALL, }, 208 { 0xC0010000, 0xC0010007, CPU_PMC, CPU_K8_PLUS, },
207 { 0xc0010010, 0xc0010010, CPU_MTRR, CPU_ALL, }, 209 { 0xC0010010, 0xC0010010, CPU_CONF, CPU_K7_PLUS, },
208 { 0xc0010016, 0xc001001A, CPU_MTRR, CPU_ALL, }, 210 { 0xC0010015, 0xC0010015, CPU_CONF, CPU_K7_PLUS, },
209 { 0xc001001D, 0xc001001D, CPU_MTRR, CPU_ALL, }, 211 { 0xC0010016, 0xC001001A, CPU_MTRR, CPU_K8_PLUS, },
210 { 0xc0010030, 0xc0010035, CPU_BIOS, CPU_ALL, }, 212 { 0xC001001D, 0xC001001D, CPU_MTRR, CPU_K8_PLUS, },
211 { 0xc0010056, 0xc0010056, CPU_SMM, CPU_ALL, }, 213 { 0xC001001F, 0xC001001F, CPU_CONF, CPU_K8_PLUS, },
212 { 0xc0010061, 0xc0010063, CPU_SMM, CPU_ALL, }, 214 { 0xC0010030, 0xC0010035, CPU_BIOS, CPU_K8_PLUS, },
213 { 0xc0010074, 0xc0010074, CPU_MC, CPU_ALL, }, 215 { 0xC0010044, 0xC0010048, CPU_MC, CPU_K8_PLUS, },
214 { 0xc0010111, 0xc0010113, CPU_SMM, CPU_ALL, }, 216 { 0xC0010050, 0xC0010056, CPU_SMM, CPU_K0F_PLUS, },
215 { 0xc0010114, 0xc0010118, CPU_SVM, CPU_ALL, }, 217 { 0xC0010058, 0xC0010058, CPU_CONF, CPU_K10_PLUS, },
216 { 0xc0010119, 0xc001011A, CPU_SMM, CPU_ALL, }, 218 { 0xC0010060, 0xC0010060, CPU_CACHE, CPU_AMD_11, },
217 { 0xc0010140, 0xc0010141, CPU_OSVM, CPU_ALL, }, 219 { 0xC0010061, 0xC0010068, CPU_SMM, CPU_K10_PLUS, },
218 { 0xc0010156, 0xc0010156, CPU_SMM, CPU_ALL, }, 220 { 0xC0010069, 0xC001006B, CPU_SMM, CPU_AMD_11, },
221 { 0xC0010070, 0xC0010071, CPU_SMM, CPU_K10_PLUS, },
222 { 0xC0010111, 0xC0010113, CPU_SMM, CPU_K8_PLUS, },
223 { 0xC0010114, 0xC0010118, CPU_SVM, CPU_K10_PLUS, },
224 { 0xC0010140, 0xC0010141, CPU_OSVM, CPU_K10_PLUS, },
225 { 0xC0011022, 0xC0011023, CPU_CONF, CPU_K10_PLUS, },
219}; 226};
220 227
221 228
222static int get_cpu_modelflag(unsigned cpu) 229/* Intel */
230static int get_intel_modelflag(unsigned model)
223{ 231{
224 int flag; 232 int flag;
225 233
226 switch (per_cpu(cpu_model, cpu)) { 234 switch (model) {
227 /* Intel */
228 case 0x0501: 235 case 0x0501:
229 case 0x0502: 236 case 0x0502:
230 case 0x0504: 237 case 0x0504:
@@ -271,6 +278,59 @@ static int get_cpu_modelflag(unsigned cpu)
271 return flag; 278 return flag;
272} 279}
273 280
281/* AMD */
282static int get_amd_modelflag(unsigned model)
283{
284 int flag;
285
286 switch (model >> 8) {
287 case 0x6:
288 flag = CPU_AMD_K6;
289 break;
290 case 0x7:
291 flag = CPU_AMD_K7;
292 break;
293 case 0x8:
294 flag = CPU_AMD_K8;
295 break;
296 case 0xf:
297 flag = CPU_AMD_0F;
298 break;
299 case 0x10:
300 flag = CPU_AMD_10;
301 break;
302 case 0x11:
303 flag = CPU_AMD_11;
304 break;
305 default:
306 flag = CPU_NONE;
307 break;
308 }
309
310 return flag;
311}
312
313static int get_cpu_modelflag(unsigned cpu)
314{
315 int flag;
316
317 flag = per_cpu(cpu_model, cpu);
318
319 switch (flag >> 16) {
320 case X86_VENDOR_INTEL:
321 flag = get_intel_modelflag(flag);
322 break;
323 case X86_VENDOR_AMD:
324 flag = get_amd_modelflag(flag & 0xffff);
325 break;
326 default:
327 flag = CPU_NONE;
328 break;
329 }
330
331 return flag;
332}
333
274static int get_cpu_range_count(unsigned cpu) 334static int get_cpu_range_count(unsigned cpu)
275{ 335{
276 int index; 336 int index;
@@ -311,7 +371,8 @@ static int is_typeflag_valid(unsigned cpu, unsigned flag)
311 return 1; 371 return 1;
312 break; 372 break;
313 case X86_VENDOR_AMD: 373 case X86_VENDOR_AMD:
314 if (cpu_amd_range[i].flag & flag) 374 if ((cpu_amd_range[i].model & modelflag) &&
375 (cpu_amd_range[i].flag & flag))
315 return 1; 376 return 1;
316 break; 377 break;
317 } 378 }
@@ -337,7 +398,8 @@ static unsigned get_cpu_range(unsigned cpu, unsigned *min, unsigned *max,
337 } 398 }
338 break; 399 break;
339 case X86_VENDOR_AMD: 400 case X86_VENDOR_AMD:
340 if (cpu_amd_range[index].flag & flag) { 401 if ((cpu_amd_range[index].model & modelflag) &&
402 (cpu_amd_range[index].flag & flag)) {
341 *min = cpu_amd_range[index].min; 403 *min = cpu_amd_range[index].min;
342 *max = cpu_amd_range[index].max; 404 *max = cpu_amd_range[index].max;
343 } 405 }
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 08:23:18 -0400