diff options
Diffstat (limited to 'arch/x86/include/asm/numaq/apic.h')
| -rw-r--r-- | arch/x86/include/asm/numaq/apic.h | 142 |
1 files changed, 0 insertions, 142 deletions
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h deleted file mode 100644 index bf37bc49bd8..00000000000 --- a/arch/x86/include/asm/numaq/apic.h +++ /dev/null | |||
| @@ -1,142 +0,0 @@ | |||
| 1 | #ifndef __ASM_NUMAQ_APIC_H | ||
| 2 | #define __ASM_NUMAQ_APIC_H | ||
| 3 | |||
| 4 | #include <asm/io.h> | ||
| 5 | #include <linux/mmzone.h> | ||
| 6 | #include <linux/nodemask.h> | ||
| 7 | |||
| 8 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | ||
| 9 | |||
| 10 | static inline const cpumask_t *target_cpus(void) | ||
| 11 | { | ||
| 12 | return &CPU_MASK_ALL; | ||
| 13 | } | ||
| 14 | |||
| 15 | #define NO_BALANCE_IRQ (1) | ||
| 16 | #define esr_disable (1) | ||
| 17 | |||
| 18 | #define INT_DELIVERY_MODE dest_LowestPrio | ||
| 19 | #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ | ||
| 20 | |||
| 21 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
| 22 | { | ||
| 23 | return physid_isset(apicid, bitmap); | ||
| 24 | } | ||
| 25 | static inline unsigned long check_apicid_present(int bit) | ||
| 26 | { | ||
| 27 | return physid_isset(bit, phys_cpu_present_map); | ||
| 28 | } | ||
| 29 | #define apicid_cluster(apicid) (apicid & 0xF0) | ||
| 30 | |||
| 31 | static inline int apic_id_registered(void) | ||
| 32 | { | ||
| 33 | return 1; | ||
| 34 | } | ||
| 35 | |||
| 36 | static inline void init_apic_ldr(void) | ||
| 37 | { | ||
| 38 | /* Already done in NUMA-Q firmware */ | ||
| 39 | } | ||
| 40 | |||
| 41 | static inline void setup_apic_routing(void) | ||
| 42 | { | ||
| 43 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
| 44 | "NUMA-Q", nr_ioapics); | ||
| 45 | } | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Skip adding the timer int on secondary nodes, which causes | ||
| 49 | * a small but painful rift in the time-space continuum. | ||
| 50 | */ | ||
| 51 | static inline int multi_timer_check(int apic, int irq) | ||
| 52 | { | ||
| 53 | return apic != 0 && irq == 0; | ||
| 54 | } | ||
| 55 | |||
| 56 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
| 57 | { | ||
| 58 | /* We don't have a good way to do this yet - hack */ | ||
| 59 | return physids_promote(0xFUL); | ||
| 60 | } | ||
| 61 | |||
| 62 | /* Mapping from cpu number to logical apicid */ | ||
| 63 | extern u8 cpu_2_logical_apicid[]; | ||
| 64 | static inline int cpu_to_logical_apicid(int cpu) | ||
| 65 | { | ||
| 66 | if (cpu >= nr_cpu_ids) | ||
| 67 | return BAD_APICID; | ||
| 68 | return (int)cpu_2_logical_apicid[cpu]; | ||
| 69 | } | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Supporting over 60 cpus on NUMA-Q requires a locality-dependent | ||
| 73 | * cpu to APIC ID relation to properly interact with the intelligent | ||
| 74 | * mode of the cluster controller. | ||
| 75 | */ | ||
| 76 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
| 77 | { | ||
| 78 | if (mps_cpu < 60) | ||
| 79 | return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3)); | ||
| 80 | else | ||
| 81 | return BAD_APICID; | ||
| 82 | } | ||
| 83 | |||
| 84 | static inline int apicid_to_node(int logical_apicid) | ||
| 85 | { | ||
| 86 | return logical_apicid >> 4; | ||
| 87 | } | ||
| 88 | |||
| 89 | static inline physid_mask_t apicid_to_cpu_present(int logical_apicid) | ||
| 90 | { | ||
| 91 | int node = apicid_to_node(logical_apicid); | ||
| 92 | int cpu = __ffs(logical_apicid & 0xf); | ||
| 93 | |||
| 94 | return physid_mask_of_physid(cpu + 4*node); | ||
| 95 | } | ||
| 96 | |||
| 97 | extern void *xquad_portio; | ||
| 98 | |||
| 99 | static inline void setup_portio_remap(void) | ||
| 100 | { | ||
| 101 | int num_quads = num_online_nodes(); | ||
| 102 | |||
| 103 | if (num_quads <= 1) | ||
| 104 | return; | ||
| 105 | |||
| 106 | printk("Remapping cross-quad port I/O for %d quads\n", num_quads); | ||
| 107 | xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD); | ||
| 108 | printk("xquad_portio vaddr 0x%08lx, len %08lx\n", | ||
| 109 | (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD); | ||
| 110 | } | ||
| 111 | |||
| 112 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
| 113 | { | ||
| 114 | return (1); | ||
| 115 | } | ||
| 116 | |||
| 117 | static inline void enable_apic_mode(void) | ||
| 118 | { | ||
| 119 | } | ||
| 120 | |||
| 121 | /* | ||
| 122 | * We use physical apicids here, not logical, so just return the default | ||
| 123 | * physical broadcast to stop people from breaking us | ||
| 124 | */ | ||
| 125 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
| 126 | { | ||
| 127 | return (int) 0xF; | ||
| 128 | } | ||
| 129 | |||
| 130 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
| 131 | const struct cpumask *andmask) | ||
| 132 | { | ||
| 133 | return (int) 0xF; | ||
| 134 | } | ||
| 135 | |||
| 136 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ | ||
| 137 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
| 138 | { | ||
| 139 | return cpuid_apic >> index_msb; | ||
| 140 | } | ||
| 141 | |||
| 142 | #endif /* __ASM_NUMAQ_APIC_H */ | ||
