diff options
Diffstat (limited to 'arch/x86/include/asm/bigsmp/apic.h')
| -rw-r--r-- | arch/x86/include/asm/bigsmp/apic.h | 155 |
1 files changed, 0 insertions, 155 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h deleted file mode 100644 index d8dd9f53791..00000000000 --- a/arch/x86/include/asm/bigsmp/apic.h +++ /dev/null | |||
| @@ -1,155 +0,0 @@ | |||
| 1 | #ifndef __ASM_MACH_APIC_H | ||
| 2 | #define __ASM_MACH_APIC_H | ||
| 3 | |||
| 4 | #define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu)) | ||
| 5 | #define esr_disable (1) | ||
| 6 | |||
| 7 | static inline int apic_id_registered(void) | ||
| 8 | { | ||
| 9 | return (1); | ||
| 10 | } | ||
| 11 | |||
| 12 | static inline const cpumask_t *target_cpus(void) | ||
| 13 | { | ||
| 14 | #ifdef CONFIG_SMP | ||
| 15 | return &cpu_online_map; | ||
| 16 | #else | ||
| 17 | return &cpumask_of_cpu(0); | ||
| 18 | #endif | ||
| 19 | } | ||
| 20 | |||
| 21 | #undef APIC_DEST_LOGICAL | ||
| 22 | #define APIC_DEST_LOGICAL 0 | ||
| 23 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
| 24 | #define INT_DELIVERY_MODE (dest_Fixed) | ||
| 25 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ | ||
| 26 | #define NO_BALANCE_IRQ (0) | ||
| 27 | |||
| 28 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
| 29 | { | ||
| 30 | return (0); | ||
| 31 | } | ||
| 32 | |||
| 33 | static inline unsigned long check_apicid_present(int bit) | ||
| 34 | { | ||
| 35 | return (1); | ||
| 36 | } | ||
| 37 | |||
| 38 | static inline unsigned long calculate_ldr(int cpu) | ||
| 39 | { | ||
| 40 | unsigned long val, id; | ||
| 41 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
| 42 | id = xapic_phys_to_log_apicid(cpu); | ||
| 43 | val |= SET_APIC_LOGICAL_ID(id); | ||
| 44 | return val; | ||
| 45 | } | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Set up the logical destination ID. | ||
| 49 | * | ||
| 50 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
| 51 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
| 52 | * document number 292116). So here it goes... | ||
| 53 | */ | ||
| 54 | static inline void init_apic_ldr(void) | ||
| 55 | { | ||
| 56 | unsigned long val; | ||
| 57 | int cpu = smp_processor_id(); | ||
| 58 | |||
| 59 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
| 60 | val = calculate_ldr(cpu); | ||
| 61 | apic_write(APIC_LDR, val); | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline void setup_apic_routing(void) | ||
| 65 | { | ||
| 66 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
| 67 | "Physflat", nr_ioapics); | ||
| 68 | } | ||
| 69 | |||
| 70 | static inline int multi_timer_check(int apic, int irq) | ||
| 71 | { | ||
| 72 | return (0); | ||
| 73 | } | ||
| 74 | |||
| 75 | static inline int apicid_to_node(int logical_apicid) | ||
| 76 | { | ||
| 77 | return apicid_2_node[hard_smp_processor_id()]; | ||
| 78 | } | ||
| 79 | |||
| 80 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
| 81 | { | ||
| 82 | if (mps_cpu < nr_cpu_ids) | ||
| 83 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
| 84 | |||
| 85 | return BAD_APICID; | ||
| 86 | } | ||
| 87 | |||
| 88 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
| 89 | { | ||
| 90 | return physid_mask_of_physid(phys_apicid); | ||
| 91 | } | ||
| 92 | |||
| 93 | extern u8 cpu_2_logical_apicid[]; | ||
| 94 | /* Mapping from cpu number to logical apicid */ | ||
| 95 | static inline int cpu_to_logical_apicid(int cpu) | ||
| 96 | { | ||
| 97 | if (cpu >= nr_cpu_ids) | ||
| 98 | return BAD_APICID; | ||
| 99 | return cpu_physical_id(cpu); | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
| 103 | { | ||
| 104 | /* For clustered we don't have a good way to do this yet - hack */ | ||
| 105 | return physids_promote(0xFFL); | ||
| 106 | } | ||
| 107 | |||
| 108 | static inline void setup_portio_remap(void) | ||
| 109 | { | ||
| 110 | } | ||
| 111 | |||
| 112 | static inline void enable_apic_mode(void) | ||
| 113 | { | ||
| 114 | } | ||
| 115 | |||
| 116 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
| 117 | { | ||
| 118 | return (1); | ||
| 119 | } | ||
| 120 | |||
| 121 | /* As we are using single CPU as destination, pick only one CPU here */ | ||
| 122 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
| 123 | { | ||
| 124 | int cpu; | ||
| 125 | int apicid; | ||
| 126 | |||
| 127 | cpu = first_cpu(*cpumask); | ||
| 128 | apicid = cpu_to_logical_apicid(cpu); | ||
| 129 | return apicid; | ||
| 130 | } | ||
| 131 | |||
| 132 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
| 133 | const struct cpumask *andmask) | ||
| 134 | { | ||
| 135 | int cpu; | ||
| 136 | |||
| 137 | /* | ||
| 138 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 139 | * May as well be the first. | ||
| 140 | */ | ||
| 141 | for_each_cpu_and(cpu, cpumask, andmask) | ||
| 142 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | ||
| 143 | break; | ||
| 144 | if (cpu < nr_cpu_ids) | ||
| 145 | return cpu_to_logical_apicid(cpu); | ||
| 146 | |||
| 147 | return BAD_APICID; | ||
| 148 | } | ||
| 149 | |||
| 150 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
| 151 | { | ||
| 152 | return cpuid_apic >> index_msb; | ||
| 153 | } | ||
| 154 | |||
| 155 | #endif /* __ASM_MACH_APIC_H */ | ||
