1 files changed, 102 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
new file mode 100644
index 00000000000..682df23087a
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
@@ -0,0 +1,102 @@
+/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Copyright (C) 2005 Simtec Electronics
+ *
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <mach/map.h>
+#include <mach/regs-gpio.h>
+#include <asm/plat-s3c/regs-serial.h>
+#define S3C2410_UART1_OFF (0x4000)
+#define SHIFT_2440TXF (14-9)
+        .macro addruart, rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C24XX_PA_UART
+                ldrne   \rx, = S3C24XX_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+        .macro fifo_full_s3c24xx rd, rx
+                @ check for arm920 vs arm926. currently assume all arm926
+                @ devices have an 64 byte FIFO identical to the s3c2440
+                mrc     p15, 0, \rd, c0, c0
+                and     \rd, \rd, #0xff0
+                teq     \rd, #0x260
+                beq     1004f
+                mrc     p15, 0, \rd, c1, c0
+                tst     \rd, #1
+                addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
+                addne   \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
+                bic     \rd, \rd, #0xff000
+                ldr     \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
+                and     \rd, \rd, #0x00ff0000
+                teq     \rd, #0x00440000                @ is it 2440?
+1004:
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                moveq   \rd, \rd, lsr #SHIFT_2440TXF
+                tst     \rd, #S3C2410_UFSTAT_TXFULL
+        .endm
+        .macro  fifo_full_s3c2410 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                tst     \rd, #S3C2410_UFSTAT_TXFULL
+        .endm
+/* fifo level reading */
+        .macro fifo_level_s3c24xx rd, rx
+                @ check for arm920 vs arm926. currently assume all arm926
+                @ devices have an 64 byte FIFO identical to the s3c2440
+                mrc     p15, 0, \rd, c0, c0
+                and     \rd, \rd, #0xff0
+                teq     \rd, #0x260
+                beq     10000f
+                mrc     p15, 0, \rd, c1, c0
+                tst     \rd, #1
+                addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
+                addne   \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
+                bic     \rd, \rd, #0xff000
+                ldr     \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
+                and     \rd, \rd, #0x00ff0000
+                teq     \rd, #0x00440000                @ is it 2440?
+10000:
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                andne   \rd, \rd, #S3C2410_UFSTAT_TXMASK
+                andeq   \rd, \rd, #S3C2440_UFSTAT_TXMASK
+        .endm
+        .macro fifo_level_s3c2410 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                and     \rd, \rd, #S3C2410_UFSTAT_TXMASK
+        .endm
+/* Select the correct implementation depending on the configuration. The
+ * S3C2440 will get selected by default, as these are the most widely
+ * used variants of these
+*/
+#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
+#define fifo_full  fifo_full_s3c2410
+#define fifo_level fifo_level_s3c2410
+#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
+#define fifo_full  fifo_full_s3c24xx
+#define fifo_level fifo_level_s3c24xx
+#endif
+/* include the reset of the code which will do the work */
+#include <asm/plat-s3c/debug-macro.S>

diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S new file mode 100644 index 00000000000..682df23087a --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
@@ -0,0 +1,102 @@
	1	/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
	2	*
	3	* Debugging macro include header
	4	*
	5	* Copyright (C) 1994-1999 Russell King
	6	* Copyright (C) 2005 Simtec Electronics
	7	*
	8	* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <mach/map.h>
	16	#include <mach/regs-gpio.h>
	17	#include <asm/plat-s3c/regs-serial.h>
	18
	19	#define S3C2410_UART1_OFF (0x4000)
	20	#define SHIFT_2440TXF (14-9)
	21
	22	.macro addruart, rx
	23	mrc p15, 0, \rx, c1, c0
	24	tst \rx, #1
	25	ldreq \rx, = S3C24XX_PA_UART
	26	ldrne \rx, = S3C24XX_VA_UART
	27	#if CONFIG_DEBUG_S3C_UART != 0
	28	add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
	29	#endif
	30	.endm
	31
	32	.macro fifo_full_s3c24xx rd, rx
	33	@ check for arm920 vs arm926. currently assume all arm926
	34	@ devices have an 64 byte FIFO identical to the s3c2440
	35	mrc p15, 0, \rd, c0, c0
	36	and \rd, \rd, #0xff0
	37	teq \rd, #0x260
	38	beq 1004f
	39	mrc p15, 0, \rd, c1, c0
	40	tst \rd, #1
	41	addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
	42	addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
	43	bic \rd, \rd, #0xff000
	44	ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
	45	and \rd, \rd, #0x00ff0000
	46	teq \rd, #0x00440000 @ is it 2440?
	47	1004:
	48	ldr \rd, [ \rx, # S3C2410_UFSTAT ]
	49	moveq \rd, \rd, lsr #SHIFT_2440TXF
	50	tst \rd, #S3C2410_UFSTAT_TXFULL
	51	.endm
	52
	53	.macro fifo_full_s3c2410 rd, rx
	54	ldr \rd, [ \rx, # S3C2410_UFSTAT ]
	55	tst \rd, #S3C2410_UFSTAT_TXFULL
	56	.endm
	57
	58	/* fifo level reading */
	59
	60	.macro fifo_level_s3c24xx rd, rx
	61	@ check for arm920 vs arm926. currently assume all arm926
	62	@ devices have an 64 byte FIFO identical to the s3c2440
	63	mrc p15, 0, \rd, c0, c0
	64	and \rd, \rd, #0xff0
	65	teq \rd, #0x260
	66	beq 10000f
	67	mrc p15, 0, \rd, c1, c0
	68	tst \rd, #1
	69	addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
	70	addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
	71	bic \rd, \rd, #0xff000
	72	ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
	73	and \rd, \rd, #0x00ff0000
	74	teq \rd, #0x00440000 @ is it 2440?
	75
	76	10000:
	77	ldr \rd, [ \rx, # S3C2410_UFSTAT ]
	78	andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
	79	andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
	80	.endm
	81
	82	.macro fifo_level_s3c2410 rd, rx
	83	ldr \rd, [ \rx, # S3C2410_UFSTAT ]
	84	and \rd, \rd, #S3C2410_UFSTAT_TXMASK
	85	.endm
	86
	87	/* Select the correct implementation depending on the configuration. The
	88	* S3C2440 will get selected by default, as these are the most widely
	89	* used variants of these
	90	*/
	91
	92	#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
	93	#define fifo_full fifo_full_s3c2410
	94	#define fifo_level fifo_level_s3c2410
	95	#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
	96	#define fifo_full fifo_full_s3c24xx
	97	#define fifo_level fifo_level_s3c24xx
	98	#endif
	99
	100	/* include the reset of the code which will do the work */
	101
	102	#include <asm/plat-s3c/debug-macro.S>