diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_channel.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv04_fifo.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv10_fifo.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv40_fifo.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_fifo.c | 9 |
5 files changed, 29 insertions, 21 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 3e49babd62a..a3d33a582a9 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -113,7 +113,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, | |||
113 | struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo; | 113 | struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo; |
114 | struct nouveau_channel *chan; | 114 | struct nouveau_channel *chan; |
115 | unsigned long flags; | 115 | unsigned long flags; |
116 | int user, ret; | 116 | int ret; |
117 | 117 | ||
118 | /* allocate and lock channel structure */ | 118 | /* allocate and lock channel structure */ |
119 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); | 119 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); |
@@ -160,23 +160,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, | |||
160 | } | 160 | } |
161 | 161 | ||
162 | nouveau_dma_pre_init(chan); | 162 | nouveau_dma_pre_init(chan); |
163 | |||
164 | /* Locate channel's user control regs */ | ||
165 | if (dev_priv->card_type < NV_40) | ||
166 | user = NV03_USER(chan->id); | ||
167 | else | ||
168 | if (dev_priv->card_type < NV_50) | ||
169 | user = NV40_USER(chan->id); | ||
170 | else | ||
171 | user = NV50_USER(chan->id); | ||
172 | |||
173 | chan->user = ioremap(pci_resource_start(dev->pdev, 0) + user, | ||
174 | PAGE_SIZE); | ||
175 | if (!chan->user) { | ||
176 | NV_ERROR(dev, "ioremap of regs failed.\n"); | ||
177 | nouveau_channel_put(&chan); | ||
178 | return -ENOMEM; | ||
179 | } | ||
180 | chan->user_put = 0x40; | 163 | chan->user_put = 0x40; |
181 | chan->user_get = 0x44; | 164 | chan->user_get = 0x44; |
182 | 165 | ||
@@ -356,9 +339,6 @@ nouveau_channel_del(struct kref *ref) | |||
356 | struct nouveau_channel *chan = | 339 | struct nouveau_channel *chan = |
357 | container_of(ref, struct nouveau_channel, ref); | 340 | container_of(ref, struct nouveau_channel, ref); |
358 | 341 | ||
359 | if (chan->user) | ||
360 | iounmap(chan->user); | ||
361 | |||
362 | kfree(chan); | 342 | kfree(chan); |
363 | } | 343 | } |
364 | 344 | ||
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c index a32ba8ccaae..f89d104698d 100644 --- a/drivers/gpu/drm/nouveau/nv04_fifo.c +++ b/drivers/gpu/drm/nouveau/nv04_fifo.c | |||
@@ -129,6 +129,11 @@ nv04_fifo_create_context(struct nouveau_channel *chan) | |||
129 | if (ret) | 129 | if (ret) |
130 | return ret; | 130 | return ret; |
131 | 131 | ||
132 | chan->user = ioremap(pci_resource_start(dev->pdev, 0) + | ||
133 | NV03_USER(chan->id), PAGE_SIZE); | ||
134 | if (!chan->user) | ||
135 | return -ENOMEM; | ||
136 | |||
132 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); | 137 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); |
133 | 138 | ||
134 | /* Setup initial state */ | 139 | /* Setup initial state */ |
@@ -173,6 +178,10 @@ nv04_fifo_destroy_context(struct nouveau_channel *chan) | |||
173 | spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); | 178 | spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); |
174 | 179 | ||
175 | /* Free the channel resources */ | 180 | /* Free the channel resources */ |
181 | if (chan->user) { | ||
182 | iounmap(chan->user); | ||
183 | chan->user = NULL; | ||
184 | } | ||
176 | nouveau_gpuobj_ref(NULL, &chan->ramfc); | 185 | nouveau_gpuobj_ref(NULL, &chan->ramfc); |
177 | } | 186 | } |
178 | 187 | ||
diff --git a/drivers/gpu/drm/nouveau/nv10_fifo.c b/drivers/gpu/drm/nouveau/nv10_fifo.c index acb9216e6d0..d2ecbff4bee 100644 --- a/drivers/gpu/drm/nouveau/nv10_fifo.c +++ b/drivers/gpu/drm/nouveau/nv10_fifo.c | |||
@@ -53,6 +53,11 @@ nv10_fifo_create_context(struct nouveau_channel *chan) | |||
53 | if (ret) | 53 | if (ret) |
54 | return ret; | 54 | return ret; |
55 | 55 | ||
56 | chan->user = ioremap(pci_resource_start(dev->pdev, 0) + | ||
57 | NV03_USER(chan->id), PAGE_SIZE); | ||
58 | if (!chan->user) | ||
59 | return -ENOMEM; | ||
60 | |||
56 | /* Fill entries that are seen filled in dumps of nvidia driver just | 61 | /* Fill entries that are seen filled in dumps of nvidia driver just |
57 | * after channel's is put into DMA mode | 62 | * after channel's is put into DMA mode |
58 | */ | 63 | */ |
diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c index f6b3580c685..c86e4d4e9b9 100644 --- a/drivers/gpu/drm/nouveau/nv40_fifo.c +++ b/drivers/gpu/drm/nouveau/nv40_fifo.c | |||
@@ -47,6 +47,11 @@ nv40_fifo_create_context(struct nouveau_channel *chan) | |||
47 | if (ret) | 47 | if (ret) |
48 | return ret; | 48 | return ret; |
49 | 49 | ||
50 | chan->user = ioremap(pci_resource_start(dev->pdev, 0) + | ||
51 | NV40_USER(chan->id), PAGE_SIZE); | ||
52 | if (!chan->user) | ||
53 | return -ENOMEM; | ||
54 | |||
50 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); | 55 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); |
51 | 56 | ||
52 | nv_wi32(dev, fc + 0, chan->pushbuf_base); | 57 | nv_wi32(dev, fc + 0, chan->pushbuf_base); |
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c index ed18952ae7f..7add3dfde3d 100644 --- a/drivers/gpu/drm/nouveau/nv50_fifo.c +++ b/drivers/gpu/drm/nouveau/nv50_fifo.c | |||
@@ -261,6 +261,11 @@ nv50_fifo_create_context(struct nouveau_channel *chan) | |||
261 | } | 261 | } |
262 | ramfc = chan->ramfc; | 262 | ramfc = chan->ramfc; |
263 | 263 | ||
264 | chan->user = ioremap(pci_resource_start(dev->pdev, 0) + | ||
265 | NV50_USER(chan->id), PAGE_SIZE); | ||
266 | if (!chan->user) | ||
267 | return -ENOMEM; | ||
268 | |||
264 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); | 269 | spin_lock_irqsave(&dev_priv->context_switch_lock, flags); |
265 | 270 | ||
266 | nv_wo32(ramfc, 0x48, chan->pushbuf->cinst >> 4); | 271 | nv_wo32(ramfc, 0x48, chan->pushbuf->cinst >> 4); |
@@ -327,6 +332,10 @@ nv50_fifo_destroy_context(struct nouveau_channel *chan) | |||
327 | spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); | 332 | spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); |
328 | 333 | ||
329 | /* Free the channel resources */ | 334 | /* Free the channel resources */ |
335 | if (chan->user) { | ||
336 | iounmap(chan->user); | ||
337 | chan->user = NULL; | ||
338 | } | ||
330 | nouveau_gpuobj_ref(NULL, &ramfc); | 339 | nouveau_gpuobj_ref(NULL, &ramfc); |
331 | nouveau_gpuobj_ref(NULL, &chan->cache); | 340 | nouveau_gpuobj_ref(NULL, &chan->cache); |
332 | } | 341 | } |