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-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c15
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c16
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c22
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c10
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c16
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c20
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c22
-rw-r--r--arch/arm/mach-omap2/board-rx51-video.c15
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c15
-rw-r--r--arch/arm/mach-omap2/display.c45
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c310
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c284
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c433
-rw-r--r--arch/arm/plat-omap/include/plat/display.h11
-rw-r--r--arch/arm/plat-omap/include/plat/l3_2xxx.h20
-rw-r--r--arch/arm/plat-omap/include/plat/l3_3xxx.h20
-rw-r--r--arch/arm/plat-omap/include/plat/l4_2xxx.h24
-rw-r--r--arch/arm/plat-omap/include/plat/l4_3xxx.h10
21 files changed, 1185 insertions, 146 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ee72a9787bf..1c3635d7f4c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -245,3 +245,6 @@ obj-y += $(smc91x-m) $(smc91x-y)
245smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o 245smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
246obj-y += $(smsc911x-m) $(smsc911x-y) 246obj-y += $(smsc911x-m) $(smsc911x-y)
247obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 247obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
248
249disp-$(CONFIG_OMAP2_DSS) := display.o
250obj-y += $(disp-m) $(disp-y)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 76a260f7c00..8950ecc9b94 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -307,17 +307,8 @@ static struct omap_dss_board_info sdp3430_dss_data = {
307 .default_device = &sdp3430_lcd_device, 307 .default_device = &sdp3430_lcd_device,
308}; 308};
309 309
310static struct platform_device sdp3430_dss_device = { 310static struct regulator_consumer_supply sdp3430_vdda_dac_supply =
311 .name = "omapdss", 311 REGULATOR_SUPPLY("vdda_dac", "omapdss");
312 .id = -1,
313 .dev = {
314 .platform_data = &sdp3430_dss_data,
315 },
316};
317
318static struct platform_device *sdp3430_devices[] __initdata = {
319 &sdp3430_dss_device,
320};
321 312
322static struct omap_board_config_kernel sdp3430_config[] __initdata = { 313static struct omap_board_config_kernel sdp3430_config[] __initdata = {
323}; 314};
@@ -798,7 +789,7 @@ static void __init omap_3430sdp_init(void)
798{ 789{
799 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 790 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
800 omap3430_i2c_init(); 791 omap3430_i2c_init();
801 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); 792 omap_display_init(&sdp3430_dss_data);
802 if (omap_rev() > OMAP3430_REV_ES1_0) 793 if (omap_rev() > OMAP3430_REV_ES1_0)
803 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; 794 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
804 else 795 else
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 8532d6e0d53..634fe65b33c 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -378,24 +378,12 @@ static struct omap_dss_board_info am3517_evm_dss_data = {
378 .default_device = &am3517_evm_lcd_device, 378 .default_device = &am3517_evm_lcd_device,
379}; 379};
380 380
381static struct platform_device am3517_evm_dss_device = {
382 .name = "omapdss",
383 .id = -1,
384 .dev = {
385 .platform_data = &am3517_evm_dss_data,
386 },
387};
388
389/* 381/*
390 * Board initialization 382 * Board initialization
391 */ 383 */
392static struct omap_board_config_kernel am3517_evm_config[] __initdata = { 384static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
393}; 385};
394 386
395static struct platform_device *am3517_evm_devices[] __initdata = {
396 &am3517_evm_dss_device,
397};
398
399static void __init am3517_evm_init_early(void) 387static void __init am3517_evm_init_early(void)
400{ 388{
401 omap_board_config = am3517_evm_config; 389 omap_board_config = am3517_evm_config;
@@ -498,9 +486,7 @@ static void __init am3517_evm_init(void)
498 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 486 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
499 487
500 am3517_evm_i2c_init(); 488 am3517_evm_i2c_init();
501 platform_add_devices(am3517_evm_devices, 489 omap_display_init(&am3517_evm_dss_data);
502 ARRAY_SIZE(am3517_evm_devices));
503
504 omap_serial_init(); 490 omap_serial_init();
505 491
506 /* Configure GPIO for EHCI port */ 492 /* Configure GPIO for EHCI port */
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 9e4de92a579..7311824be99 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -401,14 +401,6 @@ static struct omap_dss_board_info cm_t35_dss_data = {
401 .default_device = &cm_t35_dvi_device, 401 .default_device = &cm_t35_dvi_device,
402}; 402};
403 403
404static struct platform_device cm_t35_dss_device = {
405 .name = "omapdss",
406 .id = -1,
407 .dev = {
408 .platform_data = &cm_t35_dss_data,
409 },
410};
411
412static struct omap2_mcspi_device_config tdo24m_mcspi_config = { 404static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
413 .turbo_mode = 0, 405 .turbo_mode = 0,
414 .single_channel = 1, /* 0: slave, 1: master */ 406 .single_channel = 1, /* 0: slave, 1: master */
@@ -468,7 +460,7 @@ static void __init cm_t35_init_display(void)
468 msleep(50); 460 msleep(50);
469 gpio_set_value(lcd_en_gpio, 1); 461 gpio_set_value(lcd_en_gpio, 1);
470 462
471 err = platform_device_register(&cm_t35_dss_device); 463 err = omap_display_init(&cm_t35_dss_data);
472 if (err) { 464 if (err) {
473 pr_err("CM-T35: failed to register DSS device\n"); 465 pr_err("CM-T35: failed to register DSS device\n");
474 goto err_dev_reg; 466 goto err_dev_reg;
@@ -495,15 +487,11 @@ static struct regulator_consumer_supply cm_t35_vsim_supply = {
495 .supply = "vmmc_aux", 487 .supply = "vmmc_aux",
496}; 488};
497 489
498static struct regulator_consumer_supply cm_t35_vdac_supply = { 490static struct regulator_consumer_supply cm_t35_vdac_supply =
499 .supply = "vdda_dac", 491 REGULATOR_SUPPLY("vdda_dac", "omapdss");
500 .dev = &cm_t35_dss_device.dev,
501};
502 492
503static struct regulator_consumer_supply cm_t35_vdvi_supply = { 493static struct regulator_consumer_supply cm_t35_vdvi_supply =
504 .supply = "vdvi", 494 REGULATOR_SUPPLY("vdvi", "omapdss");
505 .dev = &cm_t35_dss_device.dev,
506};
507 495
508/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 496/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
509static struct regulator_init_data cm_t35_vmmc1 = { 497static struct regulator_init_data cm_t35_vmmc1 = {
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index af742887e83..54abdd06436 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -195,14 +195,6 @@ static struct omap_dss_board_info devkit8000_dss_data = {
195 .default_device = &devkit8000_lcd_device, 195 .default_device = &devkit8000_lcd_device,
196}; 196};
197 197
198static struct platform_device devkit8000_dss_device = {
199 .name = "omapdss",
200 .id = -1,
201 .dev = {
202 .platform_data = &devkit8000_dss_data,
203 },
204};
205
206static struct regulator_consumer_supply devkit8000_vdda_dac_supply = 198static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
207 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 199 REGULATOR_SUPPLY("vdda_dac", "omapdss");
208 200
@@ -579,7 +571,6 @@ static void __init omap_dm9000_init(void)
579} 571}
580 572
581static struct platform_device *devkit8000_devices[] __initdata = { 573static struct platform_device *devkit8000_devices[] __initdata = {
582 &devkit8000_dss_device,
583 &leds_gpio, 574 &leds_gpio,
584 &keys_gpio, 575 &keys_gpio,
585 &omap_dm9000_dev, 576 &omap_dm9000_dev,
@@ -801,6 +792,7 @@ static void __init devkit8000_init(void)
801 platform_add_devices(devkit8000_devices, 792 platform_add_devices(devkit8000_devices,
802 ARRAY_SIZE(devkit8000_devices)); 793 ARRAY_SIZE(devkit8000_devices));
803 794
795 omap_display_init(&devkit8000_dss_data);
804 spi_register_board_info(devkit8000_spi_board_info, 796 spi_register_board_info(devkit8000_spi_board_info,
805 ARRAY_SIZE(devkit8000_spi_board_info)); 797 ARRAY_SIZE(devkit8000_spi_board_info));
806 798
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index dd0b1ac3b66..54e6318f4a8 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -485,18 +485,8 @@ static struct omap_dss_board_info igep2_dss_data = {
485 .default_device = &igep2_dvi_device, 485 .default_device = &igep2_dvi_device,
486}; 486};
487 487
488static struct platform_device igep2_dss_device = { 488static struct regulator_consumer_supply igep2_vpll2_supply =
489 .name = "omapdss", 489 REGULATOR_SUPPLY("vdds_dsi", "omapdss");
490 .id = -1,
491 .dev = {
492 .platform_data = &igep2_dss_data,
493 },
494};
495
496static struct regulator_consumer_supply igep2_vpll2_supply = {
497 .supply = "vdds_dsi",
498 .dev = &igep2_dss_device.dev,
499};
500 490
501static struct regulator_init_data igep2_vpll2 = { 491static struct regulator_init_data igep2_vpll2 = {
502 .constraints = { 492 .constraints = {
@@ -521,7 +511,6 @@ static void __init igep2_display_init(void)
521} 511}
522 512
523static struct platform_device *igep2_devices[] __initdata = { 513static struct platform_device *igep2_devices[] __initdata = {
524 &igep2_dss_device,
525 &igep2_vwlan_device, 514 &igep2_vwlan_device,
526}; 515};
527 516
@@ -696,6 +685,7 @@ static void __init igep2_init(void)
696 /* Register I2C busses and drivers */ 685 /* Register I2C busses and drivers */
697 igep2_i2c_init(); 686 igep2_i2c_init();
698 platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices)); 687 platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
688 omap_display_init(&igep2_dss_data);
699 omap_serial_init(); 689 omap_serial_init();
700 usb_musb_init(&musb_board_data); 690 usb_musb_init(&musb_board_data);
701 usb_ehci_init(&ehci_pdata); 691 usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 19bcd004d60..a1faea3b776 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -228,14 +228,6 @@ static struct omap_dss_board_info beagle_dss_data = {
228 .default_device = &beagle_dvi_device, 228 .default_device = &beagle_dvi_device,
229}; 229};
230 230
231static struct platform_device beagle_dss_device = {
232 .name = "omapdss",
233 .id = -1,
234 .dev = {
235 .platform_data = &beagle_dss_data,
236 },
237};
238
239static struct regulator_consumer_supply beagle_vdac_supply = 231static struct regulator_consumer_supply beagle_vdac_supply =
240 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 232 REGULATOR_SUPPLY("vdda_dac", "omapdss");
241 233
@@ -554,7 +546,6 @@ static void __init omap3_beagle_init_irq(void)
554static struct platform_device *omap3_beagle_devices[] __initdata = { 546static struct platform_device *omap3_beagle_devices[] __initdata = {
555 &leds_gpio, 547 &leds_gpio,
556 &keys_gpio, 548 &keys_gpio,
557 &beagle_dss_device,
558}; 549};
559 550
560static void __init omap3beagle_flash_init(void) 551static void __init omap3beagle_flash_init(void)
@@ -621,6 +612,7 @@ static void __init omap3_beagle_init(void)
621 omap3_beagle_i2c_init(); 612 omap3_beagle_i2c_init();
622 platform_add_devices(omap3_beagle_devices, 613 platform_add_devices(omap3_beagle_devices,
623 ARRAY_SIZE(omap3_beagle_devices)); 614 ARRAY_SIZE(omap3_beagle_devices));
615 omap_display_init(&beagle_dss_data);
624 omap_serial_init(); 616 omap_serial_init();
625 617
626 omap_mux_init_gpio(170, OMAP_PIN_INPUT); 618 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index d4a11571229..5364147892c 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -363,14 +363,6 @@ static struct omap_dss_board_info omap3_evm_dss_data = {
363 .default_device = &omap3_evm_lcd_device, 363 .default_device = &omap3_evm_lcd_device,
364}; 364};
365 365
366static struct platform_device omap3_evm_dss_device = {
367 .name = "omapdss",
368 .id = -1,
369 .dev = {
370 .platform_data = &omap3_evm_dss_data,
371 },
372};
373
374static struct regulator_consumer_supply omap3evm_vmmc1_supply = { 366static struct regulator_consumer_supply omap3evm_vmmc1_supply = {
375 .supply = "vmmc", 367 .supply = "vmmc",
376}; 368};
@@ -551,10 +543,8 @@ static struct twl4030_codec_data omap3evm_codec_data = {
551 .audio = &omap3evm_audio_data, 543 .audio = &omap3evm_audio_data,
552}; 544};
553 545
554static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = { 546static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
555 .supply = "vdda_dac", 547 REGULATOR_SUPPLY("vdda_dac", "omapdss");
556 .dev = &omap3_evm_dss_device.dev,
557};
558 548
559/* VDAC for DSS driving S-Video */ 549/* VDAC for DSS driving S-Video */
560static struct regulator_init_data omap3_evm_vdac = { 550static struct regulator_init_data omap3_evm_vdac = {
@@ -748,10 +738,6 @@ static void __init omap3_evm_init_early(void)
748 omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL); 738 omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
749} 739}
750 740
751static struct platform_device *omap3_evm_devices[] __initdata = {
752 &omap3_evm_dss_device,
753};
754
755static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { 741static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
756 742
757 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 743 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
@@ -840,7 +826,7 @@ static void __init omap3_evm_init(void)
840 826
841 omap3_evm_i2c_init(); 827 omap3_evm_i2c_init();
842 828
843 platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); 829 omap_display_init(&omap3_evm_dss_data);
844 830
845 spi_register_board_info(omap3evm_spi_board_info, 831 spi_register_board_info(omap3evm_spi_board_info,
846 ARRAY_SIZE(omap3evm_spi_board_info)); 832 ARRAY_SIZE(omap3evm_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index b91f74ce3a9..17ef5479c7f 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -253,14 +253,6 @@ static struct omap_dss_board_info pandora_dss_data = {
253 .default_device = &pandora_lcd_device, 253 .default_device = &pandora_lcd_device,
254}; 254};
255 255
256static struct platform_device pandora_dss_device = {
257 .name = "omapdss",
258 .id = -1,
259 .dev = {
260 .platform_data = &pandora_dss_data,
261 },
262};
263
264static void pandora_wl1251_init_card(struct mmc_card *card) 256static void pandora_wl1251_init_card(struct mmc_card *card)
265{ 257{
266 /* 258 /*
@@ -676,7 +668,6 @@ fail:
676static struct platform_device *omap3pandora_devices[] __initdata = { 668static struct platform_device *omap3pandora_devices[] __initdata = {
677 &pandora_leds_gpio, 669 &pandora_leds_gpio,
678 &pandora_keys_gpio, 670 &pandora_keys_gpio,
679 &pandora_dss_device,
680 &pandora_vwlan_device, 671 &pandora_vwlan_device,
681}; 672};
682 673
@@ -711,6 +702,7 @@ static void __init omap3pandora_init(void)
711 pandora_wl1251_init(); 702 pandora_wl1251_init();
712 platform_add_devices(omap3pandora_devices, 703 platform_add_devices(omap3pandora_devices,
713 ARRAY_SIZE(omap3pandora_devices)); 704 ARRAY_SIZE(omap3pandora_devices));
705 omap_display_init(&pandora_dss_data);
714 omap_serial_init(); 706 omap_serial_init();
715 spi_register_board_info(omap3pandora_spi_board_info, 707 spi_register_board_info(omap3pandora_spi_board_info,
716 ARRAY_SIZE(omap3pandora_spi_board_info)); 708 ARRAY_SIZE(omap3pandora_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 5d1ccef6916..07006c323fc 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -240,14 +240,6 @@ static struct omap_dss_board_info omap3_stalker_dss_data = {
240 .default_device = &omap3_stalker_dvi_device, 240 .default_device = &omap3_stalker_dvi_device,
241}; 241};
242 242
243static struct platform_device omap3_stalker_dss_device = {
244 .name = "omapdss",
245 .id = -1,
246 .dev = {
247 .platform_data = &omap3_stalker_dss_data,
248 },
249};
250
251static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { 243static struct regulator_consumer_supply omap3stalker_vmmc1_supply = {
252 .supply = "vmmc", 244 .supply = "vmmc",
253}; 245};
@@ -448,10 +440,8 @@ static struct twl4030_codec_data omap3stalker_codec_data = {
448 .audio = &omap3stalker_audio_data, 440 .audio = &omap3stalker_audio_data,
449}; 441};
450 442
451static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = { 443static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
452 .supply = "vdda_dac", 444 REGULATOR_SUPPLY("vdda_dac", "omapdss");
453 .dev = &omap3_stalker_dss_device.dev,
454};
455 445
456/* VDAC for DSS driving S-Video */ 446/* VDAC for DSS driving S-Video */
457static struct regulator_init_data omap3_stalker_vdac = { 447static struct regulator_init_data omap3_stalker_vdac = {
@@ -469,10 +459,8 @@ static struct regulator_init_data omap3_stalker_vdac = {
469}; 459};
470 460
471/* VPLL2 for digital video outputs */ 461/* VPLL2 for digital video outputs */
472static struct regulator_consumer_supply omap3_stalker_vpll2_supply = { 462static struct regulator_consumer_supply omap3_stalker_vpll2_supply =
473 .supply = "vdds_dsi", 463 REGULATOR_SUPPLY("vdds_dsi", "omapdss");
474 .dev = &omap3_stalker_lcd_device.dev,
475};
476 464
477static struct regulator_init_data omap3_stalker_vpll2 = { 465static struct regulator_init_data omap3_stalker_vpll2 = {
478 .constraints = { 466 .constraints = {
@@ -608,7 +596,6 @@ static void __init omap3_stalker_init_irq(void)
608} 596}
609 597
610static struct platform_device *omap3_stalker_devices[] __initdata = { 598static struct platform_device *omap3_stalker_devices[] __initdata = {
611 &omap3_stalker_dss_device,
612 &keys_gpio, 599 &keys_gpio,
613}; 600};
614 601
@@ -648,6 +635,7 @@ static void __init omap3_stalker_init(void)
648 platform_add_devices(omap3_stalker_devices, 635 platform_add_devices(omap3_stalker_devices,
649 ARRAY_SIZE(omap3_stalker_devices)); 636 ARRAY_SIZE(omap3_stalker_devices));
650 637
638 omap_display_init(&omap3_stalker_dss_data);
651 spi_register_board_info(omap3stalker_spi_board_info, 639 spi_register_board_info(omap3stalker_spi_board_info,
652 ARRAY_SIZE(omap3stalker_spi_board_info)); 640 ARRAY_SIZE(omap3stalker_spi_board_info));
653 641
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index acd670054d9..89a66db8b77 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -66,18 +66,6 @@ static struct omap_dss_board_info rx51_dss_board_info = {
66 .default_device = &rx51_lcd_device, 66 .default_device = &rx51_lcd_device,
67}; 67};
68 68
69struct platform_device rx51_display_device = {
70 .name = "omapdss",
71 .id = -1,
72 .dev = {
73 .platform_data = &rx51_dss_board_info,
74 },
75};
76
77static struct platform_device *rx51_video_devices[] __initdata = {
78 &rx51_display_device,
79};
80
81static int __init rx51_video_init(void) 69static int __init rx51_video_init(void)
82{ 70{
83 if (!machine_is_nokia_rx51()) 71 if (!machine_is_nokia_rx51())
@@ -95,8 +83,7 @@ static int __init rx51_video_init(void)
95 83
96 gpio_direction_output(RX51_LCD_RESET_GPIO, 1); 84 gpio_direction_output(RX51_LCD_RESET_GPIO, 1);
97 85
98 platform_add_devices(rx51_video_devices, 86 omap_display_init(&rx51_dss_board_info);
99 ARRAY_SIZE(rx51_video_devices));
100 return 0; 87 return 0;
101} 88}
102 89
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index 6bcd43657ae..37b84c2b850 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -130,14 +130,6 @@ static struct omap_dss_board_info zoom_dss_data = {
130 .default_device = &zoom_lcd_device, 130 .default_device = &zoom_lcd_device,
131}; 131};
132 132
133static struct platform_device zoom_dss_device = {
134 .name = "omapdss",
135 .id = -1,
136 .dev = {
137 .platform_data = &zoom_dss_data,
138 },
139};
140
141static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { 133static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
142 .turbo_mode = 1, 134 .turbo_mode = 1,
143 .single_channel = 1, /* 0: slave, 1: master */ 135 .single_channel = 1, /* 0: slave, 1: master */
@@ -153,14 +145,9 @@ static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
153 }, 145 },
154}; 146};
155 147
156static struct platform_device *zoom_display_devices[] __initdata = {
157 &zoom_dss_device,
158};
159
160void __init zoom_display_init(void) 148void __init zoom_display_init(void)
161{ 149{
162 platform_add_devices(zoom_display_devices, 150 omap_display_init(&zoom_dss_data);
163 ARRAY_SIZE(zoom_display_devices));
164 spi_register_board_info(nec_8048_spi_board_info, 151 spi_register_board_info(nec_8048_spi_board_info,
165 ARRAY_SIZE(nec_8048_spi_board_info)); 152 ARRAY_SIZE(nec_8048_spi_board_info));
166 zoom_lcd_panel_init(); 153 zoom_lcd_panel_init();
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
new file mode 100644
index 00000000000..b18db84b034
--- /dev/null
+++ b/arch/arm/mach-omap2/display.c
@@ -0,0 +1,45 @@
1/*
2 * OMAP2plus display device setup / initialization.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Senthilvadivu Guruswamy
6 * Sumit Semwal
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24
25#include <plat/display.h>
26
27static struct platform_device omap_display_device = {
28 .name = "omapdss",
29 .id = -1,
30 .dev = {
31 .platform_data = NULL,
32 },
33};
34
35int __init omap_display_init(struct omap_dss_board_info *board_data)
36{
37 int r = 0;
38 omap_display_device.dev.platform_data = board_data;
39
40 r = platform_device_register(&omap_display_device);
41 if (r < 0)
42 printk(KERN_ERR "Unable to register OMAP-Display device\n");
43
44 return r;
45}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 7fffd340c76..f323c6bb22d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -19,6 +19,8 @@
19#include <plat/i2c.h> 19#include <plat/i2c.h>
20#include <plat/gpio.h> 20#include <plat/gpio.h>
21#include <plat/mcspi.h> 21#include <plat/mcspi.h>
22#include <plat/l3_2xxx.h>
23#include <plat/l4_2xxx.h>
22 24
23#include "omap_hwmod_common_data.h" 25#include "omap_hwmod_common_data.h"
24 26
@@ -39,6 +41,10 @@ static struct omap_hwmod omap2420_mpu_hwmod;
39static struct omap_hwmod omap2420_iva_hwmod; 41static struct omap_hwmod omap2420_iva_hwmod;
40static struct omap_hwmod omap2420_l3_main_hwmod; 42static struct omap_hwmod omap2420_l3_main_hwmod;
41static struct omap_hwmod omap2420_l4_core_hwmod; 43static struct omap_hwmod omap2420_l4_core_hwmod;
44static struct omap_hwmod omap2420_dss_core_hwmod;
45static struct omap_hwmod omap2420_dss_dispc_hwmod;
46static struct omap_hwmod omap2420_dss_rfbi_hwmod;
47static struct omap_hwmod omap2420_dss_venc_hwmod;
42static struct omap_hwmod omap2420_wd_timer2_hwmod; 48static struct omap_hwmod omap2420_wd_timer2_hwmod;
43static struct omap_hwmod omap2420_gpio1_hwmod; 49static struct omap_hwmod omap2420_gpio1_hwmod;
44static struct omap_hwmod omap2420_gpio2_hwmod; 50static struct omap_hwmod omap2420_gpio2_hwmod;
@@ -67,6 +73,19 @@ static struct omap_hwmod_ocp_if *omap2420_l3_main_slaves[] = {
67 &omap2420_mpu__l3_main, 73 &omap2420_mpu__l3_main,
68}; 74};
69 75
76/* DSS -> l3 */
77static struct omap_hwmod_ocp_if omap2420_dss__l3 = {
78 .master = &omap2420_dss_core_hwmod,
79 .slave = &omap2420_l3_main_hwmod,
80 .fw = {
81 .omap2 = {
82 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
83 .flags = OMAP_FIREWALL_L3,
84 }
85 },
86 .user = OCP_USER_MPU | OCP_USER_SDMA,
87};
88
70/* Master interfaces on the L3 interconnect */ 89/* Master interfaces on the L3 interconnect */
71static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = { 90static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = {
72 &omap2420_l3_main__l4_core, 91 &omap2420_l3_main__l4_core,
@@ -509,6 +528,291 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
509 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 528 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
510}; 529};
511 530
531/*
532 * 'dss' class
533 * display sub-system
534 */
535
536static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = {
537 .rev_offs = 0x0000,
538 .sysc_offs = 0x0010,
539 .syss_offs = 0x0014,
540 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
541 .sysc_fields = &omap_hwmod_sysc_type1,
542};
543
544static struct omap_hwmod_class omap2420_dss_hwmod_class = {
545 .name = "dss",
546 .sysc = &omap2420_dss_sysc,
547};
548
549/* dss */
550static struct omap_hwmod_irq_info omap2420_dss_irqs[] = {
551 { .irq = 25 },
552};
553
554static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
555 { .name = "dispc", .dma_req = 5 },
556};
557
558/* dss */
559/* dss master ports */
560static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
561 &omap2420_dss__l3,
562};
563
564static struct omap_hwmod_addr_space omap2420_dss_addrs[] = {
565 {
566 .pa_start = 0x48050000,
567 .pa_end = 0x480503FF,
568 .flags = ADDR_TYPE_RT
569 },
570};
571
572/* l4_core -> dss */
573static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
574 .master = &omap2420_l4_core_hwmod,
575 .slave = &omap2420_dss_core_hwmod,
576 .clk = "dss_ick",
577 .addr = omap2420_dss_addrs,
578 .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs),
579 .fw = {
580 .omap2 = {
581 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
582 .flags = OMAP_FIREWALL_L4,
583 }
584 },
585 .user = OCP_USER_MPU | OCP_USER_SDMA,
586};
587
588/* dss slave ports */
589static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
590 &omap2420_l4_core__dss,
591};
592
593static struct omap_hwmod_opt_clk dss_opt_clks[] = {
594 { .role = "tv_clk", .clk = "dss_54m_fck" },
595 { .role = "sys_clk", .clk = "dss2_fck" },
596};
597
598static struct omap_hwmod omap2420_dss_core_hwmod = {
599 .name = "dss_core",
600 .class = &omap2420_dss_hwmod_class,
601 .main_clk = "dss1_fck", /* instead of dss_fck */
602 .mpu_irqs = omap2420_dss_irqs,
603 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dss_irqs),
604 .sdma_reqs = omap2420_dss_sdma_chs,
605 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs),
606 .prcm = {
607 .omap2 = {
608 .prcm_reg_id = 1,
609 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
610 .module_offs = CORE_MOD,
611 .idlest_reg_id = 1,
612 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
613 },
614 },
615 .opt_clks = dss_opt_clks,
616 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
617 .slaves = omap2420_dss_slaves,
618 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
619 .masters = omap2420_dss_masters,
620 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
621 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
622 .flags = HWMOD_NO_IDLEST,
623};
624
625/*
626 * 'dispc' class
627 * display controller
628 */
629
630static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = {
631 .rev_offs = 0x0000,
632 .sysc_offs = 0x0010,
633 .syss_offs = 0x0014,
634 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
635 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
636 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
637 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
638 .sysc_fields = &omap_hwmod_sysc_type1,
639};
640
641static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
642 .name = "dispc",
643 .sysc = &omap2420_dispc_sysc,
644};
645
646static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
647 {
648 .pa_start = 0x48050400,
649 .pa_end = 0x480507FF,
650 .flags = ADDR_TYPE_RT
651 },
652};
653
654/* l4_core -> dss_dispc */
655static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
656 .master = &omap2420_l4_core_hwmod,
657 .slave = &omap2420_dss_dispc_hwmod,
658 .clk = "dss_ick",
659 .addr = omap2420_dss_dispc_addrs,
660 .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs),
661 .fw = {
662 .omap2 = {
663 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
664 .flags = OMAP_FIREWALL_L4,
665 }
666 },
667 .user = OCP_USER_MPU | OCP_USER_SDMA,
668};
669
670/* dss_dispc slave ports */
671static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
672 &omap2420_l4_core__dss_dispc,
673};
674
675static struct omap_hwmod omap2420_dss_dispc_hwmod = {
676 .name = "dss_dispc",
677 .class = &omap2420_dispc_hwmod_class,
678 .main_clk = "dss1_fck",
679 .prcm = {
680 .omap2 = {
681 .prcm_reg_id = 1,
682 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
683 .module_offs = CORE_MOD,
684 .idlest_reg_id = 1,
685 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
686 },
687 },
688 .slaves = omap2420_dss_dispc_slaves,
689 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
690 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
691 .flags = HWMOD_NO_IDLEST,
692};
693
694/*
695 * 'rfbi' class
696 * remote frame buffer interface
697 */
698
699static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = {
700 .rev_offs = 0x0000,
701 .sysc_offs = 0x0010,
702 .syss_offs = 0x0014,
703 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
704 SYSC_HAS_AUTOIDLE),
705 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
706 .sysc_fields = &omap_hwmod_sysc_type1,
707};
708
709static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
710 .name = "rfbi",
711 .sysc = &omap2420_rfbi_sysc,
712};
713
714static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = {
715 {
716 .pa_start = 0x48050800,
717 .pa_end = 0x48050BFF,
718 .flags = ADDR_TYPE_RT
719 },
720};
721
722/* l4_core -> dss_rfbi */
723static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
724 .master = &omap2420_l4_core_hwmod,
725 .slave = &omap2420_dss_rfbi_hwmod,
726 .clk = "dss_ick",
727 .addr = omap2420_dss_rfbi_addrs,
728 .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs),
729 .fw = {
730 .omap2 = {
731 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
732 .flags = OMAP_FIREWALL_L4,
733 }
734 },
735 .user = OCP_USER_MPU | OCP_USER_SDMA,
736};
737
738/* dss_rfbi slave ports */
739static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
740 &omap2420_l4_core__dss_rfbi,
741};
742
743static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
744 .name = "dss_rfbi",
745 .class = &omap2420_rfbi_hwmod_class,
746 .main_clk = "dss1_fck",
747 .prcm = {
748 .omap2 = {
749 .prcm_reg_id = 1,
750 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
751 .module_offs = CORE_MOD,
752 },
753 },
754 .slaves = omap2420_dss_rfbi_slaves,
755 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
756 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
757 .flags = HWMOD_NO_IDLEST,
758};
759
760/*
761 * 'venc' class
762 * video encoder
763 */
764
765static struct omap_hwmod_class omap2420_venc_hwmod_class = {
766 .name = "venc",
767};
768
769/* dss_venc */
770static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = {
771 {
772 .pa_start = 0x48050C00,
773 .pa_end = 0x48050FFF,
774 .flags = ADDR_TYPE_RT
775 },
776};
777
778/* l4_core -> dss_venc */
779static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
780 .master = &omap2420_l4_core_hwmod,
781 .slave = &omap2420_dss_venc_hwmod,
782 .clk = "dss_54m_fck",
783 .addr = omap2420_dss_venc_addrs,
784 .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs),
785 .fw = {
786 .omap2 = {
787 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
788 .flags = OMAP_FIREWALL_L4,
789 }
790 },
791 .user = OCP_USER_MPU | OCP_USER_SDMA,
792};
793
794/* dss_venc slave ports */
795static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
796 &omap2420_l4_core__dss_venc,
797};
798
799static struct omap_hwmod omap2420_dss_venc_hwmod = {
800 .name = "dss_venc",
801 .class = &omap2420_venc_hwmod_class,
802 .main_clk = "dss1_fck",
803 .prcm = {
804 .omap2 = {
805 .prcm_reg_id = 1,
806 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
807 .module_offs = CORE_MOD,
808 },
809 },
810 .slaves = omap2420_dss_venc_slaves,
811 .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves),
812 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
813 .flags = HWMOD_NO_IDLEST,
814};
815
512/* I2C common */ 816/* I2C common */
513static struct omap_hwmod_class_sysconfig i2c_sysc = { 817static struct omap_hwmod_class_sysconfig i2c_sysc = {
514 .rev_offs = 0x00, 818 .rev_offs = 0x00,
@@ -1026,6 +1330,12 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
1026 &omap2420_uart1_hwmod, 1330 &omap2420_uart1_hwmod,
1027 &omap2420_uart2_hwmod, 1331 &omap2420_uart2_hwmod,
1028 &omap2420_uart3_hwmod, 1332 &omap2420_uart3_hwmod,
1333 /* dss class */
1334 &omap2420_dss_core_hwmod,
1335 &omap2420_dss_dispc_hwmod,
1336 &omap2420_dss_rfbi_hwmod,
1337 &omap2420_dss_venc_hwmod,
1338 /* i2c class */
1029 &omap2420_i2c1_hwmod, 1339 &omap2420_i2c1_hwmod,
1030 &omap2420_i2c2_hwmod, 1340 &omap2420_i2c2_hwmod,
1031 1341
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 7ba688a1c84..de0015d3843 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -19,6 +19,7 @@
19#include <plat/i2c.h> 19#include <plat/i2c.h>
20#include <plat/gpio.h> 20#include <plat/gpio.h>
21#include <plat/mcspi.h> 21#include <plat/mcspi.h>
22#include <plat/l3_2xxx.h>
22 23
23#include "omap_hwmod_common_data.h" 24#include "omap_hwmod_common_data.h"
24 25
@@ -39,6 +40,10 @@ static struct omap_hwmod omap2430_mpu_hwmod;
39static struct omap_hwmod omap2430_iva_hwmod; 40static struct omap_hwmod omap2430_iva_hwmod;
40static struct omap_hwmod omap2430_l3_main_hwmod; 41static struct omap_hwmod omap2430_l3_main_hwmod;
41static struct omap_hwmod omap2430_l4_core_hwmod; 42static struct omap_hwmod omap2430_l4_core_hwmod;
43static struct omap_hwmod omap2430_dss_core_hwmod;
44static struct omap_hwmod omap2430_dss_dispc_hwmod;
45static struct omap_hwmod omap2430_dss_rfbi_hwmod;
46static struct omap_hwmod omap2430_dss_venc_hwmod;
42static struct omap_hwmod omap2430_wd_timer2_hwmod; 47static struct omap_hwmod omap2430_wd_timer2_hwmod;
43static struct omap_hwmod omap2430_gpio1_hwmod; 48static struct omap_hwmod omap2430_gpio1_hwmod;
44static struct omap_hwmod omap2430_gpio2_hwmod; 49static struct omap_hwmod omap2430_gpio2_hwmod;
@@ -69,6 +74,19 @@ static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
69 &omap2430_mpu__l3_main, 74 &omap2430_mpu__l3_main,
70}; 75};
71 76
77/* DSS -> l3 */
78static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
79 .master = &omap2430_dss_core_hwmod,
80 .slave = &omap2430_l3_main_hwmod,
81 .fw = {
82 .omap2 = {
83 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
84 .flags = OMAP_FIREWALL_L3,
85 }
86 },
87 .user = OCP_USER_MPU | OCP_USER_SDMA,
88};
89
72/* Master interfaces on the L3 interconnect */ 90/* Master interfaces on the L3 interconnect */
73static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { 91static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
74 &omap2430_l3_main__l4_core, 92 &omap2430_l3_main__l4_core,
@@ -566,6 +584,266 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
566 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 584 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
567}; 585};
568 586
587/*
588 * 'dss' class
589 * display sub-system
590 */
591
592static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = {
593 .rev_offs = 0x0000,
594 .sysc_offs = 0x0010,
595 .syss_offs = 0x0014,
596 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
597 .sysc_fields = &omap_hwmod_sysc_type1,
598};
599
600static struct omap_hwmod_class omap2430_dss_hwmod_class = {
601 .name = "dss",
602 .sysc = &omap2430_dss_sysc,
603};
604
605/* dss */
606static struct omap_hwmod_irq_info omap2430_dss_irqs[] = {
607 { .irq = 25 },
608};
609static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
610 { .name = "dispc", .dma_req = 5 },
611};
612
613/* dss */
614/* dss master ports */
615static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
616 &omap2430_dss__l3,
617};
618
619static struct omap_hwmod_addr_space omap2430_dss_addrs[] = {
620 {
621 .pa_start = 0x48050000,
622 .pa_end = 0x480503FF,
623 .flags = ADDR_TYPE_RT
624 },
625};
626
627/* l4_core -> dss */
628static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
629 .master = &omap2430_l4_core_hwmod,
630 .slave = &omap2430_dss_core_hwmod,
631 .clk = "dss_ick",
632 .addr = omap2430_dss_addrs,
633 .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs),
634 .user = OCP_USER_MPU | OCP_USER_SDMA,
635};
636
637/* dss slave ports */
638static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
639 &omap2430_l4_core__dss,
640};
641
642static struct omap_hwmod_opt_clk dss_opt_clks[] = {
643 { .role = "tv_clk", .clk = "dss_54m_fck" },
644 { .role = "sys_clk", .clk = "dss2_fck" },
645};
646
647static struct omap_hwmod omap2430_dss_core_hwmod = {
648 .name = "dss_core",
649 .class = &omap2430_dss_hwmod_class,
650 .main_clk = "dss1_fck", /* instead of dss_fck */
651 .mpu_irqs = omap2430_dss_irqs,
652 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dss_irqs),
653 .sdma_reqs = omap2430_dss_sdma_chs,
654 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs),
655 .prcm = {
656 .omap2 = {
657 .prcm_reg_id = 1,
658 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
659 .module_offs = CORE_MOD,
660 .idlest_reg_id = 1,
661 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
662 },
663 },
664 .opt_clks = dss_opt_clks,
665 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
666 .slaves = omap2430_dss_slaves,
667 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
668 .masters = omap2430_dss_masters,
669 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
670 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
671 .flags = HWMOD_NO_IDLEST,
672};
673
674/*
675 * 'dispc' class
676 * display controller
677 */
678
679static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = {
680 .rev_offs = 0x0000,
681 .sysc_offs = 0x0010,
682 .syss_offs = 0x0014,
683 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
684 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
685 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
686 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
687 .sysc_fields = &omap_hwmod_sysc_type1,
688};
689
690static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
691 .name = "dispc",
692 .sysc = &omap2430_dispc_sysc,
693};
694
695static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
696 {
697 .pa_start = 0x48050400,
698 .pa_end = 0x480507FF,
699 .flags = ADDR_TYPE_RT
700 },
701};
702
703/* l4_core -> dss_dispc */
704static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
705 .master = &omap2430_l4_core_hwmod,
706 .slave = &omap2430_dss_dispc_hwmod,
707 .clk = "dss_ick",
708 .addr = omap2430_dss_dispc_addrs,
709 .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs),
710 .user = OCP_USER_MPU | OCP_USER_SDMA,
711};
712
713/* dss_dispc slave ports */
714static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
715 &omap2430_l4_core__dss_dispc,
716};
717
718static struct omap_hwmod omap2430_dss_dispc_hwmod = {
719 .name = "dss_dispc",
720 .class = &omap2430_dispc_hwmod_class,
721 .main_clk = "dss1_fck",
722 .prcm = {
723 .omap2 = {
724 .prcm_reg_id = 1,
725 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
726 .module_offs = CORE_MOD,
727 .idlest_reg_id = 1,
728 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
729 },
730 },
731 .slaves = omap2430_dss_dispc_slaves,
732 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
733 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
734 .flags = HWMOD_NO_IDLEST,
735};
736
737/*
738 * 'rfbi' class
739 * remote frame buffer interface
740 */
741
742static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = {
743 .rev_offs = 0x0000,
744 .sysc_offs = 0x0010,
745 .syss_offs = 0x0014,
746 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
747 SYSC_HAS_AUTOIDLE),
748 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
749 .sysc_fields = &omap_hwmod_sysc_type1,
750};
751
752static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
753 .name = "rfbi",
754 .sysc = &omap2430_rfbi_sysc,
755};
756
757static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = {
758 {
759 .pa_start = 0x48050800,
760 .pa_end = 0x48050BFF,
761 .flags = ADDR_TYPE_RT
762 },
763};
764
765/* l4_core -> dss_rfbi */
766static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
767 .master = &omap2430_l4_core_hwmod,
768 .slave = &omap2430_dss_rfbi_hwmod,
769 .clk = "dss_ick",
770 .addr = omap2430_dss_rfbi_addrs,
771 .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs),
772 .user = OCP_USER_MPU | OCP_USER_SDMA,
773};
774
775/* dss_rfbi slave ports */
776static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
777 &omap2430_l4_core__dss_rfbi,
778};
779
780static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
781 .name = "dss_rfbi",
782 .class = &omap2430_rfbi_hwmod_class,
783 .main_clk = "dss1_fck",
784 .prcm = {
785 .omap2 = {
786 .prcm_reg_id = 1,
787 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
788 .module_offs = CORE_MOD,
789 },
790 },
791 .slaves = omap2430_dss_rfbi_slaves,
792 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
793 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
794 .flags = HWMOD_NO_IDLEST,
795};
796
797/*
798 * 'venc' class
799 * video encoder
800 */
801
802static struct omap_hwmod_class omap2430_venc_hwmod_class = {
803 .name = "venc",
804};
805
806/* dss_venc */
807static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = {
808 {
809 .pa_start = 0x48050C00,
810 .pa_end = 0x48050FFF,
811 .flags = ADDR_TYPE_RT
812 },
813};
814
815/* l4_core -> dss_venc */
816static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
817 .master = &omap2430_l4_core_hwmod,
818 .slave = &omap2430_dss_venc_hwmod,
819 .clk = "dss_54m_fck",
820 .addr = omap2430_dss_venc_addrs,
821 .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs),
822 .user = OCP_USER_MPU | OCP_USER_SDMA,
823};
824
825/* dss_venc slave ports */
826static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
827 &omap2430_l4_core__dss_venc,
828};
829
830static struct omap_hwmod omap2430_dss_venc_hwmod = {
831 .name = "dss_venc",
832 .class = &omap2430_venc_hwmod_class,
833 .main_clk = "dss1_fck",
834 .prcm = {
835 .omap2 = {
836 .prcm_reg_id = 1,
837 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
838 .module_offs = CORE_MOD,
839 },
840 },
841 .slaves = omap2430_dss_venc_slaves,
842 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
843 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
844 .flags = HWMOD_NO_IDLEST,
845};
846
569/* I2C common */ 847/* I2C common */
570static struct omap_hwmod_class_sysconfig i2c_sysc = { 848static struct omap_hwmod_class_sysconfig i2c_sysc = {
571 .rev_offs = 0x00, 849 .rev_offs = 0x00,
@@ -1240,6 +1518,12 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
1240 &omap2430_uart1_hwmod, 1518 &omap2430_uart1_hwmod,
1241 &omap2430_uart2_hwmod, 1519 &omap2430_uart2_hwmod,
1242 &omap2430_uart3_hwmod, 1520 &omap2430_uart3_hwmod,
1521 /* dss class */
1522 &omap2430_dss_core_hwmod,
1523 &omap2430_dss_dispc_hwmod,
1524 &omap2430_dss_rfbi_hwmod,
1525 &omap2430_dss_venc_hwmod,
1526 /* i2c class */
1243 &omap2430_i2c1_hwmod, 1527 &omap2430_i2c1_hwmod,
1244 &omap2430_i2c2_hwmod, 1528 &omap2430_i2c2_hwmod,
1245 1529
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 879f55f272e..e9d00122856 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -18,6 +18,7 @@
18#include <plat/cpu.h> 18#include <plat/cpu.h>
19#include <plat/dma.h> 19#include <plat/dma.h>
20#include <plat/serial.h> 20#include <plat/serial.h>
21#include <plat/l3_3xxx.h>
21#include <plat/l4_3xxx.h> 22#include <plat/l4_3xxx.h>
22#include <plat/i2c.h> 23#include <plat/i2c.h>
23#include <plat/gpio.h> 24#include <plat/gpio.h>
@@ -46,6 +47,12 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod;
46static struct omap_hwmod omap3xxx_l4_core_hwmod; 47static struct omap_hwmod omap3xxx_l4_core_hwmod;
47static struct omap_hwmod omap3xxx_l4_per_hwmod; 48static struct omap_hwmod omap3xxx_l4_per_hwmod;
48static struct omap_hwmod omap3xxx_wd_timer2_hwmod; 49static struct omap_hwmod omap3xxx_wd_timer2_hwmod;
50static struct omap_hwmod omap3430es1_dss_core_hwmod;
51static struct omap_hwmod omap3xxx_dss_core_hwmod;
52static struct omap_hwmod omap3xxx_dss_dispc_hwmod;
53static struct omap_hwmod omap3xxx_dss_dsi1_hwmod;
54static struct omap_hwmod omap3xxx_dss_rfbi_hwmod;
55static struct omap_hwmod omap3xxx_dss_venc_hwmod;
49static struct omap_hwmod omap3xxx_i2c1_hwmod; 56static struct omap_hwmod omap3xxx_i2c1_hwmod;
50static struct omap_hwmod omap3xxx_i2c2_hwmod; 57static struct omap_hwmod omap3xxx_i2c2_hwmod;
51static struct omap_hwmod omap3xxx_i2c3_hwmod; 58static struct omap_hwmod omap3xxx_i2c3_hwmod;
@@ -91,6 +98,19 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = {
91 &omap3xxx_mpu__l3_main, 98 &omap3xxx_mpu__l3_main,
92}; 99};
93 100
101/* DSS -> l3 */
102static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = {
103 .master = &omap3xxx_dss_core_hwmod,
104 .slave = &omap3xxx_l3_main_hwmod,
105 .fw = {
106 .omap2 = {
107 .l3_perm_bit = OMAP3_L3_CORE_FW_INIT_ID_DSS,
108 .flags = OMAP_FIREWALL_L3,
109 }
110 },
111 .user = OCP_USER_MPU | OCP_USER_SDMA,
112};
113
94/* Master interfaces on the L3 interconnect */ 114/* Master interfaces on the L3 interconnect */
95static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { 115static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
96 &omap3xxx_l3_main__l4_core, 116 &omap3xxx_l3_main__l4_core,
@@ -742,6 +762,410 @@ static struct omap_hwmod_class i2c_class = {
742 .sysc = &i2c_sysc, 762 .sysc = &i2c_sysc,
743}; 763};
744 764
765/*
766 * 'dss' class
767 * display sub-system
768 */
769
770static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = {
771 .rev_offs = 0x0000,
772 .sysc_offs = 0x0010,
773 .syss_offs = 0x0014,
774 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
775 .sysc_fields = &omap_hwmod_sysc_type1,
776};
777
778static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
779 .name = "dss",
780 .sysc = &omap3xxx_dss_sysc,
781};
782
783/* dss */
784static struct omap_hwmod_irq_info omap3xxx_dss_irqs[] = {
785 { .irq = 25 },
786};
787
788static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
789 { .name = "dispc", .dma_req = 5 },
790 { .name = "dsi1", .dma_req = 74 },
791};
792
793/* dss */
794/* dss master ports */
795static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {
796 &omap3xxx_dss__l3,
797};
798
799static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = {
800 {
801 .pa_start = 0x48050000,
802 .pa_end = 0x480503FF,
803 .flags = ADDR_TYPE_RT
804 },
805};
806
807/* l4_core -> dss */
808static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {
809 .master = &omap3xxx_l4_core_hwmod,
810 .slave = &omap3430es1_dss_core_hwmod,
811 .clk = "dss_ick",
812 .addr = omap3xxx_dss_addrs,
813 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs),
814 .fw = {
815 .omap2 = {
816 .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,
817 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
818 .flags = OMAP_FIREWALL_L4,
819 }
820 },
821 .user = OCP_USER_MPU | OCP_USER_SDMA,
822};
823
824static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {
825 .master = &omap3xxx_l4_core_hwmod,
826 .slave = &omap3xxx_dss_core_hwmod,
827 .clk = "dss_ick",
828 .addr = omap3xxx_dss_addrs,
829 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs),
830 .fw = {
831 .omap2 = {
832 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION,
833 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
834 .flags = OMAP_FIREWALL_L4,
835 }
836 },
837 .user = OCP_USER_MPU | OCP_USER_SDMA,
838};
839
840/* dss slave ports */
841static struct omap_hwmod_ocp_if *omap3430es1_dss_slaves[] = {
842 &omap3430es1_l4_core__dss,
843};
844
845static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
846 &omap3xxx_l4_core__dss,
847};
848
849static struct omap_hwmod_opt_clk dss_opt_clks[] = {
850 { .role = "tv_clk", .clk = "dss_tv_fck" },
851 { .role = "dssclk", .clk = "dss_96m_fck" },
852 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
853};
854
855static struct omap_hwmod omap3430es1_dss_core_hwmod = {
856 .name = "dss_core",
857 .class = &omap3xxx_dss_hwmod_class,
858 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
859 .mpu_irqs = omap3xxx_dss_irqs,
860 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
861 .sdma_reqs = omap3xxx_dss_sdma_chs,
862 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
863
864 .prcm = {
865 .omap2 = {
866 .prcm_reg_id = 1,
867 .module_bit = OMAP3430_EN_DSS1_SHIFT,
868 .module_offs = OMAP3430_DSS_MOD,
869 .idlest_reg_id = 1,
870 .idlest_stdby_bit = OMAP3430ES1_ST_DSS_SHIFT,
871 },
872 },
873 .opt_clks = dss_opt_clks,
874 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
875 .slaves = omap3430es1_dss_slaves,
876 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
877 .masters = omap3xxx_dss_masters,
878 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
879 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
880 .flags = HWMOD_NO_IDLEST,
881};
882
883static struct omap_hwmod omap3xxx_dss_core_hwmod = {
884 .name = "dss_core",
885 .class = &omap3xxx_dss_hwmod_class,
886 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
887 .mpu_irqs = omap3xxx_dss_irqs,
888 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
889 .sdma_reqs = omap3xxx_dss_sdma_chs,
890 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
891
892 .prcm = {
893 .omap2 = {
894 .prcm_reg_id = 1,
895 .module_bit = OMAP3430_EN_DSS1_SHIFT,
896 .module_offs = OMAP3430_DSS_MOD,
897 .idlest_reg_id = 1,
898 .idlest_idle_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
899 .idlest_stdby_bit = OMAP3430ES2_ST_DSS_STDBY_SHIFT,
900 },
901 },
902 .opt_clks = dss_opt_clks,
903 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
904 .slaves = omap3xxx_dss_slaves,
905 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves),
906 .masters = omap3xxx_dss_masters,
907 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
908 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2 |
909 CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
910};
911
912/*
913 * 'dispc' class
914 * display controller
915 */
916
917static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = {
918 .rev_offs = 0x0000,
919 .sysc_offs = 0x0010,
920 .syss_offs = 0x0014,
921 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
922 SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP |
923 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
924 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
925 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
926 .sysc_fields = &omap_hwmod_sysc_type1,
927};
928
929static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
930 .name = "dispc",
931 .sysc = &omap3xxx_dispc_sysc,
932};
933
934static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
935 {
936 .pa_start = 0x48050400,
937 .pa_end = 0x480507FF,
938 .flags = ADDR_TYPE_RT
939 },
940};
941
942/* l4_core -> dss_dispc */
943static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
944 .master = &omap3xxx_l4_core_hwmod,
945 .slave = &omap3xxx_dss_dispc_hwmod,
946 .clk = "dss_ick",
947 .addr = omap3xxx_dss_dispc_addrs,
948 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs),
949 .fw = {
950 .omap2 = {
951 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,
952 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
953 .flags = OMAP_FIREWALL_L4,
954 }
955 },
956 .user = OCP_USER_MPU | OCP_USER_SDMA,
957};
958
959/* dss_dispc slave ports */
960static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
961 &omap3xxx_l4_core__dss_dispc,
962};
963
964static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
965 .name = "dss_dispc",
966 .class = &omap3xxx_dispc_hwmod_class,
967 .main_clk = "dss1_alwon_fck",
968 .prcm = {
969 .omap2 = {
970 .prcm_reg_id = 1,
971 .module_bit = OMAP3430_EN_DSS1_SHIFT,
972 .module_offs = OMAP3430_DSS_MOD,
973 },
974 },
975 .slaves = omap3xxx_dss_dispc_slaves,
976 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
977 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
978 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
979 CHIP_GE_OMAP3630ES1_1),
980 .flags = HWMOD_NO_IDLEST,
981};
982
983/*
984 * 'dsi' class
985 * display serial interface controller
986 */
987
988static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
989 .name = "dsi",
990};
991
992/* dss_dsi1 */
993static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
994 {
995 .pa_start = 0x4804FC00,
996 .pa_end = 0x4804FFFF,
997 .flags = ADDR_TYPE_RT
998 },
999};
1000
1001/* l4_core -> dss_dsi1 */
1002static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
1003 .master = &omap3xxx_l4_core_hwmod,
1004 .slave = &omap3xxx_dss_dsi1_hwmod,
1005 .addr = omap3xxx_dss_dsi1_addrs,
1006 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs),
1007 .fw = {
1008 .omap2 = {
1009 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION,
1010 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
1011 .flags = OMAP_FIREWALL_L4,
1012 }
1013 },
1014 .user = OCP_USER_MPU | OCP_USER_SDMA,
1015};
1016
1017/* dss_dsi1 slave ports */
1018static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1019 &omap3xxx_l4_core__dss_dsi1,
1020};
1021
1022static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1023 .name = "dss_dsi1",
1024 .class = &omap3xxx_dsi_hwmod_class,
1025 .main_clk = "dss1_alwon_fck",
1026 .prcm = {
1027 .omap2 = {
1028 .prcm_reg_id = 1,
1029 .module_bit = OMAP3430_EN_DSS1_SHIFT,
1030 .module_offs = OMAP3430_DSS_MOD,
1031 },
1032 },
1033 .slaves = omap3xxx_dss_dsi1_slaves,
1034 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1035 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1036 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1037 CHIP_GE_OMAP3630ES1_1),
1038 .flags = HWMOD_NO_IDLEST,
1039};
1040
1041/*
1042 * 'rfbi' class
1043 * remote frame buffer interface
1044 */
1045
1046static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = {
1047 .rev_offs = 0x0000,
1048 .sysc_offs = 0x0010,
1049 .syss_offs = 0x0014,
1050 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1051 SYSC_HAS_AUTOIDLE),
1052 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1053 .sysc_fields = &omap_hwmod_sysc_type1,
1054};
1055
1056static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = {
1057 .name = "rfbi",
1058 .sysc = &omap3xxx_rfbi_sysc,
1059};
1060
1061static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = {
1062 {
1063 .pa_start = 0x48050800,
1064 .pa_end = 0x48050BFF,
1065 .flags = ADDR_TYPE_RT
1066 },
1067};
1068
1069/* l4_core -> dss_rfbi */
1070static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
1071 .master = &omap3xxx_l4_core_hwmod,
1072 .slave = &omap3xxx_dss_rfbi_hwmod,
1073 .clk = "dss_ick",
1074 .addr = omap3xxx_dss_rfbi_addrs,
1075 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs),
1076 .fw = {
1077 .omap2 = {
1078 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
1079 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP ,
1080 .flags = OMAP_FIREWALL_L4,
1081 }
1082 },
1083 .user = OCP_USER_MPU | OCP_USER_SDMA,
1084};
1085
1086/* dss_rfbi slave ports */
1087static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
1088 &omap3xxx_l4_core__dss_rfbi,
1089};
1090
1091static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1092 .name = "dss_rfbi",
1093 .class = &omap3xxx_rfbi_hwmod_class,
1094 .main_clk = "dss1_alwon_fck",
1095 .prcm = {
1096 .omap2 = {
1097 .prcm_reg_id = 1,
1098 .module_bit = OMAP3430_EN_DSS1_SHIFT,
1099 .module_offs = OMAP3430_DSS_MOD,
1100 },
1101 },
1102 .slaves = omap3xxx_dss_rfbi_slaves,
1103 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1104 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1105 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1106 CHIP_GE_OMAP3630ES1_1),
1107 .flags = HWMOD_NO_IDLEST,
1108};
1109
1110/*
1111 * 'venc' class
1112 * video encoder
1113 */
1114
1115static struct omap_hwmod_class omap3xxx_venc_hwmod_class = {
1116 .name = "venc",
1117};
1118
1119/* dss_venc */
1120static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = {
1121 {
1122 .pa_start = 0x48050C00,
1123 .pa_end = 0x48050FFF,
1124 .flags = ADDR_TYPE_RT
1125 },
1126};
1127
1128/* l4_core -> dss_venc */
1129static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1130 .master = &omap3xxx_l4_core_hwmod,
1131 .slave = &omap3xxx_dss_venc_hwmod,
1132 .clk = "dss_tv_fck",
1133 .addr = omap3xxx_dss_venc_addrs,
1134 .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs),
1135 .fw = {
1136 .omap2 = {
1137 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION,
1138 .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
1139 .flags = OMAP_FIREWALL_L4,
1140 }
1141 },
1142 .user = OCP_USER_MPU | OCP_USER_SDMA,
1143};
1144
1145/* dss_venc slave ports */
1146static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
1147 &omap3xxx_l4_core__dss_venc,
1148};
1149
1150static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1151 .name = "dss_venc",
1152 .class = &omap3xxx_venc_hwmod_class,
1153 .main_clk = "dss1_alwon_fck",
1154 .prcm = {
1155 .omap2 = {
1156 .prcm_reg_id = 1,
1157 .module_bit = OMAP3430_EN_DSS1_SHIFT,
1158 .module_offs = OMAP3430_DSS_MOD,
1159 },
1160 },
1161 .slaves = omap3xxx_dss_venc_slaves,
1162 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1163 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1164 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1165 CHIP_GE_OMAP3630ES1_1),
1166 .flags = HWMOD_NO_IDLEST,
1167};
1168
745/* I2C1 */ 1169/* I2C1 */
746 1170
747static struct omap_i2c_dev_attr i2c1_dev_attr = { 1171static struct omap_i2c_dev_attr i2c1_dev_attr = {
@@ -1800,6 +2224,15 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
1800 &omap3xxx_uart2_hwmod, 2224 &omap3xxx_uart2_hwmod,
1801 &omap3xxx_uart3_hwmod, 2225 &omap3xxx_uart3_hwmod,
1802 &omap3xxx_uart4_hwmod, 2226 &omap3xxx_uart4_hwmod,
2227 /* dss class */
2228 &omap3430es1_dss_core_hwmod,
2229 &omap3xxx_dss_core_hwmod,
2230 &omap3xxx_dss_dispc_hwmod,
2231 &omap3xxx_dss_dsi1_hwmod,
2232 &omap3xxx_dss_rfbi_hwmod,
2233 &omap3xxx_dss_venc_hwmod,
2234
2235 /* i2c class */
1803 &omap3xxx_i2c1_hwmod, 2236 &omap3xxx_i2c1_hwmod,
1804 &omap3xxx_i2c2_hwmod, 2237 &omap3xxx_i2c2_hwmod,
1805 &omap3xxx_i2c3_hwmod, 2238 &omap3xxx_i2c3_hwmod,
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
index 537f4e449f5..0f140ecedb0 100644
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -23,6 +23,7 @@
23#include <linux/list.h> 23#include <linux/list.h>
24#include <linux/kobject.h> 24#include <linux/kobject.h>
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/platform_device.h>
26#include <asm/atomic.h> 27#include <asm/atomic.h>
27 28
28#define DISPC_IRQ_FRAMEDONE (1 << 0) 29#define DISPC_IRQ_FRAMEDONE (1 << 0)
@@ -226,6 +227,16 @@ struct omap_dss_board_info {
226 struct omap_dss_device *default_device; 227 struct omap_dss_device *default_device;
227}; 228};
228 229
230#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
231/* Init with the board info */
232extern int omap_display_init(struct omap_dss_board_info *board_data);
233#else
234static inline int omap_display_init(struct omap_dss_board_info *board_data)
235{
236 return 0;
237}
238#endif
239
229struct omap_video_timings { 240struct omap_video_timings {
230 /* Unit: pixels */ 241 /* Unit: pixels */
231 u16 x_res; 242 u16 x_res;
diff --git a/arch/arm/plat-omap/include/plat/l3_2xxx.h b/arch/arm/plat-omap/include/plat/l3_2xxx.h
new file mode 100644
index 00000000000..b8b5641379b
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/l3_2xxx.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-omap/include/plat/l3_2xxx.h - L3 firewall definitions
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Sumit Semwal
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_2XXX_H
14#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_2XXX_H
15
16/* L3 CONNIDs */
17/* Display Sub system (DSS) */
18#define OMAP2_L3_CORE_FW_CONNID_DSS 8
19
20#endif
diff --git a/arch/arm/plat-omap/include/plat/l3_3xxx.h b/arch/arm/plat-omap/include/plat/l3_3xxx.h
new file mode 100644
index 00000000000..cde1938c5f8
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/l3_3xxx.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-omap/include/plat/l3_3xxx.h - L3 firewall definitions
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Sumit Semwal
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_3XXX_H
14#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_3XXX_H
15
16/* L3 Initiator IDs */
17/* Display Sub system (DSS) */
18#define OMAP3_L3_CORE_FW_INIT_ID_DSS 29
19
20#endif
diff --git a/arch/arm/plat-omap/include/plat/l4_2xxx.h b/arch/arm/plat-omap/include/plat/l4_2xxx.h
new file mode 100644
index 00000000000..3f39cf8a35c
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/l4_2xxx.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/plat-omap/include/plat/l4_2xxx.h - L4 firewall definitions
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Sumit Semwal
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L4_2XXX_H
14#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L4_2XXX_H
15
16/* L4 CORE */
17/* Display Sub system (DSS) */
18#define OMAP2420_L4_CORE_FW_DSS_CORE_REGION 28
19#define OMAP2420_L4_CORE_FW_DSS_DISPC_REGION 29
20#define OMAP2420_L4_CORE_FW_DSS_RFBI_REGION 30
21#define OMAP2420_L4_CORE_FW_DSS_VENC_REGION 31
22#define OMAP2420_L4_CORE_FW_DSS_TA_REGION 32
23
24#endif
diff --git a/arch/arm/plat-omap/include/plat/l4_3xxx.h b/arch/arm/plat-omap/include/plat/l4_3xxx.h
index 5e194937542..881a858b1ff 100644
--- a/arch/arm/plat-omap/include/plat/l4_3xxx.h
+++ b/arch/arm/plat-omap/include/plat/l4_3xxx.h
@@ -21,4 +21,14 @@
21#define OMAP3_L4_CORE_FW_I2C3_REGION 73 21#define OMAP3_L4_CORE_FW_I2C3_REGION 73
22#define OMAP3_L4_CORE_FW_I2C3_TA_REGION 74 22#define OMAP3_L4_CORE_FW_I2C3_TA_REGION 74
23 23
24/* Display Sub system (DSS) */
25#define OMAP3_L4_CORE_FW_DSS_PROT_GROUP 2
26
27#define OMAP3_L4_CORE_FW_DSS_DSI_REGION 104
28#define OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION 3
29#define OMAP3_L4_CORE_FW_DSS_CORE_REGION 4
30#define OMAP3_L4_CORE_FW_DSS_DISPC_REGION 4
31#define OMAP3_L4_CORE_FW_DSS_RFBI_REGION 5
32#define OMAP3_L4_CORE_FW_DSS_VENC_REGION 6
33#define OMAP3_L4_CORE_FW_DSS_TA_REGION 7
24#endif 34#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-31 05:23:03 -0500