From eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 28 May 2007 18:19:16 +0100 Subject: [ARM] 4412/1: S3C2412: reset errata fix The S3C2412 has an reset-errata where the clock may cause a glitch switching back to EXTCLK. We force a switch to EXTCLK before writing the reset register to force use of the CLKCON sync logic to properly switch. Fix problem reported by Matthieu Castet. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-s3c2412.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/asm-arm/arch-s3c2410/regs-s3c2412.h (limited to 'include/asm-arm/arch-s3c2410') diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h new file mode 100644 index 00000000000..8ca6a3bc855 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h @@ -0,0 +1,21 @@ +/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h + * + * Copyright 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2412 specific register definitions +*/ + +#ifndef __ASM_ARCH_REGS_S3C2412_H +#define __ASM_ARCH_REGS_S3C2412_H "s3c2412" + +#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) +#define S3C2412_SWRST_RESET (0x533C2412) + +#endif /* __ASM_ARCH_REGS_S3C2412_H */ + -- cgit v1.2.2