From e3ed910db221768f8fd6192b13373e17d61bcdf0 Mon Sep 17 00:00:00 2001 From: Jeremy Fitzhardinge Date: Wed, 30 Jan 2008 13:34:11 +0100 Subject: x86: use the same pgd_list for PAE and 64-bit Use a standard list threaded through page->lru for maintaining the pgd list on PAE. This is the same as 64-bit, and seems saner than using a non-standard list via page->index. Signed-off-by: Jeremy Fitzhardinge Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner --- arch/x86/mm/fault.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'arch/x86/mm/fault.c') diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 72547a7e32c..e28cc5277b1 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -907,10 +907,8 @@ do_sigbus: force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); } -#ifdef CONFIG_X86_64 DEFINE_SPINLOCK(pgd_lock); LIST_HEAD(pgd_list); -#endif void vmalloc_sync_all(void) { @@ -935,13 +933,11 @@ void vmalloc_sync_all(void) struct page *page; spin_lock_irqsave(&pgd_lock, flags); - for (page = pgd_list; page; page = - (struct page *)page->index) + list_for_each_entry(page, &pgd_list, lru) { if (!vmalloc_sync_one(page_address(page), - address)) { - BUG_ON(page != pgd_list); + address)) break; - } + } spin_unlock_irqrestore(&pgd_lock, flags); if (!page) set_bit(pgd_index(address), insync); -- cgit v1.2.2