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| | * | drm/i915: Refactor save/restore codeBen Gamari2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We move the display-specific code into it's own functions, called from the general GPU state save/restore functions. This will be needed later by the GPU reset code. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Check whether chip is wedged in i915_wait_request()Ben Gamari2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i915_wait_request() only checks mm.wedged after it interacts with the hardware, generally causing the driver to lock up waiting for a wedged chip. Make sure we check mm.wedged as the first thing we do. Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: fix opregion backlight chip detect and rangeLi Peng2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BLC_PWM_CTL2 is for 965+ only, so add device model check for legacy backlight control. For native backlight control, it maps the backlight value (0~255) in opregion ASLE[BCLP] to backlight duty cycle (0~max_backlight) and set into control register. It also add support for IGD device, which follows opregion spec. Signed-off-by: Li Peng <peng.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Fix LVDS panel fitting on ArrandaleZhenyu Wang2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Arrandale has new window based method for panel fitting. This one enables full screen aspect scaling on LVDS. It fixes standard mode display failure on LVDS for Arrandale. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Remove DAC disable in CRT force detect on IGDNGZhenyu Wang2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is not required on newer stepping hardware to get reliable force detect status. Removing this fixes screen blank flicker in CRT detect on IGDNG. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Fix SSC frequence for IGDNGZhenyu Wang2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IGDNG LVDS SSC uses 120Mhz freq. This fixes one 1600x900 LVDS panel black issue on IGDNG with SSC enabled. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Fix typo for wrong LVDS clock setting on IGDNGZhenyu Wang2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: fix typo in compressed buffer setupJesse Barnes2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We want the compressed line length buffer address, not the framebuffer address. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | drm/i915: Only destroy a constructed mmap offsetChris Wilson2009-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_ht_remove_item() does not handle removing an absent item and the hlist in particular is incorrectly initialised. The easy remedy is simply skip calling i915_gem_free_mmap_offset() unless we have actually created the offset and associated ht entry. This also fixes the mishandling of a partially constructed offset which leaves pointers initialized after freeing them along the i915_gem_create_mmap_offset() error paths. In particular this should fix the oops found here: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/415357/comments/8 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org
| | * | agp/intel: Fix the pre-9xx chipset flush.Eric Anholt2009-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had serious stability issues. Back in May a wbinvd was added to the DRM to work around much of the problem. Some failure remained -- easily visible by dragging a window around on an X -retro desktop, or by looking at bugzilla. The chipset flush was on the right track -- hitting the right amount of memory, and it appears to be the only way to flush on these chipsets, but the flush page was mapped uncached. As a result, the writes trying to clear the writeback cache ended up bypassing the cache, and not flushing anything! The wbinvd would flush out other writeback data and often cause the data we wanted to get flushed, but not always. By removing the setting of the page to UC and instead just clflushing the data we write to try to flush it, we get the desired behavior with no wbinvd. This exports clflush_cache_range(), which was laying around and happened to basically match the code I was otherwise going to copy from the DRM. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Cc: stable@kernel.org
| | * | drm/i915: framebuffer compression for pre-GM45Jesse Barnes2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds framebuffer compression (good for about ~0.5W power savings in the best case) support for pre-GM45 chips. GM45+ have a new, more flexible FBC scheme that will be added in a separate patch. FBC can't always be enabled: the compressed buffer must be physically contiguous and reside in stolen space. So if you have a large display and a small amount of stolen memory, you may not be able to take advantage of FBC. In some cases, a BIOS setting controls how much stolen space is available. Increasing this to 8 or 16M can help. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: generate a KMS uevent at lid open/close timeJesse Barnes2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With all the other lid pieces in place, it's easy to generate a uevent for the LVDS connector just like we do for other outputs. Should make lid open/close fit in with the rest of a userland based output reconfiguration scheme. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: use ACPI LID status for LVDS ->detect hookJesse Barnes2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't load or hotplug detect LVDS like we can other outputs, but if there's a lid device present we can use it as a proxy. This allows the LFP state to be determined at ->detect time, making configurations requiring manual intervention today "just work" assuming the lid device status is correct. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: force mode set at lid open timeJesse Barnes2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some laptop platforms will disable pipes and/or planes at lid close time and not restore them when the lid is opened again. So catch the lid event, and if the lid was opened, force a mode restore. Fixes fdo bug #21230. Acked-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | ACPI button: provide lid status functionsJesse Barnes2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers need to know when a lid event occurs and get the current status. This can be useful for when a platform firmware clobbers some hardware state at lid time, and a driver needs to restore things when the lid is opened again. Acked-by: Matthew Garrett <mjg59@srcf.ucam.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | Add G33 series in VGA hotplug support categoryLi Peng2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Test on the IGD chip, which is a G33-like graphic device. Signed-off-by: Li Peng <peng.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: Write zero to DPLL_MD Reg for non-SDVO outputZhao Yakui2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the output device is LVDS, maybe the pixel clock of adjusted_mode will be less than that in mode. In such case it will set the incorrect multipler factor in DPLL_MD register. So the dpll_md_reg will be reset when the output type is non-SDVO https://bugs.freedesktop.org/show_bug.cgi?id=22761 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewd-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: Add the missing clone_mask for SDVO-VGA(RGB1)Zhao Yakui2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing clone_mask for SDVO-VGA(RGB1) Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: Add the brightness property for SDVO-LVDSZhao Yakui2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the sdvo device is detected as SDVO-LVDS, we will check whether the brightness is supported by issue SDVO enhancement command. If it is supported, we will add the brightness property and then brightness can be adjusted. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: Add the enhancement property for SDVO-TVZhao Yakui2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the sdvo device is detected as SDVO-TV, we will check whether the sepecific picture enhancement is supported. If it is supported, we will add the corresponnding property for SDVO-TV. We will add the following property for the SDVO-TV enhancements if they are supported: * Contrast/Brightness/Saturation/Hue. * left/right/top/bottom margin: This is implemented by using the horizontal/vertical overscan enhancements. When the overscan enhancements are supported, the above properties will be added. This is to be compatible with what we have done in integrated-TV. * horizontal pos/vertical pos. http://bugs.freedesktop.org/show_bug.cgi?id=22891 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: Zap mmaps of objects before unbinding them from the GTT.Eric Anholt2009-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise, some other userland writing into its buffer may race to land writes either after the CPU thinks it's got a coherent view, or after its GTT entries have been redirected to point at the scratch page. Either result is unpleasant. Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | drm/i915: add B43 chipset supportFabian Henze2009-09-09
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * | agp/intel: Add B43 chipset supportFabian Henze2009-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> [Fix reversed HB & IG ids for B43] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | Merge branch 'linux-next' of ↵Linus Torvalds2009-09-24
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (21 commits) x86/PCI: make 32 bit NUMA node array int, not unsigned char x86/PCI: default pcibus cpumask to all cpus if it lacks affinity MAINTAINTERS: remove hotplug driver entries PCI: pciehp: remove slot capabilities definitions PCI: pciehp: remove error message definitions PCI: pciehp: remove number field PCI: pciehp: remove hpc_ops PCI: pciehp: remove pci_dev field PCI: pciehp: remove crit_sect mutex PCI: pciehp: remove slot_bus field PCI: pciehp: remove first_slot field PCI: pciehp: remove slot_device_offset field PCI: pciehp: remove hp_slot field PCI: pciehp: remove device field PCI: pciehp: remove bus field PCI: pciehp: remove slot_num_inc field PCI: pciehp: remove num_slots field PCI: pciehp: remove slot_list field PCI: fix VGA arbiter header file PCI: Disable AER with pci=nomsi ... Fixed up trivial conflicts in MAINTAINERS
| | * | | PCI: pciehp: remove slot capabilities definitionsKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use generic PCIe slot capabilities register definitions instead of internal definitions. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove error message definitionsKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove (almost) unused error message definitions. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove number fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since slot_cap field in struct controller contains physical slot number informationq, we don't need number field in struct slot. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove hpc_opsKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The struct hpc_ops seems a set of hooks to controller specific routines. But, it is meaningless because no hotplug controller driver follows this framework. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove pci_dev fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have a pointer to pcie_device in struct controller, we don't need a pointer to pci_dev. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove crit_sect mutexKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The crit_sect mutex defined in struct controller is to serialize hot-plug operations against multiple slots under the same bus. But, since PCIe doesnstream port has only one slot at most, it is meaningless and we don't need it. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove slot_bus fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused slot_bus field in struct controller. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove first_slot fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The slot number can be calculated only by physical slot number field in the slot capabilities register. So the first_slot field in struct controller is meaningless and we don't need it. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove slot_device_offset fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the device number of the hot-slot under the PCIe downstream port is always 0, the slot_device_offset field in the slot is meaningless and we don't need it. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove hp_slot fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hp_slot field is to identify the slot under the same controller. But, since PCIe downstream port has only one slot at most, it is meaningless and we don't need it. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove device fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device field in the struct slot is not necessary because it is always 0 in pciehp driver. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove bus fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bus field in struct slot is not necessary. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove slot_num_inc fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The slot_num_inc field in struct controller is unused and meaningless in pciehp driver. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove num_slots fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since PCIe downstream port has only one slot at most, we don't need num_slots field in struct controller. Note that struct controller itself doesn't exist if PCIe downstream port has no slot. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: pciehp: remove slot_list fieldKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since PCIe downstream port has only one slot at most, we don't need 'slot_list' linked list to manage multiple slots under the port. Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI: Disable AER with pci=nomsiAndi Kleen2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting with pci=nomsi aer causes lost interrupts and lockdep inversions. So check if MSIs are not disabled before initializing the aer driver. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | PCI ASPM: support L1 onlyKenji Kaneshige2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definition of the ASPM support field in the Link Capabilities Register had been changed by the "ASPM optionality ECN" as follows: <Before> 00b Reserved 01b L0s Supported 10b Reserved 11b L0s and L1 Supported <After> 00b No ASPM Support 01b L0s Supported 10b L1 Supported 11b L0s and L1 Supported Current linux ASPM driver doesn't enable ASPM if the support field is 00b or 10b. So there is no impact about 00b. But current linux ASPM driver doesn't enable L1 if the support field is 10b. With this patch, 10b (L1 support) is handled properly. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | | Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-09-24
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: (24 commits) microblaze: Disable heartbeat/enable emaclite in defconfigs microblaze: Support simpleImage.dts make target microblaze: Fix _start symbol to physical address microblaze: Use LOAD_OFFSET macro to get correct LMA for all sections microblaze: Create the LOAD_OFFSET macro used to compute VMA vs LMA offsets microblaze: Copy ppc asm-compat.h for clean handling of constants in asm and C microblaze: Actually show KiB rather than pages in "Freeing initrd memory:" microblaze: Support ptrace syscall tracing. microblaze: Updated CPU version and FPGA family codes in PVR microblaze: Generate correct signal and siginfo for integer div-by-zero microblaze: Don't be noisy when userspace causes hardware exceptions microblaze: Remove ipc.h file which points to non-existing asm-generic file microblaze: Clear sticky FSR register after generating exception signals microblaze: Ensure CPU usermode is set on new userspace processes microblaze: Use correct kbuild variable KBUILD_CFLAGS microblaze: Save and restore msr in hw exception microblaze: Add architectural support for USB EHCI host controllers microblaze: Implement include/asm/syscall.h. microblaze: Improve checking mechanism for MSR instruction microblaze: Add checking mechanism for MSR instruction ...
| | * | | | microblaze: Add architectural support for USB EHCI host controllersJulie Zhu2009-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add architectural support for USB EHCI host controllers. It has been tested using the USB EHCI host controller from Xilinx Inc., using both High Speed devices and Full Speed devices. Signed-off-by: Julie Zhu <julie.zhu@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| | * | | | mtd: Enable Open Firmware initialisation of MTD devices and maps for MicroBlazeJohn Williams2009-09-21
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | | Merge branch 'for-linus' of git://neil.brown.name/mdLinus Torvalds2009-09-24
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://neil.brown.name/md: (97 commits) md: raid-1/10: fix RW bits manipulation md: remove unnecessary memset from multipath. md: report device as congested when suspended md: Improve name of threads created by md_register_thread md: remove sparse warnings about lock context. md: remove sparse waring "symbol xxx shadows an earlier one" async_tx/raid6: add missing dma_unmap calls to the async fail case ioat3: fix uninitialized var warnings drivers/dma/ioat/dma_v2.c: fix warnings raid6test: fix stack overflow ioat2: clarify ring size limits md/raid6: cleanup ops_run_compute6_2 md/raid6: eliminate BUG_ON with side effect dca: module load should not be an error message ioat: driver version 4.0 dca: registering requesters in multiple dca domains async_tx: remove HIGHMEM64G restriction dmaengine: sh: Add Support SuperH DMA Engine driver dmaengine: Move all map_sg/unmap_sg for slave channel to its client fsldma: Add DMA_SLAVE support ...
| | * \ \ \ \ Merge branch 'next' of ↵NeilBrown2009-09-23
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx into for-linus
| | | * | | | | ioat3: fix uninitialized var warningsDan Williams2009-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/dma/ioat/dma_v3.c: In function 'ioat3_prep_memset_lock': drivers/dma/ioat/dma_v3.c:439: warning: 'fill' may be used uninitialized in this function drivers/dma/ioat/dma_v3.c:437: warning: 'desc' may be used uninitialized in this function drivers/dma/ioat/dma_v3.c: In function '__ioat3_prep_xor_lock': drivers/dma/ioat/dma_v3.c:489: warning: 'xor' may be used uninitialized in this function drivers/dma/ioat/dma_v3.c:486: warning: 'desc' may be used uninitialized in this function drivers/dma/ioat/dma_v3.c: In function '__ioat3_prep_pq_lock': drivers/dma/ioat/dma_v3.c:631: warning: 'pq' may be used uninitialized in this function drivers/dma/ioat/dma_v3.c:628: warning: 'desc' may be used uninitialized in this function gcc-4.0, unlike gcc-4.3, does not see that these variables are initialized before use. Convert the descriptor loops to do-while make this initialization apparent. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | | * | | | | drivers/dma/ioat/dma_v2.c: fix warningsAndrew Morton2009-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/dma/ioat/dma_v2.c: In function 'ioat2_dma_prep_memcpy_lock': drivers/dma/ioat/dma_v2.c:680: warning: 'hw' may be used uninitialized in this function drivers/dma/ioat/dma_v2.c:681: warning: 'desc' may be used uninitialized in this function Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | | * | | | | ioat2: clarify ring size limitsDan Williams2009-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the addition of ioat_max_alloc_order it is not clear what the maximum allocation order is, so document that in the modinfo. Also take an opportunity to kill a stray semicolon. Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | | * | | | | md/raid6: cleanup ops_run_compute6_2Dan Williams2009-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Neil says: "It is correct as it stands, but the fact that every branch in the 'if' part ends with a 'return' isn't immediately obvious, so it is clearer if we are explicit about the if / then / else structure." Signed-off-by: Dan Williams <dan.j.williams@intel.com>