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| * | | drm/i915: Trivial spelling mistake 'assertiing'Chris Wilson2011-02-01
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Record all error ringbuffersChris Wilson2011-01-28
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Defer reporting EIO until we try to use the GPUChris Wilson2011-01-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of reporting EIO upfront in the entrance of an ioctl that may or may not attempt to use the GPU, defer the actual detection of an invalid ioctl to when we issue a GPU instruction. This allows us to continue to use bo in video memory (via pread/pwrite and mmap) after the GPU has hung. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Check wedged status before throttlingChris Wilson2011-01-27
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915/sdvo: Add BUILD_BUG_ON to warn if the structs are ever miscompiledChris Wilson2011-01-26
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915/sdvo: Use a compact test for determining a multi-function deviceChris Wilson2011-01-26
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: use VDD AUX override to make panel power sequencing look betterJesse Barnes2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than power cycling the panel when there are no bits to display, use the VDD AUX bit to power the panel up just enough for DP AUX transactions to work. This prevents a bit of unnecessary ugliness as mode sets occur on the panel. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: remove now unnecessary delays in eDP panel power sequencingJesse Barnes2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we're doing the right thing elsewhere, these are no longer necessary. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31114 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Refactor self-refresh watermark calculationsChris Wilson2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the plane->mode config to the point of use rather than repeatedly querying the same information. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Silence a few -Wunused-but-set-variableChris Wilson2011-01-25
| | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-01-24
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge important suspend and resume regression fixes and resolve the small conflict. Conflicts: drivers/gpu/drm/i915/i915_dma.c
| * | | | drm/i915: Remove unused code: i915_enable_interrupt()Chris Wilson2011-01-23
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | drm/i915/ringbuffer: Kill an annoyingly frequent debug messageChris Wilson2011-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is better handled through the tracepoints and just clutters the debug logs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-01-20
| |\ \ \ \ | | | | | | | | | | | | | | | | | | Apply the SandyBridge stability fixes from -fixes.
| * | | | | drm/i915: Include TLB miss latency in g4x watermark computationsChris Wilson2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reports of FIFO underruns are still persisting on gm45. References: https://bugs.freedesktop.org/show_bug.cgi?id=27589 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: Disable SSC for outputs other than LVDS or DPChris Wilson2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For CRT and SDVO/HDMI, we need to use a normal, non-SSC, clock and so we must clear any enabling bits left-over from earlier outputs. And also seems to correct the LVDS panel on the Lenovo U160. However, at one point, it did cause an "ERROR failed to disable trancoder". So prolonged testing on top of Jesse's refactored and error-checking CRTC logic is desired. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915/bios: Change default clock source on PineView to use SSCBryan Freed2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i915 driver normally assumes the video bios has configured several of the LVDS panel registers, and it just inherits the values. If the vbios has not run, several of these will need to be setup. If these are not correct then although the panel looks ok, output from an HDMI encoder (eg, Chrontel CH7036) will be incorrect. Signed-off-by: Mark Hayter <mdhayter@chromium.org> [ickle: minor adjustments] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: Honour LVDS sync polarity from EDIDBryan Freed2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i915 driver normally assumes the video bios has configured several of the LVDS panel registers, and it just inherits the values. If the vbios has not run, several of these will need to be setup. So we need to check that the LVDS sync polarity is correctly configured per any available modelines (e.g. EDID) and adjust if not, issuing a warning as we do. Signed-off-by: Mark Hayter <mdhayter@chromium.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: tune Sandy Bridge DRPS constantsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These make us increase our frequency much more readily, and decrease them only after significant idle time, resulting in a 20% performance increase for nexuiz. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: Trivial sparse fixesChris Wilson2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move code around and invoke iomem annotation in a few more places in order to silence sparse. Still a few more iomem annotations to go... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: allow 945 to control self refresh (CxSR) automaticallyAlexander Lam2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I changed 945's self refresh to work without the need for the driver to enable/disable self refresh manually based on the idle state of the gpu. This is much better than enabling/disabling self refresh for various reasons, including staying in a lower power state for more time and avoiding the need for cpu cycles. This was originally done manually to workaround issues with the hardware hanging. However, since 944001201: drm/i915: enable low power render writes on GEN3 hardware, automatic CxSR seems stable. Signed-off-by: Alexander Lam <lambchop468@gmail.com> Acked-by : Li Peng <peng.li@linux.intel.com> [ickle: play safe with the ordering and disable CxSR before tweaking any watermark and enable afterwards.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPUChris Wilson2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 945 class hardware has an interesting quirk in which the vblank interrupt is not raised if the CPU is in a low power state. (We also suspect that the memory bus is clocked to the CPU/c-state and not the GPU so there are secondary starvation issues.) In order to prevent the most obvious issue of the low of the vblank interrupt (stuttering compositing that only updates when the mouse is moving) is to install a PM QoS request to prevent low c-states whilst the GPU is active. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: skip FDI & PCH enabling for DP_AJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eDP on the CPU doesn't need the PCH set up at all, it can in fact cause problems. So avoid FDI training and PCH PLL enabling in that case. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: set phase sync pointer override enable before setting phase sync ↵Jesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer We need to unlock the phase sync pointer enable bit before we can actually enable the phase sync pointer workaround on Ironlake. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: factor out FDI disable and add FDI assertionsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Factor out the FDI disable function (make it a mirror of ironlake_fdi_enable) and add some FDI related assertions to the FDI training code (we need an active pipe & plane before we start transmitting bits). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: add transcoder enable/disable functionsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Along with assertion checks for the FDI transmitters and receivers (including PLLs). Modify the pipe enable function to check for FDI PLL status as well, when driving PCH ports. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: assert panel is unlocked before writing transcoder timing regsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise our writes will be silently ignored. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: add PCH DPLL enable/disable functionsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With assertions to check transcoder and reference clock state. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: add PLL enable/disable functionsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For pre-ILK only. Saves some code in the CRTC enable/disable functions and allows us to check for pipe and panel status at enable/disable time. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: add panel lock assertion functionJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When PLLs or timing regs are changed, we need to make sure the panel lock will allow it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: add pipe/plane enable/disable functionsJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add plane enable/disable functions to prevent duplicated code and allow us to easily check for plane enable/disable requirements (such as pipe enable, plane status, pll status etc). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: don't enable plane, pipe and PLL prematurelyJesse Barnes2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Ironlake+ we need to enable these in a specific order. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | | | drm/i915: Use ACPI OpRegion to determine lid statusChris Wilson2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Admittedly, trusting ACPI or the BIOS at all to be correct is littered with numerous examples where it is wrong. Maybe, just maybe, we will have better luck using the ACPI OpRegion lid status... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | | | | drm: Mark constant arrays of drm_display_mode constChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... and fixup some methods to accept the constant argument. Now that constant module arrays are loaded into read-only memory, using const appropriately has some benefits beyond warning the programmer about likely mistakes. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | | | | drm: rework PCI/platform driver interface.Dave Airlie2011-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This abstracts the pci/platform interface out a step further, we can go further but this is far enough for now to allow USB to be plugged in. The drivers now just call the init code directly for their device type. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | | | | drm: dumb scanout create/mmap for intel/radeon (v3)Dave Airlie2011-02-06
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just an idea that might or might not be a good idea, it basically adds two ioctls to create a dumb and map a dumb buffer suitable for scanout. The handle can be passed to the KMS ioctls to create a framebuffer. It looks to me like it would be useful in the following cases: a) in development drivers - we can always provide a shadowfb fallback. b) libkms users - we can clean up libkms a lot and avoid linking to libdrm_*. c) plymouth via libkms is a lot easier. Userspace bits would be just calls + mmaps. We could probably mark these handles somehow as not being suitable for acceleartion so as top stop people who are dumber than dumb. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | | | drm/i915: Only bind to function 0 of the PCI deviceChris Wilson2011-02-01
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Early chipsets (gen2/3) used function 1 as a placeholder for multi-head. We used to ignore these since they were not assigned to PCI_CLASS_DISPLAY_VGA. However with 934f992c7 we attempt to bind to all Intel PCI_CLASS_DISPLAY devices (and functions) to work in multi-gpu systems. This fails hard on gen2/3. Reported-by: Ferenc Wágner <wferi@niif.hu> Tested-by: Ferenc Wágner <wferi@niif.hu> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28012 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
* | | | drm/i915: Suppress spurious vblank interruptsChris Wilson2011-01-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hugh Dickins found that characters in xterm were going missing and oft delayed. Being the curious type, he managed to associate this with the new high-precision vblank patches; disabling these he found, restored the orderliness of his characters. The oddness begins when one realised that Hugh was not using vblanks at all on his system (fvwm and some xterms). Instead, all he had to go on were warning of a pipe underrun, curiously enough at around 60Hz. He poked and found that in addition to the underrun warning, the hardware was flagging the start of a new frame, a vblank, which in turn was kicking off the pending vblank processing code. There is little we can do for the underruns on Hugh's machine, a Crestline [965GM], which must have its FIFO watermarks set to 8. However, we do not need to process the vblank if we know that they are disabled... Reported-by: Hugh Dickins <hughd@google.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | | drm/i915: Reset crtc after resumeChris Wilson2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch by Takashi Iwai. Reported-by: Matthias Hopf <mat@mshopf.de> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=27272 Tested-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | | drm/i915/crt: Force the initial probe after resetChris Wilson2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon resume, like after a cold boot, we need to forcibly probe the analog connector and cannot rely on the hotplug status. Based on a patch by Takashi Iwai. Reported-by: Stefan Dirsch <sndirsch@suse.de> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=26952 Tested-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | | drm/i915: Reset state after a GPU reset or resumeChris Wilson2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call drm_mode_config_reset() after an invalidation event to restore any cached state to unknown. Tested-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | | drm/i915/sdvo: If at first we don't succeed in reading the response, waitChris Wilson2011-01-25
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | We were not pausing after detecting the response was pending and so did not allow the hardware sufficient time to complete before aborting. This lead to transient failures whilst probing SDVO devices. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30235 Reported-by: Knut Petersen <Knut_Petersen@t-online.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Prevent uninitialised reads during error state captureChris Wilson2011-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | error_bo and pinned_bo could be used uninitialised if there were no active buffers. Caught by kmemcheck. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Use consistent mappings for OpRegion between ACPI and i915Michael Karcher2011-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The opregion is a shared memory region between ACPI and the graphics driver. As the ACPI mapping has been changed to cachable in commit 6d5bbf00d251cc73223a71422d69e069dc2e0b8d, mapping the intel opregion non-cachable now fails. As no bus-master hardware is involved in the opregion, cachable map should do no harm. Tested on a Fujitsu Lifebook P8010. Signed-off-by: Michael Karcher <kernel@mkarcher.dialup.fu-berlin.de> [ickle: convert to acpi_os_ioremap for consistency] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Handle the no-interrupts case for UMS by pollingChris Wilson2011-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the driver calls into the kernel to wait for a breadcrumb to pass, but hasn't enabled interrupts, fallback to polling the breadcrumb value. Reported-by: Chris Clayton <chris2553@googlemail.com> Tested-by: Chris Clayton <chris2553@googlemail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Disable high-precision vblank timestamping for UMSChris Wilson2011-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only have sufficient information for accurate (sub-frame) timestamping when the modesetting is under our control. Reported-by: Chris Clayton <chris2553@googlemail.com> Tested-by: Chris Clayton <chris2553@googlemail.com> Reviewed-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Increase the amount of defense before computing vblank timestampsChris Wilson2011-01-24
| | | | | | | | | | | | | | | | | | Reported-by: Chris Clayton <chris2553@googlemail.com> Tested-by: Chris Clayton <chris2553@googlemail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915,agp/intel: Do not clear stolen entriesChris Wilson2011-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can only utilize the stolen portion of the GTT if we are in sole charge of the hardware. This is only true if using GEM and KMS, otherwise VESA continues to access stolen memory. Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Frederic Weisbecker <fweisbec@gmail.com> Tested-by: Jiri Olsa <jolsa@redhat.com> Tested-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Recognise non-VGA display devicesChris Wilson2011-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with SandyBridge (though possible with earlier hacked BIOSes), the BIOS may initialise the IGFX as secondary to a discrete GPU. Prior, it would simply disable the integrated GPU. So we adjust our PCI class mask to match any DISPLAY_CLASS device. In such a configuration, the IGFX is not a primary VGA controller and so should not take part in VGA arbitration, and the error return from vga_client_register() is expected. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
* | | drm/i915: Fix use of invalid array size for ring->sync_seqnoChris Wilson2011-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are I915_NUM_RINGS-1 inter-ring synchronisation counters, but we were clearing I915_NUM_RINGS of them. Oops. Reported-by: Jiri Slaby <jirislaby@gmail.com> Tested-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-08 04:38:56 -0400