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| * | drm/i915: don't store the reg value for HWS_PGAChris Wilson2011-03-02
| | | | | | | | | | | | | | | | | | | | | It is trivially computable from the real physical address so no need to store both. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-03-01
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| | * drm/i915: fix memory corruption with GM965 and >4GB RAMJan Niehusmann2011-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a Thinkpad x61s, I noticed some memory corruption when plugging/unplugging the external VGA connection. The symptoms are that 4 bytes at the beginning of a page get overwritten by zeroes. The address of the corruption varies when rebooting the machine, but stays constant while it's running (so it's possible to repeatedly write some data and then corrupt it again by plugging the cable). Further investigation revealed that the corrupted address is (dev_priv->status_page_dmah->busaddr & 0xffffffff), ie. the beginning of the hardware status page of the i965 graphics card, cut to 32 bits. So it seems that for some memory access, the hardware uses only 32 bit addressing. If the hardware status page is located >4GB, this corrupts unrelated memory. Signed-off-by: Jan Niehusmann <jan@gondor.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
| | * drm/i915: Fix unintended recursion in ironlake_disable_rc6Chris Wilson2011-02-24
| | | | | | | | | | | | | | | | | | | | | | | | After disabling, we're meant to teardown the bo used for the contexts, not recurse into ourselves again and preventing module unload. Reported-and-tested-by: Ben Widawsky <bwidawsk@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: fix corruptions on i8xx due to relaxed fencingDaniel Vetter2011-02-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like gen2 has a peculiar interleaved 2-row inter-tile layout. Probably inherited from i81x which had 2kb tiles (which naturally fit an even-number-of-tile-rows scheme to fit onto 4kb pages). There is no other mention of this in any docs (also not in the Intel internal documention according to Chris Wilson). Problem manifests itself in corruptions in the second half of the last tile row (if the bo has an odd number of tiles). Which can only happen with relaxed tiling (introduced in a00b10c360b35d6431a9). So reject set_tiling calls that don't satisfy this constrain to prevent broken userspace from causing havoc. While at it, also check the size for newer chipsets. LKML: https://lkml.org/lkml/2011/2/19/5 Reported-by: Indan Zupancic <indan@nul.nu> Tested-by: Indan Zupancic <indan@nul.nu> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Re-enable GPU semaphores for SandyBridge mobileChris Wilson2011-03-01
| | | | | | | | | | | | | | | | | | | | | This seems to be running stably on my test laptop, so hopefully the reported hangs where just symptoms of other bugs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"Chris Wilson2011-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I stumbled over this magic bit in the gen3 INSTPM: Bit11 Interrupt-Based AGPBUSY# Enable: ‘0’ = Pending GMCH interrupts will not cause AGPBUSY# assertion. ‘1’ = Pending GMCH interrupts will cause AGPBUSY# assertion and hence can cause the CPU to exit C3. There is no suppression of cacheable writes. Note that in either case in C3 the interrupts are not lost. They will be forwarded to the ICH when the GMCH is out of C3. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org
| * | Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU"Chris Wilson2011-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using PM latency request turns out to be very fragile and only works for some systems, depending upon the ACPI implementation. However, I've stumbled across a promising bit in INSTPM: "Interrupt-Based AGPBUSY#". This reverts commit b0b544cd37c060e261afb2cf486296983fcb56da. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Allow relocation deltas outside of target boChris Wilson2011-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | Userspace has a legitimate requirement to use a delta that points to outside of the target bo, and so we need to enable this. (As this is an abi break, albeit a relaxation of the current restrictions, mark the change with a new flag.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Silence an innocuous compiler warning for an unused variableChris Wilson2011-03-01
| | | | | | | | | | | | | | | | | | | | | drivers/gpu/drm/i915/i915_irq.c: In function ‘ironlake_irq_postinstall’: drivers/gpu/drm/i915/i915_irq.c:1618: warning: unused variable ‘pipe’ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Use a symbolic constant for OpRegion lid stateChris Wilson2011-02-24
| | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-02-22
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge in the conflicting eDP fix. Conflicts: drivers/gpu/drm/i915/i915_irq.c drivers/gpu/drm/i915/intel_display.c Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: skip FDI & PCH enabling for DP_AJesse Barnes2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | eDP on the CPU doesn't need the PCH set up at all, it can in fact cause problems. So avoid FDI training and PCH PLL enabling in that case. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Andy Whitcroft <apw@canonical.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: don't enable FDI & transcoder interrupts after allJesse Barnes2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can enable some safely, but FDI and transcoder interrupts can occur and block other interrupts from being detected (like port hotplug events). So keep them disabled by default (they can be re-enabled for debugging display bringup, but should generally be off). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: Ignore a hung GPU when flushing the framebuffer prior to a switchChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the gpu is hung, then whatever was inside the render cache is lost and there is little point waiting for it. Or complaining if we see an EIO or EAGAIN instead. So, if the GPU is indeed in its death throes when we need to rewrite the registers for a new framebuffer, just ignore the error and proceed with the update. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: Do not handle backlight combination mode speciallyIndan Zupancic2011-02-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code does not follow Intel documentation: It misses some things and does other, undocumented things. This causes wrong backlight values in certain conditions. Instead of adding tricky code handling badly documented and rare corner cases, don't handle combination mode specially at all. This way PCI_LBPC is never touched and weird things shouldn't happen. If combination mode is enabled, then the only downside is that changing the brightness has a greater granularity (the LBPC value), but LBPC is at most 254 and the maximum is in the thousands, so this is no real functional loss. A potential problem with not handling combined mode is that a brightness of max * PCI_LBPC is not bright enough. However, this is very unlikely because from the documentation LBPC seems to act as a scaling factor and doesn't look like it's supposed to be changed after boot. The value at boot should always result in a bright enough screen. IMPORTANT: However, although usually the above is true, it may not be when people ran an older (2.6.37) kernel which messed up the LBPC register, and they are unlucky enough to have a BIOS that saves and restores the LBPC value. Then a good kernel may seem to not work: Max brightness isn't bright enough. If this happens people should boot back into the old kernel, set brightness to the maximum, and then reboot. After that everything should be fine. For more information see the below links. This fixes bugs: http://bugzilla.kernel.org/show_bug.cgi?id=23472 http://bugzilla.kernel.org/show_bug.cgi?id=25072 Signed-off-by: Indan Zupancic <indan@nul.nu> Tested-by: Alex Riesen <raa.lkml@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | drm/i915: Add support for limited color range of broadcast outputsChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to prevent "crushed blacks" on TVs, the range of the RGB output may be limited to 16-235. This used to be available through Xorg under the "Broadcast RGB" option, so reintroduce support for KMS. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34543 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Use a device flag for non-interruptible phasesChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code paths for modesetting are growing in complexity as we may need to move the buffers around in order to fit the scanout in the aperture. Therefore we face a choice as to whether to thread the interruptible status through the entire pinning and unbinding code paths or to add a flag to the device when we may not be interrupted by a signal. This does the latter and so fixes a few instances of modesetting failures under stress. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: First try a normal large kmalloc for the temporary exec buffersChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we just need a temporary array whilst performing the relocations for the execbuffer, first attempt to allocate using kmalloc even if it is not of order page-0. This avoids the overhead of remapping the discontiguous array and so gives a moderate boost to execution throughput. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Add a module parameter to ignore lid statusChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems like we are forever to be cursed with buggy firmware, so allow the user to explicitly set the panel connection status. Of secondary utility for cases where I run laptops with the lid closed, but still want to configure the LVDS. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Protect against drm_gem_object not being the first memberChris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dave Airlie spotted that we had a potential bug should we ever rearrange the drm_i915_gem_object so not the base drm_gem_object was not its first member. He noticed that we often convert the return of drm_gem_object_lookup() immediately into drm_i915_gem_object and then check the result for nullity. This is only valid when the base object is the first member and so the superobject has the same address. Play safe instead and use the compiler to convert back to the original return address for sanity testing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: fix per-pipe reads after "cleanup"Jesse Barnes2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a few places I replaced reads of per-pipe registers with the actual register offsets themselves (converting I915_READ(reg) to _PIPE(reg)). Alexey caught this on his 9xx machine because the cursor control write was affected. A quick audit showed a few more places where I'd borked a read, so here's a patch to fix things up. Reported-by: Alexey Fisher <bug-track@fisher-privat.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: compilation fix] Tested-by: Alexey Fisher <bug-track@fisher-privat.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | Revert "drm/i915: Disable SSC for outputs other than LVDS or DP"Chris Wilson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 633f2ea26665d37bb3c8ae30799aa14988622653 and the attempted fix dcbe6f2b3d136995915e2f9ecc7d4f3b28f47b6c. There is a single clock source used for both SSC (some LVDS and DP) and non-SSC (VGA, DVI) outputs. So we need to be careful to only enable SSC as necessary. However, fiddling with DREFCLK was causing DP links to be dropped and we do not have a fix ready, so revert. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-02-16
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Grab the latest stabilisation bits from -fixes and some suspend and resume fixes from linus. Conflicts: drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/i915/i915_irq.c
| | * | drm/i915: don't enable FDI & transcoder interrupts after allJesse Barnes2011-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can enable some safely, but FDI and transcoder interrupts can occur and block other interrupts from being detected (like port hotplug events). So keep them disabled by default (they can be re-enabled for debugging display bringup, but should generally be off). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * | drm/i915: Ignore a hung GPU when flushing the framebuffer prior to a switchChris Wilson2011-02-16
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | If the gpu is hung, then whatever was inside the render cache is lost and there is little point waiting for it. Or complaining if we see an EIO or EAGAIN instead. So, if the GPU is indeed in its death throes when we need to rewrite the registers for a new framebuffer, just ignore the error and proceed with the update. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: Fix resume regression from 5d1d0ccChris Wilson2011-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irony of the patch to fix the resume regression on PineView causing a further regression on Ironlake is not lost on me. Reported-by: Jeff Chua <jeff.chua.linux@gmail.com> Reported-by: Björn Schließmann <chronoss@gmx.de> Tested-by: Björn Schließmann <chronoss@gmx.de> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28802 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915/tv: Use polling rather than interrupt-based hotplugChris Wilson2011-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The documentation recommends that we should use a polling method for TV detection as this is more power efficient than the interrupt based mechanism (as the encoder can be completely switched off). A secondary effect is that leaving the hotplug enabled seems to be causing pipe underruns as reported by Hugh Dickins on his Crestline. Tested-by: Hugh Dickins <hughd@google.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [This is a candidate for stable, but needs minor porting to 2.6.37]
| | * drm/i915: Trigger modesetting if force-audio changesChris Wilson2011-02-11
| | | | | | | | | | | | | | | | | | | | | | | | If the user changes the force-audio property and it no longer reflects the current configuration, then we need to trigger a mode set in order to update the registers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915/sdvo: If we have an EDID confirm it matches the mode of the connectionChris Wilson2011-02-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we have an EDID for a digital panel, but we are probing a non-TMDS connector then we know that this is a false detection, and vice versa. This should reduce the number of bogus outputs on multi-function adapters that report the same output on multiple connectors. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34101 Reported-by: Sebastien Caty <sebastien.caty@mrnf.gouv.qc.ca> Tested-by: Sebastien Caty <sebastien.caty@mrnf.gouv.qc.ca> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
| | * drm/i915: Disable RC6 on IronlakeChris Wilson2011-02-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The automatic powersaving feature is once again causing havoc, with 100% reliable hangs on boot and resume on affected machines. Reported-by: Francesco Allertsen <fallertsen@gmail.com> Reported-by: Gui Rui <chaos.proton@gmail.com> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28582 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915/lvds: Restore dithering on native modes for gen2/3Chris Wilson2011-02-06
| | | | | | | | | | | | | | | | | | | | | | | | A regression introduced in bee17e5 cleared the dithering bit for native modes on gen2/3. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/711568 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| | * drm/i915: Invalidate TLB caches on SNB BLT/BSD ringsChris Wilson2011-02-02
| | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
| * | drm/i915: Move the lvds OpRegion lid detection code to panel and reuse for eDPChris Wilson2011-02-16
| | | | | | | | | | | | | | | | | | | | | Share the lid detection code for the all panels for consistent behaviour and a single place to add the eventual quirks for crap hardware. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: disable PCH ports if needed when disabling a CRTCJesse Barnes2011-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Disable any PCH ports associated with a pipe when disabling it. This should prevent transcoder disable failures due to ports still being on. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: introduce *_PIPE_ENABLED() macro] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: i915_mutex_interruptible() returns -EINTRChris Wilson2011-02-11
| | | | | | | | | | | | | | | | | | | | | ... so we handle that for i915_gem_fault() in the same manner as ERESTARTSYS, or we send a SIGBUS to the faulting application. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: cleanup per-pipe reg usageJesse Barnes2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had some conversions over to the _PIPE macros, but didn't get everything. So hide the per-pipe regs with an _ (still used in a few places for legacy) and add a few _PIPE based macros, then make sure everyone uses them. [update: remove usage of non-existent no-op macro] [update 2: keep modesetting suspend/resume code, update to new reg names] Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: stylistic cleanups for checkpatch and taste] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Skip the no-op domain changes when already in CPU|GTT domainsChris Wilson2011-02-07
| | | | | | | | | | | | | | | | | | Removes some superfluous fluff from tracing... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Refine tracepointsChris Wilson2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | A lot of minor tweaks to fix the tracepoints, improve the outputting for ftrace, and to generally make the tracepoints useful again. It is a start and enough to begin identifying performance issues and gaps in our coverage. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Fix infinite loop regression from 21dd3734Chris Wilson2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By returning EAGAIN upon a wedged GPU before attempting to wait, we would hit an infinite loop of repeating operation without ever progressing. Instead this needs to be EIO so that userspace knows that the GPU is truly wedged and not in the process of error recovery. Similarly, we need to handle the error recovery during i915_gem_fault. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: the PCH reference clocks are global, so don't clobber unconditionallyJesse Barnes2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCH can drive several reference clocks simultaneously, and needs to with multiple display configurations. So we can't just clobber the existing state everytime we set a mode, we need to take into account what the other CRTCs are doing at the time. Doing so fixes an issue where you'd lose the LVDS display at boot if you had an LVDS+DP config. [updated: init bools and check CRTC status correctly] Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: add port assertion check when disabling transcodersJesse Barnes2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | When a transcoder is disabled, any ports pointing at it should also be disabled. If they're not, we may fail to disable the transcoder, leading to blank displays. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: don't check plane vs pipe enable on ILK+Jesse Barnes2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | These bits have a different meaning on ILK+, where planes are hardwired to pipes. Fixing this avoid some spurious assertion failures. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Set the transcoder port to none when disabling DP.Eric Anholt2011-02-07
| | | | | | | | | | | | | | | | | | | | | The specs say to do so. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Use DEBUG_KMS for the self-refresh watermarksChris Wilson2011-02-07
| | | | | | | | | | | | | | | | | | For consistency and segregation from the noisy DRM_DEBUG(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Include 'i915_error_state' hint for when the GPU catches fireChris Wilson2011-02-07
| | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915: Enable GMBUS for post-gen2 chipsetsChris Wilson2011-02-01
| | | | | | | | | | | | | | | | | | | | | With the recent SDVO fix, this is working on all the machines I have to hand - except for an 845G. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-02-01
| |\ \ | | | | | | | | | | | | Merge resume fixes from -fixes and an important fix for SDVO GMBUS.
| * | | drm/i915: Remove unreachable conditionChris Wilson2011-02-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fortunately unreachable. For Crestline, the watermarks must always be programmed to 8... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | | drm/i915: Override SDVO panel type in VBTChris Wilson2011-02-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Judging by comments in the BIOS, if the SDVO LVDS option h40 is enabled, then we are supposed to query the real panel type via Int15. We don't do this and so for the Sony Vaio VGC-JS210J which has otherwise default values, we choose the wrong mode. This patch adds a driver option, i915.vbt_sdvo_panel_type, which can be used to override the value in the VBT. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33691 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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