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* ia64: Fix resource assignment for root bussesMatthew Wilcox2009-06-17
| | | | | | | | | | | ia64 was assigning resources to root busses after allocations had been made for child busses. Calling pcibios_setup_root_windows() from pcibios_fixup_bus() solves this problem by assigning the resources to the root bus before child busses are scanned. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Tested-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* x86: Use pci_claim_resourceMatthew Wilcox2009-06-17
| | | | | | | | Instead of open-coding pci_find_parent_resource and request_resource, just call pci_claim_resource. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Delete pcibios_select_rootMatthew Wilcox2009-06-17
| | | | | | | | This function was only used by pci_claim_resource(), and the last commit deleted that use. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'release' of ↵Linus Torvalds2009-06-17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Convert ia64 to use int-ll64.h [IA64] Fix build error in paravirt_patchlist.c [IA64] ia64 does not need umount2() syscall [IA64] hook up new rt_tgsigqueueinfo syscall [IA64] msi_ia64.c dmar_msi_type should be static [IA64] remove obsolete hw_interrupt_type [IA64] remove obsolete irq_desc_t typedef [IA64] remove obsolete no_irq_type [IA64] unexport fpswa.h
| * Pull for-2.6.31 into releaseTony Luck2009-06-17
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| | * [IA64] Convert ia64 to use int-ll64.hMatthew Wilcox2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is generally agreed that it would be beneficial for u64 to be an unsigned long long on all architectures. ia64 (in common with several other 64-bit architectures) currently uses unsigned long. Migrating piecemeal is too painful; this giant patch fixes all compilation warnings and errors that come as a result of switching to use int-ll64.h. Note that userspace will still see __u64 defined as unsigned long. This is important as it affects C++ name mangling. [Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use u64 for start/end rather than unsigned long] Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] ia64 does not need umount2() syscallTony Luck2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ia64 doesn't have old and new versions of the umount system call. It just has the new version. Fixes this build warning: <stdin>:395:2: warning: #warning syscall umount2 not implemented Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] hook up new rt_tgsigqueueinfo syscallTony Luck2009-06-16
| | | | | | | | | | | | | | | | | | Assign syscall #1321 for rt_tgsigqueueinfo. Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] msi_ia64.c dmar_msi_type should be staticJaswinder Singh Rajput2009-06-15
| | | | | | | | | | | | | | | | | | Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] remove obsolete hw_interrupt_typeThomas Gleixner2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have been kept around for migration reasons. After more than two years it's time to remove them finally. This patch cleans up one of the remaining users. When all such patches hit mainline we can remove the defines and typedefs finally. Impact: cleanup Convert the last remaining users to struct irq_chip and remove the define. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] remove obsolete irq_desc_t typedefThomas Gleixner2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have been kept around for migration reasons. After more than two years it's time to remove them finally. This patch cleans up one of the remaining users. When all such patches hit mainline we can remove the defines and typedefs finally. Impact: cleanup Convert the last remaining users and remove the typedef. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] remove obsolete no_irq_typeThomas Gleixner2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have been kept around for migration reasons. After more than two years it's time to remove them finally. This patch cleans up one of the remaining users. When all such patches hit mainline we can remove the defines and typedefs finally. Impact: cleanup convert the last remaining users to no_irq_chip Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] unexport fpswa.hSam Ravnborg2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | fpswa.h is not relevant for userspace, so do not export it. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Fix build error in paravirt_patchlist.cJes Sorensen2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Andrew cleaned up some #include tangles in: commit 0d9c25dde878a636ee9a9b53923569171bf9a55b headers: move module_bug_finalize()/module_bug_cleanup() definitions into module.h which resulted in this build error for ia64: CC arch/ia64/kernel/paravirt_patchlist.o arch/ia64/kernel/paravirt_patchlist.c:43: error: expected '=', ',', ';', 'asm' or '__attribute__' before '__initdata' arch/ia64/kernel/paravirt_patchlist.c:54: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'paravirt_get_gate_patchlist' arch/ia64/kernel/paravirt_patchlist.c:76: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'paravirt_get_gate_section' make[1]: *** [arch/ia64/kernel/paravirt_patchlist.o] Error 1 The problem was that paravirt_patchlist.c was relying on some of the nested includes (specifically that linux/bug.h included linux/module.h Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Merge branch 'fixes' of ↵Linus Torvalds2009-06-17
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] cpumask: new cpumask operators for arch/x86/kernel/cpu/cpufreq/powernow-k8.c [CPUFREQ] cpumask: avoid playing with cpus_allowed in powernow-k8.c [CPUFREQ] cpumask: avoid cpumask games in arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c [CPUFREQ] cpumask: avoid playing with cpus_allowed in speedstep-ich.c [CPUFREQ] powernow-k8: get drv data for correct CPU [CPUFREQ] powernow-k8: read P-state from HW [CPUFREQ] reduce scope of ACPI_PSS_BIOS_BUG_MSG[] [CPUFREQ] Clean up convoluted code in arch/x86/kernel/tsc.c:time_cpufreq_notifier() [CPUFREQ] minor correction to cpu-freq documentation [CPUFREQ] powernow-k8.c: mess cleanup [CPUFREQ] Only set sampling_rate_max deprecated, sampling_rate_min is useful [CPUFREQ] powernow-k8: Set transition latency to 1 if ACPI tables export 0 [CPUFREQ] ondemand: Uncouple minimal sampling rate from HZ in NO_HZ case
| * | | [CPUFREQ] cpumask: new cpumask operators for ↵Rusty Russell2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/x86/kernel/cpu/cpufreq/powernow-k8.c Remove all old-style cpumask operators, and cpumask_t. Also: get rid of the unused define_siblings function. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Mark Langsdorf <mark.langsdorf@amd.com> Tested-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] cpumask: avoid playing with cpus_allowed in powernow-k8.cRusty Russell2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpumask: avoid playing with cpus_allowed in powernow-k8.c It's generally a very bad idea to mug some process's cpumask: it could legitimately and reasonably be changed by root, which could break us (if done before our code) or them (if we restore the wrong value). I did not replace powernowk8_target; it needs fixing, but it grabs a mutex (so no smp_call_function_single here) but Mark points out it can be called multiple times per second, so work_on_cpu is too heavy. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> To: cpufreq@vger.kernel.org Acked-by: Mark Langsdorf <mark.langsdorf@amd.com> Tested-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] cpumask: avoid cpumask games in ↵Rusty Russell2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c Impact: don't play with current's cpumask It's generally a very bad idea to mug some process's cpumask: it could legitimately and reasonably be changed by root, which could break us (if done before our code) or them (if we restore the wrong value). Use rdmsr_on_cpu and wrmsr_on_cpu instead. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> To: cpufreq@vger.kernel.org Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] cpumask: avoid playing with cpus_allowed in speedstep-ich.cRusty Russell2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Impact: don't play with current's cpumask It's generally a very bad idea to mug some process's cpumask: it could legitimately and reasonably be changed by root, which could break us (if done before our code) or them (if we restore the wrong value). We use smp_call_function_single: this had the advantage of being more efficient, too. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> To: cpufreq@vger.kernel.org Cc: Dominik Brodowski <linux@brodo.de> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] powernow-k8: get drv data for correct CPUNaga Chumbalkar2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make powernowk8_get() similar to powernowk8_target() and powernowk8_verify() in the way it obtains "powernow_data" for a given CPU. Cc: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Langsdorf, Mark <mark.langsdorf@amd.com> Cc: Thomas Renninger <trenn@suse.de> Signed-off-by: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com> Tested-by: Andreas Herrmann <andreas.herrmann3@amd.com> Acked-by: Langsdorf, Mark <mark.langsdorf@amd.com> Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] powernow-k8: read P-state from HWNaga Chumbalkar2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By definition, "cpuinfo_cur_freq" should report the value from HW. So, don't depend on the cached value. Instead read P-state directly from HW, while taking into account the erratum 311 workaround for Fam 11h processors. Cc: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Langsdorf, Mark <mark.langsdorf@amd.com> Cc: Thomas Renninger <trenn@suse.de> Signed-off-by: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com> Tested-by: Andreas Herrmann <andreas.herrmann3@amd.com> Acked-by: Langsdorf, Mark <mark.langsdorf@amd.com> Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] reduce scope of ACPI_PSS_BIOS_BUG_MSG[]Andrew Morton2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This symbol doesn't need file-global scope. Cc: "Zhang, Rui" <rui.zhang@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Ingo Molnar <mingo@elte.hu> Cc: Langsdorf, Mark <mark.langsdorf@amd.com> Cc: Leo Milano <lmilano@gmx.net> Cc: Thomas Renninger <trenn@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] Clean up convoluted code in ↵Dave Jones2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/x86/kernel/tsc.c:time_cpufreq_notifier() Christoph Hellwig noticed the following potential uninitialised use: > arch/x86/kernel/tsc.c: In function 'time_cpufreq_notifier': > arch/x86/kernel/tsc.c:634: warning: 'dummy' may be used uninitialized in this function > > where we do have CONFIG_SMP set, freq->flags & CPUFREQ_CONST_LOOPS is > true and ref_freq is false. It seems plausable, though the circumstances for hitting it are really low. Nearly all SMP capable cpufreq drivers set CPUFREQ_CONST_LOOPS. powernow-k8 is really the only exception. The older CPUs were typically only ever UP. (powernow-k7 never supported SMP for eg) It's worth fixing regardless, as it cleans up the code. Fix possible uninitialized use of dummy, by just removing it, and making the setting of lpj more obvious. Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] powernow-k8.c: mess cleanupLuis Henriques2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Mess cleanup in powernow_k8_acpi_pst_values() function. Signed-off-by: Luis Henriques <henrix@sapo.pt> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | [CPUFREQ] powernow-k8: Set transition latency to 1 if ACPI tables export 0Thomas Renninger2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This doesn't fix anything, but it's expected that a transition latency of 0 could cause trouble in the future. Signed-off-by: Thomas Renninger <trenn@suse.de> Cc: Langsdorf, Mark <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | | | MIPS: Add hibernation supportWu Zhangjin2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't support. As implemented in this patch cache and tlb flushing will also be invoked with interrupts disabled so smp_call_function() will blow up in charming ways. So limit to !SMP.] Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Yan Hua <yanh@lemote.com> Reviewed-by: Arnaud Patard <apatard@mandriva.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.hDavid Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove it to mach-cavium-octeon/cpu-feature-overrides.h Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPUs have implementation dependent rdhwr registers. Allow them to be enabled on a per CPU basis. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and CPU_SUPPORTS_HUGEPAGES. They are enabled for systems that are known to support huge pages. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: TLB support for hugetlbfs.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TLB handlers need to check for huge pages and give them special handling. Huge pages consist of two contiguous sub-pages of physical memory. * Loading entrylo0 and entrylo1 need to be handled specially. * The page mask must be set for huge pages and then restored after writing the TLB entries. * The PTE for huge pages resides in the PMD, we halt traversal of the tables there. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Add hugetlbfs page defines.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Add support files for hugetlbfs.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Remove unused parameters from iPTE_LW.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The l parameter to iPTE_LW() is unused. Remove it and from some of its callers as well. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Export erratum function needed by octeon-ethernet driver.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Cavium-Octeon: Add more chip specific feature tests.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The octeon-ethernet driver needs to check for additional chip specific features, we add them to the octeon_has_feature() framework. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Cavium-Octeon: Add more board type constants.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bootloader now uses additional board type constants. The octeon-ethernet driver needs some of the new values. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Add named alloc functions to OCTEON boot monitor memory allocator.David Daney2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The various Octeon ethernet drivers use these new functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Alchemy: devboards: Convert to gpio calls.Manuel Lauss2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a few open-coded GPIO register accesses with gpio calls. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Alchemy: xxs1500: use linux gpio api.Manuel Lauss2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a few GPIO register accesses in the board init code with calls to the gpio api. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Alchemy: MTX-1: Use linux gpio api.Manuel Lauss2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a few GPIO register accesses in the board init code with calls to the gpio api. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Alchemy: Rewrite GPIO support.Manuel Lauss2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current in-kernel Alchemy GPIO support is far too inflexible for all my use cases. To address this, the following changes are made: * create generic functions which deal with manipulating the on-chip GPIO1/2 blocks. Such functions are universally useful. * Macros for GPIO2 shared interrupt management and block control. * support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros. If CONFIG_GPIOLIB is not enabled, provide linux gpio framework compatibility by directly inlining the GPIO1/2 functions. GPIO access is limited to on-chip ones and they can be accessed as documented in the datasheets (GPIO0-31 and 200-215). If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and one for GPIO2, are registered. GPIOs can still be accessed by using the numberspace established in the databooks. However this is not yet flexible enough for my uses: My Alchemy systems have a documented "external" gpio interface (fixed, different numberspace) and can support a variety of baseboards, some of which are equipped with I2C gpio expanders. I want to be able to provide the default 16 GPIOs of the CPU board numbered as 0..15 and also support gpio expanders, if present, starting as gpio16. To achieve this, a new Kconfig symbol for Alchemy is introduced, CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal that they don't want the Alchemy numberspace exposed to the outside world, but instead want to provide their own. Boards are now respon- sible for providing the linux gpio interface glue code (either in a custom gpio.h header (in board include directory) or with gpio_chips). To make the board-specific inlined gpio functions work, the MIPS Makefile must be changed so that the mach-au1x00/gpio.h header is included _after_ the board headers, by moving the inclusion of the mach-au1x00/ to the end of the header list. See arch/mips/include/asm/mach-au1x00/gpio.h for more info. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Alchemy: Remove unused au1000_gpio.h headerManuel Lauss2009-06-17
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: BCM47xx: Fix gpio_direction_outputMatthieu Castet2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpio_direction_output should also set an output value according to the API. Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: ioctl.h: Cleanup.Ralf Baechle2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Rewrite to use <asm-generic/ioctl.h>. Cuts down the file from 40 to 16 lines. o Delete _IOC_VOID, _IOC_OUT, _IOC_IN and _IOC_INOUT. They were added for 2.1.14 but I was not able to find any user - not even historical ones. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: TXx9: Add TX4939 RNG supportAtsushi Nemoto2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform support for RNG of TX4939 SoC. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: TXx9: Add SRAMC supportAtsushi Nemoto2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a sysdev to access SRAM in TXx9 SoCs via sysfs. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Sibyte: Remove standalone kernel supportImre Kaloz2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CFE is the only supported and used bootloader on the SiByte boards, the standalone kernel support has been never used outside Broadcom. Remove it and make the kernel use CFE by default. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: Sibyte: Remove simulator optionImre Kaloz2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the SiByte simulation Kconfig option, which only modified a printk. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | MIPS: RB532: Check irq number when handling GPIO interruptsFlorian Fainelli2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes sure that we are not going to clear or change the interrupt status of a GPIO interrupt superior to 13 as this is the maximum number of GPIO interrupt source (p.232 of the RC32434 reference manual). Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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