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* ARM: tegra: add tegra_gpio_table and tegra_gpio_configOlof Johansson2011-02-22
| | | | | | | | | | | | To give one place to setup the pins that are used as GPIOs instead of as their pinmuxed functions. Specifying enabled as false explicitly disables the gpio mode of that pin (if left on by firmware). This should remove the need for calling these from specific drivers and thus reduce tegra-specific code from them. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Erik Gilling <konkers@android.com>
* ARM: tegra: Hide EMC scaling config behind ARCH_TEGRAMark Brown2011-02-22
| | | | | | | | The option isn't terribly useful on other ARM platforms. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: Fix typo in TEGRA_IRQ_TO_GPIOStephen Warren2011-02-22
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: common: Enable core clocksColin Cross2011-02-22
| | | | | | | | | Enable the cpu, emc (memory controller) and csite (debug and trace controller) clocks during init to prevent them from being disabled by the bootloader clock disabling code. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: timer: Enable timer and rtc clocksColin Cross2011-02-22
| | | | | | | | Enable the timer and rtc clocks to prevent them being turned off by the bootloader clock disabling code. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: Move tegra_common_init to tegra_init_earlyColin Cross2011-02-22
| | | | | | | | | | | | | | Move tegra_common_init to tegra_init_early, and set it as the init_early entry in the machine struct. Initializes the clocks earlier so that timers can enable their clocks. Also reorders the members in the Harmony and Trimslice boards' machine structs to match the order they are called in. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: clock: prevent accidental disables of cpu clockColin Cross2011-02-22
| | | | | | | | | | | Peripheral clocks that have no clock enable bit in the enable registers have their clk_num set to 0. Bit 0 in the clock enable registers is the CPU clock. Prevent disables on these peripheral clocks from accidentally disabling the CPU clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: clock: Round rate before setting rateColin Cross2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | Call the clock's round_rate op, if it exists, before calling the set_rate op. This will help later when dvfs is added, dvfs needs to know what the final rate will be before the frequency changes. Also requires fixes to the round rate functions to ensure calling round rate and then set rate will not cause the frequency to be rounded down twice. When picking clock divider values, the clock framework picks the closest frequency that is lower than the requested frequency. If the new frequency calculated from the divider value is rounded down, and then passed to set_rate, it will get rounded down again, possibly resulting in a frequency two steps lower than the original requested frequency. Fix the problem by rounding up when calculating the frequency coming out of a clock divider, so if that frequency is requested again, the same divider value will be picked. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: clock: Refcount periph clock enablesColin Cross2011-02-22
| | | | | | | | | Some peripheral clocks share enable bits. Refcount the enables so that calling clk_disable on one clock will not turn off another clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: clock: Miscellaneous clock updatesColin Cross2011-02-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct max rates for pclk and sclk (Originally fixed by Dima Zavin <dima@android.com>) Correct max rate for plla (Originally fixed by Stephen Warren <swarren@nvidia.com>) Remove unnecessary no-op set_rate on audio clocks Add clock lookup entries for grhost, bsea, and vde clocks Update clock clookup entries for vcp, bsea, and vde clocks Add shared clock entries for sclk and emc Add a virtual cop clock to provide a reset op (Originally fixed by Dima Zavin <dima@android.com>) Pass set_rate on super clocks through to parent Fix pllx frequency table entry for 608 MHz Remove incorrect plla frequency table entries Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Fix clock issues in suspendColin Cross2011-02-21
| | | | | | | | | | | | | | | | | | The PLLP registers are now being restored by the low-level resume code, and the CPU may be running off PLLP, so don't touch them during clock resume. Save plld, plls, pllu, and audio clock during suspend (originally fixed by Mayuresh Kulkarni <mkulkarni@nvidia.com>) The lock time for plld is 1000 us, so increase the delay after setting the PLLs. Add a BUG_ON to ensure the size of the suspend context area is correct. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Add function to set SDMMC tap delayColin Cross2011-02-21
| | | | | | | | | | | The SDMMC controllers have extra bits in the clock source register that adjust the delay between the clock and data to compenstate for delays on the PCB. The values need to be set from the clock code so the clock can be locked during the read-modify-write on the clock source register. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: cpufreq: Adjust memory frequency with cpu frequencyColin Cross2011-02-21
| | | | | | | | | | Adjusts the minimum memory frequency when the cpu frequency changes. The values are currently hardcoded to a reasonable default. If memory frequency scaling is not enabled this patch will have no effect. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clocks: Add emc scalingColin Cross2011-02-21
| | | | | | | | | | | | Add clock ops on the emc peripheral clock that call into the emc driver to update the memory controller registers for the new frequency. Tegra has an interlock between the clock controller and the memory controller that prevents the new register values from taking effect until the clock frequency update occurs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: Add external memory controller driverColin Cross2011-02-21
| | | | | | | | | | | | | The frequency memory bus on Tegra can be adjusted without disabling accesses to memory by updating the memory configuration registers from a per-board table, and then changing the clock frequency. The clock controller and memory controller have an interlock that prevents the new memory registers from taking effect until the clock frequency change. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Minor cleanupsColin Cross2011-02-21
| | | | | | | | Remove unnecessary uses of #ifdef CONFIG_DEBUG_FS Convert bool assignments from 1 to true Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Add shared bus clock typeColin Cross2011-02-21
| | | | | | | | | | | | Some clocks may have multiple downstream users that need to request a higher clock rate. Shared bus clocks provide a unique shared_bus_user clock to each user. The frequency of the bus is set to the highest enabled shared_bus_user clock, with a minimum value set by the shared bus. Drivers can use clk_enable and clk_disable to enable or disable their requirement, and clk_set_rate to set the minimum rate. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: cpufreq: Take an extra reference to pllxColin Cross2011-02-21
| | | | | | | | | | During cpu frequency changes, take an extra reference to pllx so that it doesn't turn off and on while the cpu is temporarily on pllp. If the cpu is moved to pllp permanently, pllx will be turned off. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Convert global lock to a lock per clockColin Cross2011-02-21
| | | | | | | | | | | Give each clock its own lock, and remove all lock traversals from parent to child clocks to prevent AB-BA deadlocks. This brings the locking in line with the common struct clk patches and should make conversion simple. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Move unshared clk struct members into unionColin Cross2011-02-21
| | | | | | | | | Creates a union of a struct for each type of clock to reduce memory usage and clarify which members are used by all clocks and which are used by a single type. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Rearrange static clock tablesColin Cross2011-02-21
| | | | | | | | Make the static clocks look more like the array of clocks so they can all be initalized with the same helper function. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Drop CPU dvfsColin Cross2011-02-21
| | | | | | | | | The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Initialize clocks that have no enableColin Cross2011-02-21
| | | | | | | Assume that any clock that has no enable op is always on. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Don't use PLL lock bitsColin Cross2011-02-21
| | | | | | | The PLL lock bits are not reliable, use per-PLL timeouts instead. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Drop debuggingColin Cross2011-02-21
| | | | | | | Drop the unnecessary pr_debug calls to avoid having to maintain them. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: Don't BUG on changing an enabled PLLColin Cross2011-02-21
| | | | | | | | | | When updating the CPU PLL frequency, keeping the PLL enabled avoids ramping the PLL all the way down and back up again. Remove the BUG_ON in tegra2_pll_clk_set_rate to allow the rate to change while the PLL is enabled. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: clock: enable clk reset for non-peripheral clocksDima Zavin2011-02-21
| | | | | | | | | Add a new 'reset' clk op. This can be provided for any clock, not just peripherals. Signed-off-by: Dima Zavin <dima@android.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: Fix hang on rebootSimon Glass2011-02-20
| | | | | | | | | | | | This seems to be a regression in 2.6.37. We cannot use writel() here since the resulting wmb() calls l2x0_cache_sync() which uses a spinlock and L1 cache may be off at this point. http://lists.infradead.org/pipermail/linux-arm-kernel/2011-February/041909.html Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: APB DMA: Enable clock and remove reset.Stephen Warren2011-02-20
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* ARM: tegra: Prevent requeuing in-progress DMA requestsStephen Warren2011-02-19
| | | | | | | | | | | | | | | If a request already in the queue is passed to tegra_dma_enqueue_req, tegra_dma_req.node->{next,prev} will end up pointing to itself instead of at tegra_dma_channel.list, which is the way a the end-of-list should be set up. When the DMA request completes and is list_del'd, the list head will still point at it, yet the node's next/prev will contain the list poison values. When the next DMA request completes, a kernel panic will occur when those poison values are dereferenced. This makes the DMA driver more robust in the face of buggy clients. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* Merge branch 'tegra-arch' of ↵Colin Cross2011-02-19
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6 into outside-for-next
| * ARM: tegra: Add to struct harmony_audio_platform_dataStephen Warren2011-02-01
| | | | | | | | | | | | | | | | | | Add fields to describe all the audio-related GPIOs on Harmony, except for the codec's GPIO IRQ, which will be passed in its i2c_board_info. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * ARM: tegra: Add Harmony sound platform data typeStephen Warren2011-01-25
| | | | | | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@google.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | ARM: tegra: add TrimSlice boardMike Rapoport2011-02-10
| | | | | | | | | | | | | | Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Use writel_relaxed in tegra_init_cacheColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: add tegra_defconfigOlof Johansson2011-02-10
| | | | | | | | | | | | | | | | Adding one single defconfig for the tegra family of boards, to over time cover the superset of supported platform and drivers. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: dma: Fix critical data corruption bugsColin Cross2011-02-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, due to high interrupt latency in the continuous mode of DMA transfer, the half buffer complete interrupt is handled after DMA has transferred the full buffer. When this is detected, stop DMA immediately and restart with the next buffer if the next buffer is ready. originally fixed by Victor(Weiguo) Pan <wpan@nvidia.com> In place of using the simple spin_lock()/spi_unlock() in the interrupt thread, using the spin_lock_irqsave() and spin_unlock_irqrestore(). The lock is shared between the normal process context and interrupt context. originally fixed by Laxman Dewangan (ldewangan@nvidia.com) The use of shadow registers caused memory corruption at physical address 0 because the enable bit was not shadowed, and assuming it needed to be set would enable an unconfigured dma block. Most of the register accesses don't need to know the previous state of the registers, and the few places that do need to modify only a few bits in the registers are the same ones that were sometimes incorrectly setting the enable bit. This patch convert tegra_dma_update_hardware to set the entire register, and the other users to read-modify-write, and drops the shadow registers completely. Also fixes missing locking in tegra_dma_allocate_channel Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Allow overriding arch_resetColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: cpufreq: Disable cpufreq during suspendColin Cross2011-02-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra, calling clk_set_rate on the CPU clock may call into the regulator API. If the regulator driver that controls the CPU voltage rail has been suspended, this can lead to attempted communication with a hardware block that has already been turned off. Adds a SUSPEND_PREPARE notification hook to drop the frequency to the lowest possible during suspend. Also adds 216MHz (off of PLLP) as the lowest CPU frequency, which allows PLLX to be turned off. Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: iomap: Add missing devicesGary King2011-02-10
| | | | | | | | | | | | | | Adds gart, hdmi, avp, host1x, and pwm controllers to mach/iomap.h Signed-off-by: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: irq: Implement retriggerColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: irq: Add support for suspend wake sourcesColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: timer: Add idle and suspend support to timersColin Cross2011-02-10
| | | | | | | | | | | | | | | | | | | | Implement read_persistent_clock by reading the Tegra RTC registers that stay running during suspend. Save and restore the timer configuration register in suspend. Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: pinmux: Add missing drive pingroups and fix suspendGary King2011-02-10
| | | | | | | | | | | | | | | | Adds missing drive pingroups, saves all drive pingroups in suspend, and restores the pinmux registers in the proper order. Signed-off-by: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: clock: Suspend fixes, and add new clocksColin Cross2011-02-10
| | | | | | | | | | | | | | | | | | | | | | | | | | Save and restore pll and osc state during suspend Add digital audio clocks Update clk dev associations Correct max clock frequencies Add pll_p as additional cpu clock state Add values to plld table Fix register offset for sdmmc4 clock Add blink timer to tegra2_clocks Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Add prototypes for subsystem suspend functionsColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: irqs: Update irq listColin Cross2011-02-10
| | | | | | | | | | | | | | Fixes typo in INT_CPU1_PMU_INTR (original fix from Will Deacon) Adds board irqs Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Add api to control internal powergatingColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Centralize macros to define debug uart baseColin Cross2011-02-10
| | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-02-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: ALSA: AACI: allow writes to MAINCR to take effect ARM: Update mach-types ARM: 6652/1: ep93xx: correct the end address of the AC97 memory resource ARM: mxs/imx28: remove now unused clock lookup "fec.0" ARM: mxs: fix clock base address missing ARM: mxs: acknowledge gpio irq ARM: mach-imx/mach-mx25_3ds: Fix section type ARM: imx: Add VPR200 and MX51_3DS entries to uncompress.h ARM i.MX23: use correct register for setting the rate ARM i.MX23/28: remove secondary field from struct clk. It's unused ARM i.MX28: use correct register for setting the rate ARM i.MX28: fix bit operation
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-09 14:20:56 -0500