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| | * | omap: Initialization of SDRC params on Zoom2Teerth Reddy2009-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch initializes the correct SDRC settings required for DVFS on Zoom2. Signed-off-by: Teerth Reddy <teerth@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | omap: RX-51: Drop I2C-1 speed to 2200Aaro Koskinen2009-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C-1 bus frequency on RX-51 should be 2.2 MHz. The speed is limited by TWL5030/GAIA; a higher speed could lead to errors on the interface. The maximum speed depends on the system clock for GAIA: 2.2 MHz (if 19.2 MHz), 2.4 MHz (26 MHz) or 2.9 MHz (38.4 MHz). Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | omap: SDMA: Fixing bug in omap_dma_set_global_params()Anuj Aggarwal2009-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Argument tparams was not being used to program global register GCR.HI_THREAD_RESERVED. This patch fixes the same. Signed-off-by: Anuj Aggarwal <anuj.aggarwal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | omap: CONFIG_ISP1301_OMAP redefined in Beagle defconfigSanjeev Premi2009-10-14
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | The symbol CONFIG_ISP1301_OMAP was defined twice in the defconfig. This was causing the warning: arch/arm/configs/omap3_beagle_defconfig:972:warning: override: reassigning to symbol ISP1301_OMAP Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: 5763/1: ARM: SMP: Fix the BUG with CONFIG_PREEMPT enabledSantosh Shilimkar2009-10-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the BUG: using smp_processor_id() in preemptible Below is the stripped backtrace. BUG: using smp_processor_id() in preemptible [00000000] code: init/1 caller is flush_tlb_mm+0x44/0x70 Backtrace: [<c00225c4>] (dump_backtrace+0x0/0x110) from [<c01713a0>] (dump_stack+0x18/0x1c) r7:00000000 r6:c00234f0 r5:00000001 r4:c7828000 [<c0171388>] (dump_stack+0x0/0x1c) from [<c0135364>] (debug_smp_processor_id+0xc0/0xf0) [<c01352a4>] (debug_smp_processor_id+0x0/0xf0) from [<c00234f0>] (flush_tlb_mm+0x44/0x70) r7:00000000 r6:c60b41a0 r5:c60b4154 r4:00000001 [<c00234ac>] (flush_tlb_mm+0x0/0x70) from [<c0039568>] (dup_mm+0x304/0x38c) r5:c1f09058 r4:00000000 [<c0039264>] (dup_mm+0x0/0x38c) from [<c0039de4>] (copy_process+0x7b8/0xeb0) [<c003962c>] (copy_process+0x0/0xeb0) from [<c003a638>] (do_fork+0x15c/0x29c) [<c003a4dc>] (do_fork+0x0/0x29c) from [<c0021df0>] (sys_clone+0x34/0x3c) [<c0021dbc>] (sys_clone+0x0/0x3c) from [<c001efa0>] (ret_fast_syscall+0x0/0x2c) Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'for-rmk-rc' of git://git.pengutronix.de/git/imx/linux-2.6Russell King2009-10-15
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| * | | MXC: fix reset for mx31, mx35 and mx27 SoCsValentin Longchamp2009-10-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock name for the watchdog devices was not set consistently with mx21 on these platforms, resulting in the reset not to work. Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | fix pcm037_eet compilation with the new SPI driverGuennadi Liakhovetski2009-10-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix pcm037_eet compilation with the new imx SPI driver by unifying platform device names. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | fix compilation of i.MX31 platformsGuennadi Liakhovetski2009-10-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mxc_iomux_v3_init() is defined in arch/arm/plat-mxc/iomux-v3.c, which is not linked for i.MX31 and produces an undefined reference error. Fix this by building the offending code only for i.MX35. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | pcm970 mmc: Fix ro switchSascha Hauer2009-10-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have to use mxc_gpio_mode() for the card detection pin instead of mxc_gpio_setup_multiple_pins() because the latter does a gpio_request() and thus a later gpio_request() fails. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | pcm038: Add SPI/MC13783 supportSascha Hauer2009-10-13
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mx25: Add missing copyright / license headerSascha Hauer2009-10-02
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mx25pdk: remove nand support as it is not present in current treeSascha Hauer2009-10-02
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mx25 devices: Add missing includeSascha Hauer2009-10-02
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX27 clock: rename spi clocks to match deviceSascha Hauer2009-10-02
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: 5760/1: ep93xx: fix build error in edb93xx.cHartley Sweeten2009-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a build error due to a typo (missing comma) in: ARM: 5754/1: ep93xx: update i2c support Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5759/1: Add register information of threads to coredumpArtem Bityutskiy2009-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defines ELF_CORE_COPY_TASK_REGS so that CPU register information of every thread is included in coredump. Without this, only the faulting thread is coredumped. Cc: Roger Quadros <ext-roger.quadros@nokia.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5757/1: Thumb-2: Correct "mov.w pc, lr" instruction which is unpredictableCatalin Marinas2009-10-14
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | The 32-bit wide variant of "mov pc, reg" in Thumb-2 is unpredictable causing improper handling of the undefined instructions not caught by the kernel. This patch adds a movw_pc macro for such situations (currently only used in call_fpe). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: force dcache flush if dcache_dirty bit setNitin Gupta2009-10-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM, update_mmu_cache() does dcache flush for a page only if it has a kernel mapping (page_mapping(page) != NULL). The correct behavior would be to force the flush based on dcache_dirty bit only. One of the cases where present logic would be a problem is when a RAM based block device[1] is used as a swap disk. In this case, we would have in-memory data corruption as shown in steps below: do_swap_page() { - Allocate a new page (if not already in swap cache) - Issue read from swap disk - Block driver issues flush_dcache_page() - flush_dcache_page() simply sets PG_dcache_dirty bit and does not actually issue a flush since this page has no user space mapping yet. - Now, if swap disk is almost full, this newly read page is removed from swap cache and corrsponding swap slot is freed. - Map this page anonymously in user space. - update_mmu_cache() - Since this page does not have kernel mapping (its not in page/swap cache and is mapped anonymously), it does not issue dcache flush even if dcache_dirty bit is set by flush_dcache_page() above. <user now gets stale data since dcache was never flushed> } Same problem exists on mips too. [1] example: - brd (RAM based block device) - ramzswap (RAM based compressed swap device) Signed-off-by: Nitin Gupta <ngupta@vflare.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'fix' of ↵Russell King2009-10-12
|\ \ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| * | | [ARM] pxa: workaround errata #37 by not using half turbo switchingDennis O'Brien2009-10-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PXA27x Errata #37 implies system will hang when switching into or out of half turbo (HT bit in CLKCFG) mode, workaround this by not using it. Signed-off-by: Dennis O'Brien <dennis.obrien@eqware.net> Cc: stable-2.6.31 <stable@kernel.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | | [ARM] pxa/csb726: adjust duplicate structure field initializationJulia Lawall2009-10-12
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | Currently the irq_type field of the csb726_lan_config structure is initialized twice. The value in the first case, SMSC911X_IRQ_POLARITY_ACTIVE_LOW, is normally stored in the irq_polarity field, so I have renamed the field in the first initialization to that. Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | headers: remove sched.h from interrupt.hAlexey Dobriyan2009-10-11
| | | | | | | | | | | | | | | | | | | | | | | | After m68k's task_thread_info() doesn't refer to current, it's possible to remove sched.h from interrupt.h and not break m68k! Many thanks to Heiko Carstens for allowing this. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
| * | Merge branch 'for-linus' of ↵Linus Torvalds2009-10-09
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: i8042 - print debug data when testing AUX IRQ delivery Input: libps2 - fix dependancy on i8042 Input: fix rx51 board keymap Input: ad7879 - pass up error codes from probe functions Input: xpad - add BigBen Interactive XBOX 360 Controller Input: rotary_encoder - fix relative axis support Input: sparkspkr - move remove() functions to .devexit.text Input: wistron_btns - add DMI entry for Medion WIM2030 laptop
| | * | Input: fix rx51 board keymapAmit Kucheria2009-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original driver was written with the KEY() macro defined as (col, row) instead of (row, col) as defined by the matrix keypad infrastructure. So the keymap was defined accordingly. Since the driver that was merged upstream uses the matrix keypad infrastructure, modify the keymap accordingly. While we are at it, fix the comments in twl4030.h and define PERSISTENT_KEY as (r,c) instead of (c, r) Tested on a RX51 (N900) device. Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
| * | | Merge branch 'pm-fixes-32' of ↵Tony Lindgren2009-10-06
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-fixes-for-linus
| | * | | OMAP3: PM: introduce a new powerdomain walk helperArtem Bityutskiy2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'pwrdm_for_each()' function walks powerdomains with a spinlock locked, so the the callbacks cannot do anything which may sleep. This patch introduces a 'pwrdm_for_each_nolock()' helper which does the same, but without the spinlock locked. This fixes the following lockdep warning: [ 0.000000] WARNING: at kernel/lockdep.c:2460 lockdep_trace_alloc+0xac/0xec() [ 0.000000] Modules linked in: (unwind_backtrace+0x0/0xdc) from [<c0045464>] (warn_slowpath_common+0x48/0x60) (warn_slowpath_common+0x48/0x60) from [<c0067dd4>] (lockdep_trace_alloc+0xac/0xec) (lockdep_trace_alloc+0xac/0xec) from [<c009da14>] (kmem_cache_alloc+0x1c/0xd0) (kmem_cache_alloc+0x1c/0xd0) from [<c00b21d8>] (d_alloc+0x1c/0x1a4) (d_alloc+0x1c/0x1a4) from [<c00a887c>] (__lookup_hash+0xd8/0x118) (__lookup_hash+0xd8/0x118) from [<c00a9f20>] (lookup_one_len+0x84/0x94) (lookup_one_len+0x84/0x94) from [<c010d12c>] (debugfs_create_file+0x8c/0x20c) (debugfs_create_file+0x8c/0x20c) from [<c010d320>] (debugfs_create_dir+0x1c/0x20) (debugfs_create_dir+0x1c/0x20) from [<c000e8cc>] (pwrdms_setup+0x60/0x90) (pwrdms_setup+0x60/0x90) from [<c002e010>] (pwrdm_for_each+0x30/0x80) (pwrdm_for_each+0x30/0x80) from [<c000e79c>] (pm_dbg_init+0x7c/0x14c) (pm_dbg_init+0x7c/0x14c) from [<c00232b4>] (do_one_initcall+0x5c/0x1b8) (do_one_initcall+0x5c/0x1b8) from [<c00083f8>] (kernel_init+0x90/0x10c) (kernel_init+0x90/0x10c) from [<c00242c4>] (kernel_thread_exit+0x0/0x8) Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | OMAP3: PM: Enable GPIO module-level wakeupsKevin Hilman2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, only GPIOs in the wakeup domain (GPIOs in bank 0) are enabled as wakups. This patch also enables GPIOs in the PER powerdomain (banks 2-6) to be used as possible wakeup sources. In addition, this patch ensures that all GPIO wakeups can wakeup the MPU using the PM_MPUGRPSEL_<pwrdm> registers. NOTE: this doesn't enable the individual GPIOs as wakeups, this simply enables the per-bank wakeups at the powerdomain level. This problem was discovered by Mike Chan when preventing the CORE powerdomain from going into retention/off. When CORE was allowed to hit retention, GPIO wakeups via IO pad were working fine, but when CORE remained on, GPIO module-level wakeups were not working properly. To test, prevent CORE from going inactive/retention/off, thus preventing the IO chain from being armed: # echo 3 > /debug/pm_debug/core_pwrdm/suspend This ensures that GPIO wakeups happen via module-level wakeups and not via IO pad. Tested on 3430SDP using the touchscreen GPIO (gpio 2, in WKUP) Tested on Zoom2 using the QUART interrup GPIO (gpio 102, in PER) Also, c.f. OMAP PM wiki for troubleshooting GPIO wakeup issues: http://elinux.org/OMAP_Power_Management Reported-by: Mike Chan <mikechan@google.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | OMAP3: PM: USBHOST: clear wakeup events on both hostsVikram Pandita2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USBHOST module has 2 fclocks (for HOST1 and HOST2), only one iclock and only a single bit in the WKST register to indicate a wakeup event. Because of the single WKST bit, we cannot know whether a wakeup event was on HOST1 or HOST2, so enable both fclocks before clearing the wakeup event to ensure both hosts can properly clear the event. Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | OMAP3: PM: PRCM interrupt: only handle selected PRCM interruptsPaul Walmsley2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clearing wakeup sources is now only done when the PRM indicates a wakeup source interrupt. Since we don't handle any other types of PRCM interrupts right now, warn if we get any other type of PRCM interrupt. Either code needs to be added to the PRCM interrupt handler to react to these, or these other interrupts should be masked off at init. Updated after Jon Hunter's PRCM IRQ rework by Kevin Hilman. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | OMAP3: PM: PRCM interrupt: check MPUGRPSEL registerPaul Walmsley2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PM_WKST register contents should be ANDed with the contents of the MPUGRPSEL registers. Otherwise the MPU PRCM interrupt handler could wind up clearing wakeup events meant for the IVA PRCM interrupt handler. A future revision to this code should be to read a cached version of MPUGRPSEL from the powerdomain code, since PRM reads are relatively slow. Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | OMAP3: PM: Prevent hang in prcm_interrupt_handlerJon Hunter2009-10-05
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two scenarios where a race condition could result in a hang in the prcm_interrupt handler. These are: 1). Waiting for PRM_IRQSTATUS_MPU register to clear. Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event is pending for the MPU. This bit can only be cleared if the all the wake-up events latched in the various PM_WKST_x registers have been cleared. If a wake-up event occurred during the processing of the prcm interrupt handler, after the corresponding PM_WKST_x register was checked but before the PRM_IRQSTATUS_MPU was cleared, then the CPU would be stuck forever waiting for bit 0 in PRM_IRQSTATUS_MPU to be cleared. 2). Waiting for the PM_WKST_x register to clear. Some power domains have more than one wake-up source. The PM_WKST_x registers indicate the source of a wake-up event and need to be cleared after a wake-up event occurs. When the PM_WKST_x registers are read and before they are cleared, it is possible that another wake-up event could occur causing another bit to be set in one of the PM_WKST_x registers. If this did occur after reading a PM_WKST_x register then the CPU would miss this event and get stuck forever in a loop waiting for that PM_WKST_x register to clear. This patch address the above race conditions that would result in a hang. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | omap: iovmm: Add missing mutex_unlockDaniel Walker2009-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was using Coccinelle with the mutex_unlock semantic patch, and it unconvered this problem. It appears to be a valid missing unlock issue. This change should correct it by moving the unlock below the label. This patch is against the mainline kernel. Cc: Julia Lawall <julia@diku.dk> Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Daniel Walker <dwalker@fifo99.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | omap: iovmm: Fix incorrect spellingHiroshi DOYU2009-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix incorrect spelling Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | omap: SRAM: flush the right address after memcpy in omap_sram_pushye janboe2009-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the original flush operation is to flush the function address which is copied from. But we do not change the function code and it is not necessary to flush it. Signed-off-by: janboe <janboe.ye@gmail.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | omap: Lock DPLL5 at bootRajendra Nayak2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and USBTLL f-clock are the only users of this DPLL, and 120MHz is is the only recommended rate for these clocks. With this patch, the 60 MHz ULPI clock is generated correctly. Tested on an OMAP3430 SDP. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | omap: Fix incorrect 730 vs 850 detectionTony Lindgren2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit cd92204924fafbd5c7241dfd12ca3176d542e0c5 added support for omap850. However, the patch accidentally removed the wrong ifdef: # define cpu_is_omap730() 1 # endif #endif +#else +# if defined(CONFIG_ARCH_OMAP850) +# undef cpu_is_omap850 +# define cpu_is_omap850() 1 +# endif +#endif ... void omap2_check_revision(void); #endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ - -#endif Instead of removing removing the #endif at the end of the file, the #endif before #else should have been removed. But we cannot have multiple #else statements as pointed out by Alistair Buxton <a.j.buxton@gmail.com>. So the fix is to: - remove the non-multi-omap special handling, as we need to detect between omap730 and omap850 anyways. - add the missing #endif back to the end of the file Reported-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | ARM: Add kmap_atomic type debuggingRussell King2009-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Seemingly this support was missed when highmem was added, so DEBUG_HIGHMEM wouldn't have checked the kmap_atomic type. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: boolean bit testingJohannes Weiner2009-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bit testing (test, testset, testclear, testchange) for bit numbers known at compile time returns a word with the tested-for bit set. Change it to return a true boolean value so to make it consistent with the out-of-line path and all the other bitops implementations. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: update die() outputRussell King2009-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make die() better match x86: - add printing of the last accessed sysfs file - ensure console_verbose() is called under the lock - ensure we panic outside of oops_exit() Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: Dump code/mem oops lines with the appropriate log levelRussell King2009-10-11
| | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: Dump memory and backtrace as one printk per lineRussell King2009-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dump_mem and dump_backtrace were both using multiple printk statements to print each line. With DEBUG_LL enabled, this causes OOPS to become very difficult to read. Solve this by only using one printk per line. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5756/1: ep93xx: introduce clk parentHartley Sweeten2009-10-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock generation system in the ep93xx uses two external oscillator's and two internal PLLs to derive all the internal clocks. Many of these internal clocks can be stopped to save power. This introduces a "parent" hierarchy for the clocks so that the users count can be correctly tracked for power management. The "parent" for the video clock can either be one of the PLL outputs or the external oscillator. In order to correctly track the "parent" for the video clock calc_clk_div() needed to be modified. It now returns an error code if the desired rate cannot be generated. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5754/1: ep93xx: update i2c supportHartley Sweeten2009-10-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the ep93xx i2c support: 1) The platform init code passes the configuration data for the i2c-gpio driver. This allows any gpio pin do be used for the sda and scl pins. It also allows the platform to specify the udelay and timeout. 2) Program the gpio configuration register to enable/disable the open drain drivers. Note that this really only works if the sda and scl pins are set to EP93XX_GPIO_LINE_EEDAT and EP93XX_GPIO_LINE_EECLK. 3) Update the edb93xx.c platform init to use the new support. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5753/1: ep93xx: remove old EP93XX_GPIO_* definesHartley Sweeten2009-10-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the EP93XX_GPIO_*_INT_* register defines in ep93xx-regs.h not required due to how the ep93xx core and gpiolib support handle gpio interrupts. Remove the defines to prevent future confusion. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5729/1: ep93xx: define EP93XX_*_PHYS_BASE with macrosHartley Sweeten2009-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the #define's for the EP93XX_*_PHYS_BASE addresses to use macros for easier readability. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5751/1: ep93xx/micro9: Add Micro9-SlimHubert Feurstein2009-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Contec Micro9-Slim support Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5750/1 Signed-off-by: Hubert Feurstein <hubert.feurstein@contec.at> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5750/1: ep93xx/micro9: Update platform codeHubert Feurstein2009-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update Contec Micro9 platform code Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5749/1 Signed-off-by: Hubert Feurstein <hubert.feurstein@contec.at> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5749/1: ep93xx/micro9: Update maintainerHubert Feurstein2009-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update Contec Micro9 maintainer and add entry in MAINTAINERS Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5744/1 Signed-off-by: Hubert Feurstein <hubert.feurstein@contec.at> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Manfred Gruber <m.gruber@tirol.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 5752/1: SA1100: fix building of h3100Dmitry Artamonow2009-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both iPaqs h3100 and h3600 currently share the same source file - h3600.c But Makefile builds it only if CONFIG_SA1100_H3600 selected, so selecting just CONFIG_SA1100_H3100 results in "no machine record defined" message and aborted compilation. Fix it. Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru> Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 05:47:25 -0500