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* MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.Maxime Bizon2009-09-17
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.Maxime Bizon2009-09-17
| | | | | | | Todo: Nothing ever detects CPU_BCM6338 but the code tests for it anyway. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Move some platform device registration to its own file.David Daney2009-09-17
| | | | | | | | | There is a bunch of platform device registration in arch/mips/cavium-octeon/setup.c. We move it to its own file in preparation for adding more platform devices. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't corrupt page tables on vmalloc fault.David Daney2009-09-17
| | | | | | | | | | | The code after the vmalloc_fault: label in do_page_fault() modifies user page tables, this is not correct for 64-bit kernels. For 64-bit kernels we should go straight to the no_context handler skipping vmalloc_fault. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Shrink the size of tlb handlerWu Fei2009-09-17
| | | | | | | | | | | | By combining swapper_pg_dir and module_pg_dir, several if conditions can be eliminated from the tlb exception handler. The reason they can be combined is that, the effective virtual address of vmalloc returned is at the bottom, and of module_alloc returned is at the top. It also fixes the bug in vmalloc(), which happens when its return address is not covered by the first pgd. Signed-off-by: Wu Fei <at.wufei@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: override loops_per_jiffy detectionManuel Lauss2009-09-17
| | | | | | | | loops_per_jiffy depends on coreclk speed; preset it instead of letting the kernel waste precious microseconds trying to approximate it. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: hw_random: Add hardware RNG for Octeon SOCs.David Daney2009-09-17
| | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Add hardware RNG platform device.David Daney2009-09-17
| | | | | | | | Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove useless zero initializations.Ralf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: get rid of allow_au1k_waitManuel Lauss2009-09-17
| | | | | | | | | | | | | | | Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the Alchemy-specific wait code before timer initialization; if the C0 timer must be used for timekeeping the wait function is set to NULL which means no wait implementation is available. As a sideeffect, the 'wait instruction available' output in /proc/cpuinfo now correctly indicates whether 'wait' is usable. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.David Daney2009-09-17
| | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney2009-09-17
| | | | | | | | | | | | | | | | | On some CPUs, it is more efficient to disable and enable interrupts in the kernel rather than use ll/sc for atomic operations. But if we were to set cpu_has_llsc to false, we would break the userspace futex interface (in asm/futex.h). We separate the two concepts, with a new predicate kernel_uses_llsc, that lets us disable the kernel's use of ll/sc while still allowing the futex code to use it. Also there were a couple of cases in bitops.h where we were using ll/sc unconditionally even if cpu_has_llsc were false. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Get rid of CONFIG_CPU_HAS_LLSCRalf Baechle2009-09-17
| | | | | | | | CONFIG_CPU_HAS_LLSC duplicated the function of cpu_has_llsc for no good reason and and the results if the one was enabled and the other disabled was very unobvious. Remove it now that there are no more remaining users. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSCRalf Baechle2009-09-17
| | | | | | All CPUs for Malta support LL/SC. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Rewrite clearing of ll_bit on context switch in CRalf Baechle2009-09-17
| | | | | | This also means there is now only one implementation not 3 left. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assemblerRalf Baechle2009-09-17
| | | | | | This way it doesn't have to use CONFIG_CPU_HAS_LLSC anymore. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.Ralf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Clean up linker script using new linker script macros.Nelson Elhage2009-09-17
| | | | | | | | | This patch results in fewer output sections and in some data being reordered, but should have no functional impact. Signed-off-by: Nelson Elhage <nelhage@ksplice.com> Signed-off-by: Tim Abbott <tabbott@ksplice.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.Nelson Elhage2009-09-17
| | | | | | | | | | | | Now that PAGE_SIZE is available to assembly directly, there is no need to separately expose it as _PAGE_SIZE through asm-offsets. In addition, remove _PAGE_SHIFT from asm-offsets, since it was never needed, and is not used anywhere. Signed-off-by: Nelson Elhage <nelhage@ksplice.com> Signed-off-by: Tim Abbott <tabbott@ksplice.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Convert to asm-generic/hardirq.hChristoph Hellwig2009-09-17
| | | | | Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Make board code register ar7_wdt as a platform deviceFlorian Fainelli2009-09-17
| | | | | | | | | This patch makes the board code register the ar7_wdt driver as a platform device. We move the dynamic resource calculation here since the driver should not be aware of the AR7 SoC version it is running on. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Update the default config file for fuloong2eWu Zhangjin2009-09-17
| | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add GCC 4.4 support for Loongson2EWu Zhangjin2009-09-17
| | | | | | | | | | | | | | | | Because only gcc >=4.4 have loongson-specific support, we need to choose the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we use -march=loongson2e for loongson2e. Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang Le for introducing the new CPU_LOONGSON2E kernel option. NOTE: -mtune option is not need if -march and -mtune use the same value. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add a machtype kernel command line argumentWu Zhangjin2009-09-17
| | | | | | | | | | | | | | | | | The difference between some loongson-based machines is very small, so, if there is no necessary to add new kernel config options to cope with this difference, it will be better to share the same kernel image file between them, benefit from this, the linux distribution developers only have a need to compile the kernel one time. This machtype kernel command line argument will be used later to share the same kernel image file between two different machines(menglong & yeeloong) made by lemote. Thanks very much to Zhang Le for cleaning up the machtype implementation. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Split common loongson source code outWu Zhangjin2009-09-17
| | | | | | | | | | | To share common loongson source code between all of the loongson-based machines. there is a need to split it out of the fuloong-2e/ directory. at the same time, other according tuning is needed. the machine-specific parts are defined as macros in relative header file, pci.h, mem.h, machine.h. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change naming methodsWu Zhangjin2009-09-17
| | | | | | | | | | | | To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add oprofile supportWu Zhangjin2009-09-17
| | | | | | | | | | | | | | This kernel support is needed by the user-space tool:oprofile to profile linux kernel or applications via loongson2 performance counters. you can enable this driver via CONFIG_OPROFILE = y or m. On Loongson2 there are two performance counters, each one can count 16 events respectively. when anyone of the performance counter overflows, an interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6. Signed-off-by: Yanhua <yanh@lemote.com> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: RTC: Enable legacy RTC driver on fulongWu Zhangjin2009-09-17
| | | | | | | | | | RTC_LIB is selected by MIPS by default, and therefore, the legacy RTC driver is disabled. but fortunately, RTC_LIB not works on fulong, so, enabling the legcy RTC driver is needed, otherwise, the tools like hwclock will not work. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: PCI: Clean up pcimap setupWu Zhangjin2009-09-17
| | | | | | | | Fixup the wrong original comment of pcimap, and make the source code more understandable. and also, some new extra consideration is added in. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: clean up the coding styleWu Zhangjin2009-09-17
| | | | | | | | | | | | | | | | | | With the help of script/checkpatch.pl, i have cleaned up the coding style. 1. remove un-needed header files and tune some comments. 2. remove some un-needed { } add a new header file loongson.h: 3. move some common header files to loongson.h 4. move some common extern declartions to loongson.h and this new header file is needed for future loongson2f support. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Split the implementation of prom and setup partsWu Zhangjin2009-09-17
| | | | | | | | | | | | | | | | | This patch split the old initilization and setup implementation to several file, one file one logic function. the other main changes include: 1. as the script/checkpatch.pl suggests, use strict_strtol instead of simple_strtol in arch/mips/lemote/lm2e/cmdline.c 2. use the existed macros in asm/mips-boards/bonito64.h as the arguments of set_io_port_base() and remove the un-needed ones in asm/mach-lemote/pci.h Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: PCI: use existing mips_io_port_baseWu Zhangjin2009-09-17
| | | | | | | | mips_io_port_base is initialized via set_io_port_base() in arch/mips/lemote/lm2e/setup.c, we can use it directly here. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: pm: clean up the reboot supportWu Zhangjin2009-09-17
| | | | | | | | Several magic numbers have been replaced by relative macros, which will be more readable and understandable. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: pm: Remove redundant source codeWu Zhangjin2009-09-17
| | | | | | | | The implmentation of loongson2e_power_off and loongson2e_halt is almostly the same, just preserve one of them. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add new early_printk implmentationWu Zhangjin2009-09-17
| | | | | | | | | This patch is based on the implementation in the lm2e-fixes branch of Philippe's git://git.linux-cisco.org/linux-mips.git and the malta-specific early_printk implementation. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove out-of-date board-specific kgdb source codeWu Zhangjin2009-09-17
| | | | | | | | | Since the re-implementation of kgdb by commit 8854700115ecf8aa6f087aa915b7b6cf18090d39 the platform-specific version has become superfluous, remove it. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove existing early_printk implementationWu Zhangjin2009-09-17
| | | | | | | | | | | | Removes the existing implementation of early_printk for fulong. The old implementation was based on the outdated board-specific dbg_io.c. Since commit 8d60a903d986ffa26c41f0092320a3b9da20bfaf dbg_io.c is not longer needed; it will be removed by the next patch, and a new implementation of early_printk will be added later. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP22, IP28: Build with -WerrorRalf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: FW: Build with -WerrorRalf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fulong: Convert reset initialization to initcall.Ralf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Convert reset initialization to initcall.Ralf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Get rid of duplicate cpu_idle() prototype.Ralf Baechle2009-09-17
| | | | | | Since 2.6.11-rc1 there is a prototype in <linux/smp.h>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TXx9: Fix error handling.Julia Lawall2009-09-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Error handling code following a kzalloc should free the allocated data. Error handling code following an ioremap should iounmap the allocated data. The semantic match that finds the first problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @r exists@ local idexpression x; statement S; expression E; identifier f,f1,l; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } ( x->f1 = E | (x->f1 == NULL || ...) | f(...,x->f1,...) ) ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TXx9: Disable PM capability of TX493[89] internal etherAtsushi Nemoto2009-09-17
| | | | | | | | | Some TC35815 variants (i.e. TX493[89] internal ether) report existance of PM registers though they are not supported. Disable PM features by clearing pdev->pm_cap. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: make page.h constants available to assembly.Nelson Elhage2009-09-17
| | | | | | | | | | | page.h includes ifndef __ASSEMBLY__ guards, but PAGE_SIZE and some other constants are defined using "1UL", which the assembler does not support. Use the _AC macro from const.h to make them available to assembly (and linker scripts). Signed-off-by: Nelson Elhage <nelhage@ksplice.com> Signed-off-by: Tim Abbott <tabbott@ksplice.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: add gpio_request/gpio_free stubs for CONFIG_GPIOLIB=nManuel Lauss2009-09-17
| | | | | | | | | | Some drivers use gpio_request/gpio_free regardless of whether gpiolib is actually built; add stubs to work around the ensuing compile failures. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lasat: Fix compilationAlexey Dobriyan2009-09-17
| | | | | | | | | Header needed for current_cpu_data which expands to smp_processor_id(). However, linux/smp.h can't be included into asm/cpu-info.h due to horrible circular dependencies, so plug it here. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Check all CCAs in cvmx_write_csr.David Daney2009-09-17
| | | | | | | | | | | The current code only checks CCA of 0 when deciding if a dummy read is needed. Since the kernel can (and does) use other CCAs we need to mask out the CCA bits from the address. Since the address constant now fits in 16 bits, there is an added benefit that smaller code is generated. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: False positive timeoutRoel Kluin2009-09-17
| | | | | | | | | | | | | | | If we reach the test just below the loop with a `timeout' value of 0, this does not mean that the timeout caused the loop to end, but rather the `smi_rd.s.pending', in the last iteration. If timeout caused the loop to end, then `timeout' is -1, not 0. Since this can occur only in the last iteration, it is not very likely to be a problem. By changing the post- to prefix decrement we ensure that a timeout of 0 does mean it timed out. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix potencial build error in <asm/delay.h>Ralf Baechle2009-09-17
| | | | | | | <asm/delay.h> will break if HZ isn't defined. In 2.6.26 and later we're usually lucky ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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