diff options
Diffstat (limited to 'include/linux/irq.h')
-rw-r--r-- | include/linux/irq.h | 383 |
1 files changed, 299 insertions, 84 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h index ee2a82a572f..fbf6d901e9c 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifndef __irq_h | 1 | #ifndef _LINUX_IRQ_H |
2 | #define __irq_h | 2 | #define _LINUX_IRQ_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * Please do not include this file in generic code. There is currently | 5 | * Please do not include this file in generic code. There is currently |
@@ -9,99 +9,190 @@ | |||
9 | * Thanks. --rmk | 9 | * Thanks. --rmk |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/config.h> | ||
13 | #include <linux/smp.h> | 12 | #include <linux/smp.h> |
14 | 13 | ||
15 | #if !defined(CONFIG_S390) | 14 | #ifndef CONFIG_S390 |
16 | 15 | ||
17 | #include <linux/linkage.h> | 16 | #include <linux/linkage.h> |
18 | #include <linux/cache.h> | 17 | #include <linux/cache.h> |
19 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
20 | #include <linux/cpumask.h> | 19 | #include <linux/cpumask.h> |
20 | #include <linux/irqreturn.h> | ||
21 | 21 | ||
22 | #include <asm/irq.h> | 22 | #include <asm/irq.h> |
23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
24 | 24 | ||
25 | /* | 25 | /* |
26 | * IRQ line status. | 26 | * IRQ line status. |
27 | * | ||
28 | * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h | ||
29 | * | ||
30 | * IRQ types | ||
27 | */ | 31 | */ |
28 | #define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */ | 32 | #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ |
29 | #define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */ | 33 | #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ |
30 | #define IRQ_PENDING 4 /* IRQ pending - replay on enable */ | 34 | #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ |
31 | #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */ | 35 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) |
32 | #define IRQ_AUTODETECT 16 /* IRQ is being autodetected */ | 36 | #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ |
33 | #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */ | 37 | #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ |
34 | #define IRQ_LEVEL 64 /* IRQ level triggered */ | 38 | #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ |
35 | #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */ | 39 | #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ |
36 | #if defined(ARCH_HAS_IRQ_PER_CPU) | 40 | |
37 | # define IRQ_PER_CPU 256 /* IRQ is per CPU */ | 41 | /* Internal flags */ |
42 | #define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */ | ||
43 | #define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */ | ||
44 | #define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */ | ||
45 | #define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */ | ||
46 | #define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */ | ||
47 | #define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */ | ||
48 | #define IRQ_LEVEL 0x00400000 /* IRQ level triggered */ | ||
49 | #define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */ | ||
50 | #define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */ | ||
51 | #ifdef CONFIG_IRQ_PER_CPU | ||
38 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) | 52 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) |
39 | #else | 53 | #else |
40 | # define CHECK_IRQ_PER_CPU(var) 0 | 54 | # define CHECK_IRQ_PER_CPU(var) 0 |
41 | #endif | 55 | #endif |
42 | 56 | ||
43 | /* | 57 | #define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */ |
44 | * Interrupt controller descriptor. This is all we need | 58 | #define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */ |
45 | * to describe about the low-level hardware. | 59 | #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */ |
60 | #define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */ | ||
61 | #define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */ | ||
62 | |||
63 | struct proc_dir_entry; | ||
64 | |||
65 | /** | ||
66 | * struct irq_chip - hardware interrupt chip descriptor | ||
67 | * | ||
68 | * @name: name for /proc/interrupts | ||
69 | * @startup: start up the interrupt (defaults to ->enable if NULL) | ||
70 | * @shutdown: shut down the interrupt (defaults to ->disable if NULL) | ||
71 | * @enable: enable the interrupt (defaults to chip->unmask if NULL) | ||
72 | * @disable: disable the interrupt (defaults to chip->mask if NULL) | ||
73 | * @ack: start of a new interrupt | ||
74 | * @mask: mask an interrupt source | ||
75 | * @mask_ack: ack and mask an interrupt source | ||
76 | * @unmask: unmask an interrupt source | ||
77 | * @eoi: end of interrupt - chip level | ||
78 | * @end: end of interrupt - flow level | ||
79 | * @set_affinity: set the CPU affinity on SMP machines | ||
80 | * @retrigger: resend an IRQ to the CPU | ||
81 | * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ | ||
82 | * @set_wake: enable/disable power-management wake-on of an IRQ | ||
83 | * | ||
84 | * @release: release function solely used by UML | ||
85 | * @typename: obsoleted by name, kept as migration helper | ||
46 | */ | 86 | */ |
47 | struct hw_interrupt_type { | 87 | struct irq_chip { |
48 | const char * typename; | 88 | const char *name; |
49 | unsigned int (*startup)(unsigned int irq); | 89 | unsigned int (*startup)(unsigned int irq); |
50 | void (*shutdown)(unsigned int irq); | 90 | void (*shutdown)(unsigned int irq); |
51 | void (*enable)(unsigned int irq); | 91 | void (*enable)(unsigned int irq); |
52 | void (*disable)(unsigned int irq); | 92 | void (*disable)(unsigned int irq); |
53 | void (*ack)(unsigned int irq); | 93 | |
54 | void (*end)(unsigned int irq); | 94 | void (*ack)(unsigned int irq); |
55 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | 95 | void (*mask)(unsigned int irq); |
96 | void (*mask_ack)(unsigned int irq); | ||
97 | void (*unmask)(unsigned int irq); | ||
98 | void (*eoi)(unsigned int irq); | ||
99 | |||
100 | void (*end)(unsigned int irq); | ||
101 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | ||
102 | int (*retrigger)(unsigned int irq); | ||
103 | int (*set_type)(unsigned int irq, unsigned int flow_type); | ||
104 | int (*set_wake)(unsigned int irq, unsigned int on); | ||
105 | |||
56 | /* Currently used only by UML, might disappear one day.*/ | 106 | /* Currently used only by UML, might disappear one day.*/ |
57 | #ifdef CONFIG_IRQ_RELEASE_METHOD | 107 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
58 | void (*release)(unsigned int irq, void *dev_id); | 108 | void (*release)(unsigned int irq, void *dev_id); |
59 | #endif | 109 | #endif |
110 | /* | ||
111 | * For compatibility, ->typename is copied into ->name. | ||
112 | * Will disappear. | ||
113 | */ | ||
114 | const char *typename; | ||
60 | }; | 115 | }; |
61 | 116 | ||
62 | typedef struct hw_interrupt_type hw_irq_controller; | 117 | /** |
63 | 118 | * struct irq_desc - interrupt descriptor | |
64 | /* | 119 | * |
65 | * This is the "IRQ descriptor", which contains various information | 120 | * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] |
66 | * about the irq, including what kind of hardware handling it has, | 121 | * @chip: low level interrupt hardware access |
67 | * whether it is disabled etc etc. | 122 | * @handler_data: per-IRQ data for the irq_chip methods |
123 | * @chip_data: platform-specific per-chip private data for the chip | ||
124 | * methods, to allow shared chip implementations | ||
125 | * @action: the irq action chain | ||
126 | * @status: status information | ||
127 | * @depth: disable-depth, for nested irq_disable() calls | ||
128 | * @wake_depth: enable depth, for multiple set_irq_wake() callers | ||
129 | * @irq_count: stats field to detect stalled irqs | ||
130 | * @irqs_unhandled: stats field for spurious unhandled interrupts | ||
131 | * @lock: locking for SMP | ||
132 | * @affinity: IRQ affinity on SMP | ||
133 | * @cpu: cpu index useful for balancing | ||
134 | * @pending_mask: pending rebalanced interrupts | ||
135 | * @move_irq: need to re-target IRQ destination | ||
136 | * @dir: /proc/irq/ procfs entry | ||
137 | * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP | ||
68 | * | 138 | * |
69 | * Pad this out to 32 bytes for cache and indexing reasons. | 139 | * Pad this out to 32 bytes for cache and indexing reasons. |
70 | */ | 140 | */ |
71 | typedef struct irq_desc { | 141 | struct irq_desc { |
72 | hw_irq_controller *handler; | 142 | void fastcall (*handle_irq)(unsigned int irq, |
73 | void *handler_data; | 143 | struct irq_desc *desc, |
74 | struct irqaction *action; /* IRQ action list */ | 144 | struct pt_regs *regs); |
75 | unsigned int status; /* IRQ status */ | 145 | struct irq_chip *chip; |
76 | unsigned int depth; /* nested irq disables */ | 146 | void *handler_data; |
77 | unsigned int irq_count; /* For detecting broken interrupts */ | 147 | void *chip_data; |
78 | unsigned int irqs_unhandled; | 148 | struct irqaction *action; /* IRQ action list */ |
79 | spinlock_t lock; | 149 | unsigned int status; /* IRQ status */ |
80 | #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE) | 150 | |
81 | unsigned int move_irq; /* Flag need to re-target intr dest*/ | 151 | unsigned int depth; /* nested irq disables */ |
152 | unsigned int wake_depth; /* nested wake enables */ | ||
153 | unsigned int irq_count; /* For detecting broken IRQs */ | ||
154 | unsigned int irqs_unhandled; | ||
155 | spinlock_t lock; | ||
156 | #ifdef CONFIG_SMP | ||
157 | cpumask_t affinity; | ||
158 | unsigned int cpu; | ||
159 | #endif | ||
160 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) | ||
161 | cpumask_t pending_mask; | ||
162 | unsigned int move_irq; /* need to re-target IRQ dest */ | ||
163 | #endif | ||
164 | #ifdef CONFIG_PROC_FS | ||
165 | struct proc_dir_entry *dir; | ||
82 | #endif | 166 | #endif |
83 | } ____cacheline_aligned irq_desc_t; | 167 | } ____cacheline_aligned; |
84 | 168 | ||
85 | extern irq_desc_t irq_desc [NR_IRQS]; | 169 | extern struct irq_desc irq_desc[NR_IRQS]; |
86 | 170 | ||
87 | /* Return a pointer to the irq descriptor for IRQ. */ | 171 | /* |
88 | static inline irq_desc_t * | 172 | * Migration helpers for obsolete names, they will go away: |
89 | irq_descp (int irq) | 173 | */ |
90 | { | 174 | #define hw_interrupt_type irq_chip |
91 | return irq_desc + irq; | 175 | typedef struct irq_chip hw_irq_controller; |
92 | } | 176 | #define no_irq_type no_irq_chip |
177 | typedef struct irq_desc irq_desc_t; | ||
93 | 178 | ||
94 | #include <asm/hw_irq.h> /* the arch dependent stuff */ | 179 | /* |
180 | * Pick up the arch-dependent methods: | ||
181 | */ | ||
182 | #include <asm/hw_irq.h> | ||
95 | 183 | ||
96 | extern int setup_irq(unsigned int irq, struct irqaction * new); | 184 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
97 | 185 | ||
98 | #ifdef CONFIG_GENERIC_HARDIRQS | 186 | #ifdef CONFIG_GENERIC_HARDIRQS |
99 | extern cpumask_t irq_affinity[NR_IRQS]; | 187 | |
188 | #ifndef handle_dynamic_tick | ||
189 | # define handle_dynamic_tick(a) do { } while (0) | ||
190 | #endif | ||
100 | 191 | ||
101 | #ifdef CONFIG_SMP | 192 | #ifdef CONFIG_SMP |
102 | static inline void set_native_irq_info(int irq, cpumask_t mask) | 193 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
103 | { | 194 | { |
104 | irq_affinity[irq] = mask; | 195 | irq_desc[irq].affinity = mask; |
105 | } | 196 | } |
106 | #else | 197 | #else |
107 | static inline void set_native_irq_info(int irq, cpumask_t mask) | 198 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
@@ -111,8 +202,7 @@ static inline void set_native_irq_info(int irq, cpumask_t mask) | |||
111 | 202 | ||
112 | #ifdef CONFIG_SMP | 203 | #ifdef CONFIG_SMP |
113 | 204 | ||
114 | #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE) | 205 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
115 | extern cpumask_t pending_irq_cpumask[NR_IRQS]; | ||
116 | 206 | ||
117 | void set_pending_irq(unsigned int irq, cpumask_t mask); | 207 | void set_pending_irq(unsigned int irq, cpumask_t mask); |
118 | void move_native_irq(int irq); | 208 | void move_native_irq(int irq); |
@@ -133,7 +223,7 @@ static inline void set_irq_info(int irq, cpumask_t mask) | |||
133 | { | 223 | { |
134 | } | 224 | } |
135 | 225 | ||
136 | #else // CONFIG_PCI_MSI | 226 | #else /* CONFIG_PCI_MSI */ |
137 | 227 | ||
138 | static inline void move_irq(int irq) | 228 | static inline void move_irq(int irq) |
139 | { | 229 | { |
@@ -144,53 +234,178 @@ static inline void set_irq_info(int irq, cpumask_t mask) | |||
144 | { | 234 | { |
145 | set_native_irq_info(irq, mask); | 235 | set_native_irq_info(irq, mask); |
146 | } | 236 | } |
147 | #endif // CONFIG_PCI_MSI | ||
148 | 237 | ||
149 | #else // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE | 238 | #endif /* CONFIG_PCI_MSI */ |
239 | |||
240 | #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ | ||
241 | |||
242 | static inline void move_irq(int irq) | ||
243 | { | ||
244 | } | ||
245 | |||
246 | static inline void move_native_irq(int irq) | ||
247 | { | ||
248 | } | ||
249 | |||
250 | static inline void set_pending_irq(unsigned int irq, cpumask_t mask) | ||
251 | { | ||
252 | } | ||
150 | 253 | ||
151 | #define move_irq(x) | ||
152 | #define move_native_irq(x) | ||
153 | #define set_pending_irq(x,y) | ||
154 | static inline void set_irq_info(int irq, cpumask_t mask) | 254 | static inline void set_irq_info(int irq, cpumask_t mask) |
155 | { | 255 | { |
156 | set_native_irq_info(irq, mask); | 256 | set_native_irq_info(irq, mask); |
157 | } | 257 | } |
158 | 258 | ||
159 | #endif // CONFIG_GENERIC_PENDING_IRQ | 259 | #endif /* CONFIG_GENERIC_PENDING_IRQ */ |
160 | 260 | ||
161 | #else // CONFIG_SMP | 261 | #else /* CONFIG_SMP */ |
162 | 262 | ||
163 | #define move_irq(x) | 263 | #define move_irq(x) |
164 | #define move_native_irq(x) | 264 | #define move_native_irq(x) |
165 | 265 | ||
166 | #endif // CONFIG_SMP | 266 | #endif /* CONFIG_SMP */ |
167 | |||
168 | extern int no_irq_affinity; | ||
169 | extern int noirqdebug_setup(char *str); | ||
170 | 267 | ||
171 | extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, | 268 | #ifdef CONFIG_IRQBALANCE |
172 | struct irqaction *action); | 269 | extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask); |
173 | extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); | 270 | #else |
174 | extern void note_interrupt(unsigned int irq, irq_desc_t *desc, | 271 | static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) |
175 | int action_ret, struct pt_regs *regs); | 272 | { |
176 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); | 273 | } |
177 | 274 | #endif | |
178 | extern void init_irq_proc(void); | ||
179 | 275 | ||
180 | #ifdef CONFIG_AUTO_IRQ_AFFINITY | 276 | #ifdef CONFIG_AUTO_IRQ_AFFINITY |
181 | extern int select_smp_affinity(unsigned int irq); | 277 | extern int select_smp_affinity(unsigned int irq); |
182 | #else | 278 | #else |
183 | static inline int | 279 | static inline int select_smp_affinity(unsigned int irq) |
184 | select_smp_affinity(unsigned int irq) | ||
185 | { | 280 | { |
186 | return 1; | 281 | return 1; |
187 | } | 282 | } |
188 | #endif | 283 | #endif |
189 | 284 | ||
190 | #endif | 285 | extern int no_irq_affinity; |
191 | 286 | ||
192 | extern hw_irq_controller no_irq_type; /* needed in every arch ? */ | 287 | /* Handle irq action chains: */ |
288 | extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, | ||
289 | struct irqaction *action); | ||
193 | 290 | ||
194 | #endif | 291 | /* |
292 | * Built-in IRQ handlers for various IRQ types, | ||
293 | * callable via desc->chip->handle_irq() | ||
294 | */ | ||
295 | extern void fastcall | ||
296 | handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
297 | extern void fastcall | ||
298 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc, | ||
299 | struct pt_regs *regs); | ||
300 | extern void fastcall | ||
301 | handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
302 | extern void fastcall | ||
303 | handle_simple_irq(unsigned int irq, struct irq_desc *desc, | ||
304 | struct pt_regs *regs); | ||
305 | extern void fastcall | ||
306 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc, | ||
307 | struct pt_regs *regs); | ||
308 | extern void fastcall | ||
309 | handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
310 | |||
311 | /* | ||
312 | * Get a descriptive string for the highlevel handler, for | ||
313 | * /proc/interrupts output: | ||
314 | */ | ||
315 | extern const char * | ||
316 | handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
317 | struct pt_regs *)); | ||
318 | |||
319 | /* | ||
320 | * Monolithic do_IRQ implementation. | ||
321 | * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly) | ||
322 | */ | ||
323 | extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); | ||
324 | |||
325 | /* | ||
326 | * Architectures call this to let the generic IRQ layer | ||
327 | * handle an interrupt. If the descriptor is attached to an | ||
328 | * irqchip-style controller then we call the ->handle_irq() handler, | ||
329 | * and it calls __do_IRQ() if it's attached to an irqtype-style controller. | ||
330 | */ | ||
331 | static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs) | ||
332 | { | ||
333 | struct irq_desc *desc = irq_desc + irq; | ||
334 | |||
335 | if (likely(desc->handle_irq)) | ||
336 | desc->handle_irq(irq, desc, regs); | ||
337 | else | ||
338 | __do_IRQ(irq, regs); | ||
339 | } | ||
340 | |||
341 | /* Handling of unhandled and spurious interrupts: */ | ||
342 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, | ||
343 | int action_ret, struct pt_regs *regs); | ||
344 | |||
345 | /* Resending of interrupts :*/ | ||
346 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | ||
347 | |||
348 | /* Initialize /proc/irq/ */ | ||
349 | extern void init_irq_proc(void); | ||
350 | |||
351 | /* Enable/disable irq debugging output: */ | ||
352 | extern int noirqdebug_setup(char *str); | ||
353 | |||
354 | /* Checks whether the interrupt can be requested by request_irq(): */ | ||
355 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); | ||
356 | |||
357 | /* Dummy irq-chip implementations: */ | ||
358 | extern struct irq_chip no_irq_chip; | ||
359 | extern struct irq_chip dummy_irq_chip; | ||
360 | |||
361 | extern void | ||
362 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | ||
363 | void fastcall (*handle)(unsigned int, | ||
364 | struct irq_desc *, | ||
365 | struct pt_regs *)); | ||
366 | extern void | ||
367 | __set_irq_handler(unsigned int irq, | ||
368 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
369 | struct pt_regs *), | ||
370 | int is_chained); | ||
371 | |||
372 | /* | ||
373 | * Set a highlevel flow handler for a given IRQ: | ||
374 | */ | ||
375 | static inline void | ||
376 | set_irq_handler(unsigned int irq, | ||
377 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
378 | struct pt_regs *)) | ||
379 | { | ||
380 | __set_irq_handler(irq, handle, 0); | ||
381 | } | ||
382 | |||
383 | /* | ||
384 | * Set a highlevel chained flow handler for a given IRQ. | ||
385 | * (a chained handler is automatically enabled and set to | ||
386 | * IRQ_NOREQUEST and IRQ_NOPROBE) | ||
387 | */ | ||
388 | static inline void | ||
389 | set_irq_chained_handler(unsigned int irq, | ||
390 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
391 | struct pt_regs *)) | ||
392 | { | ||
393 | __set_irq_handler(irq, handle, 1); | ||
394 | } | ||
395 | |||
396 | /* Set/get chip/data for an IRQ: */ | ||
397 | |||
398 | extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); | ||
399 | extern int set_irq_data(unsigned int irq, void *data); | ||
400 | extern int set_irq_chip_data(unsigned int irq, void *data); | ||
401 | extern int set_irq_type(unsigned int irq, unsigned int type); | ||
402 | |||
403 | #define get_irq_chip(irq) (irq_desc[irq].chip) | ||
404 | #define get_irq_chip_data(irq) (irq_desc[irq].chip_data) | ||
405 | #define get_irq_data(irq) (irq_desc[irq].handler_data) | ||
406 | |||
407 | #endif /* CONFIG_GENERIC_HARDIRQS */ | ||
408 | |||
409 | #endif /* !CONFIG_S390 */ | ||
195 | 410 | ||
196 | #endif /* __irq_h */ | 411 | #endif /* _LINUX_IRQ_H */ |