diff options
Diffstat (limited to 'include/asm-x86/bitops.h')
-rw-r--r-- | include/asm-x86/bitops.h | 37 |
1 files changed, 17 insertions, 20 deletions
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h index b81a4d4d333..ee4b3ead6a4 100644 --- a/include/asm-x86/bitops.h +++ b/include/asm-x86/bitops.h | |||
@@ -23,13 +23,10 @@ | |||
23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) | 23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) |
24 | /* Technically wrong, but this avoids compilation errors on some gcc | 24 | /* Technically wrong, but this avoids compilation errors on some gcc |
25 | versions. */ | 25 | versions. */ |
26 | #define ADDR "=m" (*(volatile long *)addr) | 26 | #define ADDR "=m" (*(volatile long *) addr) |
27 | #define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5]) | ||
28 | #else | 27 | #else |
29 | #define ADDR "+m" (*(volatile long *) addr) | 28 | #define ADDR "+m" (*(volatile long *) addr) |
30 | #define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5]) | ||
31 | #endif | 29 | #endif |
32 | #define BASE_ADDR "m" (*(volatile int *)addr) | ||
33 | 30 | ||
34 | /** | 31 | /** |
35 | * set_bit - Atomically set a bit in memory | 32 | * set_bit - Atomically set a bit in memory |
@@ -77,7 +74,7 @@ static inline void __set_bit(int nr, volatile void *addr) | |||
77 | */ | 74 | */ |
78 | static inline void clear_bit(int nr, volatile void *addr) | 75 | static inline void clear_bit(int nr, volatile void *addr) |
79 | { | 76 | { |
80 | asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); | 77 | asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr)); |
81 | } | 78 | } |
82 | 79 | ||
83 | /* | 80 | /* |
@@ -96,7 +93,7 @@ static inline void clear_bit_unlock(unsigned nr, volatile void *addr) | |||
96 | 93 | ||
97 | static inline void __clear_bit(int nr, volatile void *addr) | 94 | static inline void __clear_bit(int nr, volatile void *addr) |
98 | { | 95 | { |
99 | asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); | 96 | asm volatile("btr %1,%0" : ADDR : "Ir" (nr)); |
100 | } | 97 | } |
101 | 98 | ||
102 | /* | 99 | /* |
@@ -131,7 +128,7 @@ static inline void __clear_bit_unlock(unsigned nr, volatile void *addr) | |||
131 | */ | 128 | */ |
132 | static inline void __change_bit(int nr, volatile void *addr) | 129 | static inline void __change_bit(int nr, volatile void *addr) |
133 | { | 130 | { |
134 | asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); | 131 | asm volatile("btc %1,%0" : ADDR : "Ir" (nr)); |
135 | } | 132 | } |
136 | 133 | ||
137 | /** | 134 | /** |
@@ -145,7 +142,7 @@ static inline void __change_bit(int nr, volatile void *addr) | |||
145 | */ | 142 | */ |
146 | static inline void change_bit(int nr, volatile void *addr) | 143 | static inline void change_bit(int nr, volatile void *addr) |
147 | { | 144 | { |
148 | asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); | 145 | asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); |
149 | } | 146 | } |
150 | 147 | ||
151 | /** | 148 | /** |
@@ -191,9 +188,10 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) | |||
191 | { | 188 | { |
192 | int oldbit; | 189 | int oldbit; |
193 | 190 | ||
194 | asm volatile("bts %2,%3\n\t" | 191 | asm("bts %2,%1\n\t" |
195 | "sbb %0,%0" | 192 | "sbb %0,%0" |
196 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); | 193 | : "=r" (oldbit), ADDR |
194 | : "Ir" (nr)); | ||
197 | return oldbit; | 195 | return oldbit; |
198 | } | 196 | } |
199 | 197 | ||
@@ -229,9 +227,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) | |||
229 | { | 227 | { |
230 | int oldbit; | 228 | int oldbit; |
231 | 229 | ||
232 | asm volatile("btr %2,%3\n\t" | 230 | asm volatile("btr %2,%1\n\t" |
233 | "sbb %0,%0" | 231 | "sbb %0,%0" |
234 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); | 232 | : "=r" (oldbit), ADDR |
233 | : "Ir" (nr)); | ||
235 | return oldbit; | 234 | return oldbit; |
236 | } | 235 | } |
237 | 236 | ||
@@ -240,9 +239,10 @@ static inline int __test_and_change_bit(int nr, volatile void *addr) | |||
240 | { | 239 | { |
241 | int oldbit; | 240 | int oldbit; |
242 | 241 | ||
243 | asm volatile("btc %2,%3\n\t" | 242 | asm volatile("btc %2,%1\n\t" |
244 | "sbb %0,%0" | 243 | "sbb %0,%0" |
245 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); | 244 | : "=r" (oldbit), ADDR |
245 | : "Ir" (nr) : "memory"); | ||
246 | 246 | ||
247 | return oldbit; | 247 | return oldbit; |
248 | } | 248 | } |
@@ -276,11 +276,10 @@ static inline int variable_test_bit(int nr, volatile const void *addr) | |||
276 | { | 276 | { |
277 | int oldbit; | 277 | int oldbit; |
278 | 278 | ||
279 | asm volatile("bt %2,%3\n\t" | 279 | asm volatile("bt %2,%1\n\t" |
280 | "sbb %0,%0" | 280 | "sbb %0,%0" |
281 | : "=r" (oldbit) | 281 | : "=r" (oldbit) |
282 | : "m" (((volatile const int *)addr)[nr >> 5]), | 282 | : "m" (*(unsigned long *)addr), "Ir" (nr)); |
283 | "Ir" (nr), BASE_ADDR); | ||
284 | 283 | ||
285 | return oldbit; | 284 | return oldbit; |
286 | } | 285 | } |
@@ -397,8 +396,6 @@ static inline int fls(int x) | |||
397 | } | 396 | } |
398 | #endif /* __KERNEL__ */ | 397 | #endif /* __KERNEL__ */ |
399 | 398 | ||
400 | #undef BASE_ADDR | ||
401 | #undef BIT_ADDR | ||
402 | #undef ADDR | 399 | #undef ADDR |
403 | 400 | ||
404 | static inline void set_bit_string(unsigned long *bitmap, | 401 | static inline void set_bit_string(unsigned long *bitmap, |