diff options
Diffstat (limited to 'include/asm-powerpc/irq.h')
-rw-r--r-- | include/asm-powerpc/irq.h | 436 |
1 files changed, 381 insertions, 55 deletions
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index 7bc6d73b282..d903a62959d 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h | |||
@@ -11,30 +11,12 @@ | |||
11 | 11 | ||
12 | #include <linux/config.h> | 12 | #include <linux/config.h> |
13 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
14 | #include <linux/list.h> | ||
15 | #include <linux/radix-tree.h> | ||
14 | 16 | ||
15 | #include <asm/types.h> | 17 | #include <asm/types.h> |
16 | #include <asm/atomic.h> | 18 | #include <asm/atomic.h> |
17 | 19 | ||
18 | /* this number is used when no interrupt has been assigned */ | ||
19 | #define NO_IRQ (-1) | ||
20 | |||
21 | /* | ||
22 | * These constants are used for passing information about interrupt | ||
23 | * signal polarity and level/edge sensing to the low-level PIC chip | ||
24 | * drivers. | ||
25 | */ | ||
26 | #define IRQ_SENSE_MASK 0x1 | ||
27 | #define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ | ||
28 | #define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ | ||
29 | |||
30 | #define IRQ_POLARITY_MASK 0x2 | ||
31 | #define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ | ||
32 | #define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ | ||
33 | |||
34 | /* | ||
35 | * IRQ line status macro IRQ_PER_CPU is used | ||
36 | */ | ||
37 | #define ARCH_HAS_IRQ_PER_CPU | ||
38 | 20 | ||
39 | #define get_irq_desc(irq) (&irq_desc[(irq)]) | 21 | #define get_irq_desc(irq) (&irq_desc[(irq)]) |
40 | 22 | ||
@@ -42,50 +24,313 @@ | |||
42 | #define for_each_irq(i) \ | 24 | #define for_each_irq(i) \ |
43 | for ((i) = 0; (i) < NR_IRQS; ++(i)) | 25 | for ((i) = 0; (i) < NR_IRQS; ++(i)) |
44 | 26 | ||
45 | #ifdef CONFIG_PPC64 | 27 | extern atomic_t ppc_n_lost_interrupts; |
46 | 28 | ||
47 | /* | 29 | #ifdef CONFIG_PPC_MERGE |
48 | * Maximum number of interrupt sources that we can handle. | 30 | |
31 | /* This number is used when no interrupt has been assigned */ | ||
32 | #define NO_IRQ (0) | ||
33 | |||
34 | /* This is a special irq number to return from get_irq() to tell that | ||
35 | * no interrupt happened _and_ ignore it (don't count it as bad). Some | ||
36 | * platforms like iSeries rely on that. | ||
49 | */ | 37 | */ |
38 | #define NO_IRQ_IGNORE ((unsigned int)-1) | ||
39 | |||
40 | /* Total number of virq in the platform (make it a CONFIG_* option ? */ | ||
50 | #define NR_IRQS 512 | 41 | #define NR_IRQS 512 |
51 | 42 | ||
52 | /* Interrupt numbers are virtual in case they are sparsely | 43 | /* Number of irqs reserved for the legacy controller */ |
53 | * distributed by the hardware. | 44 | #define NUM_ISA_INTERRUPTS 16 |
45 | |||
46 | /* This type is the placeholder for a hardware interrupt number. It has to | ||
47 | * be big enough to enclose whatever representation is used by a given | ||
48 | * platform. | ||
49 | */ | ||
50 | typedef unsigned long irq_hw_number_t; | ||
51 | |||
52 | /* Interrupt controller "host" data structure. This could be defined as a | ||
53 | * irq domain controller. That is, it handles the mapping between hardware | ||
54 | * and virtual interrupt numbers for a given interrupt domain. The host | ||
55 | * structure is generally created by the PIC code for a given PIC instance | ||
56 | * (though a host can cover more than one PIC if they have a flat number | ||
57 | * model). It's the host callbacks that are responsible for setting the | ||
58 | * irq_chip on a given irq_desc after it's been mapped. | ||
59 | * | ||
60 | * The host code and data structures are fairly agnostic to the fact that | ||
61 | * we use an open firmware device-tree. We do have references to struct | ||
62 | * device_node in two places: in irq_find_host() to find the host matching | ||
63 | * a given interrupt controller node, and of course as an argument to its | ||
64 | * counterpart host->ops->match() callback. However, those are treated as | ||
65 | * generic pointers by the core and the fact that it's actually a device-node | ||
66 | * pointer is purely a convention between callers and implementation. This | ||
67 | * code could thus be used on other architectures by replacing those two | ||
68 | * by some sort of arch-specific void * "token" used to identify interrupt | ||
69 | * controllers. | ||
70 | */ | ||
71 | struct irq_host; | ||
72 | struct radix_tree_root; | ||
73 | |||
74 | /* Functions below are provided by the host and called whenever a new mapping | ||
75 | * is created or an old mapping is disposed. The host can then proceed to | ||
76 | * whatever internal data structures management is required. It also needs | ||
77 | * to setup the irq_desc when returning from map(). | ||
78 | */ | ||
79 | struct irq_host_ops { | ||
80 | /* Match an interrupt controller device node to a host, returns | ||
81 | * 1 on a match | ||
82 | */ | ||
83 | int (*match)(struct irq_host *h, struct device_node *node); | ||
84 | |||
85 | /* Create or update a mapping between a virtual irq number and a hw | ||
86 | * irq number. This is called only once for a given mapping. | ||
87 | */ | ||
88 | int (*map)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw); | ||
89 | |||
90 | /* Dispose of such a mapping */ | ||
91 | void (*unmap)(struct irq_host *h, unsigned int virq); | ||
92 | |||
93 | /* Translate device-tree interrupt specifier from raw format coming | ||
94 | * from the firmware to a irq_hw_number_t (interrupt line number) and | ||
95 | * type (sense) that can be passed to set_irq_type(). In the absence | ||
96 | * of this callback, irq_create_of_mapping() and irq_of_parse_and_map() | ||
97 | * will return the hw number in the first cell and IRQ_TYPE_NONE for | ||
98 | * the type (which amount to keeping whatever default value the | ||
99 | * interrupt controller has for that line) | ||
100 | */ | ||
101 | int (*xlate)(struct irq_host *h, struct device_node *ctrler, | ||
102 | u32 *intspec, unsigned int intsize, | ||
103 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | ||
104 | }; | ||
105 | |||
106 | struct irq_host { | ||
107 | struct list_head link; | ||
108 | |||
109 | /* type of reverse mapping technique */ | ||
110 | unsigned int revmap_type; | ||
111 | #define IRQ_HOST_MAP_LEGACY 0 /* legacy 8259, gets irqs 1..15 */ | ||
112 | #define IRQ_HOST_MAP_NOMAP 1 /* no fast reverse mapping */ | ||
113 | #define IRQ_HOST_MAP_LINEAR 2 /* linear map of interrupts */ | ||
114 | #define IRQ_HOST_MAP_TREE 3 /* radix tree */ | ||
115 | union { | ||
116 | struct { | ||
117 | unsigned int size; | ||
118 | unsigned int *revmap; | ||
119 | } linear; | ||
120 | struct radix_tree_root tree; | ||
121 | } revmap_data; | ||
122 | struct irq_host_ops *ops; | ||
123 | void *host_data; | ||
124 | irq_hw_number_t inval_irq; | ||
125 | }; | ||
126 | |||
127 | /* The main irq map itself is an array of NR_IRQ entries containing the | ||
128 | * associate host and irq number. An entry with a host of NULL is free. | ||
129 | * An entry can be allocated if it's free, the allocator always then sets | ||
130 | * hwirq first to the host's invalid irq number and then fills ops. | ||
131 | */ | ||
132 | struct irq_map_entry { | ||
133 | irq_hw_number_t hwirq; | ||
134 | struct irq_host *host; | ||
135 | }; | ||
136 | |||
137 | extern struct irq_map_entry irq_map[NR_IRQS]; | ||
138 | |||
139 | |||
140 | /*** | ||
141 | * irq_alloc_host - Allocate a new irq_host data structure | ||
142 | * @node: device-tree node of the interrupt controller | ||
143 | * @revmap_type: type of reverse mapping to use | ||
144 | * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map | ||
145 | * @ops: map/unmap host callbacks | ||
146 | * @inval_irq: provide a hw number in that host space that is always invalid | ||
147 | * | ||
148 | * Allocates and initialize and irq_host structure. Note that in the case of | ||
149 | * IRQ_HOST_MAP_LEGACY, the map() callback will be called before this returns | ||
150 | * for all legacy interrupts except 0 (which is always the invalid irq for | ||
151 | * a legacy controller). For a IRQ_HOST_MAP_LINEAR, the map is allocated by | ||
152 | * this call as well. For a IRQ_HOST_MAP_TREE, the radix tree will be allocated | ||
153 | * later during boot automatically (the reverse mapping will use the slow path | ||
154 | * until that happens). | ||
155 | */ | ||
156 | extern struct irq_host *irq_alloc_host(unsigned int revmap_type, | ||
157 | unsigned int revmap_arg, | ||
158 | struct irq_host_ops *ops, | ||
159 | irq_hw_number_t inval_irq); | ||
160 | |||
161 | |||
162 | /*** | ||
163 | * irq_find_host - Locates a host for a given device node | ||
164 | * @node: device-tree node of the interrupt controller | ||
165 | */ | ||
166 | extern struct irq_host *irq_find_host(struct device_node *node); | ||
167 | |||
168 | |||
169 | /*** | ||
170 | * irq_set_default_host - Set a "default" host | ||
171 | * @host: default host pointer | ||
172 | * | ||
173 | * For convenience, it's possible to set a "default" host that will be used | ||
174 | * whenever NULL is passed to irq_create_mapping(). It makes life easier for | ||
175 | * platforms that want to manipulate a few hard coded interrupt numbers that | ||
176 | * aren't properly represented in the device-tree. | ||
177 | */ | ||
178 | extern void irq_set_default_host(struct irq_host *host); | ||
179 | |||
180 | |||
181 | /*** | ||
182 | * irq_set_virq_count - Set the maximum number of virt irqs | ||
183 | * @count: number of linux virtual irqs, capped with NR_IRQS | ||
184 | * | ||
185 | * This is mainly for use by platforms like iSeries who want to program | ||
186 | * the virtual irq number in the controller to avoid the reverse mapping | ||
187 | */ | ||
188 | extern void irq_set_virq_count(unsigned int count); | ||
189 | |||
190 | |||
191 | /*** | ||
192 | * irq_create_mapping - Map a hardware interrupt into linux virq space | ||
193 | * @host: host owning this hardware interrupt or NULL for default host | ||
194 | * @hwirq: hardware irq number in that host space | ||
195 | * | ||
196 | * Only one mapping per hardware interrupt is permitted. Returns a linux | ||
197 | * virq number. | ||
198 | * If the sense/trigger is to be specified, set_irq_type() should be called | ||
199 | * on the number returned from that call. | ||
200 | */ | ||
201 | extern unsigned int irq_create_mapping(struct irq_host *host, | ||
202 | irq_hw_number_t hwirq); | ||
203 | |||
204 | |||
205 | /*** | ||
206 | * irq_dispose_mapping - Unmap an interrupt | ||
207 | * @virq: linux virq number of the interrupt to unmap | ||
208 | */ | ||
209 | extern void irq_dispose_mapping(unsigned int virq); | ||
210 | |||
211 | /*** | ||
212 | * irq_find_mapping - Find a linux virq from an hw irq number. | ||
213 | * @host: host owning this hardware interrupt | ||
214 | * @hwirq: hardware irq number in that host space | ||
215 | * | ||
216 | * This is a slow path, for use by generic code. It's expected that an | ||
217 | * irq controller implementation directly calls the appropriate low level | ||
218 | * mapping function. | ||
219 | */ | ||
220 | extern unsigned int irq_find_mapping(struct irq_host *host, | ||
221 | irq_hw_number_t hwirq); | ||
222 | |||
223 | |||
224 | /*** | ||
225 | * irq_radix_revmap - Find a linux virq from a hw irq number. | ||
226 | * @host: host owning this hardware interrupt | ||
227 | * @hwirq: hardware irq number in that host space | ||
228 | * | ||
229 | * This is a fast path, for use by irq controller code that uses radix tree | ||
230 | * revmaps | ||
231 | */ | ||
232 | extern unsigned int irq_radix_revmap(struct irq_host *host, | ||
233 | irq_hw_number_t hwirq); | ||
234 | |||
235 | /*** | ||
236 | * irq_linear_revmap - Find a linux virq from a hw irq number. | ||
237 | * @host: host owning this hardware interrupt | ||
238 | * @hwirq: hardware irq number in that host space | ||
239 | * | ||
240 | * This is a fast path, for use by irq controller code that uses linear | ||
241 | * revmaps. It does fallback to the slow path if the revmap doesn't exist | ||
242 | * yet and will create the revmap entry with appropriate locking | ||
243 | */ | ||
244 | |||
245 | extern unsigned int irq_linear_revmap(struct irq_host *host, | ||
246 | irq_hw_number_t hwirq); | ||
247 | |||
248 | |||
249 | |||
250 | /*** | ||
251 | * irq_alloc_virt - Allocate virtual irq numbers | ||
252 | * @host: host owning these new virtual irqs | ||
253 | * @count: number of consecutive numbers to allocate | ||
254 | * @hint: pass a hint number, the allocator will try to use a 1:1 mapping | ||
255 | * | ||
256 | * This is a low level function that is used internally by irq_create_mapping() | ||
257 | * and that can be used by some irq controllers implementations for things | ||
258 | * like allocating ranges of numbers for MSIs. The revmaps are left untouched. | ||
259 | */ | ||
260 | extern unsigned int irq_alloc_virt(struct irq_host *host, | ||
261 | unsigned int count, | ||
262 | unsigned int hint); | ||
263 | |||
264 | /*** | ||
265 | * irq_free_virt - Free virtual irq numbers | ||
266 | * @virq: virtual irq number of the first interrupt to free | ||
267 | * @count: number of interrupts to free | ||
268 | * | ||
269 | * This function is the opposite of irq_alloc_virt. It will not clear reverse | ||
270 | * maps, this should be done previously by unmap'ing the interrupt. In fact, | ||
271 | * all interrupts covered by the range being freed should have been unmapped | ||
272 | * prior to calling this. | ||
273 | */ | ||
274 | extern void irq_free_virt(unsigned int virq, unsigned int count); | ||
275 | |||
276 | |||
277 | /* -- OF helpers -- */ | ||
278 | |||
279 | /* irq_create_of_mapping - Map a hardware interrupt into linux virq space | ||
280 | * @controller: Device node of the interrupt controller | ||
281 | * @inspec: Interrupt specifier from the device-tree | ||
282 | * @intsize: Size of the interrupt specifier from the device-tree | ||
283 | * | ||
284 | * This function is identical to irq_create_mapping except that it takes | ||
285 | * as input informations straight from the device-tree (typically the results | ||
286 | * of the of_irq_map_*() functions. | ||
54 | */ | 287 | */ |
55 | extern unsigned int virt_irq_to_real_map[NR_IRQS]; | 288 | extern unsigned int irq_create_of_mapping(struct device_node *controller, |
289 | u32 *intspec, unsigned int intsize); | ||
56 | 290 | ||
57 | /* The maximum virtual IRQ number that we support. This | 291 | |
58 | * can be set by the platform and will be reduced by the | 292 | /* irq_of_parse_and_map - Parse nad Map an interrupt into linux virq space |
59 | * value of __irq_offset_value. It defaults to and is | 293 | * @device: Device node of the device whose interrupt is to be mapped |
60 | * capped by (NR_IRQS - 1). | 294 | * @index: Index of the interrupt to map |
295 | * | ||
296 | * This function is a wrapper that chains of_irq_map_one() and | ||
297 | * irq_create_of_mapping() to make things easier to callers | ||
61 | */ | 298 | */ |
62 | extern unsigned int virt_irq_max; | 299 | extern unsigned int irq_of_parse_and_map(struct device_node *dev, int index); |
300 | |||
301 | /* -- End OF helpers -- */ | ||
63 | 302 | ||
64 | /* Create a mapping for a real_irq if it doesn't already exist. | 303 | /*** |
65 | * Return the virtual irq as a convenience. | 304 | * irq_early_init - Init irq remapping subsystem |
66 | */ | 305 | */ |
67 | int virt_irq_create_mapping(unsigned int real_irq); | 306 | extern void irq_early_init(void); |
68 | void virt_irq_init(void); | ||
69 | 307 | ||
70 | static inline unsigned int virt_irq_to_real(unsigned int virt_irq) | 308 | static __inline__ int irq_canonicalize(int irq) |
71 | { | 309 | { |
72 | return virt_irq_to_real_map[virt_irq]; | 310 | return irq; |
73 | } | 311 | } |
74 | 312 | ||
75 | extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); | 313 | |
314 | #else /* CONFIG_PPC_MERGE */ | ||
315 | |||
316 | /* This number is used when no interrupt has been assigned */ | ||
317 | #define NO_IRQ (-1) | ||
318 | #define NO_IRQ_IGNORE (-2) | ||
319 | |||
76 | 320 | ||
77 | /* | 321 | /* |
78 | * List of interrupt controllers. | 322 | * These constants are used for passing information about interrupt |
323 | * signal polarity and level/edge sensing to the low-level PIC chip | ||
324 | * drivers. | ||
79 | */ | 325 | */ |
80 | #define IC_INVALID 0 | 326 | #define IRQ_SENSE_MASK 0x1 |
81 | #define IC_OPEN_PIC 1 | 327 | #define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ |
82 | #define IC_PPC_XIC 2 | 328 | #define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ |
83 | #define IC_CELL_PIC 3 | ||
84 | #define IC_ISERIES 4 | ||
85 | 329 | ||
86 | extern u64 ppc64_interrupt_controller; | 330 | #define IRQ_POLARITY_MASK 0x2 |
331 | #define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ | ||
332 | #define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ | ||
87 | 333 | ||
88 | #else /* 32-bit */ | ||
89 | 334 | ||
90 | #if defined(CONFIG_40x) | 335 | #if defined(CONFIG_40x) |
91 | #include <asm/ibm4xx.h> | 336 | #include <asm/ibm4xx.h> |
@@ -348,6 +593,92 @@ extern u64 ppc64_interrupt_controller; | |||
348 | #define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) | 593 | #define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) |
349 | #define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) | 594 | #define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) |
350 | 595 | ||
596 | #elif defined(CONFIG_PPC_86xx) | ||
597 | #include <asm/mpc86xx.h> | ||
598 | |||
599 | #define NR_EPIC_INTS 48 | ||
600 | #ifndef NR_8259_INTS | ||
601 | #define NR_8259_INTS 16 /*ULI 1575 can route 12 interrupts */ | ||
602 | #endif | ||
603 | #define NUM_8259_INTERRUPTS NR_8259_INTS | ||
604 | |||
605 | #ifndef I8259_OFFSET | ||
606 | #define I8259_OFFSET 0 | ||
607 | #endif | ||
608 | |||
609 | #define NR_IRQS 256 | ||
610 | |||
611 | /* Internal IRQs on MPC86xx OpenPIC */ | ||
612 | |||
613 | #ifndef MPC86xx_OPENPIC_IRQ_OFFSET | ||
614 | #define MPC86xx_OPENPIC_IRQ_OFFSET NR_8259_INTS | ||
615 | #endif | ||
616 | |||
617 | /* The 48 internal sources */ | ||
618 | #define MPC86xx_IRQ_NULL ( 0 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
619 | #define MPC86xx_IRQ_MCM ( 1 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
620 | #define MPC86xx_IRQ_DDR ( 2 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
621 | #define MPC86xx_IRQ_LBC ( 3 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
622 | #define MPC86xx_IRQ_DMA0 ( 4 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
623 | #define MPC86xx_IRQ_DMA1 ( 5 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
624 | #define MPC86xx_IRQ_DMA2 ( 6 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
625 | #define MPC86xx_IRQ_DMA3 ( 7 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
626 | |||
627 | /* no 10,11 */ | ||
628 | #define MPC86xx_IRQ_UART2 (12 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
629 | #define MPC86xx_IRQ_TSEC1_TX (13 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
630 | #define MPC86xx_IRQ_TSEC1_RX (14 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
631 | #define MPC86xx_IRQ_TSEC3_TX (15 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
632 | #define MPC86xx_IRQ_TSEC3_RX (16 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
633 | #define MPC86xx_IRQ_TSEC3_ERROR (17 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
634 | #define MPC86xx_IRQ_TSEC1_ERROR (18 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
635 | #define MPC86xx_IRQ_TSEC2_TX (19 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
636 | #define MPC86xx_IRQ_TSEC2_RX (20 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
637 | #define MPC86xx_IRQ_TSEC4_TX (21 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
638 | #define MPC86xx_IRQ_TSEC4_RX (22 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
639 | #define MPC86xx_IRQ_TSEC4_ERROR (23 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
640 | #define MPC86xx_IRQ_TSEC2_ERROR (24 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
641 | /* no 25 */ | ||
642 | #define MPC86xx_IRQ_UART1 (26 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
643 | #define MPC86xx_IRQ_IIC (27 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
644 | #define MPC86xx_IRQ_PERFMON (28 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
645 | /* no 29,30,31 */ | ||
646 | #define MPC86xx_IRQ_SRIO_ERROR (32 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
647 | #define MPC86xx_IRQ_SRIO_OUT_BELL (33 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
648 | #define MPC86xx_IRQ_SRIO_IN_BELL (34 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
649 | /* no 35,36 */ | ||
650 | #define MPC86xx_IRQ_SRIO_OUT_MSG1 (37 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
651 | #define MPC86xx_IRQ_SRIO_IN_MSG1 (38 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
652 | #define MPC86xx_IRQ_SRIO_OUT_MSG2 (39 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
653 | #define MPC86xx_IRQ_SRIO_IN_MSG2 (40 + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
654 | |||
655 | /* The 12 external interrupt lines */ | ||
656 | #define MPC86xx_IRQ_EXT_BASE 48 | ||
657 | #define MPC86xx_IRQ_EXT0 (0 + MPC86xx_IRQ_EXT_BASE \ | ||
658 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
659 | #define MPC86xx_IRQ_EXT1 (1 + MPC86xx_IRQ_EXT_BASE \ | ||
660 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
661 | #define MPC86xx_IRQ_EXT2 (2 + MPC86xx_IRQ_EXT_BASE \ | ||
662 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
663 | #define MPC86xx_IRQ_EXT3 (3 + MPC86xx_IRQ_EXT_BASE \ | ||
664 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
665 | #define MPC86xx_IRQ_EXT4 (4 + MPC86xx_IRQ_EXT_BASE \ | ||
666 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
667 | #define MPC86xx_IRQ_EXT5 (5 + MPC86xx_IRQ_EXT_BASE \ | ||
668 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
669 | #define MPC86xx_IRQ_EXT6 (6 + MPC86xx_IRQ_EXT_BASE \ | ||
670 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
671 | #define MPC86xx_IRQ_EXT7 (7 + MPC86xx_IRQ_EXT_BASE \ | ||
672 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
673 | #define MPC86xx_IRQ_EXT8 (8 + MPC86xx_IRQ_EXT_BASE \ | ||
674 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
675 | #define MPC86xx_IRQ_EXT9 (9 + MPC86xx_IRQ_EXT_BASE \ | ||
676 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
677 | #define MPC86xx_IRQ_EXT10 (10 + MPC86xx_IRQ_EXT_BASE \ | ||
678 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
679 | #define MPC86xx_IRQ_EXT11 (11 + MPC86xx_IRQ_EXT_BASE \ | ||
680 | + MPC86xx_OPENPIC_IRQ_OFFSET) | ||
681 | |||
351 | #else /* CONFIG_40x + CONFIG_8xx */ | 682 | #else /* CONFIG_40x + CONFIG_8xx */ |
352 | /* | 683 | /* |
353 | * this is the # irq's for all ppc arch's (pmac/chrp/prep) | 684 | * this is the # irq's for all ppc arch's (pmac/chrp/prep) |
@@ -432,16 +763,11 @@ extern u64 ppc64_interrupt_controller; | |||
432 | 763 | ||
433 | #endif /* CONFIG_8260 */ | 764 | #endif /* CONFIG_8260 */ |
434 | 765 | ||
435 | #endif | 766 | #endif /* Whatever way too big #ifdef */ |
436 | 767 | ||
437 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 768 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
438 | /* pedantic: these are long because they are used with set_bit --RR */ | 769 | /* pedantic: these are long because they are used with set_bit --RR */ |
439 | extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | 770 | extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
440 | extern atomic_t ppc_n_lost_interrupts; | ||
441 | |||
442 | #define virt_irq_create_mapping(x) (x) | ||
443 | |||
444 | #endif | ||
445 | 771 | ||
446 | /* | 772 | /* |
447 | * Because many systems have two overlapping names spaces for | 773 | * Because many systems have two overlapping names spaces for |
@@ -480,6 +806,7 @@ static __inline__ int irq_canonicalize(int irq) | |||
480 | irq = 9; | 806 | irq = 9; |
481 | return irq; | 807 | return irq; |
482 | } | 808 | } |
809 | #endif /* CONFIG_PPC_MERGE */ | ||
483 | 810 | ||
484 | extern int distribute_irqs; | 811 | extern int distribute_irqs; |
485 | 812 | ||
@@ -499,9 +826,8 @@ extern struct thread_info *softirq_ctx[NR_CPUS]; | |||
499 | 826 | ||
500 | extern void irq_ctx_init(void); | 827 | extern void irq_ctx_init(void); |
501 | extern void call_do_softirq(struct thread_info *tp); | 828 | extern void call_do_softirq(struct thread_info *tp); |
502 | extern int call___do_IRQ(int irq, struct pt_regs *regs, | 829 | extern int call_handle_irq(int irq, void *p1, void *p2, |
503 | struct thread_info *tp); | 830 | struct thread_info *tp, void *func); |
504 | |||
505 | #else | 831 | #else |
506 | #define irq_ctx_init() | 832 | #define irq_ctx_init() |
507 | 833 | ||