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-rw-r--r--include/asm-parisc/system.h29
1 files changed, 14 insertions, 15 deletions
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index a5a973c0c07..74f037a39e6 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -1,7 +1,6 @@
1#ifndef __PARISC_SYSTEM_H 1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H 2#define __PARISC_SYSTEM_H
3 3
4#include <linux/config.h>
5#include <asm/psw.h> 4#include <asm/psw.h>
6 5
7/* The program status word as bitfields. */ 6/* The program status word as bitfields. */
@@ -144,8 +143,6 @@ static inline void set_eiem(unsigned long val)
144#define read_barrier_depends() do { } while(0) 143#define read_barrier_depends() do { } while(0)
145 144
146#define set_mb(var, value) do { var = value; mb(); } while (0) 145#define set_mb(var, value) do { var = value; mb(); } while (0)
147#define set_wmb(var, value) do { var = value; wmb(); } while (0)
148
149 146
150#ifndef CONFIG_PA20 147#ifndef CONFIG_PA20
151/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data, 148/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
@@ -156,13 +153,14 @@ static inline void set_eiem(unsigned long val)
156 type and dynamically select the 16-byte aligned int from the array 153 type and dynamically select the 16-byte aligned int from the array
157 for the semaphore. */ 154 for the semaphore. */
158 155
159#define __PA_LDCW_ALIGNMENT 16 156#define __PA_LDCW_ALIGNMENT 16
160#define __ldcw_align(a) ({ \ 157#define __ldcw_align(a) ({ \
161 unsigned long __ret = (unsigned long) &(a)->lock[0]; \ 158 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
162 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ 159 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
163 (volatile unsigned int *) __ret; \ 160 & ~(__PA_LDCW_ALIGNMENT - 1); \
161 (volatile unsigned int *) __ret; \
164}) 162})
165#define LDCW "ldcw" 163#define __LDCW "ldcw"
166 164
167#else /*CONFIG_PA20*/ 165#else /*CONFIG_PA20*/
168/* From: "Jim Hull" <jim.hull of hp.com> 166/* From: "Jim Hull" <jim.hull of hp.com>
@@ -172,17 +170,18 @@ static inline void set_eiem(unsigned long val)
172 they only require "natural" alignment (4-byte for ldcw, 8-byte for 170 they only require "natural" alignment (4-byte for ldcw, 8-byte for
173 ldcd). */ 171 ldcd). */
174 172
175#define __PA_LDCW_ALIGNMENT 4 173#define __PA_LDCW_ALIGNMENT 4
176#define __ldcw_align(a) ((volatile unsigned int *)a) 174#define __ldcw_align(a) ((volatile unsigned int *)a)
177#define LDCW "ldcw,co" 175#define __LDCW "ldcw,co"
178 176
179#endif /*!CONFIG_PA20*/ 177#endif /*!CONFIG_PA20*/
180 178
181/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ 179/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
182#define __ldcw(a) ({ \ 180#define __ldcw(a) ({ \
183 unsigned __ret; \ 181 unsigned __ret; \
184 __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ 182 __asm__ __volatile__(__LDCW " 0(%1),%0" \
185 __ret; \ 183 : "=r" (__ret) : "r" (a)); \
184 __ret; \
186}) 185})
187 186
188#ifdef CONFIG_SMP 187#ifdef CONFIG_SMP