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path: root/drivers/scsi/lpfc/lpfc_mbox.c
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Diffstat (limited to 'drivers/scsi/lpfc/lpfc_mbox.c')
-rw-r--r--drivers/scsi/lpfc/lpfc_mbox.c69
1 files changed, 42 insertions, 27 deletions
diff --git a/drivers/scsi/lpfc/lpfc_mbox.c b/drivers/scsi/lpfc/lpfc_mbox.c
index 72e6adb0643..e84dc33ca20 100644
--- a/drivers/scsi/lpfc/lpfc_mbox.c
+++ b/drivers/scsi/lpfc/lpfc_mbox.c
@@ -1216,7 +1216,7 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
1216 phba->pcb->feature = FEATURE_INITIAL_SLI2; 1216 phba->pcb->feature = FEATURE_INITIAL_SLI2;
1217 1217
1218 /* Setup Mailbox pointers */ 1218 /* Setup Mailbox pointers */
1219 phba->pcb->mailBoxSize = sizeof(MAILBOX_t); 1219 phba->pcb->mailBoxSize = sizeof(MAILBOX_t) + MAILBOX_EXT_SIZE;
1220 offset = (uint8_t *)phba->mbox - (uint8_t *)phba->slim2p.virt; 1220 offset = (uint8_t *)phba->mbox - (uint8_t *)phba->slim2p.virt;
1221 pdma_addr = phba->slim2p.phys + offset; 1221 pdma_addr = phba->slim2p.phys + offset;
1222 phba->pcb->mbAddrHigh = putPaddrHigh(pdma_addr); 1222 phba->pcb->mbAddrHigh = putPaddrHigh(pdma_addr);
@@ -1272,28 +1272,41 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
1272 * 1272 *
1273 */ 1273 */
1274 1274
1275 if (phba->sli_rev == 3) { 1275 if (phba->cfg_hostmem_hgp && phba->sli_rev != 3) {
1276 phba->host_gp = &mb_slim->us.s3.host[0]; 1276 phba->host_gp = &phba->mbox->us.s2.host[0];
1277 phba->hbq_put = &mb_slim->us.s3.hbq_put[0];
1278 } else {
1279 phba->host_gp = &mb_slim->us.s2.host[0];
1280 phba->hbq_put = NULL; 1277 phba->hbq_put = NULL;
1281 } 1278 offset = (uint8_t *)&phba->mbox->us.s2.host -
1279 (uint8_t *)phba->slim2p.virt;
1280 pdma_addr = phba->slim2p.phys + offset;
1281 phba->pcb->hgpAddrHigh = putPaddrHigh(pdma_addr);
1282 phba->pcb->hgpAddrLow = putPaddrLow(pdma_addr);
1283 } else {
1284 /* Always Host Group Pointer is in SLIM */
1285 mb->un.varCfgPort.hps = 1;
1282 1286
1283 /* mask off BAR0's flag bits 0 - 3 */ 1287 if (phba->sli_rev == 3) {
1284 phba->pcb->hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) + 1288 phba->host_gp = &mb_slim->us.s3.host[0];
1285 (void __iomem *)phba->host_gp - 1289 phba->hbq_put = &mb_slim->us.s3.hbq_put[0];
1286 (void __iomem *)phba->MBslimaddr; 1290 } else {
1287 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64) 1291 phba->host_gp = &mb_slim->us.s2.host[0];
1288 phba->pcb->hgpAddrHigh = bar_high; 1292 phba->hbq_put = NULL;
1289 else 1293 }
1290 phba->pcb->hgpAddrHigh = 0;
1291 /* write HGP data to SLIM at the required longword offset */
1292 memset(&hgp, 0, sizeof(struct lpfc_hgp));
1293 1294
1294 for (i=0; i < phba->sli.num_rings; i++) { 1295 /* mask off BAR0's flag bits 0 - 3 */
1295 lpfc_memcpy_to_slim(phba->host_gp + i, &hgp, 1296 phba->pcb->hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
1297 (void __iomem *)phba->host_gp -
1298 (void __iomem *)phba->MBslimaddr;
1299 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
1300 phba->pcb->hgpAddrHigh = bar_high;
1301 else
1302 phba->pcb->hgpAddrHigh = 0;
1303 /* write HGP data to SLIM at the required longword offset */
1304 memset(&hgp, 0, sizeof(struct lpfc_hgp));
1305
1306 for (i = 0; i < phba->sli.num_rings; i++) {
1307 lpfc_memcpy_to_slim(phba->host_gp + i, &hgp,
1296 sizeof(*phba->host_gp)); 1308 sizeof(*phba->host_gp));
1309 }
1297 } 1310 }
1298 1311
1299 /* Setup Port Group offset */ 1312 /* Setup Port Group offset */
@@ -1598,7 +1611,7 @@ lpfc_sli4_mbox_cmd_free(struct lpfc_hba *phba, struct lpfcMboxq *mbox)
1598 for (sgentry = 0; sgentry < sgecount; sgentry++) { 1611 for (sgentry = 0; sgentry < sgecount; sgentry++) {
1599 lpfc_sli4_mbx_sge_get(mbox, sgentry, &sge); 1612 lpfc_sli4_mbx_sge_get(mbox, sgentry, &sge);
1600 phyaddr = getPaddr(sge.pa_hi, sge.pa_lo); 1613 phyaddr = getPaddr(sge.pa_hi, sge.pa_lo);
1601 dma_free_coherent(&phba->pcidev->dev, PAGE_SIZE, 1614 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
1602 mbox->sge_array->addr[sgentry], phyaddr); 1615 mbox->sge_array->addr[sgentry], phyaddr);
1603 } 1616 }
1604 /* Free the sge address array memory */ 1617 /* Free the sge address array memory */
@@ -1656,7 +1669,7 @@ lpfc_sli4_config(struct lpfc_hba *phba, struct lpfcMboxq *mbox,
1656 } 1669 }
1657 1670
1658 /* Setup for the none-embedded mbox command */ 1671 /* Setup for the none-embedded mbox command */
1659 pcount = (PAGE_ALIGN(length))/PAGE_SIZE; 1672 pcount = (PAGE_ALIGN(length))/SLI4_PAGE_SIZE;
1660 pcount = (pcount > LPFC_SLI4_MBX_SGE_MAX_PAGES) ? 1673 pcount = (pcount > LPFC_SLI4_MBX_SGE_MAX_PAGES) ?
1661 LPFC_SLI4_MBX_SGE_MAX_PAGES : pcount; 1674 LPFC_SLI4_MBX_SGE_MAX_PAGES : pcount;
1662 /* Allocate record for keeping SGE virtual addresses */ 1675 /* Allocate record for keeping SGE virtual addresses */
@@ -1671,24 +1684,24 @@ lpfc_sli4_config(struct lpfc_hba *phba, struct lpfcMboxq *mbox,
1671 for (pagen = 0, alloc_len = 0; pagen < pcount; pagen++) { 1684 for (pagen = 0, alloc_len = 0; pagen < pcount; pagen++) {
1672 /* The DMA memory is always allocated in the length of a 1685 /* The DMA memory is always allocated in the length of a
1673 * page even though the last SGE might not fill up to a 1686 * page even though the last SGE might not fill up to a
1674 * page, this is used as a priori size of PAGE_SIZE for 1687 * page, this is used as a priori size of SLI4_PAGE_SIZE for
1675 * the later DMA memory free. 1688 * the later DMA memory free.
1676 */ 1689 */
1677 viraddr = dma_alloc_coherent(&phba->pcidev->dev, PAGE_SIZE, 1690 viraddr = dma_alloc_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
1678 &phyaddr, GFP_KERNEL); 1691 &phyaddr, GFP_KERNEL);
1679 /* In case of malloc fails, proceed with whatever we have */ 1692 /* In case of malloc fails, proceed with whatever we have */
1680 if (!viraddr) 1693 if (!viraddr)
1681 break; 1694 break;
1682 memset(viraddr, 0, PAGE_SIZE); 1695 memset(viraddr, 0, SLI4_PAGE_SIZE);
1683 mbox->sge_array->addr[pagen] = viraddr; 1696 mbox->sge_array->addr[pagen] = viraddr;
1684 /* Keep the first page for later sub-header construction */ 1697 /* Keep the first page for later sub-header construction */
1685 if (pagen == 0) 1698 if (pagen == 0)
1686 cfg_shdr = (union lpfc_sli4_cfg_shdr *)viraddr; 1699 cfg_shdr = (union lpfc_sli4_cfg_shdr *)viraddr;
1687 resid_len = length - alloc_len; 1700 resid_len = length - alloc_len;
1688 if (resid_len > PAGE_SIZE) { 1701 if (resid_len > SLI4_PAGE_SIZE) {
1689 lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr, 1702 lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr,
1690 PAGE_SIZE); 1703 SLI4_PAGE_SIZE);
1691 alloc_len += PAGE_SIZE; 1704 alloc_len += SLI4_PAGE_SIZE;
1692 } else { 1705 } else {
1693 lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr, 1706 lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr,
1694 resid_len); 1707 resid_len);
@@ -1886,6 +1899,8 @@ lpfc_reg_vfi(struct lpfcMboxq *mbox, struct lpfc_vport *vport, dma_addr_t phys)
1886 memcpy(reg_vfi->wwn, &vport->fc_portname, sizeof(struct lpfc_name)); 1899 memcpy(reg_vfi->wwn, &vport->fc_portname, sizeof(struct lpfc_name));
1887 reg_vfi->wwn[0] = cpu_to_le32(reg_vfi->wwn[0]); 1900 reg_vfi->wwn[0] = cpu_to_le32(reg_vfi->wwn[0]);
1888 reg_vfi->wwn[1] = cpu_to_le32(reg_vfi->wwn[1]); 1901 reg_vfi->wwn[1] = cpu_to_le32(reg_vfi->wwn[1]);
1902 reg_vfi->e_d_tov = vport->phba->fc_edtov;
1903 reg_vfi->r_a_tov = vport->phba->fc_ratov;
1889 reg_vfi->bde.addrHigh = putPaddrHigh(phys); 1904 reg_vfi->bde.addrHigh = putPaddrHigh(phys);
1890 reg_vfi->bde.addrLow = putPaddrLow(phys); 1905 reg_vfi->bde.addrLow = putPaddrLow(phys);
1891 reg_vfi->bde.tus.f.bdeSize = sizeof(vport->fc_sparam); 1906 reg_vfi->bde.tus.f.bdeSize = sizeof(vport->fc_sparam);