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-rw-r--r--drivers/ata/libata-core.c6097
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diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
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1/*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/list.h>
40#include <linux/mm.h>
41#include <linux/highmem.h>
42#include <linux/spinlock.h>
43#include <linux/blkdev.h>
44#include <linux/delay.h>
45#include <linux/timer.h>
46#include <linux/interrupt.h>
47#include <linux/completion.h>
48#include <linux/suspend.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/scatterlist.h>
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_host.h>
55#include <linux/libata.h>
56#include <asm/io.h>
57#include <asm/semaphore.h>
58#include <asm/byteorder.h>
59
60#include "libata.h"
61
62/* debounce timing parameters in msecs { interval, duration, timeout } */
63const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
66
67static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70static void ata_dev_xfermask(struct ata_device *dev);
71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
75struct workqueue_struct *ata_aux_wq;
76
77int atapi_enabled = 1;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
81int atapi_dmadir = 0;
82module_param(atapi_dmadir, int, 0444);
83MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
84
85int libata_fua = 0;
86module_param_named(fua, libata_fua, int, 0444);
87MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
88
89static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90module_param(ata_probe_timeout, int, 0444);
91MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
92
93MODULE_AUTHOR("Jeff Garzik");
94MODULE_DESCRIPTION("Library module for ATA devices");
95MODULE_LICENSE("GPL");
96MODULE_VERSION(DRV_VERSION);
97
98
99/**
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
104 *
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
107 *
108 * LOCKING:
109 * Inherited from caller.
110 */
111
112void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
113{
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
119
120 fis[4] = tf->lbal;
121 fis[5] = tf->lbam;
122 fis[6] = tf->lbah;
123 fis[7] = tf->device;
124
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
129
130 fis[12] = tf->nsect;
131 fis[13] = tf->hob_nsect;
132 fis[14] = 0;
133 fis[15] = tf->ctl;
134
135 fis[16] = 0;
136 fis[17] = 0;
137 fis[18] = 0;
138 fis[19] = 0;
139}
140
141/**
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
145 *
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
147 *
148 * LOCKING:
149 * Inherited from caller.
150 */
151
152void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
153{
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
156
157 tf->lbal = fis[4];
158 tf->lbam = fis[5];
159 tf->lbah = fis[6];
160 tf->device = fis[7];
161
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
165
166 tf->nsect = fis[12];
167 tf->hob_nsect = fis[13];
168}
169
170static const u8 ata_rw_cmds[] = {
171 /* pio multi */
172 ATA_CMD_READ_MULTI,
173 ATA_CMD_WRITE_MULTI,
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
176 0,
177 0,
178 0,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
180 /* pio */
181 ATA_CMD_PIO_READ,
182 ATA_CMD_PIO_WRITE,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
185 0,
186 0,
187 0,
188 0,
189 /* dma */
190 ATA_CMD_READ,
191 ATA_CMD_WRITE,
192 ATA_CMD_READ_EXT,
193 ATA_CMD_WRITE_EXT,
194 0,
195 0,
196 0,
197 ATA_CMD_WRITE_FUA_EXT
198};
199
200/**
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
203 *
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
206 *
207 * LOCKING:
208 * caller.
209 */
210int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
211{
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
214 u8 cmd;
215
216 int index, fua, lba48, write;
217
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
221
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
229 } else {
230 tf->protocol = ATA_PROT_DMA;
231 index = 16;
232 }
233
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
235 if (cmd) {
236 tf->command = cmd;
237 return 0;
238 }
239 return -1;
240}
241
242/**
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
247 *
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
250 *
251 * LOCKING:
252 * None.
253 *
254 * RETURNS:
255 * Packed xfer_mask.
256 */
257static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
260{
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
264}
265
266/**
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
272 *
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
275 */
276static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
280{
281 if (pio_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
283 if (mwdma_mask)
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
285 if (udma_mask)
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
287}
288
289static const struct ata_xfer_ent {
290 int shift, bits;
291 u8 base;
292} ata_xfer_tbl[] = {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
296 { -1, },
297};
298
299/**
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
302 *
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
305 *
306 * LOCKING:
307 * None.
308 *
309 * RETURNS:
310 * Matching XFER_* value, 0 if no match found.
311 */
312static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
313{
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
316
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
320 return 0;
321}
322
323/**
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
326 *
327 * Return matching xfer_mask for @xfer_mode.
328 *
329 * LOCKING:
330 * None.
331 *
332 * RETURNS:
333 * Matching xfer_mask, 0 if no match found.
334 */
335static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
336{
337 const struct ata_xfer_ent *ent;
338
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
342 return 0;
343}
344
345/**
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
348 *
349 * Return matching xfer_shift for @xfer_mode.
350 *
351 * LOCKING:
352 * None.
353 *
354 * RETURNS:
355 * Matching xfer_shift, -1 if no match found.
356 */
357static int ata_xfer_mode2shift(unsigned int xfer_mode)
358{
359 const struct ata_xfer_ent *ent;
360
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
363 return ent->shift;
364 return -1;
365}
366
367/**
368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
370 *
371 * Determine string which represents the highest speed
372 * (highest bit in @modemask).
373 *
374 * LOCKING:
375 * None.
376 *
377 * RETURNS:
378 * Constant C string representing highest speed listed in
379 * @mode_mask, or the constant C string "<n/a>".
380 */
381static const char *ata_mode_string(unsigned int xfer_mask)
382{
383 static const char * const xfer_mode_str[] = {
384 "PIO0",
385 "PIO1",
386 "PIO2",
387 "PIO3",
388 "PIO4",
389 "MWDMA0",
390 "MWDMA1",
391 "MWDMA2",
392 "UDMA/16",
393 "UDMA/25",
394 "UDMA/33",
395 "UDMA/44",
396 "UDMA/66",
397 "UDMA/100",
398 "UDMA/133",
399 "UDMA7",
400 };
401 int highbit;
402
403 highbit = fls(xfer_mask) - 1;
404 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
405 return xfer_mode_str[highbit];
406 return "<n/a>";
407}
408
409static const char *sata_spd_string(unsigned int spd)
410{
411 static const char * const spd_str[] = {
412 "1.5 Gbps",
413 "3.0 Gbps",
414 };
415
416 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
417 return "<unknown>";
418 return spd_str[spd - 1];
419}
420
421void ata_dev_disable(struct ata_device *dev)
422{
423 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
424 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
425 dev->class++;
426 }
427}
428
429/**
430 * ata_pio_devchk - PATA device presence detection
431 * @ap: ATA channel to examine
432 * @device: Device to examine (starting at zero)
433 *
434 * This technique was originally described in
435 * Hale Landis's ATADRVR (www.ata-atapi.com), and
436 * later found its way into the ATA/ATAPI spec.
437 *
438 * Write a pattern to the ATA shadow registers,
439 * and if a device is present, it will respond by
440 * correctly storing and echoing back the
441 * ATA shadow register contents.
442 *
443 * LOCKING:
444 * caller.
445 */
446
447static unsigned int ata_pio_devchk(struct ata_port *ap,
448 unsigned int device)
449{
450 struct ata_ioports *ioaddr = &ap->ioaddr;
451 u8 nsect, lbal;
452
453 ap->ops->dev_select(ap, device);
454
455 outb(0x55, ioaddr->nsect_addr);
456 outb(0xaa, ioaddr->lbal_addr);
457
458 outb(0xaa, ioaddr->nsect_addr);
459 outb(0x55, ioaddr->lbal_addr);
460
461 outb(0x55, ioaddr->nsect_addr);
462 outb(0xaa, ioaddr->lbal_addr);
463
464 nsect = inb(ioaddr->nsect_addr);
465 lbal = inb(ioaddr->lbal_addr);
466
467 if ((nsect == 0x55) && (lbal == 0xaa))
468 return 1; /* we found a device */
469
470 return 0; /* nothing found */
471}
472
473/**
474 * ata_mmio_devchk - PATA device presence detection
475 * @ap: ATA channel to examine
476 * @device: Device to examine (starting at zero)
477 *
478 * This technique was originally described in
479 * Hale Landis's ATADRVR (www.ata-atapi.com), and
480 * later found its way into the ATA/ATAPI spec.
481 *
482 * Write a pattern to the ATA shadow registers,
483 * and if a device is present, it will respond by
484 * correctly storing and echoing back the
485 * ATA shadow register contents.
486 *
487 * LOCKING:
488 * caller.
489 */
490
491static unsigned int ata_mmio_devchk(struct ata_port *ap,
492 unsigned int device)
493{
494 struct ata_ioports *ioaddr = &ap->ioaddr;
495 u8 nsect, lbal;
496
497 ap->ops->dev_select(ap, device);
498
499 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
500 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
501
502 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
503 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
504
505 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
506 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
507
508 nsect = readb((void __iomem *) ioaddr->nsect_addr);
509 lbal = readb((void __iomem *) ioaddr->lbal_addr);
510
511 if ((nsect == 0x55) && (lbal == 0xaa))
512 return 1; /* we found a device */
513
514 return 0; /* nothing found */
515}
516
517/**
518 * ata_devchk - PATA device presence detection
519 * @ap: ATA channel to examine
520 * @device: Device to examine (starting at zero)
521 *
522 * Dispatch ATA device presence detection, depending
523 * on whether we are using PIO or MMIO to talk to the
524 * ATA shadow registers.
525 *
526 * LOCKING:
527 * caller.
528 */
529
530static unsigned int ata_devchk(struct ata_port *ap,
531 unsigned int device)
532{
533 if (ap->flags & ATA_FLAG_MMIO)
534 return ata_mmio_devchk(ap, device);
535 return ata_pio_devchk(ap, device);
536}
537
538/**
539 * ata_dev_classify - determine device type based on ATA-spec signature
540 * @tf: ATA taskfile register set for device to be identified
541 *
542 * Determine from taskfile register contents whether a device is
543 * ATA or ATAPI, as per "Signature and persistence" section
544 * of ATA/PI spec (volume 1, sect 5.14).
545 *
546 * LOCKING:
547 * None.
548 *
549 * RETURNS:
550 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
551 * the event of failure.
552 */
553
554unsigned int ata_dev_classify(const struct ata_taskfile *tf)
555{
556 /* Apple's open source Darwin code hints that some devices only
557 * put a proper signature into the LBA mid/high registers,
558 * So, we only check those. It's sufficient for uniqueness.
559 */
560
561 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
562 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
563 DPRINTK("found ATA device by sig\n");
564 return ATA_DEV_ATA;
565 }
566
567 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
568 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
569 DPRINTK("found ATAPI device by sig\n");
570 return ATA_DEV_ATAPI;
571 }
572
573 DPRINTK("unknown device\n");
574 return ATA_DEV_UNKNOWN;
575}
576
577/**
578 * ata_dev_try_classify - Parse returned ATA device signature
579 * @ap: ATA channel to examine
580 * @device: Device to examine (starting at zero)
581 * @r_err: Value of error register on completion
582 *
583 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
584 * an ATA/ATAPI-defined set of values is placed in the ATA
585 * shadow registers, indicating the results of device detection
586 * and diagnostics.
587 *
588 * Select the ATA device, and read the values from the ATA shadow
589 * registers. Then parse according to the Error register value,
590 * and the spec-defined values examined by ata_dev_classify().
591 *
592 * LOCKING:
593 * caller.
594 *
595 * RETURNS:
596 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
597 */
598
599static unsigned int
600ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
601{
602 struct ata_taskfile tf;
603 unsigned int class;
604 u8 err;
605
606 ap->ops->dev_select(ap, device);
607
608 memset(&tf, 0, sizeof(tf));
609
610 ap->ops->tf_read(ap, &tf);
611 err = tf.feature;
612 if (r_err)
613 *r_err = err;
614
615 /* see if device passed diags */
616 if (err == 1)
617 /* do nothing */ ;
618 else if ((device == 0) && (err == 0x81))
619 /* do nothing */ ;
620 else
621 return ATA_DEV_NONE;
622
623 /* determine if device is ATA or ATAPI */
624 class = ata_dev_classify(&tf);
625
626 if (class == ATA_DEV_UNKNOWN)
627 return ATA_DEV_NONE;
628 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
629 return ATA_DEV_NONE;
630 return class;
631}
632
633/**
634 * ata_id_string - Convert IDENTIFY DEVICE page into string
635 * @id: IDENTIFY DEVICE results we will examine
636 * @s: string into which data is output
637 * @ofs: offset into identify device page
638 * @len: length of string to return. must be an even number.
639 *
640 * The strings in the IDENTIFY DEVICE page are broken up into
641 * 16-bit chunks. Run through the string, and output each
642 * 8-bit chunk linearly, regardless of platform.
643 *
644 * LOCKING:
645 * caller.
646 */
647
648void ata_id_string(const u16 *id, unsigned char *s,
649 unsigned int ofs, unsigned int len)
650{
651 unsigned int c;
652
653 while (len > 0) {
654 c = id[ofs] >> 8;
655 *s = c;
656 s++;
657
658 c = id[ofs] & 0xff;
659 *s = c;
660 s++;
661
662 ofs++;
663 len -= 2;
664 }
665}
666
667/**
668 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
669 * @id: IDENTIFY DEVICE results we will examine
670 * @s: string into which data is output
671 * @ofs: offset into identify device page
672 * @len: length of string to return. must be an odd number.
673 *
674 * This function is identical to ata_id_string except that it
675 * trims trailing spaces and terminates the resulting string with
676 * null. @len must be actual maximum length (even number) + 1.
677 *
678 * LOCKING:
679 * caller.
680 */
681void ata_id_c_string(const u16 *id, unsigned char *s,
682 unsigned int ofs, unsigned int len)
683{
684 unsigned char *p;
685
686 WARN_ON(!(len & 1));
687
688 ata_id_string(id, s, ofs, len - 1);
689
690 p = s + strnlen(s, len - 1);
691 while (p > s && p[-1] == ' ')
692 p--;
693 *p = '\0';
694}
695
696static u64 ata_id_n_sectors(const u16 *id)
697{
698 if (ata_id_has_lba(id)) {
699 if (ata_id_has_lba48(id))
700 return ata_id_u64(id, 100);
701 else
702 return ata_id_u32(id, 60);
703 } else {
704 if (ata_id_current_chs_valid(id))
705 return ata_id_u32(id, 57);
706 else
707 return id[1] * id[3] * id[6];
708 }
709}
710
711/**
712 * ata_noop_dev_select - Select device 0/1 on ATA bus
713 * @ap: ATA channel to manipulate
714 * @device: ATA device (numbered from zero) to select
715 *
716 * This function performs no actual function.
717 *
718 * May be used as the dev_select() entry in ata_port_operations.
719 *
720 * LOCKING:
721 * caller.
722 */
723void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
724{
725}
726
727
728/**
729 * ata_std_dev_select - Select device 0/1 on ATA bus
730 * @ap: ATA channel to manipulate
731 * @device: ATA device (numbered from zero) to select
732 *
733 * Use the method defined in the ATA specification to
734 * make either device 0, or device 1, active on the
735 * ATA channel. Works with both PIO and MMIO.
736 *
737 * May be used as the dev_select() entry in ata_port_operations.
738 *
739 * LOCKING:
740 * caller.
741 */
742
743void ata_std_dev_select (struct ata_port *ap, unsigned int device)
744{
745 u8 tmp;
746
747 if (device == 0)
748 tmp = ATA_DEVICE_OBS;
749 else
750 tmp = ATA_DEVICE_OBS | ATA_DEV1;
751
752 if (ap->flags & ATA_FLAG_MMIO) {
753 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
754 } else {
755 outb(tmp, ap->ioaddr.device_addr);
756 }
757 ata_pause(ap); /* needed; also flushes, for mmio */
758}
759
760/**
761 * ata_dev_select - Select device 0/1 on ATA bus
762 * @ap: ATA channel to manipulate
763 * @device: ATA device (numbered from zero) to select
764 * @wait: non-zero to wait for Status register BSY bit to clear
765 * @can_sleep: non-zero if context allows sleeping
766 *
767 * Use the method defined in the ATA specification to
768 * make either device 0, or device 1, active on the
769 * ATA channel.
770 *
771 * This is a high-level version of ata_std_dev_select(),
772 * which additionally provides the services of inserting
773 * the proper pauses and status polling, where needed.
774 *
775 * LOCKING:
776 * caller.
777 */
778
779void ata_dev_select(struct ata_port *ap, unsigned int device,
780 unsigned int wait, unsigned int can_sleep)
781{
782 if (ata_msg_probe(ap))
783 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
784 "device %u, wait %u\n", ap->id, device, wait);
785
786 if (wait)
787 ata_wait_idle(ap);
788
789 ap->ops->dev_select(ap, device);
790
791 if (wait) {
792 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
793 msleep(150);
794 ata_wait_idle(ap);
795 }
796}
797
798/**
799 * ata_dump_id - IDENTIFY DEVICE info debugging output
800 * @id: IDENTIFY DEVICE page to dump
801 *
802 * Dump selected 16-bit words from the given IDENTIFY DEVICE
803 * page.
804 *
805 * LOCKING:
806 * caller.
807 */
808
809static inline void ata_dump_id(const u16 *id)
810{
811 DPRINTK("49==0x%04x "
812 "53==0x%04x "
813 "63==0x%04x "
814 "64==0x%04x "
815 "75==0x%04x \n",
816 id[49],
817 id[53],
818 id[63],
819 id[64],
820 id[75]);
821 DPRINTK("80==0x%04x "
822 "81==0x%04x "
823 "82==0x%04x "
824 "83==0x%04x "
825 "84==0x%04x \n",
826 id[80],
827 id[81],
828 id[82],
829 id[83],
830 id[84]);
831 DPRINTK("88==0x%04x "
832 "93==0x%04x\n",
833 id[88],
834 id[93]);
835}
836
837/**
838 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
839 * @id: IDENTIFY data to compute xfer mask from
840 *
841 * Compute the xfermask for this device. This is not as trivial
842 * as it seems if we must consider early devices correctly.
843 *
844 * FIXME: pre IDE drive timing (do we care ?).
845 *
846 * LOCKING:
847 * None.
848 *
849 * RETURNS:
850 * Computed xfermask
851 */
852static unsigned int ata_id_xfermask(const u16 *id)
853{
854 unsigned int pio_mask, mwdma_mask, udma_mask;
855
856 /* Usual case. Word 53 indicates word 64 is valid */
857 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
858 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
859 pio_mask <<= 3;
860 pio_mask |= 0x7;
861 } else {
862 /* If word 64 isn't valid then Word 51 high byte holds
863 * the PIO timing number for the maximum. Turn it into
864 * a mask.
865 */
866 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
867
868 /* But wait.. there's more. Design your standards by
869 * committee and you too can get a free iordy field to
870 * process. However its the speeds not the modes that
871 * are supported... Note drivers using the timing API
872 * will get this right anyway
873 */
874 }
875
876 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
877
878 udma_mask = 0;
879 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
880 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
881
882 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
883}
884
885/**
886 * ata_port_queue_task - Queue port_task
887 * @ap: The ata_port to queue port_task for
888 * @fn: workqueue function to be scheduled
889 * @data: data value to pass to workqueue function
890 * @delay: delay time for workqueue function
891 *
892 * Schedule @fn(@data) for execution after @delay jiffies using
893 * port_task. There is one port_task per port and it's the
894 * user(low level driver)'s responsibility to make sure that only
895 * one task is active at any given time.
896 *
897 * libata core layer takes care of synchronization between
898 * port_task and EH. ata_port_queue_task() may be ignored for EH
899 * synchronization.
900 *
901 * LOCKING:
902 * Inherited from caller.
903 */
904void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
905 unsigned long delay)
906{
907 int rc;
908
909 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
910 return;
911
912 PREPARE_WORK(&ap->port_task, fn, data);
913
914 if (!delay)
915 rc = queue_work(ata_wq, &ap->port_task);
916 else
917 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
918
919 /* rc == 0 means that another user is using port task */
920 WARN_ON(rc == 0);
921}
922
923/**
924 * ata_port_flush_task - Flush port_task
925 * @ap: The ata_port to flush port_task for
926 *
927 * After this function completes, port_task is guranteed not to
928 * be running or scheduled.
929 *
930 * LOCKING:
931 * Kernel thread context (may sleep)
932 */
933void ata_port_flush_task(struct ata_port *ap)
934{
935 unsigned long flags;
936
937 DPRINTK("ENTER\n");
938
939 spin_lock_irqsave(ap->lock, flags);
940 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
941 spin_unlock_irqrestore(ap->lock, flags);
942
943 DPRINTK("flush #1\n");
944 flush_workqueue(ata_wq);
945
946 /*
947 * At this point, if a task is running, it's guaranteed to see
948 * the FLUSH flag; thus, it will never queue pio tasks again.
949 * Cancel and flush.
950 */
951 if (!cancel_delayed_work(&ap->port_task)) {
952 if (ata_msg_ctl(ap))
953 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
954 __FUNCTION__);
955 flush_workqueue(ata_wq);
956 }
957
958 spin_lock_irqsave(ap->lock, flags);
959 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
960 spin_unlock_irqrestore(ap->lock, flags);
961
962 if (ata_msg_ctl(ap))
963 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
964}
965
966void ata_qc_complete_internal(struct ata_queued_cmd *qc)
967{
968 struct completion *waiting = qc->private_data;
969
970 complete(waiting);
971}
972
973/**
974 * ata_exec_internal - execute libata internal command
975 * @dev: Device to which the command is sent
976 * @tf: Taskfile registers for the command and the result
977 * @cdb: CDB for packet command
978 * @dma_dir: Data tranfer direction of the command
979 * @buf: Data buffer of the command
980 * @buflen: Length of data buffer
981 *
982 * Executes libata internal command with timeout. @tf contains
983 * command on entry and result on return. Timeout and error
984 * conditions are reported via return value. No recovery action
985 * is taken after a command times out. It's caller's duty to
986 * clean up after timeout.
987 *
988 * LOCKING:
989 * None. Should be called with kernel context, might sleep.
990 *
991 * RETURNS:
992 * Zero on success, AC_ERR_* mask on failure
993 */
994unsigned ata_exec_internal(struct ata_device *dev,
995 struct ata_taskfile *tf, const u8 *cdb,
996 int dma_dir, void *buf, unsigned int buflen)
997{
998 struct ata_port *ap = dev->ap;
999 u8 command = tf->command;
1000 struct ata_queued_cmd *qc;
1001 unsigned int tag, preempted_tag;
1002 u32 preempted_sactive, preempted_qc_active;
1003 DECLARE_COMPLETION_ONSTACK(wait);
1004 unsigned long flags;
1005 unsigned int err_mask;
1006 int rc;
1007
1008 spin_lock_irqsave(ap->lock, flags);
1009
1010 /* no internal command while frozen */
1011 if (ap->pflags & ATA_PFLAG_FROZEN) {
1012 spin_unlock_irqrestore(ap->lock, flags);
1013 return AC_ERR_SYSTEM;
1014 }
1015
1016 /* initialize internal qc */
1017
1018 /* XXX: Tag 0 is used for drivers with legacy EH as some
1019 * drivers choke if any other tag is given. This breaks
1020 * ata_tag_internal() test for those drivers. Don't use new
1021 * EH stuff without converting to it.
1022 */
1023 if (ap->ops->error_handler)
1024 tag = ATA_TAG_INTERNAL;
1025 else
1026 tag = 0;
1027
1028 if (test_and_set_bit(tag, &ap->qc_allocated))
1029 BUG();
1030 qc = __ata_qc_from_tag(ap, tag);
1031
1032 qc->tag = tag;
1033 qc->scsicmd = NULL;
1034 qc->ap = ap;
1035 qc->dev = dev;
1036 ata_qc_reinit(qc);
1037
1038 preempted_tag = ap->active_tag;
1039 preempted_sactive = ap->sactive;
1040 preempted_qc_active = ap->qc_active;
1041 ap->active_tag = ATA_TAG_POISON;
1042 ap->sactive = 0;
1043 ap->qc_active = 0;
1044
1045 /* prepare & issue qc */
1046 qc->tf = *tf;
1047 if (cdb)
1048 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1049 qc->flags |= ATA_QCFLAG_RESULT_TF;
1050 qc->dma_dir = dma_dir;
1051 if (dma_dir != DMA_NONE) {
1052 ata_sg_init_one(qc, buf, buflen);
1053 qc->nsect = buflen / ATA_SECT_SIZE;
1054 }
1055
1056 qc->private_data = &wait;
1057 qc->complete_fn = ata_qc_complete_internal;
1058
1059 ata_qc_issue(qc);
1060
1061 spin_unlock_irqrestore(ap->lock, flags);
1062
1063 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1064
1065 ata_port_flush_task(ap);
1066
1067 if (!rc) {
1068 spin_lock_irqsave(ap->lock, flags);
1069
1070 /* We're racing with irq here. If we lose, the
1071 * following test prevents us from completing the qc
1072 * twice. If we win, the port is frozen and will be
1073 * cleaned up by ->post_internal_cmd().
1074 */
1075 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1076 qc->err_mask |= AC_ERR_TIMEOUT;
1077
1078 if (ap->ops->error_handler)
1079 ata_port_freeze(ap);
1080 else
1081 ata_qc_complete(qc);
1082
1083 if (ata_msg_warn(ap))
1084 ata_dev_printk(dev, KERN_WARNING,
1085 "qc timeout (cmd 0x%x)\n", command);
1086 }
1087
1088 spin_unlock_irqrestore(ap->lock, flags);
1089 }
1090
1091 /* do post_internal_cmd */
1092 if (ap->ops->post_internal_cmd)
1093 ap->ops->post_internal_cmd(qc);
1094
1095 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1096 if (ata_msg_warn(ap))
1097 ata_dev_printk(dev, KERN_WARNING,
1098 "zero err_mask for failed "
1099 "internal command, assuming AC_ERR_OTHER\n");
1100 qc->err_mask |= AC_ERR_OTHER;
1101 }
1102
1103 /* finish up */
1104 spin_lock_irqsave(ap->lock, flags);
1105
1106 *tf = qc->result_tf;
1107 err_mask = qc->err_mask;
1108
1109 ata_qc_free(qc);
1110 ap->active_tag = preempted_tag;
1111 ap->sactive = preempted_sactive;
1112 ap->qc_active = preempted_qc_active;
1113
1114 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1115 * Until those drivers are fixed, we detect the condition
1116 * here, fail the command with AC_ERR_SYSTEM and reenable the
1117 * port.
1118 *
1119 * Note that this doesn't change any behavior as internal
1120 * command failure results in disabling the device in the
1121 * higher layer for LLDDs without new reset/EH callbacks.
1122 *
1123 * Kill the following code as soon as those drivers are fixed.
1124 */
1125 if (ap->flags & ATA_FLAG_DISABLED) {
1126 err_mask |= AC_ERR_SYSTEM;
1127 ata_port_probe(ap);
1128 }
1129
1130 spin_unlock_irqrestore(ap->lock, flags);
1131
1132 return err_mask;
1133}
1134
1135/**
1136 * ata_do_simple_cmd - execute simple internal command
1137 * @dev: Device to which the command is sent
1138 * @cmd: Opcode to execute
1139 *
1140 * Execute a 'simple' command, that only consists of the opcode
1141 * 'cmd' itself, without filling any other registers
1142 *
1143 * LOCKING:
1144 * Kernel thread context (may sleep).
1145 *
1146 * RETURNS:
1147 * Zero on success, AC_ERR_* mask on failure
1148 */
1149unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1150{
1151 struct ata_taskfile tf;
1152
1153 ata_tf_init(dev, &tf);
1154
1155 tf.command = cmd;
1156 tf.flags |= ATA_TFLAG_DEVICE;
1157 tf.protocol = ATA_PROT_NODATA;
1158
1159 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1160}
1161
1162/**
1163 * ata_pio_need_iordy - check if iordy needed
1164 * @adev: ATA device
1165 *
1166 * Check if the current speed of the device requires IORDY. Used
1167 * by various controllers for chip configuration.
1168 */
1169
1170unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1171{
1172 int pio;
1173 int speed = adev->pio_mode - XFER_PIO_0;
1174
1175 if (speed < 2)
1176 return 0;
1177 if (speed > 2)
1178 return 1;
1179
1180 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1181
1182 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1183 pio = adev->id[ATA_ID_EIDE_PIO];
1184 /* Is the speed faster than the drive allows non IORDY ? */
1185 if (pio) {
1186 /* This is cycle times not frequency - watch the logic! */
1187 if (pio > 240) /* PIO2 is 240nS per cycle */
1188 return 1;
1189 return 0;
1190 }
1191 }
1192 return 0;
1193}
1194
1195/**
1196 * ata_dev_read_id - Read ID data from the specified device
1197 * @dev: target device
1198 * @p_class: pointer to class of the target device (may be changed)
1199 * @post_reset: is this read ID post-reset?
1200 * @id: buffer to read IDENTIFY data into
1201 *
1202 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1203 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1204 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1205 * for pre-ATA4 drives.
1206 *
1207 * LOCKING:
1208 * Kernel thread context (may sleep)
1209 *
1210 * RETURNS:
1211 * 0 on success, -errno otherwise.
1212 */
1213int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1214 int post_reset, u16 *id)
1215{
1216 struct ata_port *ap = dev->ap;
1217 unsigned int class = *p_class;
1218 struct ata_taskfile tf;
1219 unsigned int err_mask = 0;
1220 const char *reason;
1221 int rc;
1222
1223 if (ata_msg_ctl(ap))
1224 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1225 __FUNCTION__, ap->id, dev->devno);
1226
1227 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1228
1229 retry:
1230 ata_tf_init(dev, &tf);
1231
1232 switch (class) {
1233 case ATA_DEV_ATA:
1234 tf.command = ATA_CMD_ID_ATA;
1235 break;
1236 case ATA_DEV_ATAPI:
1237 tf.command = ATA_CMD_ID_ATAPI;
1238 break;
1239 default:
1240 rc = -ENODEV;
1241 reason = "unsupported class";
1242 goto err_out;
1243 }
1244
1245 tf.protocol = ATA_PROT_PIO;
1246
1247 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1248 id, sizeof(id[0]) * ATA_ID_WORDS);
1249 if (err_mask) {
1250 rc = -EIO;
1251 reason = "I/O error";
1252 goto err_out;
1253 }
1254
1255 swap_buf_le16(id, ATA_ID_WORDS);
1256
1257 /* sanity check */
1258 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1259 rc = -EINVAL;
1260 reason = "device reports illegal type";
1261 goto err_out;
1262 }
1263
1264 if (post_reset && class == ATA_DEV_ATA) {
1265 /*
1266 * The exact sequence expected by certain pre-ATA4 drives is:
1267 * SRST RESET
1268 * IDENTIFY
1269 * INITIALIZE DEVICE PARAMETERS
1270 * anything else..
1271 * Some drives were very specific about that exact sequence.
1272 */
1273 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1274 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1275 if (err_mask) {
1276 rc = -EIO;
1277 reason = "INIT_DEV_PARAMS failed";
1278 goto err_out;
1279 }
1280
1281 /* current CHS translation info (id[53-58]) might be
1282 * changed. reread the identify device info.
1283 */
1284 post_reset = 0;
1285 goto retry;
1286 }
1287 }
1288
1289 *p_class = class;
1290
1291 return 0;
1292
1293 err_out:
1294 if (ata_msg_warn(ap))
1295 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1296 "(%s, err_mask=0x%x)\n", reason, err_mask);
1297 return rc;
1298}
1299
1300static inline u8 ata_dev_knobble(struct ata_device *dev)
1301{
1302 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1303}
1304
1305static void ata_dev_config_ncq(struct ata_device *dev,
1306 char *desc, size_t desc_sz)
1307{
1308 struct ata_port *ap = dev->ap;
1309 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1310
1311 if (!ata_id_has_ncq(dev->id)) {
1312 desc[0] = '\0';
1313 return;
1314 }
1315
1316 if (ap->flags & ATA_FLAG_NCQ) {
1317 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1318 dev->flags |= ATA_DFLAG_NCQ;
1319 }
1320
1321 if (hdepth >= ddepth)
1322 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1323 else
1324 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1325}
1326
1327static void ata_set_port_max_cmd_len(struct ata_port *ap)
1328{
1329 int i;
1330
1331 if (ap->host) {
1332 ap->host->max_cmd_len = 0;
1333 for (i = 0; i < ATA_MAX_DEVICES; i++)
1334 ap->host->max_cmd_len = max_t(unsigned int,
1335 ap->host->max_cmd_len,
1336 ap->device[i].cdb_len);
1337 }
1338}
1339
1340/**
1341 * ata_dev_configure - Configure the specified ATA/ATAPI device
1342 * @dev: Target device to configure
1343 * @print_info: Enable device info printout
1344 *
1345 * Configure @dev according to @dev->id. Generic and low-level
1346 * driver specific fixups are also applied.
1347 *
1348 * LOCKING:
1349 * Kernel thread context (may sleep)
1350 *
1351 * RETURNS:
1352 * 0 on success, -errno otherwise
1353 */
1354int ata_dev_configure(struct ata_device *dev, int print_info)
1355{
1356 struct ata_port *ap = dev->ap;
1357 const u16 *id = dev->id;
1358 unsigned int xfer_mask;
1359 int rc;
1360
1361 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1362 ata_dev_printk(dev, KERN_INFO,
1363 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1364 __FUNCTION__, ap->id, dev->devno);
1365 return 0;
1366 }
1367
1368 if (ata_msg_probe(ap))
1369 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1370 __FUNCTION__, ap->id, dev->devno);
1371
1372 /* print device capabilities */
1373 if (ata_msg_probe(ap))
1374 ata_dev_printk(dev, KERN_DEBUG,
1375 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1376 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1377 __FUNCTION__,
1378 id[49], id[82], id[83], id[84],
1379 id[85], id[86], id[87], id[88]);
1380
1381 /* initialize to-be-configured parameters */
1382 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1383 dev->max_sectors = 0;
1384 dev->cdb_len = 0;
1385 dev->n_sectors = 0;
1386 dev->cylinders = 0;
1387 dev->heads = 0;
1388 dev->sectors = 0;
1389
1390 /*
1391 * common ATA, ATAPI feature tests
1392 */
1393
1394 /* find max transfer mode; for printk only */
1395 xfer_mask = ata_id_xfermask(id);
1396
1397 if (ata_msg_probe(ap))
1398 ata_dump_id(id);
1399
1400 /* ATA-specific feature tests */
1401 if (dev->class == ATA_DEV_ATA) {
1402 dev->n_sectors = ata_id_n_sectors(id);
1403
1404 if (ata_id_has_lba(id)) {
1405 const char *lba_desc;
1406 char ncq_desc[20];
1407
1408 lba_desc = "LBA";
1409 dev->flags |= ATA_DFLAG_LBA;
1410 if (ata_id_has_lba48(id)) {
1411 dev->flags |= ATA_DFLAG_LBA48;
1412 lba_desc = "LBA48";
1413 }
1414
1415 /* config NCQ */
1416 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1417
1418 /* print device info to dmesg */
1419 if (ata_msg_drv(ap) && print_info)
1420 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1421 "max %s, %Lu sectors: %s %s\n",
1422 ata_id_major_version(id),
1423 ata_mode_string(xfer_mask),
1424 (unsigned long long)dev->n_sectors,
1425 lba_desc, ncq_desc);
1426 } else {
1427 /* CHS */
1428
1429 /* Default translation */
1430 dev->cylinders = id[1];
1431 dev->heads = id[3];
1432 dev->sectors = id[6];
1433
1434 if (ata_id_current_chs_valid(id)) {
1435 /* Current CHS translation is valid. */
1436 dev->cylinders = id[54];
1437 dev->heads = id[55];
1438 dev->sectors = id[56];
1439 }
1440
1441 /* print device info to dmesg */
1442 if (ata_msg_drv(ap) && print_info)
1443 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1444 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1445 ata_id_major_version(id),
1446 ata_mode_string(xfer_mask),
1447 (unsigned long long)dev->n_sectors,
1448 dev->cylinders, dev->heads,
1449 dev->sectors);
1450 }
1451
1452 if (dev->id[59] & 0x100) {
1453 dev->multi_count = dev->id[59] & 0xff;
1454 if (ata_msg_drv(ap) && print_info)
1455 ata_dev_printk(dev, KERN_INFO,
1456 "ata%u: dev %u multi count %u\n",
1457 ap->id, dev->devno, dev->multi_count);
1458 }
1459
1460 dev->cdb_len = 16;
1461 }
1462
1463 /* ATAPI-specific feature tests */
1464 else if (dev->class == ATA_DEV_ATAPI) {
1465 char *cdb_intr_string = "";
1466
1467 rc = atapi_cdb_len(id);
1468 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1469 if (ata_msg_warn(ap))
1470 ata_dev_printk(dev, KERN_WARNING,
1471 "unsupported CDB len\n");
1472 rc = -EINVAL;
1473 goto err_out_nosup;
1474 }
1475 dev->cdb_len = (unsigned int) rc;
1476
1477 if (ata_id_cdb_intr(dev->id)) {
1478 dev->flags |= ATA_DFLAG_CDB_INTR;
1479 cdb_intr_string = ", CDB intr";
1480 }
1481
1482 /* print device info to dmesg */
1483 if (ata_msg_drv(ap) && print_info)
1484 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1485 ata_mode_string(xfer_mask),
1486 cdb_intr_string);
1487 }
1488
1489 ata_set_port_max_cmd_len(ap);
1490
1491 /* limit bridge transfers to udma5, 200 sectors */
1492 if (ata_dev_knobble(dev)) {
1493 if (ata_msg_drv(ap) && print_info)
1494 ata_dev_printk(dev, KERN_INFO,
1495 "applying bridge limits\n");
1496 dev->udma_mask &= ATA_UDMA5;
1497 dev->max_sectors = ATA_MAX_SECTORS;
1498 }
1499
1500 if (ap->ops->dev_config)
1501 ap->ops->dev_config(ap, dev);
1502
1503 if (ata_msg_probe(ap))
1504 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1505 __FUNCTION__, ata_chk_status(ap));
1506 return 0;
1507
1508err_out_nosup:
1509 if (ata_msg_probe(ap))
1510 ata_dev_printk(dev, KERN_DEBUG,
1511 "%s: EXIT, err\n", __FUNCTION__);
1512 return rc;
1513}
1514
1515/**
1516 * ata_bus_probe - Reset and probe ATA bus
1517 * @ap: Bus to probe
1518 *
1519 * Master ATA bus probing function. Initiates a hardware-dependent
1520 * bus reset, then attempts to identify any devices found on
1521 * the bus.
1522 *
1523 * LOCKING:
1524 * PCI/etc. bus probe sem.
1525 *
1526 * RETURNS:
1527 * Zero on success, negative errno otherwise.
1528 */
1529
1530int ata_bus_probe(struct ata_port *ap)
1531{
1532 unsigned int classes[ATA_MAX_DEVICES];
1533 int tries[ATA_MAX_DEVICES];
1534 int i, rc, down_xfermask;
1535 struct ata_device *dev;
1536
1537 ata_port_probe(ap);
1538
1539 for (i = 0; i < ATA_MAX_DEVICES; i++)
1540 tries[i] = ATA_PROBE_MAX_TRIES;
1541
1542 retry:
1543 down_xfermask = 0;
1544
1545 /* reset and determine device classes */
1546 ap->ops->phy_reset(ap);
1547
1548 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1549 dev = &ap->device[i];
1550
1551 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1552 dev->class != ATA_DEV_UNKNOWN)
1553 classes[dev->devno] = dev->class;
1554 else
1555 classes[dev->devno] = ATA_DEV_NONE;
1556
1557 dev->class = ATA_DEV_UNKNOWN;
1558 }
1559
1560 ata_port_probe(ap);
1561
1562 /* after the reset the device state is PIO 0 and the controller
1563 state is undefined. Record the mode */
1564
1565 for (i = 0; i < ATA_MAX_DEVICES; i++)
1566 ap->device[i].pio_mode = XFER_PIO_0;
1567
1568 /* read IDENTIFY page and configure devices */
1569 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1570 dev = &ap->device[i];
1571
1572 if (tries[i])
1573 dev->class = classes[i];
1574
1575 if (!ata_dev_enabled(dev))
1576 continue;
1577
1578 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1579 if (rc)
1580 goto fail;
1581
1582 rc = ata_dev_configure(dev, 1);
1583 if (rc)
1584 goto fail;
1585 }
1586
1587 /* configure transfer mode */
1588 rc = ata_set_mode(ap, &dev);
1589 if (rc) {
1590 down_xfermask = 1;
1591 goto fail;
1592 }
1593
1594 for (i = 0; i < ATA_MAX_DEVICES; i++)
1595 if (ata_dev_enabled(&ap->device[i]))
1596 return 0;
1597
1598 /* no device present, disable port */
1599 ata_port_disable(ap);
1600 ap->ops->port_disable(ap);
1601 return -ENODEV;
1602
1603 fail:
1604 switch (rc) {
1605 case -EINVAL:
1606 case -ENODEV:
1607 tries[dev->devno] = 0;
1608 break;
1609 case -EIO:
1610 sata_down_spd_limit(ap);
1611 /* fall through */
1612 default:
1613 tries[dev->devno]--;
1614 if (down_xfermask &&
1615 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1616 tries[dev->devno] = 0;
1617 }
1618
1619 if (!tries[dev->devno]) {
1620 ata_down_xfermask_limit(dev, 1);
1621 ata_dev_disable(dev);
1622 }
1623
1624 goto retry;
1625}
1626
1627/**
1628 * ata_port_probe - Mark port as enabled
1629 * @ap: Port for which we indicate enablement
1630 *
1631 * Modify @ap data structure such that the system
1632 * thinks that the entire port is enabled.
1633 *
1634 * LOCKING: host_set lock, or some other form of
1635 * serialization.
1636 */
1637
1638void ata_port_probe(struct ata_port *ap)
1639{
1640 ap->flags &= ~ATA_FLAG_DISABLED;
1641}
1642
1643/**
1644 * sata_print_link_status - Print SATA link status
1645 * @ap: SATA port to printk link status about
1646 *
1647 * This function prints link speed and status of a SATA link.
1648 *
1649 * LOCKING:
1650 * None.
1651 */
1652static void sata_print_link_status(struct ata_port *ap)
1653{
1654 u32 sstatus, scontrol, tmp;
1655
1656 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1657 return;
1658 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1659
1660 if (ata_port_online(ap)) {
1661 tmp = (sstatus >> 4) & 0xf;
1662 ata_port_printk(ap, KERN_INFO,
1663 "SATA link up %s (SStatus %X SControl %X)\n",
1664 sata_spd_string(tmp), sstatus, scontrol);
1665 } else {
1666 ata_port_printk(ap, KERN_INFO,
1667 "SATA link down (SStatus %X SControl %X)\n",
1668 sstatus, scontrol);
1669 }
1670}
1671
1672/**
1673 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1674 * @ap: SATA port associated with target SATA PHY.
1675 *
1676 * This function issues commands to standard SATA Sxxx
1677 * PHY registers, to wake up the phy (and device), and
1678 * clear any reset condition.
1679 *
1680 * LOCKING:
1681 * PCI/etc. bus probe sem.
1682 *
1683 */
1684void __sata_phy_reset(struct ata_port *ap)
1685{
1686 u32 sstatus;
1687 unsigned long timeout = jiffies + (HZ * 5);
1688
1689 if (ap->flags & ATA_FLAG_SATA_RESET) {
1690 /* issue phy wake/reset */
1691 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1692 /* Couldn't find anything in SATA I/II specs, but
1693 * AHCI-1.1 10.4.2 says at least 1 ms. */
1694 mdelay(1);
1695 }
1696 /* phy wake/clear reset */
1697 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1698
1699 /* wait for phy to become ready, if necessary */
1700 do {
1701 msleep(200);
1702 sata_scr_read(ap, SCR_STATUS, &sstatus);
1703 if ((sstatus & 0xf) != 1)
1704 break;
1705 } while (time_before(jiffies, timeout));
1706
1707 /* print link status */
1708 sata_print_link_status(ap);
1709
1710 /* TODO: phy layer with polling, timeouts, etc. */
1711 if (!ata_port_offline(ap))
1712 ata_port_probe(ap);
1713 else
1714 ata_port_disable(ap);
1715
1716 if (ap->flags & ATA_FLAG_DISABLED)
1717 return;
1718
1719 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1720 ata_port_disable(ap);
1721 return;
1722 }
1723
1724 ap->cbl = ATA_CBL_SATA;
1725}
1726
1727/**
1728 * sata_phy_reset - Reset SATA bus.
1729 * @ap: SATA port associated with target SATA PHY.
1730 *
1731 * This function resets the SATA bus, and then probes
1732 * the bus for devices.
1733 *
1734 * LOCKING:
1735 * PCI/etc. bus probe sem.
1736 *
1737 */
1738void sata_phy_reset(struct ata_port *ap)
1739{
1740 __sata_phy_reset(ap);
1741 if (ap->flags & ATA_FLAG_DISABLED)
1742 return;
1743 ata_bus_reset(ap);
1744}
1745
1746/**
1747 * ata_dev_pair - return other device on cable
1748 * @adev: device
1749 *
1750 * Obtain the other device on the same cable, or if none is
1751 * present NULL is returned
1752 */
1753
1754struct ata_device *ata_dev_pair(struct ata_device *adev)
1755{
1756 struct ata_port *ap = adev->ap;
1757 struct ata_device *pair = &ap->device[1 - adev->devno];
1758 if (!ata_dev_enabled(pair))
1759 return NULL;
1760 return pair;
1761}
1762
1763/**
1764 * ata_port_disable - Disable port.
1765 * @ap: Port to be disabled.
1766 *
1767 * Modify @ap data structure such that the system
1768 * thinks that the entire port is disabled, and should
1769 * never attempt to probe or communicate with devices
1770 * on this port.
1771 *
1772 * LOCKING: host_set lock, or some other form of
1773 * serialization.
1774 */
1775
1776void ata_port_disable(struct ata_port *ap)
1777{
1778 ap->device[0].class = ATA_DEV_NONE;
1779 ap->device[1].class = ATA_DEV_NONE;
1780 ap->flags |= ATA_FLAG_DISABLED;
1781}
1782
1783/**
1784 * sata_down_spd_limit - adjust SATA spd limit downward
1785 * @ap: Port to adjust SATA spd limit for
1786 *
1787 * Adjust SATA spd limit of @ap downward. Note that this
1788 * function only adjusts the limit. The change must be applied
1789 * using sata_set_spd().
1790 *
1791 * LOCKING:
1792 * Inherited from caller.
1793 *
1794 * RETURNS:
1795 * 0 on success, negative errno on failure
1796 */
1797int sata_down_spd_limit(struct ata_port *ap)
1798{
1799 u32 sstatus, spd, mask;
1800 int rc, highbit;
1801
1802 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1803 if (rc)
1804 return rc;
1805
1806 mask = ap->sata_spd_limit;
1807 if (mask <= 1)
1808 return -EINVAL;
1809 highbit = fls(mask) - 1;
1810 mask &= ~(1 << highbit);
1811
1812 spd = (sstatus >> 4) & 0xf;
1813 if (spd <= 1)
1814 return -EINVAL;
1815 spd--;
1816 mask &= (1 << spd) - 1;
1817 if (!mask)
1818 return -EINVAL;
1819
1820 ap->sata_spd_limit = mask;
1821
1822 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1823 sata_spd_string(fls(mask)));
1824
1825 return 0;
1826}
1827
1828static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1829{
1830 u32 spd, limit;
1831
1832 if (ap->sata_spd_limit == UINT_MAX)
1833 limit = 0;
1834 else
1835 limit = fls(ap->sata_spd_limit);
1836
1837 spd = (*scontrol >> 4) & 0xf;
1838 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1839
1840 return spd != limit;
1841}
1842
1843/**
1844 * sata_set_spd_needed - is SATA spd configuration needed
1845 * @ap: Port in question
1846 *
1847 * Test whether the spd limit in SControl matches
1848 * @ap->sata_spd_limit. This function is used to determine
1849 * whether hardreset is necessary to apply SATA spd
1850 * configuration.
1851 *
1852 * LOCKING:
1853 * Inherited from caller.
1854 *
1855 * RETURNS:
1856 * 1 if SATA spd configuration is needed, 0 otherwise.
1857 */
1858int sata_set_spd_needed(struct ata_port *ap)
1859{
1860 u32 scontrol;
1861
1862 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1863 return 0;
1864
1865 return __sata_set_spd_needed(ap, &scontrol);
1866}
1867
1868/**
1869 * sata_set_spd - set SATA spd according to spd limit
1870 * @ap: Port to set SATA spd for
1871 *
1872 * Set SATA spd of @ap according to sata_spd_limit.
1873 *
1874 * LOCKING:
1875 * Inherited from caller.
1876 *
1877 * RETURNS:
1878 * 0 if spd doesn't need to be changed, 1 if spd has been
1879 * changed. Negative errno if SCR registers are inaccessible.
1880 */
1881int sata_set_spd(struct ata_port *ap)
1882{
1883 u32 scontrol;
1884 int rc;
1885
1886 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1887 return rc;
1888
1889 if (!__sata_set_spd_needed(ap, &scontrol))
1890 return 0;
1891
1892 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1893 return rc;
1894
1895 return 1;
1896}
1897
1898/*
1899 * This mode timing computation functionality is ported over from
1900 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1901 */
1902/*
1903 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1904 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1905 * for PIO 5, which is a nonstandard extension and UDMA6, which
1906 * is currently supported only by Maxtor drives.
1907 */
1908
1909static const struct ata_timing ata_timing[] = {
1910
1911 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1912 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1913 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1914 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1915
1916 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1917 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1918 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1919
1920/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1921
1922 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1923 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1924 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1925
1926 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1927 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1928 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1929
1930/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1931 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1932 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1933
1934 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1935 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1936 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1937
1938/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1939
1940 { 0xFF }
1941};
1942
1943#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1944#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1945
1946static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1947{
1948 q->setup = EZ(t->setup * 1000, T);
1949 q->act8b = EZ(t->act8b * 1000, T);
1950 q->rec8b = EZ(t->rec8b * 1000, T);
1951 q->cyc8b = EZ(t->cyc8b * 1000, T);
1952 q->active = EZ(t->active * 1000, T);
1953 q->recover = EZ(t->recover * 1000, T);
1954 q->cycle = EZ(t->cycle * 1000, T);
1955 q->udma = EZ(t->udma * 1000, UT);
1956}
1957
1958void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1959 struct ata_timing *m, unsigned int what)
1960{
1961 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1962 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1963 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1964 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1965 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1966 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1967 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1968 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1969}
1970
1971static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1972{
1973 const struct ata_timing *t;
1974
1975 for (t = ata_timing; t->mode != speed; t++)
1976 if (t->mode == 0xFF)
1977 return NULL;
1978 return t;
1979}
1980
1981int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1982 struct ata_timing *t, int T, int UT)
1983{
1984 const struct ata_timing *s;
1985 struct ata_timing p;
1986
1987 /*
1988 * Find the mode.
1989 */
1990
1991 if (!(s = ata_timing_find_mode(speed)))
1992 return -EINVAL;
1993
1994 memcpy(t, s, sizeof(*s));
1995
1996 /*
1997 * If the drive is an EIDE drive, it can tell us it needs extended
1998 * PIO/MW_DMA cycle timing.
1999 */
2000
2001 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2002 memset(&p, 0, sizeof(p));
2003 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2004 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2005 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2006 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2007 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2008 }
2009 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2010 }
2011
2012 /*
2013 * Convert the timing to bus clock counts.
2014 */
2015
2016 ata_timing_quantize(t, t, T, UT);
2017
2018 /*
2019 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2020 * S.M.A.R.T * and some other commands. We have to ensure that the
2021 * DMA cycle timing is slower/equal than the fastest PIO timing.
2022 */
2023
2024 if (speed > XFER_PIO_4) {
2025 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2026 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2027 }
2028
2029 /*
2030 * Lengthen active & recovery time so that cycle time is correct.
2031 */
2032
2033 if (t->act8b + t->rec8b < t->cyc8b) {
2034 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2035 t->rec8b = t->cyc8b - t->act8b;
2036 }
2037
2038 if (t->active + t->recover < t->cycle) {
2039 t->active += (t->cycle - (t->active + t->recover)) / 2;
2040 t->recover = t->cycle - t->active;
2041 }
2042
2043 return 0;
2044}
2045
2046/**
2047 * ata_down_xfermask_limit - adjust dev xfer masks downward
2048 * @dev: Device to adjust xfer masks
2049 * @force_pio0: Force PIO0
2050 *
2051 * Adjust xfer masks of @dev downward. Note that this function
2052 * does not apply the change. Invoking ata_set_mode() afterwards
2053 * will apply the limit.
2054 *
2055 * LOCKING:
2056 * Inherited from caller.
2057 *
2058 * RETURNS:
2059 * 0 on success, negative errno on failure
2060 */
2061int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2062{
2063 unsigned long xfer_mask;
2064 int highbit;
2065
2066 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2067 dev->udma_mask);
2068
2069 if (!xfer_mask)
2070 goto fail;
2071 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2072 if (xfer_mask & ATA_MASK_UDMA)
2073 xfer_mask &= ~ATA_MASK_MWDMA;
2074
2075 highbit = fls(xfer_mask) - 1;
2076 xfer_mask &= ~(1 << highbit);
2077 if (force_pio0)
2078 xfer_mask &= 1 << ATA_SHIFT_PIO;
2079 if (!xfer_mask)
2080 goto fail;
2081
2082 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2083 &dev->udma_mask);
2084
2085 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2086 ata_mode_string(xfer_mask));
2087
2088 return 0;
2089
2090 fail:
2091 return -EINVAL;
2092}
2093
2094static int ata_dev_set_mode(struct ata_device *dev)
2095{
2096 unsigned int err_mask;
2097 int rc;
2098
2099 dev->flags &= ~ATA_DFLAG_PIO;
2100 if (dev->xfer_shift == ATA_SHIFT_PIO)
2101 dev->flags |= ATA_DFLAG_PIO;
2102
2103 err_mask = ata_dev_set_xfermode(dev);
2104 if (err_mask) {
2105 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2106 "(err_mask=0x%x)\n", err_mask);
2107 return -EIO;
2108 }
2109
2110 rc = ata_dev_revalidate(dev, 0);
2111 if (rc)
2112 return rc;
2113
2114 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2115 dev->xfer_shift, (int)dev->xfer_mode);
2116
2117 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2118 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2119 return 0;
2120}
2121
2122/**
2123 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2124 * @ap: port on which timings will be programmed
2125 * @r_failed_dev: out paramter for failed device
2126 *
2127 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2128 * ata_set_mode() fails, pointer to the failing device is
2129 * returned in @r_failed_dev.
2130 *
2131 * LOCKING:
2132 * PCI/etc. bus probe sem.
2133 *
2134 * RETURNS:
2135 * 0 on success, negative errno otherwise
2136 */
2137int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2138{
2139 struct ata_device *dev;
2140 int i, rc = 0, used_dma = 0, found = 0;
2141
2142 /* has private set_mode? */
2143 if (ap->ops->set_mode) {
2144 /* FIXME: make ->set_mode handle no device case and
2145 * return error code and failing device on failure.
2146 */
2147 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2148 if (ata_dev_ready(&ap->device[i])) {
2149 ap->ops->set_mode(ap);
2150 break;
2151 }
2152 }
2153 return 0;
2154 }
2155
2156 /* step 1: calculate xfer_mask */
2157 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2158 unsigned int pio_mask, dma_mask;
2159
2160 dev = &ap->device[i];
2161
2162 if (!ata_dev_enabled(dev))
2163 continue;
2164
2165 ata_dev_xfermask(dev);
2166
2167 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2168 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2169 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2170 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2171
2172 found = 1;
2173 if (dev->dma_mode)
2174 used_dma = 1;
2175 }
2176 if (!found)
2177 goto out;
2178
2179 /* step 2: always set host PIO timings */
2180 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2181 dev = &ap->device[i];
2182 if (!ata_dev_enabled(dev))
2183 continue;
2184
2185 if (!dev->pio_mode) {
2186 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2187 rc = -EINVAL;
2188 goto out;
2189 }
2190
2191 dev->xfer_mode = dev->pio_mode;
2192 dev->xfer_shift = ATA_SHIFT_PIO;
2193 if (ap->ops->set_piomode)
2194 ap->ops->set_piomode(ap, dev);
2195 }
2196
2197 /* step 3: set host DMA timings */
2198 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2199 dev = &ap->device[i];
2200
2201 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2202 continue;
2203
2204 dev->xfer_mode = dev->dma_mode;
2205 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2206 if (ap->ops->set_dmamode)
2207 ap->ops->set_dmamode(ap, dev);
2208 }
2209
2210 /* step 4: update devices' xfer mode */
2211 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2212 dev = &ap->device[i];
2213
2214 /* don't udpate suspended devices' xfer mode */
2215 if (!ata_dev_ready(dev))
2216 continue;
2217
2218 rc = ata_dev_set_mode(dev);
2219 if (rc)
2220 goto out;
2221 }
2222
2223 /* Record simplex status. If we selected DMA then the other
2224 * host channels are not permitted to do so.
2225 */
2226 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2227 ap->host_set->simplex_claimed = 1;
2228
2229 /* step5: chip specific finalisation */
2230 if (ap->ops->post_set_mode)
2231 ap->ops->post_set_mode(ap);
2232
2233 out:
2234 if (rc)
2235 *r_failed_dev = dev;
2236 return rc;
2237}
2238
2239/**
2240 * ata_tf_to_host - issue ATA taskfile to host controller
2241 * @ap: port to which command is being issued
2242 * @tf: ATA taskfile register set
2243 *
2244 * Issues ATA taskfile register set to ATA host controller,
2245 * with proper synchronization with interrupt handler and
2246 * other threads.
2247 *
2248 * LOCKING:
2249 * spin_lock_irqsave(host_set lock)
2250 */
2251
2252static inline void ata_tf_to_host(struct ata_port *ap,
2253 const struct ata_taskfile *tf)
2254{
2255 ap->ops->tf_load(ap, tf);
2256 ap->ops->exec_command(ap, tf);
2257}
2258
2259/**
2260 * ata_busy_sleep - sleep until BSY clears, or timeout
2261 * @ap: port containing status register to be polled
2262 * @tmout_pat: impatience timeout
2263 * @tmout: overall timeout
2264 *
2265 * Sleep until ATA Status register bit BSY clears,
2266 * or a timeout occurs.
2267 *
2268 * LOCKING: None.
2269 */
2270
2271unsigned int ata_busy_sleep (struct ata_port *ap,
2272 unsigned long tmout_pat, unsigned long tmout)
2273{
2274 unsigned long timer_start, timeout;
2275 u8 status;
2276
2277 status = ata_busy_wait(ap, ATA_BUSY, 300);
2278 timer_start = jiffies;
2279 timeout = timer_start + tmout_pat;
2280 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2281 msleep(50);
2282 status = ata_busy_wait(ap, ATA_BUSY, 3);
2283 }
2284
2285 if (status & ATA_BUSY)
2286 ata_port_printk(ap, KERN_WARNING,
2287 "port is slow to respond, please be patient\n");
2288
2289 timeout = timer_start + tmout;
2290 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2291 msleep(50);
2292 status = ata_chk_status(ap);
2293 }
2294
2295 if (status & ATA_BUSY) {
2296 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2297 "(%lu secs)\n", tmout / HZ);
2298 return 1;
2299 }
2300
2301 return 0;
2302}
2303
2304static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2305{
2306 struct ata_ioports *ioaddr = &ap->ioaddr;
2307 unsigned int dev0 = devmask & (1 << 0);
2308 unsigned int dev1 = devmask & (1 << 1);
2309 unsigned long timeout;
2310
2311 /* if device 0 was found in ata_devchk, wait for its
2312 * BSY bit to clear
2313 */
2314 if (dev0)
2315 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2316
2317 /* if device 1 was found in ata_devchk, wait for
2318 * register access, then wait for BSY to clear
2319 */
2320 timeout = jiffies + ATA_TMOUT_BOOT;
2321 while (dev1) {
2322 u8 nsect, lbal;
2323
2324 ap->ops->dev_select(ap, 1);
2325 if (ap->flags & ATA_FLAG_MMIO) {
2326 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2327 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2328 } else {
2329 nsect = inb(ioaddr->nsect_addr);
2330 lbal = inb(ioaddr->lbal_addr);
2331 }
2332 if ((nsect == 1) && (lbal == 1))
2333 break;
2334 if (time_after(jiffies, timeout)) {
2335 dev1 = 0;
2336 break;
2337 }
2338 msleep(50); /* give drive a breather */
2339 }
2340 if (dev1)
2341 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2342
2343 /* is all this really necessary? */
2344 ap->ops->dev_select(ap, 0);
2345 if (dev1)
2346 ap->ops->dev_select(ap, 1);
2347 if (dev0)
2348 ap->ops->dev_select(ap, 0);
2349}
2350
2351static unsigned int ata_bus_softreset(struct ata_port *ap,
2352 unsigned int devmask)
2353{
2354 struct ata_ioports *ioaddr = &ap->ioaddr;
2355
2356 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2357
2358 /* software reset. causes dev0 to be selected */
2359 if (ap->flags & ATA_FLAG_MMIO) {
2360 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2361 udelay(20); /* FIXME: flush */
2362 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2363 udelay(20); /* FIXME: flush */
2364 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2365 } else {
2366 outb(ap->ctl, ioaddr->ctl_addr);
2367 udelay(10);
2368 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2369 udelay(10);
2370 outb(ap->ctl, ioaddr->ctl_addr);
2371 }
2372
2373 /* spec mandates ">= 2ms" before checking status.
2374 * We wait 150ms, because that was the magic delay used for
2375 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2376 * between when the ATA command register is written, and then
2377 * status is checked. Because waiting for "a while" before
2378 * checking status is fine, post SRST, we perform this magic
2379 * delay here as well.
2380 *
2381 * Old drivers/ide uses the 2mS rule and then waits for ready
2382 */
2383 msleep(150);
2384
2385 /* Before we perform post reset processing we want to see if
2386 * the bus shows 0xFF because the odd clown forgets the D7
2387 * pulldown resistor.
2388 */
2389 if (ata_check_status(ap) == 0xFF) {
2390 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2391 return AC_ERR_OTHER;
2392 }
2393
2394 ata_bus_post_reset(ap, devmask);
2395
2396 return 0;
2397}
2398
2399/**
2400 * ata_bus_reset - reset host port and associated ATA channel
2401 * @ap: port to reset
2402 *
2403 * This is typically the first time we actually start issuing
2404 * commands to the ATA channel. We wait for BSY to clear, then
2405 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2406 * result. Determine what devices, if any, are on the channel
2407 * by looking at the device 0/1 error register. Look at the signature
2408 * stored in each device's taskfile registers, to determine if
2409 * the device is ATA or ATAPI.
2410 *
2411 * LOCKING:
2412 * PCI/etc. bus probe sem.
2413 * Obtains host_set lock.
2414 *
2415 * SIDE EFFECTS:
2416 * Sets ATA_FLAG_DISABLED if bus reset fails.
2417 */
2418
2419void ata_bus_reset(struct ata_port *ap)
2420{
2421 struct ata_ioports *ioaddr = &ap->ioaddr;
2422 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2423 u8 err;
2424 unsigned int dev0, dev1 = 0, devmask = 0;
2425
2426 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2427
2428 /* determine if device 0/1 are present */
2429 if (ap->flags & ATA_FLAG_SATA_RESET)
2430 dev0 = 1;
2431 else {
2432 dev0 = ata_devchk(ap, 0);
2433 if (slave_possible)
2434 dev1 = ata_devchk(ap, 1);
2435 }
2436
2437 if (dev0)
2438 devmask |= (1 << 0);
2439 if (dev1)
2440 devmask |= (1 << 1);
2441
2442 /* select device 0 again */
2443 ap->ops->dev_select(ap, 0);
2444
2445 /* issue bus reset */
2446 if (ap->flags & ATA_FLAG_SRST)
2447 if (ata_bus_softreset(ap, devmask))
2448 goto err_out;
2449
2450 /*
2451 * determine by signature whether we have ATA or ATAPI devices
2452 */
2453 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2454 if ((slave_possible) && (err != 0x81))
2455 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2456
2457 /* re-enable interrupts */
2458 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2459 ata_irq_on(ap);
2460
2461 /* is double-select really necessary? */
2462 if (ap->device[1].class != ATA_DEV_NONE)
2463 ap->ops->dev_select(ap, 1);
2464 if (ap->device[0].class != ATA_DEV_NONE)
2465 ap->ops->dev_select(ap, 0);
2466
2467 /* if no devices were detected, disable this port */
2468 if ((ap->device[0].class == ATA_DEV_NONE) &&
2469 (ap->device[1].class == ATA_DEV_NONE))
2470 goto err_out;
2471
2472 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2473 /* set up device control for ATA_FLAG_SATA_RESET */
2474 if (ap->flags & ATA_FLAG_MMIO)
2475 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2476 else
2477 outb(ap->ctl, ioaddr->ctl_addr);
2478 }
2479
2480 DPRINTK("EXIT\n");
2481 return;
2482
2483err_out:
2484 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2485 ap->ops->port_disable(ap);
2486
2487 DPRINTK("EXIT\n");
2488}
2489
2490/**
2491 * sata_phy_debounce - debounce SATA phy status
2492 * @ap: ATA port to debounce SATA phy status for
2493 * @params: timing parameters { interval, duratinon, timeout } in msec
2494 *
2495 * Make sure SStatus of @ap reaches stable state, determined by
2496 * holding the same value where DET is not 1 for @duration polled
2497 * every @interval, before @timeout. Timeout constraints the
2498 * beginning of the stable state. Because, after hot unplugging,
2499 * DET gets stuck at 1 on some controllers, this functions waits
2500 * until timeout then returns 0 if DET is stable at 1.
2501 *
2502 * LOCKING:
2503 * Kernel thread context (may sleep)
2504 *
2505 * RETURNS:
2506 * 0 on success, -errno on failure.
2507 */
2508int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2509{
2510 unsigned long interval_msec = params[0];
2511 unsigned long duration = params[1] * HZ / 1000;
2512 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2513 unsigned long last_jiffies;
2514 u32 last, cur;
2515 int rc;
2516
2517 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2518 return rc;
2519 cur &= 0xf;
2520
2521 last = cur;
2522 last_jiffies = jiffies;
2523
2524 while (1) {
2525 msleep(interval_msec);
2526 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2527 return rc;
2528 cur &= 0xf;
2529
2530 /* DET stable? */
2531 if (cur == last) {
2532 if (cur == 1 && time_before(jiffies, timeout))
2533 continue;
2534 if (time_after(jiffies, last_jiffies + duration))
2535 return 0;
2536 continue;
2537 }
2538
2539 /* unstable, start over */
2540 last = cur;
2541 last_jiffies = jiffies;
2542
2543 /* check timeout */
2544 if (time_after(jiffies, timeout))
2545 return -EBUSY;
2546 }
2547}
2548
2549/**
2550 * sata_phy_resume - resume SATA phy
2551 * @ap: ATA port to resume SATA phy for
2552 * @params: timing parameters { interval, duratinon, timeout } in msec
2553 *
2554 * Resume SATA phy of @ap and debounce it.
2555 *
2556 * LOCKING:
2557 * Kernel thread context (may sleep)
2558 *
2559 * RETURNS:
2560 * 0 on success, -errno on failure.
2561 */
2562int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2563{
2564 u32 scontrol;
2565 int rc;
2566
2567 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2568 return rc;
2569
2570 scontrol = (scontrol & 0x0f0) | 0x300;
2571
2572 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2573 return rc;
2574
2575 /* Some PHYs react badly if SStatus is pounded immediately
2576 * after resuming. Delay 200ms before debouncing.
2577 */
2578 msleep(200);
2579
2580 return sata_phy_debounce(ap, params);
2581}
2582
2583static void ata_wait_spinup(struct ata_port *ap)
2584{
2585 struct ata_eh_context *ehc = &ap->eh_context;
2586 unsigned long end, secs;
2587 int rc;
2588
2589 /* first, debounce phy if SATA */
2590 if (ap->cbl == ATA_CBL_SATA) {
2591 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2592
2593 /* if debounced successfully and offline, no need to wait */
2594 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2595 return;
2596 }
2597
2598 /* okay, let's give the drive time to spin up */
2599 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2600 secs = ((end - jiffies) + HZ - 1) / HZ;
2601
2602 if (time_after(jiffies, end))
2603 return;
2604
2605 if (secs > 5)
2606 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2607 "(%lu secs)\n", secs);
2608
2609 schedule_timeout_uninterruptible(end - jiffies);
2610}
2611
2612/**
2613 * ata_std_prereset - prepare for reset
2614 * @ap: ATA port to be reset
2615 *
2616 * @ap is about to be reset. Initialize it.
2617 *
2618 * LOCKING:
2619 * Kernel thread context (may sleep)
2620 *
2621 * RETURNS:
2622 * 0 on success, -errno otherwise.
2623 */
2624int ata_std_prereset(struct ata_port *ap)
2625{
2626 struct ata_eh_context *ehc = &ap->eh_context;
2627 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2628 int rc;
2629
2630 /* handle link resume & hotplug spinup */
2631 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2632 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2633 ehc->i.action |= ATA_EH_HARDRESET;
2634
2635 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2636 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2637 ata_wait_spinup(ap);
2638
2639 /* if we're about to do hardreset, nothing more to do */
2640 if (ehc->i.action & ATA_EH_HARDRESET)
2641 return 0;
2642
2643 /* if SATA, resume phy */
2644 if (ap->cbl == ATA_CBL_SATA) {
2645 rc = sata_phy_resume(ap, timing);
2646 if (rc && rc != -EOPNOTSUPP) {
2647 /* phy resume failed */
2648 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2649 "link for reset (errno=%d)\n", rc);
2650 return rc;
2651 }
2652 }
2653
2654 /* Wait for !BSY if the controller can wait for the first D2H
2655 * Reg FIS and we don't know that no device is attached.
2656 */
2657 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2658 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2659
2660 return 0;
2661}
2662
2663/**
2664 * ata_std_softreset - reset host port via ATA SRST
2665 * @ap: port to reset
2666 * @classes: resulting classes of attached devices
2667 *
2668 * Reset host port using ATA SRST.
2669 *
2670 * LOCKING:
2671 * Kernel thread context (may sleep)
2672 *
2673 * RETURNS:
2674 * 0 on success, -errno otherwise.
2675 */
2676int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2677{
2678 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2679 unsigned int devmask = 0, err_mask;
2680 u8 err;
2681
2682 DPRINTK("ENTER\n");
2683
2684 if (ata_port_offline(ap)) {
2685 classes[0] = ATA_DEV_NONE;
2686 goto out;
2687 }
2688
2689 /* determine if device 0/1 are present */
2690 if (ata_devchk(ap, 0))
2691 devmask |= (1 << 0);
2692 if (slave_possible && ata_devchk(ap, 1))
2693 devmask |= (1 << 1);
2694
2695 /* select device 0 again */
2696 ap->ops->dev_select(ap, 0);
2697
2698 /* issue bus reset */
2699 DPRINTK("about to softreset, devmask=%x\n", devmask);
2700 err_mask = ata_bus_softreset(ap, devmask);
2701 if (err_mask) {
2702 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2703 err_mask);
2704 return -EIO;
2705 }
2706
2707 /* determine by signature whether we have ATA or ATAPI devices */
2708 classes[0] = ata_dev_try_classify(ap, 0, &err);
2709 if (slave_possible && err != 0x81)
2710 classes[1] = ata_dev_try_classify(ap, 1, &err);
2711
2712 out:
2713 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2714 return 0;
2715}
2716
2717/**
2718 * sata_std_hardreset - reset host port via SATA phy reset
2719 * @ap: port to reset
2720 * @class: resulting class of attached device
2721 *
2722 * SATA phy-reset host port using DET bits of SControl register.
2723 *
2724 * LOCKING:
2725 * Kernel thread context (may sleep)
2726 *
2727 * RETURNS:
2728 * 0 on success, -errno otherwise.
2729 */
2730int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2731{
2732 struct ata_eh_context *ehc = &ap->eh_context;
2733 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2734 u32 scontrol;
2735 int rc;
2736
2737 DPRINTK("ENTER\n");
2738
2739 if (sata_set_spd_needed(ap)) {
2740 /* SATA spec says nothing about how to reconfigure
2741 * spd. To be on the safe side, turn off phy during
2742 * reconfiguration. This works for at least ICH7 AHCI
2743 * and Sil3124.
2744 */
2745 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2746 return rc;
2747
2748 scontrol = (scontrol & 0x0f0) | 0x304;
2749
2750 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2751 return rc;
2752
2753 sata_set_spd(ap);
2754 }
2755
2756 /* issue phy wake/reset */
2757 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2758 return rc;
2759
2760 scontrol = (scontrol & 0x0f0) | 0x301;
2761
2762 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2763 return rc;
2764
2765 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2766 * 10.4.2 says at least 1 ms.
2767 */
2768 msleep(1);
2769
2770 /* bring phy back */
2771 sata_phy_resume(ap, timing);
2772
2773 /* TODO: phy layer with polling, timeouts, etc. */
2774 if (ata_port_offline(ap)) {
2775 *class = ATA_DEV_NONE;
2776 DPRINTK("EXIT, link offline\n");
2777 return 0;
2778 }
2779
2780 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2781 ata_port_printk(ap, KERN_ERR,
2782 "COMRESET failed (device not ready)\n");
2783 return -EIO;
2784 }
2785
2786 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2787
2788 *class = ata_dev_try_classify(ap, 0, NULL);
2789
2790 DPRINTK("EXIT, class=%u\n", *class);
2791 return 0;
2792}
2793
2794/**
2795 * ata_std_postreset - standard postreset callback
2796 * @ap: the target ata_port
2797 * @classes: classes of attached devices
2798 *
2799 * This function is invoked after a successful reset. Note that
2800 * the device might have been reset more than once using
2801 * different reset methods before postreset is invoked.
2802 *
2803 * LOCKING:
2804 * Kernel thread context (may sleep)
2805 */
2806void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2807{
2808 u32 serror;
2809
2810 DPRINTK("ENTER\n");
2811
2812 /* print link status */
2813 sata_print_link_status(ap);
2814
2815 /* clear SError */
2816 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2817 sata_scr_write(ap, SCR_ERROR, serror);
2818
2819 /* re-enable interrupts */
2820 if (!ap->ops->error_handler) {
2821 /* FIXME: hack. create a hook instead */
2822 if (ap->ioaddr.ctl_addr)
2823 ata_irq_on(ap);
2824 }
2825
2826 /* is double-select really necessary? */
2827 if (classes[0] != ATA_DEV_NONE)
2828 ap->ops->dev_select(ap, 1);
2829 if (classes[1] != ATA_DEV_NONE)
2830 ap->ops->dev_select(ap, 0);
2831
2832 /* bail out if no device is present */
2833 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2834 DPRINTK("EXIT, no device\n");
2835 return;
2836 }
2837
2838 /* set up device control */
2839 if (ap->ioaddr.ctl_addr) {
2840 if (ap->flags & ATA_FLAG_MMIO)
2841 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2842 else
2843 outb(ap->ctl, ap->ioaddr.ctl_addr);
2844 }
2845
2846 DPRINTK("EXIT\n");
2847}
2848
2849/**
2850 * ata_dev_same_device - Determine whether new ID matches configured device
2851 * @dev: device to compare against
2852 * @new_class: class of the new device
2853 * @new_id: IDENTIFY page of the new device
2854 *
2855 * Compare @new_class and @new_id against @dev and determine
2856 * whether @dev is the device indicated by @new_class and
2857 * @new_id.
2858 *
2859 * LOCKING:
2860 * None.
2861 *
2862 * RETURNS:
2863 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2864 */
2865static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2866 const u16 *new_id)
2867{
2868 const u16 *old_id = dev->id;
2869 unsigned char model[2][41], serial[2][21];
2870 u64 new_n_sectors;
2871
2872 if (dev->class != new_class) {
2873 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2874 dev->class, new_class);
2875 return 0;
2876 }
2877
2878 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2879 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2880 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2881 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2882 new_n_sectors = ata_id_n_sectors(new_id);
2883
2884 if (strcmp(model[0], model[1])) {
2885 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2886 "'%s' != '%s'\n", model[0], model[1]);
2887 return 0;
2888 }
2889
2890 if (strcmp(serial[0], serial[1])) {
2891 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2892 "'%s' != '%s'\n", serial[0], serial[1]);
2893 return 0;
2894 }
2895
2896 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2897 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2898 "%llu != %llu\n",
2899 (unsigned long long)dev->n_sectors,
2900 (unsigned long long)new_n_sectors);
2901 return 0;
2902 }
2903
2904 return 1;
2905}
2906
2907/**
2908 * ata_dev_revalidate - Revalidate ATA device
2909 * @dev: device to revalidate
2910 * @post_reset: is this revalidation after reset?
2911 *
2912 * Re-read IDENTIFY page and make sure @dev is still attached to
2913 * the port.
2914 *
2915 * LOCKING:
2916 * Kernel thread context (may sleep)
2917 *
2918 * RETURNS:
2919 * 0 on success, negative errno otherwise
2920 */
2921int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2922{
2923 unsigned int class = dev->class;
2924 u16 *id = (void *)dev->ap->sector_buf;
2925 int rc;
2926
2927 if (!ata_dev_enabled(dev)) {
2928 rc = -ENODEV;
2929 goto fail;
2930 }
2931
2932 /* read ID data */
2933 rc = ata_dev_read_id(dev, &class, post_reset, id);
2934 if (rc)
2935 goto fail;
2936
2937 /* is the device still there? */
2938 if (!ata_dev_same_device(dev, class, id)) {
2939 rc = -ENODEV;
2940 goto fail;
2941 }
2942
2943 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2944
2945 /* configure device according to the new ID */
2946 rc = ata_dev_configure(dev, 0);
2947 if (rc == 0)
2948 return 0;
2949
2950 fail:
2951 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2952 return rc;
2953}
2954
2955static const char * const ata_dma_blacklist [] = {
2956 "WDC AC11000H", NULL,
2957 "WDC AC22100H", NULL,
2958 "WDC AC32500H", NULL,
2959 "WDC AC33100H", NULL,
2960 "WDC AC31600H", NULL,
2961 "WDC AC32100H", "24.09P07",
2962 "WDC AC23200L", "21.10N21",
2963 "Compaq CRD-8241B", NULL,
2964 "CRD-8400B", NULL,
2965 "CRD-8480B", NULL,
2966 "CRD-8482B", NULL,
2967 "CRD-84", NULL,
2968 "SanDisk SDP3B", NULL,
2969 "SanDisk SDP3B-64", NULL,
2970 "SANYO CD-ROM CRD", NULL,
2971 "HITACHI CDR-8", NULL,
2972 "HITACHI CDR-8335", NULL,
2973 "HITACHI CDR-8435", NULL,
2974 "Toshiba CD-ROM XM-6202B", NULL,
2975 "TOSHIBA CD-ROM XM-1702BC", NULL,
2976 "CD-532E-A", NULL,
2977 "E-IDE CD-ROM CR-840", NULL,
2978 "CD-ROM Drive/F5A", NULL,
2979 "WPI CDD-820", NULL,
2980 "SAMSUNG CD-ROM SC-148C", NULL,
2981 "SAMSUNG CD-ROM SC", NULL,
2982 "SanDisk SDP3B-64", NULL,
2983 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2984 "_NEC DV5800A", NULL,
2985 "SAMSUNG CD-ROM SN-124", "N001"
2986};
2987
2988static int ata_strim(char *s, size_t len)
2989{
2990 len = strnlen(s, len);
2991
2992 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2993 while ((len > 0) && (s[len - 1] == ' ')) {
2994 len--;
2995 s[len] = 0;
2996 }
2997 return len;
2998}
2999
3000static int ata_dma_blacklisted(const struct ata_device *dev)
3001{
3002 unsigned char model_num[40];
3003 unsigned char model_rev[16];
3004 unsigned int nlen, rlen;
3005 int i;
3006
3007 /* We don't support polling DMA.
3008 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3009 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3010 */
3011 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3012 (dev->flags & ATA_DFLAG_CDB_INTR))
3013 return 1;
3014
3015 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3016 sizeof(model_num));
3017 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3018 sizeof(model_rev));
3019 nlen = ata_strim(model_num, sizeof(model_num));
3020 rlen = ata_strim(model_rev, sizeof(model_rev));
3021
3022 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3023 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3024 if (ata_dma_blacklist[i+1] == NULL)
3025 return 1;
3026 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3027 return 1;
3028 }
3029 }
3030 return 0;
3031}
3032
3033/**
3034 * ata_dev_xfermask - Compute supported xfermask of the given device
3035 * @dev: Device to compute xfermask for
3036 *
3037 * Compute supported xfermask of @dev and store it in
3038 * dev->*_mask. This function is responsible for applying all
3039 * known limits including host controller limits, device
3040 * blacklist, etc...
3041 *
3042 * LOCKING:
3043 * None.
3044 */
3045static void ata_dev_xfermask(struct ata_device *dev)
3046{
3047 struct ata_port *ap = dev->ap;
3048 struct ata_host_set *hs = ap->host_set;
3049 unsigned long xfer_mask;
3050
3051 /* controller modes available */
3052 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3053 ap->mwdma_mask, ap->udma_mask);
3054
3055 /* Apply cable rule here. Don't apply it early because when
3056 * we handle hot plug the cable type can itself change.
3057 */
3058 if (ap->cbl == ATA_CBL_PATA40)
3059 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3060
3061 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3062 dev->mwdma_mask, dev->udma_mask);
3063 xfer_mask &= ata_id_xfermask(dev->id);
3064
3065 if (ata_dma_blacklisted(dev)) {
3066 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3067 ata_dev_printk(dev, KERN_WARNING,
3068 "device is on DMA blacklist, disabling DMA\n");
3069 }
3070
3071 if ((hs->flags & ATA_HOST_SIMPLEX) && hs->simplex_claimed) {
3072 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3073 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3074 "other device, disabling DMA\n");
3075 }
3076
3077 if (ap->ops->mode_filter)
3078 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3079
3080 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3081 &dev->mwdma_mask, &dev->udma_mask);
3082}
3083
3084/**
3085 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3086 * @dev: Device to which command will be sent
3087 *
3088 * Issue SET FEATURES - XFER MODE command to device @dev
3089 * on port @ap.
3090 *
3091 * LOCKING:
3092 * PCI/etc. bus probe sem.
3093 *
3094 * RETURNS:
3095 * 0 on success, AC_ERR_* mask otherwise.
3096 */
3097
3098static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3099{
3100 struct ata_taskfile tf;
3101 unsigned int err_mask;
3102
3103 /* set up set-features taskfile */
3104 DPRINTK("set features - xfer mode\n");
3105
3106 ata_tf_init(dev, &tf);
3107 tf.command = ATA_CMD_SET_FEATURES;
3108 tf.feature = SETFEATURES_XFER;
3109 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3110 tf.protocol = ATA_PROT_NODATA;
3111 tf.nsect = dev->xfer_mode;
3112
3113 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3114
3115 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3116 return err_mask;
3117}
3118
3119/**
3120 * ata_dev_init_params - Issue INIT DEV PARAMS command
3121 * @dev: Device to which command will be sent
3122 * @heads: Number of heads (taskfile parameter)
3123 * @sectors: Number of sectors (taskfile parameter)
3124 *
3125 * LOCKING:
3126 * Kernel thread context (may sleep)
3127 *
3128 * RETURNS:
3129 * 0 on success, AC_ERR_* mask otherwise.
3130 */
3131static unsigned int ata_dev_init_params(struct ata_device *dev,
3132 u16 heads, u16 sectors)
3133{
3134 struct ata_taskfile tf;
3135 unsigned int err_mask;
3136
3137 /* Number of sectors per track 1-255. Number of heads 1-16 */
3138 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3139 return AC_ERR_INVALID;
3140
3141 /* set up init dev params taskfile */
3142 DPRINTK("init dev params \n");
3143
3144 ata_tf_init(dev, &tf);
3145 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3146 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3147 tf.protocol = ATA_PROT_NODATA;
3148 tf.nsect = sectors;
3149 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3150
3151 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3152
3153 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3154 return err_mask;
3155}
3156
3157/**
3158 * ata_sg_clean - Unmap DMA memory associated with command
3159 * @qc: Command containing DMA memory to be released
3160 *
3161 * Unmap all mapped DMA memory associated with this command.
3162 *
3163 * LOCKING:
3164 * spin_lock_irqsave(host_set lock)
3165 */
3166
3167static void ata_sg_clean(struct ata_queued_cmd *qc)
3168{
3169 struct ata_port *ap = qc->ap;
3170 struct scatterlist *sg = qc->__sg;
3171 int dir = qc->dma_dir;
3172 void *pad_buf = NULL;
3173
3174 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3175 WARN_ON(sg == NULL);
3176
3177 if (qc->flags & ATA_QCFLAG_SINGLE)
3178 WARN_ON(qc->n_elem > 1);
3179
3180 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3181
3182 /* if we padded the buffer out to 32-bit bound, and data
3183 * xfer direction is from-device, we must copy from the
3184 * pad buffer back into the supplied buffer
3185 */
3186 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3187 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3188
3189 if (qc->flags & ATA_QCFLAG_SG) {
3190 if (qc->n_elem)
3191 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3192 /* restore last sg */
3193 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3194 if (pad_buf) {
3195 struct scatterlist *psg = &qc->pad_sgent;
3196 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3197 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3198 kunmap_atomic(addr, KM_IRQ0);
3199 }
3200 } else {
3201 if (qc->n_elem)
3202 dma_unmap_single(ap->dev,
3203 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3204 dir);
3205 /* restore sg */
3206 sg->length += qc->pad_len;
3207 if (pad_buf)
3208 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3209 pad_buf, qc->pad_len);
3210 }
3211
3212 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3213 qc->__sg = NULL;
3214}
3215
3216/**
3217 * ata_fill_sg - Fill PCI IDE PRD table
3218 * @qc: Metadata associated with taskfile to be transferred
3219 *
3220 * Fill PCI IDE PRD (scatter-gather) table with segments
3221 * associated with the current disk command.
3222 *
3223 * LOCKING:
3224 * spin_lock_irqsave(host_set lock)
3225 *
3226 */
3227static void ata_fill_sg(struct ata_queued_cmd *qc)
3228{
3229 struct ata_port *ap = qc->ap;
3230 struct scatterlist *sg;
3231 unsigned int idx;
3232
3233 WARN_ON(qc->__sg == NULL);
3234 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3235
3236 idx = 0;
3237 ata_for_each_sg(sg, qc) {
3238 u32 addr, offset;
3239 u32 sg_len, len;
3240
3241 /* determine if physical DMA addr spans 64K boundary.
3242 * Note h/w doesn't support 64-bit, so we unconditionally
3243 * truncate dma_addr_t to u32.
3244 */
3245 addr = (u32) sg_dma_address(sg);
3246 sg_len = sg_dma_len(sg);
3247
3248 while (sg_len) {
3249 offset = addr & 0xffff;
3250 len = sg_len;
3251 if ((offset + sg_len) > 0x10000)
3252 len = 0x10000 - offset;
3253
3254 ap->prd[idx].addr = cpu_to_le32(addr);
3255 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3256 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3257
3258 idx++;
3259 sg_len -= len;
3260 addr += len;
3261 }
3262 }
3263
3264 if (idx)
3265 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3266}
3267/**
3268 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3269 * @qc: Metadata associated with taskfile to check
3270 *
3271 * Allow low-level driver to filter ATA PACKET commands, returning
3272 * a status indicating whether or not it is OK to use DMA for the
3273 * supplied PACKET command.
3274 *
3275 * LOCKING:
3276 * spin_lock_irqsave(host_set lock)
3277 *
3278 * RETURNS: 0 when ATAPI DMA can be used
3279 * nonzero otherwise
3280 */
3281int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3282{
3283 struct ata_port *ap = qc->ap;
3284 int rc = 0; /* Assume ATAPI DMA is OK by default */
3285
3286 if (ap->ops->check_atapi_dma)
3287 rc = ap->ops->check_atapi_dma(qc);
3288
3289 return rc;
3290}
3291/**
3292 * ata_qc_prep - Prepare taskfile for submission
3293 * @qc: Metadata associated with taskfile to be prepared
3294 *
3295 * Prepare ATA taskfile for submission.
3296 *
3297 * LOCKING:
3298 * spin_lock_irqsave(host_set lock)
3299 */
3300void ata_qc_prep(struct ata_queued_cmd *qc)
3301{
3302 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3303 return;
3304
3305 ata_fill_sg(qc);
3306}
3307
3308void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3309
3310/**
3311 * ata_sg_init_one - Associate command with memory buffer
3312 * @qc: Command to be associated
3313 * @buf: Memory buffer
3314 * @buflen: Length of memory buffer, in bytes.
3315 *
3316 * Initialize the data-related elements of queued_cmd @qc
3317 * to point to a single memory buffer, @buf of byte length @buflen.
3318 *
3319 * LOCKING:
3320 * spin_lock_irqsave(host_set lock)
3321 */
3322
3323void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3324{
3325 struct scatterlist *sg;
3326
3327 qc->flags |= ATA_QCFLAG_SINGLE;
3328
3329 memset(&qc->sgent, 0, sizeof(qc->sgent));
3330 qc->__sg = &qc->sgent;
3331 qc->n_elem = 1;
3332 qc->orig_n_elem = 1;
3333 qc->buf_virt = buf;
3334 qc->nbytes = buflen;
3335
3336 sg = qc->__sg;
3337 sg_init_one(sg, buf, buflen);
3338}
3339
3340/**
3341 * ata_sg_init - Associate command with scatter-gather table.
3342 * @qc: Command to be associated
3343 * @sg: Scatter-gather table.
3344 * @n_elem: Number of elements in s/g table.
3345 *
3346 * Initialize the data-related elements of queued_cmd @qc
3347 * to point to a scatter-gather table @sg, containing @n_elem
3348 * elements.
3349 *
3350 * LOCKING:
3351 * spin_lock_irqsave(host_set lock)
3352 */
3353
3354void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3355 unsigned int n_elem)
3356{
3357 qc->flags |= ATA_QCFLAG_SG;
3358 qc->__sg = sg;
3359 qc->n_elem = n_elem;
3360 qc->orig_n_elem = n_elem;
3361}
3362
3363/**
3364 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3365 * @qc: Command with memory buffer to be mapped.
3366 *
3367 * DMA-map the memory buffer associated with queued_cmd @qc.
3368 *
3369 * LOCKING:
3370 * spin_lock_irqsave(host_set lock)
3371 *
3372 * RETURNS:
3373 * Zero on success, negative on error.
3374 */
3375
3376static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3377{
3378 struct ata_port *ap = qc->ap;
3379 int dir = qc->dma_dir;
3380 struct scatterlist *sg = qc->__sg;
3381 dma_addr_t dma_address;
3382 int trim_sg = 0;
3383
3384 /* we must lengthen transfers to end on a 32-bit boundary */
3385 qc->pad_len = sg->length & 3;
3386 if (qc->pad_len) {
3387 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3388 struct scatterlist *psg = &qc->pad_sgent;
3389
3390 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3391
3392 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3393
3394 if (qc->tf.flags & ATA_TFLAG_WRITE)
3395 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3396 qc->pad_len);
3397
3398 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3399 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3400 /* trim sg */
3401 sg->length -= qc->pad_len;
3402 if (sg->length == 0)
3403 trim_sg = 1;
3404
3405 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3406 sg->length, qc->pad_len);
3407 }
3408
3409 if (trim_sg) {
3410 qc->n_elem--;
3411 goto skip_map;
3412 }
3413
3414 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3415 sg->length, dir);
3416 if (dma_mapping_error(dma_address)) {
3417 /* restore sg */
3418 sg->length += qc->pad_len;
3419 return -1;
3420 }
3421
3422 sg_dma_address(sg) = dma_address;
3423 sg_dma_len(sg) = sg->length;
3424
3425skip_map:
3426 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3427 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3428
3429 return 0;
3430}
3431
3432/**
3433 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3434 * @qc: Command with scatter-gather table to be mapped.
3435 *
3436 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3437 *
3438 * LOCKING:
3439 * spin_lock_irqsave(host_set lock)
3440 *
3441 * RETURNS:
3442 * Zero on success, negative on error.
3443 *
3444 */
3445
3446static int ata_sg_setup(struct ata_queued_cmd *qc)
3447{
3448 struct ata_port *ap = qc->ap;
3449 struct scatterlist *sg = qc->__sg;
3450 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3451 int n_elem, pre_n_elem, dir, trim_sg = 0;
3452
3453 VPRINTK("ENTER, ata%u\n", ap->id);
3454 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3455
3456 /* we must lengthen transfers to end on a 32-bit boundary */
3457 qc->pad_len = lsg->length & 3;
3458 if (qc->pad_len) {
3459 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3460 struct scatterlist *psg = &qc->pad_sgent;
3461 unsigned int offset;
3462
3463 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3464
3465 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3466
3467 /*
3468 * psg->page/offset are used to copy to-be-written
3469 * data in this function or read data in ata_sg_clean.
3470 */
3471 offset = lsg->offset + lsg->length - qc->pad_len;
3472 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3473 psg->offset = offset_in_page(offset);
3474
3475 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3476 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3477 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3478 kunmap_atomic(addr, KM_IRQ0);
3479 }
3480
3481 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3482 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3483 /* trim last sg */
3484 lsg->length -= qc->pad_len;
3485 if (lsg->length == 0)
3486 trim_sg = 1;
3487
3488 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3489 qc->n_elem - 1, lsg->length, qc->pad_len);
3490 }
3491
3492 pre_n_elem = qc->n_elem;
3493 if (trim_sg && pre_n_elem)
3494 pre_n_elem--;
3495
3496 if (!pre_n_elem) {
3497 n_elem = 0;
3498 goto skip_map;
3499 }
3500
3501 dir = qc->dma_dir;
3502 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3503 if (n_elem < 1) {
3504 /* restore last sg */
3505 lsg->length += qc->pad_len;
3506 return -1;
3507 }
3508
3509 DPRINTK("%d sg elements mapped\n", n_elem);
3510
3511skip_map:
3512 qc->n_elem = n_elem;
3513
3514 return 0;
3515}
3516
3517/**
3518 * swap_buf_le16 - swap halves of 16-bit words in place
3519 * @buf: Buffer to swap
3520 * @buf_words: Number of 16-bit words in buffer.
3521 *
3522 * Swap halves of 16-bit words if needed to convert from
3523 * little-endian byte order to native cpu byte order, or
3524 * vice-versa.
3525 *
3526 * LOCKING:
3527 * Inherited from caller.
3528 */
3529void swap_buf_le16(u16 *buf, unsigned int buf_words)
3530{
3531#ifdef __BIG_ENDIAN
3532 unsigned int i;
3533
3534 for (i = 0; i < buf_words; i++)
3535 buf[i] = le16_to_cpu(buf[i]);
3536#endif /* __BIG_ENDIAN */
3537}
3538
3539/**
3540 * ata_mmio_data_xfer - Transfer data by MMIO
3541 * @adev: device for this I/O
3542 * @buf: data buffer
3543 * @buflen: buffer length
3544 * @write_data: read/write
3545 *
3546 * Transfer data from/to the device data register by MMIO.
3547 *
3548 * LOCKING:
3549 * Inherited from caller.
3550 */
3551
3552void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3553 unsigned int buflen, int write_data)
3554{
3555 struct ata_port *ap = adev->ap;
3556 unsigned int i;
3557 unsigned int words = buflen >> 1;
3558 u16 *buf16 = (u16 *) buf;
3559 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3560
3561 /* Transfer multiple of 2 bytes */
3562 if (write_data) {
3563 for (i = 0; i < words; i++)
3564 writew(le16_to_cpu(buf16[i]), mmio);
3565 } else {
3566 for (i = 0; i < words; i++)
3567 buf16[i] = cpu_to_le16(readw(mmio));
3568 }
3569
3570 /* Transfer trailing 1 byte, if any. */
3571 if (unlikely(buflen & 0x01)) {
3572 u16 align_buf[1] = { 0 };
3573 unsigned char *trailing_buf = buf + buflen - 1;
3574
3575 if (write_data) {
3576 memcpy(align_buf, trailing_buf, 1);
3577 writew(le16_to_cpu(align_buf[0]), mmio);
3578 } else {
3579 align_buf[0] = cpu_to_le16(readw(mmio));
3580 memcpy(trailing_buf, align_buf, 1);
3581 }
3582 }
3583}
3584
3585/**
3586 * ata_pio_data_xfer - Transfer data by PIO
3587 * @adev: device to target
3588 * @buf: data buffer
3589 * @buflen: buffer length
3590 * @write_data: read/write
3591 *
3592 * Transfer data from/to the device data register by PIO.
3593 *
3594 * LOCKING:
3595 * Inherited from caller.
3596 */
3597
3598void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3599 unsigned int buflen, int write_data)
3600{
3601 struct ata_port *ap = adev->ap;
3602 unsigned int words = buflen >> 1;
3603
3604 /* Transfer multiple of 2 bytes */
3605 if (write_data)
3606 outsw(ap->ioaddr.data_addr, buf, words);
3607 else
3608 insw(ap->ioaddr.data_addr, buf, words);
3609
3610 /* Transfer trailing 1 byte, if any. */
3611 if (unlikely(buflen & 0x01)) {
3612 u16 align_buf[1] = { 0 };
3613 unsigned char *trailing_buf = buf + buflen - 1;
3614
3615 if (write_data) {
3616 memcpy(align_buf, trailing_buf, 1);
3617 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3618 } else {
3619 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3620 memcpy(trailing_buf, align_buf, 1);
3621 }
3622 }
3623}
3624
3625/**
3626 * ata_pio_data_xfer_noirq - Transfer data by PIO
3627 * @adev: device to target
3628 * @buf: data buffer
3629 * @buflen: buffer length
3630 * @write_data: read/write
3631 *
3632 * Transfer data from/to the device data register by PIO. Do the
3633 * transfer with interrupts disabled.
3634 *
3635 * LOCKING:
3636 * Inherited from caller.
3637 */
3638
3639void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3640 unsigned int buflen, int write_data)
3641{
3642 unsigned long flags;
3643 local_irq_save(flags);
3644 ata_pio_data_xfer(adev, buf, buflen, write_data);
3645 local_irq_restore(flags);
3646}
3647
3648
3649/**
3650 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3651 * @qc: Command on going
3652 *
3653 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3654 *
3655 * LOCKING:
3656 * Inherited from caller.
3657 */
3658
3659static void ata_pio_sector(struct ata_queued_cmd *qc)
3660{
3661 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3662 struct scatterlist *sg = qc->__sg;
3663 struct ata_port *ap = qc->ap;
3664 struct page *page;
3665 unsigned int offset;
3666 unsigned char *buf;
3667
3668 if (qc->cursect == (qc->nsect - 1))
3669 ap->hsm_task_state = HSM_ST_LAST;
3670
3671 page = sg[qc->cursg].page;
3672 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3673
3674 /* get the current page and offset */
3675 page = nth_page(page, (offset >> PAGE_SHIFT));
3676 offset %= PAGE_SIZE;
3677
3678 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3679
3680 if (PageHighMem(page)) {
3681 unsigned long flags;
3682
3683 /* FIXME: use a bounce buffer */
3684 local_irq_save(flags);
3685 buf = kmap_atomic(page, KM_IRQ0);
3686
3687 /* do the actual data transfer */
3688 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3689
3690 kunmap_atomic(buf, KM_IRQ0);
3691 local_irq_restore(flags);
3692 } else {
3693 buf = page_address(page);
3694 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3695 }
3696
3697 qc->cursect++;
3698 qc->cursg_ofs++;
3699
3700 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3701 qc->cursg++;
3702 qc->cursg_ofs = 0;
3703 }
3704}
3705
3706/**
3707 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3708 * @qc: Command on going
3709 *
3710 * Transfer one or many ATA_SECT_SIZE of data from/to the
3711 * ATA device for the DRQ request.
3712 *
3713 * LOCKING:
3714 * Inherited from caller.
3715 */
3716
3717static void ata_pio_sectors(struct ata_queued_cmd *qc)
3718{
3719 if (is_multi_taskfile(&qc->tf)) {
3720 /* READ/WRITE MULTIPLE */
3721 unsigned int nsect;
3722
3723 WARN_ON(qc->dev->multi_count == 0);
3724
3725 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3726 while (nsect--)
3727 ata_pio_sector(qc);
3728 } else
3729 ata_pio_sector(qc);
3730}
3731
3732/**
3733 * atapi_send_cdb - Write CDB bytes to hardware
3734 * @ap: Port to which ATAPI device is attached.
3735 * @qc: Taskfile currently active
3736 *
3737 * When device has indicated its readiness to accept
3738 * a CDB, this function is called. Send the CDB.
3739 *
3740 * LOCKING:
3741 * caller.
3742 */
3743
3744static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3745{
3746 /* send SCSI cdb */
3747 DPRINTK("send cdb\n");
3748 WARN_ON(qc->dev->cdb_len < 12);
3749
3750 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3751 ata_altstatus(ap); /* flush */
3752
3753 switch (qc->tf.protocol) {
3754 case ATA_PROT_ATAPI:
3755 ap->hsm_task_state = HSM_ST;
3756 break;
3757 case ATA_PROT_ATAPI_NODATA:
3758 ap->hsm_task_state = HSM_ST_LAST;
3759 break;
3760 case ATA_PROT_ATAPI_DMA:
3761 ap->hsm_task_state = HSM_ST_LAST;
3762 /* initiate bmdma */
3763 ap->ops->bmdma_start(qc);
3764 break;
3765 }
3766}
3767
3768/**
3769 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3770 * @qc: Command on going
3771 * @bytes: number of bytes
3772 *
3773 * Transfer Transfer data from/to the ATAPI device.
3774 *
3775 * LOCKING:
3776 * Inherited from caller.
3777 *
3778 */
3779
3780static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3781{
3782 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3783 struct scatterlist *sg = qc->__sg;
3784 struct ata_port *ap = qc->ap;
3785 struct page *page;
3786 unsigned char *buf;
3787 unsigned int offset, count;
3788
3789 if (qc->curbytes + bytes >= qc->nbytes)
3790 ap->hsm_task_state = HSM_ST_LAST;
3791
3792next_sg:
3793 if (unlikely(qc->cursg >= qc->n_elem)) {
3794 /*
3795 * The end of qc->sg is reached and the device expects
3796 * more data to transfer. In order not to overrun qc->sg
3797 * and fulfill length specified in the byte count register,
3798 * - for read case, discard trailing data from the device
3799 * - for write case, padding zero data to the device
3800 */
3801 u16 pad_buf[1] = { 0 };
3802 unsigned int words = bytes >> 1;
3803 unsigned int i;
3804
3805 if (words) /* warning if bytes > 1 */
3806 ata_dev_printk(qc->dev, KERN_WARNING,
3807 "%u bytes trailing data\n", bytes);
3808
3809 for (i = 0; i < words; i++)
3810 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3811
3812 ap->hsm_task_state = HSM_ST_LAST;
3813 return;
3814 }
3815
3816 sg = &qc->__sg[qc->cursg];
3817
3818 page = sg->page;
3819 offset = sg->offset + qc->cursg_ofs;
3820
3821 /* get the current page and offset */
3822 page = nth_page(page, (offset >> PAGE_SHIFT));
3823 offset %= PAGE_SIZE;
3824
3825 /* don't overrun current sg */
3826 count = min(sg->length - qc->cursg_ofs, bytes);
3827
3828 /* don't cross page boundaries */
3829 count = min(count, (unsigned int)PAGE_SIZE - offset);
3830
3831 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3832
3833 if (PageHighMem(page)) {
3834 unsigned long flags;
3835
3836 /* FIXME: use bounce buffer */
3837 local_irq_save(flags);
3838 buf = kmap_atomic(page, KM_IRQ0);
3839
3840 /* do the actual data transfer */
3841 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3842
3843 kunmap_atomic(buf, KM_IRQ0);
3844 local_irq_restore(flags);
3845 } else {
3846 buf = page_address(page);
3847 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3848 }
3849
3850 bytes -= count;
3851 qc->curbytes += count;
3852 qc->cursg_ofs += count;
3853
3854 if (qc->cursg_ofs == sg->length) {
3855 qc->cursg++;
3856 qc->cursg_ofs = 0;
3857 }
3858
3859 if (bytes)
3860 goto next_sg;
3861}
3862
3863/**
3864 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3865 * @qc: Command on going
3866 *
3867 * Transfer Transfer data from/to the ATAPI device.
3868 *
3869 * LOCKING:
3870 * Inherited from caller.
3871 */
3872
3873static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3874{
3875 struct ata_port *ap = qc->ap;
3876 struct ata_device *dev = qc->dev;
3877 unsigned int ireason, bc_lo, bc_hi, bytes;
3878 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3879
3880 /* Abuse qc->result_tf for temp storage of intermediate TF
3881 * here to save some kernel stack usage.
3882 * For normal completion, qc->result_tf is not relevant. For
3883 * error, qc->result_tf is later overwritten by ata_qc_complete().
3884 * So, the correctness of qc->result_tf is not affected.
3885 */
3886 ap->ops->tf_read(ap, &qc->result_tf);
3887 ireason = qc->result_tf.nsect;
3888 bc_lo = qc->result_tf.lbam;
3889 bc_hi = qc->result_tf.lbah;
3890 bytes = (bc_hi << 8) | bc_lo;
3891
3892 /* shall be cleared to zero, indicating xfer of data */
3893 if (ireason & (1 << 0))
3894 goto err_out;
3895
3896 /* make sure transfer direction matches expected */
3897 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3898 if (do_write != i_write)
3899 goto err_out;
3900
3901 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3902
3903 __atapi_pio_bytes(qc, bytes);
3904
3905 return;
3906
3907err_out:
3908 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3909 qc->err_mask |= AC_ERR_HSM;
3910 ap->hsm_task_state = HSM_ST_ERR;
3911}
3912
3913/**
3914 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3915 * @ap: the target ata_port
3916 * @qc: qc on going
3917 *
3918 * RETURNS:
3919 * 1 if ok in workqueue, 0 otherwise.
3920 */
3921
3922static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3923{
3924 if (qc->tf.flags & ATA_TFLAG_POLLING)
3925 return 1;
3926
3927 if (ap->hsm_task_state == HSM_ST_FIRST) {
3928 if (qc->tf.protocol == ATA_PROT_PIO &&
3929 (qc->tf.flags & ATA_TFLAG_WRITE))
3930 return 1;
3931
3932 if (is_atapi_taskfile(&qc->tf) &&
3933 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3934 return 1;
3935 }
3936
3937 return 0;
3938}
3939
3940/**
3941 * ata_hsm_qc_complete - finish a qc running on standard HSM
3942 * @qc: Command to complete
3943 * @in_wq: 1 if called from workqueue, 0 otherwise
3944 *
3945 * Finish @qc which is running on standard HSM.
3946 *
3947 * LOCKING:
3948 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3949 * Otherwise, none on entry and grabs host lock.
3950 */
3951static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3952{
3953 struct ata_port *ap = qc->ap;
3954 unsigned long flags;
3955
3956 if (ap->ops->error_handler) {
3957 if (in_wq) {
3958 spin_lock_irqsave(ap->lock, flags);
3959
3960 /* EH might have kicked in while host_set lock
3961 * is released.
3962 */
3963 qc = ata_qc_from_tag(ap, qc->tag);
3964 if (qc) {
3965 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3966 ata_irq_on(ap);
3967 ata_qc_complete(qc);
3968 } else
3969 ata_port_freeze(ap);
3970 }
3971
3972 spin_unlock_irqrestore(ap->lock, flags);
3973 } else {
3974 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3975 ata_qc_complete(qc);
3976 else
3977 ata_port_freeze(ap);
3978 }
3979 } else {
3980 if (in_wq) {
3981 spin_lock_irqsave(ap->lock, flags);
3982 ata_irq_on(ap);
3983 ata_qc_complete(qc);
3984 spin_unlock_irqrestore(ap->lock, flags);
3985 } else
3986 ata_qc_complete(qc);
3987 }
3988
3989 ata_altstatus(ap); /* flush */
3990}
3991
3992/**
3993 * ata_hsm_move - move the HSM to the next state.
3994 * @ap: the target ata_port
3995 * @qc: qc on going
3996 * @status: current device status
3997 * @in_wq: 1 if called from workqueue, 0 otherwise
3998 *
3999 * RETURNS:
4000 * 1 when poll next status needed, 0 otherwise.
4001 */
4002int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4003 u8 status, int in_wq)
4004{
4005 unsigned long flags = 0;
4006 int poll_next;
4007
4008 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4009
4010 /* Make sure ata_qc_issue_prot() does not throw things
4011 * like DMA polling into the workqueue. Notice that
4012 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4013 */
4014 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4015
4016fsm_start:
4017 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4018 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4019
4020 switch (ap->hsm_task_state) {
4021 case HSM_ST_FIRST:
4022 /* Send first data block or PACKET CDB */
4023
4024 /* If polling, we will stay in the work queue after
4025 * sending the data. Otherwise, interrupt handler
4026 * takes over after sending the data.
4027 */
4028 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4029
4030 /* check device status */
4031 if (unlikely((status & ATA_DRQ) == 0)) {
4032 /* handle BSY=0, DRQ=0 as error */
4033 if (likely(status & (ATA_ERR | ATA_DF)))
4034 /* device stops HSM for abort/error */
4035 qc->err_mask |= AC_ERR_DEV;
4036 else
4037 /* HSM violation. Let EH handle this */
4038 qc->err_mask |= AC_ERR_HSM;
4039
4040 ap->hsm_task_state = HSM_ST_ERR;
4041 goto fsm_start;
4042 }
4043
4044 /* Device should not ask for data transfer (DRQ=1)
4045 * when it finds something wrong.
4046 * We ignore DRQ here and stop the HSM by
4047 * changing hsm_task_state to HSM_ST_ERR and
4048 * let the EH abort the command or reset the device.
4049 */
4050 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4051 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4052 ap->id, status);
4053 qc->err_mask |= AC_ERR_HSM;
4054 ap->hsm_task_state = HSM_ST_ERR;
4055 goto fsm_start;
4056 }
4057
4058 /* Send the CDB (atapi) or the first data block (ata pio out).
4059 * During the state transition, interrupt handler shouldn't
4060 * be invoked before the data transfer is complete and
4061 * hsm_task_state is changed. Hence, the following locking.
4062 */
4063 if (in_wq)
4064 spin_lock_irqsave(ap->lock, flags);
4065
4066 if (qc->tf.protocol == ATA_PROT_PIO) {
4067 /* PIO data out protocol.
4068 * send first data block.
4069 */
4070
4071 /* ata_pio_sectors() might change the state
4072 * to HSM_ST_LAST. so, the state is changed here
4073 * before ata_pio_sectors().
4074 */
4075 ap->hsm_task_state = HSM_ST;
4076 ata_pio_sectors(qc);
4077 ata_altstatus(ap); /* flush */
4078 } else
4079 /* send CDB */
4080 atapi_send_cdb(ap, qc);
4081
4082 if (in_wq)
4083 spin_unlock_irqrestore(ap->lock, flags);
4084
4085 /* if polling, ata_pio_task() handles the rest.
4086 * otherwise, interrupt handler takes over from here.
4087 */
4088 break;
4089
4090 case HSM_ST:
4091 /* complete command or read/write the data register */
4092 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4093 /* ATAPI PIO protocol */
4094 if ((status & ATA_DRQ) == 0) {
4095 /* No more data to transfer or device error.
4096 * Device error will be tagged in HSM_ST_LAST.
4097 */
4098 ap->hsm_task_state = HSM_ST_LAST;
4099 goto fsm_start;
4100 }
4101
4102 /* Device should not ask for data transfer (DRQ=1)
4103 * when it finds something wrong.
4104 * We ignore DRQ here and stop the HSM by
4105 * changing hsm_task_state to HSM_ST_ERR and
4106 * let the EH abort the command or reset the device.
4107 */
4108 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4109 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4110 ap->id, status);
4111 qc->err_mask |= AC_ERR_HSM;
4112 ap->hsm_task_state = HSM_ST_ERR;
4113 goto fsm_start;
4114 }
4115
4116 atapi_pio_bytes(qc);
4117
4118 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4119 /* bad ireason reported by device */
4120 goto fsm_start;
4121
4122 } else {
4123 /* ATA PIO protocol */
4124 if (unlikely((status & ATA_DRQ) == 0)) {
4125 /* handle BSY=0, DRQ=0 as error */
4126 if (likely(status & (ATA_ERR | ATA_DF)))
4127 /* device stops HSM for abort/error */
4128 qc->err_mask |= AC_ERR_DEV;
4129 else
4130 /* HSM violation. Let EH handle this */
4131 qc->err_mask |= AC_ERR_HSM;
4132
4133 ap->hsm_task_state = HSM_ST_ERR;
4134 goto fsm_start;
4135 }
4136
4137 /* For PIO reads, some devices may ask for
4138 * data transfer (DRQ=1) alone with ERR=1.
4139 * We respect DRQ here and transfer one
4140 * block of junk data before changing the
4141 * hsm_task_state to HSM_ST_ERR.
4142 *
4143 * For PIO writes, ERR=1 DRQ=1 doesn't make
4144 * sense since the data block has been
4145 * transferred to the device.
4146 */
4147 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4148 /* data might be corrputed */
4149 qc->err_mask |= AC_ERR_DEV;
4150
4151 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4152 ata_pio_sectors(qc);
4153 ata_altstatus(ap);
4154 status = ata_wait_idle(ap);
4155 }
4156
4157 if (status & (ATA_BUSY | ATA_DRQ))
4158 qc->err_mask |= AC_ERR_HSM;
4159
4160 /* ata_pio_sectors() might change the
4161 * state to HSM_ST_LAST. so, the state
4162 * is changed after ata_pio_sectors().
4163 */
4164 ap->hsm_task_state = HSM_ST_ERR;
4165 goto fsm_start;
4166 }
4167
4168 ata_pio_sectors(qc);
4169
4170 if (ap->hsm_task_state == HSM_ST_LAST &&
4171 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4172 /* all data read */
4173 ata_altstatus(ap);
4174 status = ata_wait_idle(ap);
4175 goto fsm_start;
4176 }
4177 }
4178
4179 ata_altstatus(ap); /* flush */
4180 poll_next = 1;
4181 break;
4182
4183 case HSM_ST_LAST:
4184 if (unlikely(!ata_ok(status))) {
4185 qc->err_mask |= __ac_err_mask(status);
4186 ap->hsm_task_state = HSM_ST_ERR;
4187 goto fsm_start;
4188 }
4189
4190 /* no more data to transfer */
4191 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4192 ap->id, qc->dev->devno, status);
4193
4194 WARN_ON(qc->err_mask);
4195
4196 ap->hsm_task_state = HSM_ST_IDLE;
4197
4198 /* complete taskfile transaction */
4199 ata_hsm_qc_complete(qc, in_wq);
4200
4201 poll_next = 0;
4202 break;
4203
4204 case HSM_ST_ERR:
4205 /* make sure qc->err_mask is available to
4206 * know what's wrong and recover
4207 */
4208 WARN_ON(qc->err_mask == 0);
4209
4210 ap->hsm_task_state = HSM_ST_IDLE;
4211
4212 /* complete taskfile transaction */
4213 ata_hsm_qc_complete(qc, in_wq);
4214
4215 poll_next = 0;
4216 break;
4217 default:
4218 poll_next = 0;
4219 BUG();
4220 }
4221
4222 return poll_next;
4223}
4224
4225static void ata_pio_task(void *_data)
4226{
4227 struct ata_queued_cmd *qc = _data;
4228 struct ata_port *ap = qc->ap;
4229 u8 status;
4230 int poll_next;
4231
4232fsm_start:
4233 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4234
4235 /*
4236 * This is purely heuristic. This is a fast path.
4237 * Sometimes when we enter, BSY will be cleared in
4238 * a chk-status or two. If not, the drive is probably seeking
4239 * or something. Snooze for a couple msecs, then
4240 * chk-status again. If still busy, queue delayed work.
4241 */
4242 status = ata_busy_wait(ap, ATA_BUSY, 5);
4243 if (status & ATA_BUSY) {
4244 msleep(2);
4245 status = ata_busy_wait(ap, ATA_BUSY, 10);
4246 if (status & ATA_BUSY) {
4247 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4248 return;
4249 }
4250 }
4251
4252 /* move the HSM */
4253 poll_next = ata_hsm_move(ap, qc, status, 1);
4254
4255 /* another command or interrupt handler
4256 * may be running at this point.
4257 */
4258 if (poll_next)
4259 goto fsm_start;
4260}
4261
4262/**
4263 * ata_qc_new - Request an available ATA command, for queueing
4264 * @ap: Port associated with device @dev
4265 * @dev: Device from whom we request an available command structure
4266 *
4267 * LOCKING:
4268 * None.
4269 */
4270
4271static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4272{
4273 struct ata_queued_cmd *qc = NULL;
4274 unsigned int i;
4275
4276 /* no command while frozen */
4277 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4278 return NULL;
4279
4280 /* the last tag is reserved for internal command. */
4281 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4282 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4283 qc = __ata_qc_from_tag(ap, i);
4284 break;
4285 }
4286
4287 if (qc)
4288 qc->tag = i;
4289
4290 return qc;
4291}
4292
4293/**
4294 * ata_qc_new_init - Request an available ATA command, and initialize it
4295 * @dev: Device from whom we request an available command structure
4296 *
4297 * LOCKING:
4298 * None.
4299 */
4300
4301struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4302{
4303 struct ata_port *ap = dev->ap;
4304 struct ata_queued_cmd *qc;
4305
4306 qc = ata_qc_new(ap);
4307 if (qc) {
4308 qc->scsicmd = NULL;
4309 qc->ap = ap;
4310 qc->dev = dev;
4311
4312 ata_qc_reinit(qc);
4313 }
4314
4315 return qc;
4316}
4317
4318/**
4319 * ata_qc_free - free unused ata_queued_cmd
4320 * @qc: Command to complete
4321 *
4322 * Designed to free unused ata_queued_cmd object
4323 * in case something prevents using it.
4324 *
4325 * LOCKING:
4326 * spin_lock_irqsave(host_set lock)
4327 */
4328void ata_qc_free(struct ata_queued_cmd *qc)
4329{
4330 struct ata_port *ap = qc->ap;
4331 unsigned int tag;
4332
4333 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4334
4335 qc->flags = 0;
4336 tag = qc->tag;
4337 if (likely(ata_tag_valid(tag))) {
4338 qc->tag = ATA_TAG_POISON;
4339 clear_bit(tag, &ap->qc_allocated);
4340 }
4341}
4342
4343void __ata_qc_complete(struct ata_queued_cmd *qc)
4344{
4345 struct ata_port *ap = qc->ap;
4346
4347 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4348 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4349
4350 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4351 ata_sg_clean(qc);
4352
4353 /* command should be marked inactive atomically with qc completion */
4354 if (qc->tf.protocol == ATA_PROT_NCQ)
4355 ap->sactive &= ~(1 << qc->tag);
4356 else
4357 ap->active_tag = ATA_TAG_POISON;
4358
4359 /* atapi: mark qc as inactive to prevent the interrupt handler
4360 * from completing the command twice later, before the error handler
4361 * is called. (when rc != 0 and atapi request sense is needed)
4362 */
4363 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4364 ap->qc_active &= ~(1 << qc->tag);
4365
4366 /* call completion callback */
4367 qc->complete_fn(qc);
4368}
4369
4370/**
4371 * ata_qc_complete - Complete an active ATA command
4372 * @qc: Command to complete
4373 * @err_mask: ATA Status register contents
4374 *
4375 * Indicate to the mid and upper layers that an ATA
4376 * command has completed, with either an ok or not-ok status.
4377 *
4378 * LOCKING:
4379 * spin_lock_irqsave(host_set lock)
4380 */
4381void ata_qc_complete(struct ata_queued_cmd *qc)
4382{
4383 struct ata_port *ap = qc->ap;
4384
4385 /* XXX: New EH and old EH use different mechanisms to
4386 * synchronize EH with regular execution path.
4387 *
4388 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4389 * Normal execution path is responsible for not accessing a
4390 * failed qc. libata core enforces the rule by returning NULL
4391 * from ata_qc_from_tag() for failed qcs.
4392 *
4393 * Old EH depends on ata_qc_complete() nullifying completion
4394 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4395 * not synchronize with interrupt handler. Only PIO task is
4396 * taken care of.
4397 */
4398 if (ap->ops->error_handler) {
4399 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4400
4401 if (unlikely(qc->err_mask))
4402 qc->flags |= ATA_QCFLAG_FAILED;
4403
4404 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4405 if (!ata_tag_internal(qc->tag)) {
4406 /* always fill result TF for failed qc */
4407 ap->ops->tf_read(ap, &qc->result_tf);
4408 ata_qc_schedule_eh(qc);
4409 return;
4410 }
4411 }
4412
4413 /* read result TF if requested */
4414 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4415 ap->ops->tf_read(ap, &qc->result_tf);
4416
4417 __ata_qc_complete(qc);
4418 } else {
4419 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4420 return;
4421
4422 /* read result TF if failed or requested */
4423 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4424 ap->ops->tf_read(ap, &qc->result_tf);
4425
4426 __ata_qc_complete(qc);
4427 }
4428}
4429
4430/**
4431 * ata_qc_complete_multiple - Complete multiple qcs successfully
4432 * @ap: port in question
4433 * @qc_active: new qc_active mask
4434 * @finish_qc: LLDD callback invoked before completing a qc
4435 *
4436 * Complete in-flight commands. This functions is meant to be
4437 * called from low-level driver's interrupt routine to complete
4438 * requests normally. ap->qc_active and @qc_active is compared
4439 * and commands are completed accordingly.
4440 *
4441 * LOCKING:
4442 * spin_lock_irqsave(host_set lock)
4443 *
4444 * RETURNS:
4445 * Number of completed commands on success, -errno otherwise.
4446 */
4447int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4448 void (*finish_qc)(struct ata_queued_cmd *))
4449{
4450 int nr_done = 0;
4451 u32 done_mask;
4452 int i;
4453
4454 done_mask = ap->qc_active ^ qc_active;
4455
4456 if (unlikely(done_mask & qc_active)) {
4457 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4458 "(%08x->%08x)\n", ap->qc_active, qc_active);
4459 return -EINVAL;
4460 }
4461
4462 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4463 struct ata_queued_cmd *qc;
4464
4465 if (!(done_mask & (1 << i)))
4466 continue;
4467
4468 if ((qc = ata_qc_from_tag(ap, i))) {
4469 if (finish_qc)
4470 finish_qc(qc);
4471 ata_qc_complete(qc);
4472 nr_done++;
4473 }
4474 }
4475
4476 return nr_done;
4477}
4478
4479static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4480{
4481 struct ata_port *ap = qc->ap;
4482
4483 switch (qc->tf.protocol) {
4484 case ATA_PROT_NCQ:
4485 case ATA_PROT_DMA:
4486 case ATA_PROT_ATAPI_DMA:
4487 return 1;
4488
4489 case ATA_PROT_ATAPI:
4490 case ATA_PROT_PIO:
4491 if (ap->flags & ATA_FLAG_PIO_DMA)
4492 return 1;
4493
4494 /* fall through */
4495
4496 default:
4497 return 0;
4498 }
4499
4500 /* never reached */
4501}
4502
4503/**
4504 * ata_qc_issue - issue taskfile to device
4505 * @qc: command to issue to device
4506 *
4507 * Prepare an ATA command to submission to device.
4508 * This includes mapping the data into a DMA-able
4509 * area, filling in the S/G table, and finally
4510 * writing the taskfile to hardware, starting the command.
4511 *
4512 * LOCKING:
4513 * spin_lock_irqsave(host_set lock)
4514 */
4515void ata_qc_issue(struct ata_queued_cmd *qc)
4516{
4517 struct ata_port *ap = qc->ap;
4518
4519 /* Make sure only one non-NCQ command is outstanding. The
4520 * check is skipped for old EH because it reuses active qc to
4521 * request ATAPI sense.
4522 */
4523 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4524
4525 if (qc->tf.protocol == ATA_PROT_NCQ) {
4526 WARN_ON(ap->sactive & (1 << qc->tag));
4527 ap->sactive |= 1 << qc->tag;
4528 } else {
4529 WARN_ON(ap->sactive);
4530 ap->active_tag = qc->tag;
4531 }
4532
4533 qc->flags |= ATA_QCFLAG_ACTIVE;
4534 ap->qc_active |= 1 << qc->tag;
4535
4536 if (ata_should_dma_map(qc)) {
4537 if (qc->flags & ATA_QCFLAG_SG) {
4538 if (ata_sg_setup(qc))
4539 goto sg_err;
4540 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4541 if (ata_sg_setup_one(qc))
4542 goto sg_err;
4543 }
4544 } else {
4545 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4546 }
4547
4548 ap->ops->qc_prep(qc);
4549
4550 qc->err_mask |= ap->ops->qc_issue(qc);
4551 if (unlikely(qc->err_mask))
4552 goto err;
4553 return;
4554
4555sg_err:
4556 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4557 qc->err_mask |= AC_ERR_SYSTEM;
4558err:
4559 ata_qc_complete(qc);
4560}
4561
4562/**
4563 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4564 * @qc: command to issue to device
4565 *
4566 * Using various libata functions and hooks, this function
4567 * starts an ATA command. ATA commands are grouped into
4568 * classes called "protocols", and issuing each type of protocol
4569 * is slightly different.
4570 *
4571 * May be used as the qc_issue() entry in ata_port_operations.
4572 *
4573 * LOCKING:
4574 * spin_lock_irqsave(host_set lock)
4575 *
4576 * RETURNS:
4577 * Zero on success, AC_ERR_* mask on failure
4578 */
4579
4580unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4581{
4582 struct ata_port *ap = qc->ap;
4583
4584 /* Use polling pio if the LLD doesn't handle
4585 * interrupt driven pio and atapi CDB interrupt.
4586 */
4587 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4588 switch (qc->tf.protocol) {
4589 case ATA_PROT_PIO:
4590 case ATA_PROT_ATAPI:
4591 case ATA_PROT_ATAPI_NODATA:
4592 qc->tf.flags |= ATA_TFLAG_POLLING;
4593 break;
4594 case ATA_PROT_ATAPI_DMA:
4595 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4596 /* see ata_dma_blacklisted() */
4597 BUG();
4598 break;
4599 default:
4600 break;
4601 }
4602 }
4603
4604 /* select the device */
4605 ata_dev_select(ap, qc->dev->devno, 1, 0);
4606
4607 /* start the command */
4608 switch (qc->tf.protocol) {
4609 case ATA_PROT_NODATA:
4610 if (qc->tf.flags & ATA_TFLAG_POLLING)
4611 ata_qc_set_polling(qc);
4612
4613 ata_tf_to_host(ap, &qc->tf);
4614 ap->hsm_task_state = HSM_ST_LAST;
4615
4616 if (qc->tf.flags & ATA_TFLAG_POLLING)
4617 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4618
4619 break;
4620
4621 case ATA_PROT_DMA:
4622 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4623
4624 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4625 ap->ops->bmdma_setup(qc); /* set up bmdma */
4626 ap->ops->bmdma_start(qc); /* initiate bmdma */
4627 ap->hsm_task_state = HSM_ST_LAST;
4628 break;
4629
4630 case ATA_PROT_PIO:
4631 if (qc->tf.flags & ATA_TFLAG_POLLING)
4632 ata_qc_set_polling(qc);
4633
4634 ata_tf_to_host(ap, &qc->tf);
4635
4636 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4637 /* PIO data out protocol */
4638 ap->hsm_task_state = HSM_ST_FIRST;
4639 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4640
4641 /* always send first data block using
4642 * the ata_pio_task() codepath.
4643 */
4644 } else {
4645 /* PIO data in protocol */
4646 ap->hsm_task_state = HSM_ST;
4647
4648 if (qc->tf.flags & ATA_TFLAG_POLLING)
4649 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4650
4651 /* if polling, ata_pio_task() handles the rest.
4652 * otherwise, interrupt handler takes over from here.
4653 */
4654 }
4655
4656 break;
4657
4658 case ATA_PROT_ATAPI:
4659 case ATA_PROT_ATAPI_NODATA:
4660 if (qc->tf.flags & ATA_TFLAG_POLLING)
4661 ata_qc_set_polling(qc);
4662
4663 ata_tf_to_host(ap, &qc->tf);
4664
4665 ap->hsm_task_state = HSM_ST_FIRST;
4666
4667 /* send cdb by polling if no cdb interrupt */
4668 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4669 (qc->tf.flags & ATA_TFLAG_POLLING))
4670 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4671 break;
4672
4673 case ATA_PROT_ATAPI_DMA:
4674 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4675
4676 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4677 ap->ops->bmdma_setup(qc); /* set up bmdma */
4678 ap->hsm_task_state = HSM_ST_FIRST;
4679
4680 /* send cdb by polling if no cdb interrupt */
4681 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4682 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4683 break;
4684
4685 default:
4686 WARN_ON(1);
4687 return AC_ERR_SYSTEM;
4688 }
4689
4690 return 0;
4691}
4692
4693/**
4694 * ata_host_intr - Handle host interrupt for given (port, task)
4695 * @ap: Port on which interrupt arrived (possibly...)
4696 * @qc: Taskfile currently active in engine
4697 *
4698 * Handle host interrupt for given queued command. Currently,
4699 * only DMA interrupts are handled. All other commands are
4700 * handled via polling with interrupts disabled (nIEN bit).
4701 *
4702 * LOCKING:
4703 * spin_lock_irqsave(host_set lock)
4704 *
4705 * RETURNS:
4706 * One if interrupt was handled, zero if not (shared irq).
4707 */
4708
4709inline unsigned int ata_host_intr (struct ata_port *ap,
4710 struct ata_queued_cmd *qc)
4711{
4712 u8 status, host_stat = 0;
4713
4714 VPRINTK("ata%u: protocol %d task_state %d\n",
4715 ap->id, qc->tf.protocol, ap->hsm_task_state);
4716
4717 /* Check whether we are expecting interrupt in this state */
4718 switch (ap->hsm_task_state) {
4719 case HSM_ST_FIRST:
4720 /* Some pre-ATAPI-4 devices assert INTRQ
4721 * at this state when ready to receive CDB.
4722 */
4723
4724 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4725 * The flag was turned on only for atapi devices.
4726 * No need to check is_atapi_taskfile(&qc->tf) again.
4727 */
4728 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4729 goto idle_irq;
4730 break;
4731 case HSM_ST_LAST:
4732 if (qc->tf.protocol == ATA_PROT_DMA ||
4733 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4734 /* check status of DMA engine */
4735 host_stat = ap->ops->bmdma_status(ap);
4736 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4737
4738 /* if it's not our irq... */
4739 if (!(host_stat & ATA_DMA_INTR))
4740 goto idle_irq;
4741
4742 /* before we do anything else, clear DMA-Start bit */
4743 ap->ops->bmdma_stop(qc);
4744
4745 if (unlikely(host_stat & ATA_DMA_ERR)) {
4746 /* error when transfering data to/from memory */
4747 qc->err_mask |= AC_ERR_HOST_BUS;
4748 ap->hsm_task_state = HSM_ST_ERR;
4749 }
4750 }
4751 break;
4752 case HSM_ST:
4753 break;
4754 default:
4755 goto idle_irq;
4756 }
4757
4758 /* check altstatus */
4759 status = ata_altstatus(ap);
4760 if (status & ATA_BUSY)
4761 goto idle_irq;
4762
4763 /* check main status, clearing INTRQ */
4764 status = ata_chk_status(ap);
4765 if (unlikely(status & ATA_BUSY))
4766 goto idle_irq;
4767
4768 /* ack bmdma irq events */
4769 ap->ops->irq_clear(ap);
4770
4771 ata_hsm_move(ap, qc, status, 0);
4772 return 1; /* irq handled */
4773
4774idle_irq:
4775 ap->stats.idle_irq++;
4776
4777#ifdef ATA_IRQ_TRAP
4778 if ((ap->stats.idle_irq % 1000) == 0) {
4779 ata_irq_ack(ap, 0); /* debug trap */
4780 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4781 return 1;
4782 }
4783#endif
4784 return 0; /* irq not handled */
4785}
4786
4787/**
4788 * ata_interrupt - Default ATA host interrupt handler
4789 * @irq: irq line (unused)
4790 * @dev_instance: pointer to our ata_host_set information structure
4791 * @regs: unused
4792 *
4793 * Default interrupt handler for PCI IDE devices. Calls
4794 * ata_host_intr() for each port that is not disabled.
4795 *
4796 * LOCKING:
4797 * Obtains host_set lock during operation.
4798 *
4799 * RETURNS:
4800 * IRQ_NONE or IRQ_HANDLED.
4801 */
4802
4803irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4804{
4805 struct ata_host_set *host_set = dev_instance;
4806 unsigned int i;
4807 unsigned int handled = 0;
4808 unsigned long flags;
4809
4810 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4811 spin_lock_irqsave(&host_set->lock, flags);
4812
4813 for (i = 0; i < host_set->n_ports; i++) {
4814 struct ata_port *ap;
4815
4816 ap = host_set->ports[i];
4817 if (ap &&
4818 !(ap->flags & ATA_FLAG_DISABLED)) {
4819 struct ata_queued_cmd *qc;
4820
4821 qc = ata_qc_from_tag(ap, ap->active_tag);
4822 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4823 (qc->flags & ATA_QCFLAG_ACTIVE))
4824 handled |= ata_host_intr(ap, qc);
4825 }
4826 }
4827
4828 spin_unlock_irqrestore(&host_set->lock, flags);
4829
4830 return IRQ_RETVAL(handled);
4831}
4832
4833/**
4834 * sata_scr_valid - test whether SCRs are accessible
4835 * @ap: ATA port to test SCR accessibility for
4836 *
4837 * Test whether SCRs are accessible for @ap.
4838 *
4839 * LOCKING:
4840 * None.
4841 *
4842 * RETURNS:
4843 * 1 if SCRs are accessible, 0 otherwise.
4844 */
4845int sata_scr_valid(struct ata_port *ap)
4846{
4847 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4848}
4849
4850/**
4851 * sata_scr_read - read SCR register of the specified port
4852 * @ap: ATA port to read SCR for
4853 * @reg: SCR to read
4854 * @val: Place to store read value
4855 *
4856 * Read SCR register @reg of @ap into *@val. This function is
4857 * guaranteed to succeed if the cable type of the port is SATA
4858 * and the port implements ->scr_read.
4859 *
4860 * LOCKING:
4861 * None.
4862 *
4863 * RETURNS:
4864 * 0 on success, negative errno on failure.
4865 */
4866int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4867{
4868 if (sata_scr_valid(ap)) {
4869 *val = ap->ops->scr_read(ap, reg);
4870 return 0;
4871 }
4872 return -EOPNOTSUPP;
4873}
4874
4875/**
4876 * sata_scr_write - write SCR register of the specified port
4877 * @ap: ATA port to write SCR for
4878 * @reg: SCR to write
4879 * @val: value to write
4880 *
4881 * Write @val to SCR register @reg of @ap. This function is
4882 * guaranteed to succeed if the cable type of the port is SATA
4883 * and the port implements ->scr_read.
4884 *
4885 * LOCKING:
4886 * None.
4887 *
4888 * RETURNS:
4889 * 0 on success, negative errno on failure.
4890 */
4891int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4892{
4893 if (sata_scr_valid(ap)) {
4894 ap->ops->scr_write(ap, reg, val);
4895 return 0;
4896 }
4897 return -EOPNOTSUPP;
4898}
4899
4900/**
4901 * sata_scr_write_flush - write SCR register of the specified port and flush
4902 * @ap: ATA port to write SCR for
4903 * @reg: SCR to write
4904 * @val: value to write
4905 *
4906 * This function is identical to sata_scr_write() except that this
4907 * function performs flush after writing to the register.
4908 *
4909 * LOCKING:
4910 * None.
4911 *
4912 * RETURNS:
4913 * 0 on success, negative errno on failure.
4914 */
4915int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4916{
4917 if (sata_scr_valid(ap)) {
4918 ap->ops->scr_write(ap, reg, val);
4919 ap->ops->scr_read(ap, reg);
4920 return 0;
4921 }
4922 return -EOPNOTSUPP;
4923}
4924
4925/**
4926 * ata_port_online - test whether the given port is online
4927 * @ap: ATA port to test
4928 *
4929 * Test whether @ap is online. Note that this function returns 0
4930 * if online status of @ap cannot be obtained, so
4931 * ata_port_online(ap) != !ata_port_offline(ap).
4932 *
4933 * LOCKING:
4934 * None.
4935 *
4936 * RETURNS:
4937 * 1 if the port online status is available and online.
4938 */
4939int ata_port_online(struct ata_port *ap)
4940{
4941 u32 sstatus;
4942
4943 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4944 return 1;
4945 return 0;
4946}
4947
4948/**
4949 * ata_port_offline - test whether the given port is offline
4950 * @ap: ATA port to test
4951 *
4952 * Test whether @ap is offline. Note that this function returns
4953 * 0 if offline status of @ap cannot be obtained, so
4954 * ata_port_online(ap) != !ata_port_offline(ap).
4955 *
4956 * LOCKING:
4957 * None.
4958 *
4959 * RETURNS:
4960 * 1 if the port offline status is available and offline.
4961 */
4962int ata_port_offline(struct ata_port *ap)
4963{
4964 u32 sstatus;
4965
4966 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4967 return 1;
4968 return 0;
4969}
4970
4971int ata_flush_cache(struct ata_device *dev)
4972{
4973 unsigned int err_mask;
4974 u8 cmd;
4975
4976 if (!ata_try_flush_cache(dev))
4977 return 0;
4978
4979 if (ata_id_has_flush_ext(dev->id))
4980 cmd = ATA_CMD_FLUSH_EXT;
4981 else
4982 cmd = ATA_CMD_FLUSH;
4983
4984 err_mask = ata_do_simple_cmd(dev, cmd);
4985 if (err_mask) {
4986 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
4987 return -EIO;
4988 }
4989
4990 return 0;
4991}
4992
4993static int ata_host_set_request_pm(struct ata_host_set *host_set,
4994 pm_message_t mesg, unsigned int action,
4995 unsigned int ehi_flags, int wait)
4996{
4997 unsigned long flags;
4998 int i, rc;
4999
5000 for (i = 0; i < host_set->n_ports; i++) {
5001 struct ata_port *ap = host_set->ports[i];
5002
5003 /* Previous resume operation might still be in
5004 * progress. Wait for PM_PENDING to clear.
5005 */
5006 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5007 ata_port_wait_eh(ap);
5008 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5009 }
5010
5011 /* request PM ops to EH */
5012 spin_lock_irqsave(ap->lock, flags);
5013
5014 ap->pm_mesg = mesg;
5015 if (wait) {
5016 rc = 0;
5017 ap->pm_result = &rc;
5018 }
5019
5020 ap->pflags |= ATA_PFLAG_PM_PENDING;
5021 ap->eh_info.action |= action;
5022 ap->eh_info.flags |= ehi_flags;
5023
5024 ata_port_schedule_eh(ap);
5025
5026 spin_unlock_irqrestore(ap->lock, flags);
5027
5028 /* wait and check result */
5029 if (wait) {
5030 ata_port_wait_eh(ap);
5031 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5032 if (rc)
5033 return rc;
5034 }
5035 }
5036
5037 return 0;
5038}
5039
5040/**
5041 * ata_host_set_suspend - suspend host_set
5042 * @host_set: host_set to suspend
5043 * @mesg: PM message
5044 *
5045 * Suspend @host_set. Actual operation is performed by EH. This
5046 * function requests EH to perform PM operations and waits for EH
5047 * to finish.
5048 *
5049 * LOCKING:
5050 * Kernel thread context (may sleep).
5051 *
5052 * RETURNS:
5053 * 0 on success, -errno on failure.
5054 */
5055int ata_host_set_suspend(struct ata_host_set *host_set, pm_message_t mesg)
5056{
5057 int i, j, rc;
5058
5059 rc = ata_host_set_request_pm(host_set, mesg, 0, ATA_EHI_QUIET, 1);
5060 if (rc)
5061 goto fail;
5062
5063 /* EH is quiescent now. Fail if we have any ready device.
5064 * This happens if hotplug occurs between completion of device
5065 * suspension and here.
5066 */
5067 for (i = 0; i < host_set->n_ports; i++) {
5068 struct ata_port *ap = host_set->ports[i];
5069
5070 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5071 struct ata_device *dev = &ap->device[j];
5072
5073 if (ata_dev_ready(dev)) {
5074 ata_port_printk(ap, KERN_WARNING,
5075 "suspend failed, device %d "
5076 "still active\n", dev->devno);
5077 rc = -EBUSY;
5078 goto fail;
5079 }
5080 }
5081 }
5082
5083 host_set->dev->power.power_state = mesg;
5084 return 0;
5085
5086 fail:
5087 ata_host_set_resume(host_set);
5088 return rc;
5089}
5090
5091/**
5092 * ata_host_set_resume - resume host_set
5093 * @host_set: host_set to resume
5094 *
5095 * Resume @host_set. Actual operation is performed by EH. This
5096 * function requests EH to perform PM operations and returns.
5097 * Note that all resume operations are performed parallely.
5098 *
5099 * LOCKING:
5100 * Kernel thread context (may sleep).
5101 */
5102void ata_host_set_resume(struct ata_host_set *host_set)
5103{
5104 ata_host_set_request_pm(host_set, PMSG_ON, ATA_EH_SOFTRESET,
5105 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5106 host_set->dev->power.power_state = PMSG_ON;
5107}
5108
5109/**
5110 * ata_port_start - Set port up for dma.
5111 * @ap: Port to initialize
5112 *
5113 * Called just after data structures for each port are
5114 * initialized. Allocates space for PRD table.
5115 *
5116 * May be used as the port_start() entry in ata_port_operations.
5117 *
5118 * LOCKING:
5119 * Inherited from caller.
5120 */
5121
5122int ata_port_start (struct ata_port *ap)
5123{
5124 struct device *dev = ap->dev;
5125 int rc;
5126
5127 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5128 if (!ap->prd)
5129 return -ENOMEM;
5130
5131 rc = ata_pad_alloc(ap, dev);
5132 if (rc) {
5133 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5134 return rc;
5135 }
5136
5137 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5138
5139 return 0;
5140}
5141
5142
5143/**
5144 * ata_port_stop - Undo ata_port_start()
5145 * @ap: Port to shut down
5146 *
5147 * Frees the PRD table.
5148 *
5149 * May be used as the port_stop() entry in ata_port_operations.
5150 *
5151 * LOCKING:
5152 * Inherited from caller.
5153 */
5154
5155void ata_port_stop (struct ata_port *ap)
5156{
5157 struct device *dev = ap->dev;
5158
5159 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5160 ata_pad_free(ap, dev);
5161}
5162
5163void ata_host_stop (struct ata_host_set *host_set)
5164{
5165 if (host_set->mmio_base)
5166 iounmap(host_set->mmio_base);
5167}
5168
5169/**
5170 * ata_dev_init - Initialize an ata_device structure
5171 * @dev: Device structure to initialize
5172 *
5173 * Initialize @dev in preparation for probing.
5174 *
5175 * LOCKING:
5176 * Inherited from caller.
5177 */
5178void ata_dev_init(struct ata_device *dev)
5179{
5180 struct ata_port *ap = dev->ap;
5181 unsigned long flags;
5182
5183 /* SATA spd limit is bound to the first device */
5184 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5185
5186 /* High bits of dev->flags are used to record warm plug
5187 * requests which occur asynchronously. Synchronize using
5188 * host_set lock.
5189 */
5190 spin_lock_irqsave(ap->lock, flags);
5191 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5192 spin_unlock_irqrestore(ap->lock, flags);
5193
5194 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5195 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5196 dev->pio_mask = UINT_MAX;
5197 dev->mwdma_mask = UINT_MAX;
5198 dev->udma_mask = UINT_MAX;
5199}
5200
5201/**
5202 * ata_port_init - Initialize an ata_port structure
5203 * @ap: Structure to initialize
5204 * @host_set: Collection of hosts to which @ap belongs
5205 * @ent: Probe information provided by low-level driver
5206 * @port_no: Port number associated with this ata_port
5207 *
5208 * Initialize a new ata_port structure.
5209 *
5210 * LOCKING:
5211 * Inherited from caller.
5212 */
5213void ata_port_init(struct ata_port *ap, struct ata_host_set *host_set,
5214 const struct ata_probe_ent *ent, unsigned int port_no)
5215{
5216 unsigned int i;
5217
5218 ap->lock = &host_set->lock;
5219 ap->flags = ATA_FLAG_DISABLED;
5220 ap->id = ata_unique_id++;
5221 ap->ctl = ATA_DEVCTL_OBS;
5222 ap->host_set = host_set;
5223 ap->dev = ent->dev;
5224 ap->port_no = port_no;
5225 ap->pio_mask = ent->pio_mask;
5226 ap->mwdma_mask = ent->mwdma_mask;
5227 ap->udma_mask = ent->udma_mask;
5228 ap->flags |= ent->host_flags;
5229 ap->ops = ent->port_ops;
5230 ap->hw_sata_spd_limit = UINT_MAX;
5231 ap->active_tag = ATA_TAG_POISON;
5232 ap->last_ctl = 0xFF;
5233
5234#if defined(ATA_VERBOSE_DEBUG)
5235 /* turn on all debugging levels */
5236 ap->msg_enable = 0x00FF;
5237#elif defined(ATA_DEBUG)
5238 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5239#else
5240 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5241#endif
5242
5243 INIT_WORK(&ap->port_task, NULL, NULL);
5244 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5245 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5246 INIT_LIST_HEAD(&ap->eh_done_q);
5247 init_waitqueue_head(&ap->eh_wait_q);
5248
5249 /* set cable type */
5250 ap->cbl = ATA_CBL_NONE;
5251 if (ap->flags & ATA_FLAG_SATA)
5252 ap->cbl = ATA_CBL_SATA;
5253
5254 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5255 struct ata_device *dev = &ap->device[i];
5256 dev->ap = ap;
5257 dev->devno = i;
5258 ata_dev_init(dev);
5259 }
5260
5261#ifdef ATA_IRQ_TRAP
5262 ap->stats.unhandled_irq = 1;
5263 ap->stats.idle_irq = 1;
5264#endif
5265
5266 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5267}
5268
5269/**
5270 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5271 * @ap: ATA port to initialize SCSI host for
5272 * @shost: SCSI host associated with @ap
5273 *
5274 * Initialize SCSI host @shost associated with ATA port @ap.
5275 *
5276 * LOCKING:
5277 * Inherited from caller.
5278 */
5279static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5280{
5281 ap->host = shost;
5282
5283 shost->unique_id = ap->id;
5284 shost->max_id = 16;
5285 shost->max_lun = 1;
5286 shost->max_channel = 1;
5287 shost->max_cmd_len = 12;
5288}
5289
5290/**
5291 * ata_port_add - Attach low-level ATA driver to system
5292 * @ent: Information provided by low-level driver
5293 * @host_set: Collections of ports to which we add
5294 * @port_no: Port number associated with this host
5295 *
5296 * Attach low-level ATA driver to system.
5297 *
5298 * LOCKING:
5299 * PCI/etc. bus probe sem.
5300 *
5301 * RETURNS:
5302 * New ata_port on success, for NULL on error.
5303 */
5304static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5305 struct ata_host_set *host_set,
5306 unsigned int port_no)
5307{
5308 struct Scsi_Host *shost;
5309 struct ata_port *ap;
5310
5311 DPRINTK("ENTER\n");
5312
5313 if (!ent->port_ops->error_handler &&
5314 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5315 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5316 port_no);
5317 return NULL;
5318 }
5319
5320 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5321 if (!shost)
5322 return NULL;
5323
5324 shost->transportt = &ata_scsi_transport_template;
5325
5326 ap = ata_shost_to_port(shost);
5327
5328 ata_port_init(ap, host_set, ent, port_no);
5329 ata_port_init_shost(ap, shost);
5330
5331 return ap;
5332}
5333
5334/**
5335 * ata_sas_host_init - Initialize a host_set struct
5336 * @host_set: host_set to initialize
5337 * @dev: device host_set is attached to
5338 * @flags: host_set flags
5339 * @ops: port_ops
5340 *
5341 * LOCKING:
5342 * PCI/etc. bus probe sem.
5343 *
5344 */
5345
5346void ata_host_set_init(struct ata_host_set *host_set,
5347 struct device *dev, unsigned long flags,
5348 const struct ata_port_operations *ops)
5349{
5350 spin_lock_init(&host_set->lock);
5351 host_set->dev = dev;
5352 host_set->flags = flags;
5353 host_set->ops = ops;
5354}
5355
5356/**
5357 * ata_device_add - Register hardware device with ATA and SCSI layers
5358 * @ent: Probe information describing hardware device to be registered
5359 *
5360 * This function processes the information provided in the probe
5361 * information struct @ent, allocates the necessary ATA and SCSI
5362 * host information structures, initializes them, and registers
5363 * everything with requisite kernel subsystems.
5364 *
5365 * This function requests irqs, probes the ATA bus, and probes
5366 * the SCSI bus.
5367 *
5368 * LOCKING:
5369 * PCI/etc. bus probe sem.
5370 *
5371 * RETURNS:
5372 * Number of ports registered. Zero on error (no ports registered).
5373 */
5374int ata_device_add(const struct ata_probe_ent *ent)
5375{
5376 unsigned int i;
5377 struct device *dev = ent->dev;
5378 struct ata_host_set *host_set;
5379 int rc;
5380
5381 DPRINTK("ENTER\n");
5382 /* alloc a container for our list of ATA ports (buses) */
5383 host_set = kzalloc(sizeof(struct ata_host_set) +
5384 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5385 if (!host_set)
5386 return 0;
5387
5388 ata_host_set_init(host_set, dev, ent->host_set_flags, ent->port_ops);
5389 host_set->n_ports = ent->n_ports;
5390 host_set->irq = ent->irq;
5391 host_set->irq2 = ent->irq2;
5392 host_set->mmio_base = ent->mmio_base;
5393 host_set->private_data = ent->private_data;
5394
5395 /* register each port bound to this device */
5396 for (i = 0; i < host_set->n_ports; i++) {
5397 struct ata_port *ap;
5398 unsigned long xfer_mode_mask;
5399 int irq_line = ent->irq;
5400
5401 ap = ata_port_add(ent, host_set, i);
5402 if (!ap)
5403 goto err_out;
5404
5405 host_set->ports[i] = ap;
5406
5407 /* dummy? */
5408 if (ent->dummy_port_mask & (1 << i)) {
5409 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5410 ap->ops = &ata_dummy_port_ops;
5411 continue;
5412 }
5413
5414 /* start port */
5415 rc = ap->ops->port_start(ap);
5416 if (rc) {
5417 host_set->ports[i] = NULL;
5418 scsi_host_put(ap->host);
5419 goto err_out;
5420 }
5421
5422 /* Report the secondary IRQ for second channel legacy */
5423 if (i == 1 && ent->irq2)
5424 irq_line = ent->irq2;
5425
5426 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5427 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5428 (ap->pio_mask << ATA_SHIFT_PIO);
5429
5430 /* print per-port info to dmesg */
5431 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5432 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5433 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5434 ata_mode_string(xfer_mode_mask),
5435 ap->ioaddr.cmd_addr,
5436 ap->ioaddr.ctl_addr,
5437 ap->ioaddr.bmdma_addr,
5438 irq_line);
5439
5440 ata_chk_status(ap);
5441 host_set->ops->irq_clear(ap);
5442 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5443 }
5444
5445 /* obtain irq, that may be shared between channels */
5446 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5447 DRV_NAME, host_set);
5448 if (rc) {
5449 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5450 ent->irq, rc);
5451 goto err_out;
5452 }
5453
5454 /* do we have a second IRQ for the other channel, eg legacy mode */
5455 if (ent->irq2) {
5456 /* We will get weird core code crashes later if this is true
5457 so trap it now */
5458 BUG_ON(ent->irq == ent->irq2);
5459
5460 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5461 DRV_NAME, host_set);
5462 if (rc) {
5463 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5464 ent->irq2, rc);
5465 goto err_out_free_irq;
5466 }
5467 }
5468
5469 /* perform each probe synchronously */
5470 DPRINTK("probe begin\n");
5471 for (i = 0; i < host_set->n_ports; i++) {
5472 struct ata_port *ap = host_set->ports[i];
5473 u32 scontrol;
5474 int rc;
5475
5476 /* init sata_spd_limit to the current value */
5477 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5478 int spd = (scontrol >> 4) & 0xf;
5479 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5480 }
5481 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5482
5483 rc = scsi_add_host(ap->host, dev);
5484 if (rc) {
5485 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5486 /* FIXME: do something useful here */
5487 /* FIXME: handle unconditional calls to
5488 * scsi_scan_host and ata_host_remove, below,
5489 * at the very least
5490 */
5491 }
5492
5493 if (ap->ops->error_handler) {
5494 struct ata_eh_info *ehi = &ap->eh_info;
5495 unsigned long flags;
5496
5497 ata_port_probe(ap);
5498
5499 /* kick EH for boot probing */
5500 spin_lock_irqsave(ap->lock, flags);
5501
5502 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5503 ehi->action |= ATA_EH_SOFTRESET;
5504 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5505
5506 ap->pflags |= ATA_PFLAG_LOADING;
5507 ata_port_schedule_eh(ap);
5508
5509 spin_unlock_irqrestore(ap->lock, flags);
5510
5511 /* wait for EH to finish */
5512 ata_port_wait_eh(ap);
5513 } else {
5514 DPRINTK("ata%u: bus probe begin\n", ap->id);
5515 rc = ata_bus_probe(ap);
5516 DPRINTK("ata%u: bus probe end\n", ap->id);
5517
5518 if (rc) {
5519 /* FIXME: do something useful here?
5520 * Current libata behavior will
5521 * tear down everything when
5522 * the module is removed
5523 * or the h/w is unplugged.
5524 */
5525 }
5526 }
5527 }
5528
5529 /* probes are done, now scan each port's disk(s) */
5530 DPRINTK("host probe begin\n");
5531 for (i = 0; i < host_set->n_ports; i++) {
5532 struct ata_port *ap = host_set->ports[i];
5533
5534 ata_scsi_scan_host(ap);
5535 }
5536
5537 dev_set_drvdata(dev, host_set);
5538
5539 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5540 return ent->n_ports; /* success */
5541
5542err_out_free_irq:
5543 free_irq(ent->irq, host_set);
5544err_out:
5545 for (i = 0; i < host_set->n_ports; i++) {
5546 struct ata_port *ap = host_set->ports[i];
5547 if (ap) {
5548 ap->ops->port_stop(ap);
5549 scsi_host_put(ap->host);
5550 }
5551 }
5552
5553 kfree(host_set);
5554 VPRINTK("EXIT, returning 0\n");
5555 return 0;
5556}
5557
5558/**
5559 * ata_port_detach - Detach ATA port in prepration of device removal
5560 * @ap: ATA port to be detached
5561 *
5562 * Detach all ATA devices and the associated SCSI devices of @ap;
5563 * then, remove the associated SCSI host. @ap is guaranteed to
5564 * be quiescent on return from this function.
5565 *
5566 * LOCKING:
5567 * Kernel thread context (may sleep).
5568 */
5569void ata_port_detach(struct ata_port *ap)
5570{
5571 unsigned long flags;
5572 int i;
5573
5574 if (!ap->ops->error_handler)
5575 goto skip_eh;
5576
5577 /* tell EH we're leaving & flush EH */
5578 spin_lock_irqsave(ap->lock, flags);
5579 ap->pflags |= ATA_PFLAG_UNLOADING;
5580 spin_unlock_irqrestore(ap->lock, flags);
5581
5582 ata_port_wait_eh(ap);
5583
5584 /* EH is now guaranteed to see UNLOADING, so no new device
5585 * will be attached. Disable all existing devices.
5586 */
5587 spin_lock_irqsave(ap->lock, flags);
5588
5589 for (i = 0; i < ATA_MAX_DEVICES; i++)
5590 ata_dev_disable(&ap->device[i]);
5591
5592 spin_unlock_irqrestore(ap->lock, flags);
5593
5594 /* Final freeze & EH. All in-flight commands are aborted. EH
5595 * will be skipped and retrials will be terminated with bad
5596 * target.
5597 */
5598 spin_lock_irqsave(ap->lock, flags);
5599 ata_port_freeze(ap); /* won't be thawed */
5600 spin_unlock_irqrestore(ap->lock, flags);
5601
5602 ata_port_wait_eh(ap);
5603
5604 /* Flush hotplug task. The sequence is similar to
5605 * ata_port_flush_task().
5606 */
5607 flush_workqueue(ata_aux_wq);
5608 cancel_delayed_work(&ap->hotplug_task);
5609 flush_workqueue(ata_aux_wq);
5610
5611 skip_eh:
5612 /* remove the associated SCSI host */
5613 scsi_remove_host(ap->host);
5614}
5615
5616/**
5617 * ata_host_set_remove - PCI layer callback for device removal
5618 * @host_set: ATA host set that was removed
5619 *
5620 * Unregister all objects associated with this host set. Free those
5621 * objects.
5622 *
5623 * LOCKING:
5624 * Inherited from calling layer (may sleep).
5625 */
5626
5627void ata_host_set_remove(struct ata_host_set *host_set)
5628{
5629 unsigned int i;
5630
5631 for (i = 0; i < host_set->n_ports; i++)
5632 ata_port_detach(host_set->ports[i]);
5633
5634 free_irq(host_set->irq, host_set);
5635 if (host_set->irq2)
5636 free_irq(host_set->irq2, host_set);
5637
5638 for (i = 0; i < host_set->n_ports; i++) {
5639 struct ata_port *ap = host_set->ports[i];
5640
5641 ata_scsi_release(ap->host);
5642
5643 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5644 struct ata_ioports *ioaddr = &ap->ioaddr;
5645
5646 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5647 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5648 release_region(ATA_PRIMARY_CMD, 8);
5649 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5650 release_region(ATA_SECONDARY_CMD, 8);
5651 }
5652
5653 scsi_host_put(ap->host);
5654 }
5655
5656 if (host_set->ops->host_stop)
5657 host_set->ops->host_stop(host_set);
5658
5659 kfree(host_set);
5660}
5661
5662/**
5663 * ata_scsi_release - SCSI layer callback hook for host unload
5664 * @host: libata host to be unloaded
5665 *
5666 * Performs all duties necessary to shut down a libata port...
5667 * Kill port kthread, disable port, and release resources.
5668 *
5669 * LOCKING:
5670 * Inherited from SCSI layer.
5671 *
5672 * RETURNS:
5673 * One.
5674 */
5675
5676int ata_scsi_release(struct Scsi_Host *host)
5677{
5678 struct ata_port *ap = ata_shost_to_port(host);
5679
5680 DPRINTK("ENTER\n");
5681
5682 ap->ops->port_disable(ap);
5683 ap->ops->port_stop(ap);
5684
5685 DPRINTK("EXIT\n");
5686 return 1;
5687}
5688
5689struct ata_probe_ent *
5690ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5691{
5692 struct ata_probe_ent *probe_ent;
5693
5694 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5695 if (!probe_ent) {
5696 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5697 kobject_name(&(dev->kobj)));
5698 return NULL;
5699 }
5700
5701 INIT_LIST_HEAD(&probe_ent->node);
5702 probe_ent->dev = dev;
5703
5704 probe_ent->sht = port->sht;
5705 probe_ent->host_flags = port->host_flags;
5706 probe_ent->pio_mask = port->pio_mask;
5707 probe_ent->mwdma_mask = port->mwdma_mask;
5708 probe_ent->udma_mask = port->udma_mask;
5709 probe_ent->port_ops = port->port_ops;
5710
5711 return probe_ent;
5712}
5713
5714/**
5715 * ata_std_ports - initialize ioaddr with standard port offsets.
5716 * @ioaddr: IO address structure to be initialized
5717 *
5718 * Utility function which initializes data_addr, error_addr,
5719 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5720 * device_addr, status_addr, and command_addr to standard offsets
5721 * relative to cmd_addr.
5722 *
5723 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5724 */
5725
5726void ata_std_ports(struct ata_ioports *ioaddr)
5727{
5728 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5729 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5730 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5731 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5732 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5733 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5734 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5735 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5736 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5737 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5738}
5739
5740
5741#ifdef CONFIG_PCI
5742
5743void ata_pci_host_stop (struct ata_host_set *host_set)
5744{
5745 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5746
5747 pci_iounmap(pdev, host_set->mmio_base);
5748}
5749
5750/**
5751 * ata_pci_remove_one - PCI layer callback for device removal
5752 * @pdev: PCI device that was removed
5753 *
5754 * PCI layer indicates to libata via this hook that
5755 * hot-unplug or module unload event has occurred.
5756 * Handle this by unregistering all objects associated
5757 * with this PCI device. Free those objects. Then finally
5758 * release PCI resources and disable device.
5759 *
5760 * LOCKING:
5761 * Inherited from PCI layer (may sleep).
5762 */
5763
5764void ata_pci_remove_one (struct pci_dev *pdev)
5765{
5766 struct device *dev = pci_dev_to_dev(pdev);
5767 struct ata_host_set *host_set = dev_get_drvdata(dev);
5768
5769 ata_host_set_remove(host_set);
5770
5771 pci_release_regions(pdev);
5772 pci_disable_device(pdev);
5773 dev_set_drvdata(dev, NULL);
5774}
5775
5776/* move to PCI subsystem */
5777int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5778{
5779 unsigned long tmp = 0;
5780
5781 switch (bits->width) {
5782 case 1: {
5783 u8 tmp8 = 0;
5784 pci_read_config_byte(pdev, bits->reg, &tmp8);
5785 tmp = tmp8;
5786 break;
5787 }
5788 case 2: {
5789 u16 tmp16 = 0;
5790 pci_read_config_word(pdev, bits->reg, &tmp16);
5791 tmp = tmp16;
5792 break;
5793 }
5794 case 4: {
5795 u32 tmp32 = 0;
5796 pci_read_config_dword(pdev, bits->reg, &tmp32);
5797 tmp = tmp32;
5798 break;
5799 }
5800
5801 default:
5802 return -EINVAL;
5803 }
5804
5805 tmp &= bits->mask;
5806
5807 return (tmp == bits->val) ? 1 : 0;
5808}
5809
5810void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5811{
5812 pci_save_state(pdev);
5813
5814 if (mesg.event == PM_EVENT_SUSPEND) {
5815 pci_disable_device(pdev);
5816 pci_set_power_state(pdev, PCI_D3hot);
5817 }
5818}
5819
5820void ata_pci_device_do_resume(struct pci_dev *pdev)
5821{
5822 pci_set_power_state(pdev, PCI_D0);
5823 pci_restore_state(pdev);
5824 pci_enable_device(pdev);
5825 pci_set_master(pdev);
5826}
5827
5828int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
5829{
5830 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5831 int rc = 0;
5832
5833 rc = ata_host_set_suspend(host_set, mesg);
5834 if (rc)
5835 return rc;
5836
5837 ata_pci_device_do_suspend(pdev, mesg);
5838
5839 return 0;
5840}
5841
5842int ata_pci_device_resume(struct pci_dev *pdev)
5843{
5844 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5845
5846 ata_pci_device_do_resume(pdev);
5847 ata_host_set_resume(host_set);
5848 return 0;
5849}
5850#endif /* CONFIG_PCI */
5851
5852
5853static int __init ata_init(void)
5854{
5855 ata_probe_timeout *= HZ;
5856 ata_wq = create_workqueue("ata");
5857 if (!ata_wq)
5858 return -ENOMEM;
5859
5860 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5861 if (!ata_aux_wq) {
5862 destroy_workqueue(ata_wq);
5863 return -ENOMEM;
5864 }
5865
5866 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5867 return 0;
5868}
5869
5870static void __exit ata_exit(void)
5871{
5872 destroy_workqueue(ata_wq);
5873 destroy_workqueue(ata_aux_wq);
5874}
5875
5876module_init(ata_init);
5877module_exit(ata_exit);
5878
5879static unsigned long ratelimit_time;
5880static DEFINE_SPINLOCK(ata_ratelimit_lock);
5881
5882int ata_ratelimit(void)
5883{
5884 int rc;
5885 unsigned long flags;
5886
5887 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5888
5889 if (time_after(jiffies, ratelimit_time)) {
5890 rc = 1;
5891 ratelimit_time = jiffies + (HZ/5);
5892 } else
5893 rc = 0;
5894
5895 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5896
5897 return rc;
5898}
5899
5900/**
5901 * ata_wait_register - wait until register value changes
5902 * @reg: IO-mapped register
5903 * @mask: Mask to apply to read register value
5904 * @val: Wait condition
5905 * @interval_msec: polling interval in milliseconds
5906 * @timeout_msec: timeout in milliseconds
5907 *
5908 * Waiting for some bits of register to change is a common
5909 * operation for ATA controllers. This function reads 32bit LE
5910 * IO-mapped register @reg and tests for the following condition.
5911 *
5912 * (*@reg & mask) != val
5913 *
5914 * If the condition is met, it returns; otherwise, the process is
5915 * repeated after @interval_msec until timeout.
5916 *
5917 * LOCKING:
5918 * Kernel thread context (may sleep)
5919 *
5920 * RETURNS:
5921 * The final register value.
5922 */
5923u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5924 unsigned long interval_msec,
5925 unsigned long timeout_msec)
5926{
5927 unsigned long timeout;
5928 u32 tmp;
5929
5930 tmp = ioread32(reg);
5931
5932 /* Calculate timeout _after_ the first read to make sure
5933 * preceding writes reach the controller before starting to
5934 * eat away the timeout.
5935 */
5936 timeout = jiffies + (timeout_msec * HZ) / 1000;
5937
5938 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5939 msleep(interval_msec);
5940 tmp = ioread32(reg);
5941 }
5942
5943 return tmp;
5944}
5945
5946/*
5947 * Dummy port_ops
5948 */
5949static void ata_dummy_noret(struct ata_port *ap) { }
5950static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
5951static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
5952
5953static u8 ata_dummy_check_status(struct ata_port *ap)
5954{
5955 return ATA_DRDY;
5956}
5957
5958static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
5959{
5960 return AC_ERR_SYSTEM;
5961}
5962
5963const struct ata_port_operations ata_dummy_port_ops = {
5964 .port_disable = ata_port_disable,
5965 .check_status = ata_dummy_check_status,
5966 .check_altstatus = ata_dummy_check_status,
5967 .dev_select = ata_noop_dev_select,
5968 .qc_prep = ata_noop_qc_prep,
5969 .qc_issue = ata_dummy_qc_issue,
5970 .freeze = ata_dummy_noret,
5971 .thaw = ata_dummy_noret,
5972 .error_handler = ata_dummy_noret,
5973 .post_internal_cmd = ata_dummy_qc_noret,
5974 .irq_clear = ata_dummy_noret,
5975 .port_start = ata_dummy_ret0,
5976 .port_stop = ata_dummy_noret,
5977};
5978
5979/*
5980 * libata is essentially a library of internal helper functions for
5981 * low-level ATA host controller drivers. As such, the API/ABI is
5982 * likely to change as new drivers are added and updated.
5983 * Do not depend on ABI/API stability.
5984 */
5985
5986EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
5987EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
5988EXPORT_SYMBOL_GPL(sata_deb_timing_long);
5989EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
5990EXPORT_SYMBOL_GPL(ata_std_bios_param);
5991EXPORT_SYMBOL_GPL(ata_std_ports);
5992EXPORT_SYMBOL_GPL(ata_host_set_init);
5993EXPORT_SYMBOL_GPL(ata_device_add);
5994EXPORT_SYMBOL_GPL(ata_port_detach);
5995EXPORT_SYMBOL_GPL(ata_host_set_remove);
5996EXPORT_SYMBOL_GPL(ata_sg_init);
5997EXPORT_SYMBOL_GPL(ata_sg_init_one);
5998EXPORT_SYMBOL_GPL(ata_hsm_move);
5999EXPORT_SYMBOL_GPL(ata_qc_complete);
6000EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6001EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6002EXPORT_SYMBOL_GPL(ata_tf_load);
6003EXPORT_SYMBOL_GPL(ata_tf_read);
6004EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6005EXPORT_SYMBOL_GPL(ata_std_dev_select);
6006EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6007EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6008EXPORT_SYMBOL_GPL(ata_check_status);
6009EXPORT_SYMBOL_GPL(ata_altstatus);
6010EXPORT_SYMBOL_GPL(ata_exec_command);
6011EXPORT_SYMBOL_GPL(ata_port_start);
6012EXPORT_SYMBOL_GPL(ata_port_stop);
6013EXPORT_SYMBOL_GPL(ata_host_stop);
6014EXPORT_SYMBOL_GPL(ata_interrupt);
6015EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6016EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6017EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6018EXPORT_SYMBOL_GPL(ata_qc_prep);
6019EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6020EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6021EXPORT_SYMBOL_GPL(ata_bmdma_start);
6022EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6023EXPORT_SYMBOL_GPL(ata_bmdma_status);
6024EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6025EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6026EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6027EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6028EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6029EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6030EXPORT_SYMBOL_GPL(ata_port_probe);
6031EXPORT_SYMBOL_GPL(sata_set_spd);
6032EXPORT_SYMBOL_GPL(sata_phy_debounce);
6033EXPORT_SYMBOL_GPL(sata_phy_resume);
6034EXPORT_SYMBOL_GPL(sata_phy_reset);
6035EXPORT_SYMBOL_GPL(__sata_phy_reset);
6036EXPORT_SYMBOL_GPL(ata_bus_reset);
6037EXPORT_SYMBOL_GPL(ata_std_prereset);
6038EXPORT_SYMBOL_GPL(ata_std_softreset);
6039EXPORT_SYMBOL_GPL(sata_std_hardreset);
6040EXPORT_SYMBOL_GPL(ata_std_postreset);
6041EXPORT_SYMBOL_GPL(ata_dev_revalidate);
6042EXPORT_SYMBOL_GPL(ata_dev_classify);
6043EXPORT_SYMBOL_GPL(ata_dev_pair);
6044EXPORT_SYMBOL_GPL(ata_port_disable);
6045EXPORT_SYMBOL_GPL(ata_ratelimit);
6046EXPORT_SYMBOL_GPL(ata_wait_register);
6047EXPORT_SYMBOL_GPL(ata_busy_sleep);
6048EXPORT_SYMBOL_GPL(ata_port_queue_task);
6049EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6050EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6051EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6052EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6053EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6054EXPORT_SYMBOL_GPL(ata_scsi_release);
6055EXPORT_SYMBOL_GPL(ata_host_intr);
6056EXPORT_SYMBOL_GPL(sata_scr_valid);
6057EXPORT_SYMBOL_GPL(sata_scr_read);
6058EXPORT_SYMBOL_GPL(sata_scr_write);
6059EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6060EXPORT_SYMBOL_GPL(ata_port_online);
6061EXPORT_SYMBOL_GPL(ata_port_offline);
6062EXPORT_SYMBOL_GPL(ata_host_set_suspend);
6063EXPORT_SYMBOL_GPL(ata_host_set_resume);
6064EXPORT_SYMBOL_GPL(ata_id_string);
6065EXPORT_SYMBOL_GPL(ata_id_c_string);
6066EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6067
6068EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6069EXPORT_SYMBOL_GPL(ata_timing_compute);
6070EXPORT_SYMBOL_GPL(ata_timing_merge);
6071
6072#ifdef CONFIG_PCI
6073EXPORT_SYMBOL_GPL(pci_test_config_bits);
6074EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6075EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6076EXPORT_SYMBOL_GPL(ata_pci_init_one);
6077EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6078EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6079EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6080EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6081EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6082EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6083EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6084#endif /* CONFIG_PCI */
6085
6086EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6087EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6088
6089EXPORT_SYMBOL_GPL(ata_eng_timeout);
6090EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6091EXPORT_SYMBOL_GPL(ata_port_abort);
6092EXPORT_SYMBOL_GPL(ata_port_freeze);
6093EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6094EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6095EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6096EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6097EXPORT_SYMBOL_GPL(ata_do_eh);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 11:01:39 -0500