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-rw-r--r--arch/arm/mach-ks8695/board-micrel.c8
-rw-r--r--arch/arm/mach-s3c2442/Kconfig2
-rw-r--r--arch/avr32/boards/atngw100/setup.c18
-rw-r--r--arch/avr32/boards/atstk1000/Kconfig26
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c62
-rw-r--r--arch/i386/Kconfig5
-rw-r--r--arch/i386/Makefile4
-rw-r--r--arch/i386/boot/edd.c54
-rw-r--r--arch/i386/boot/video.c2
-rw-r--r--arch/i386/kernel/alternative.c2
-rw-r--r--arch/i386/kernel/apic.c2
-rw-r--r--arch/i386/kernel/nmi.c4
-rw-r--r--arch/ia64/Kconfig12
-rw-r--r--arch/ia64/configs/bigsur_defconfig2
-rw-r--r--arch/ia64/configs/gensparse_defconfig2
-rw-r--r--arch/ia64/configs/sim_defconfig2
-rw-r--r--arch/ia64/configs/sn2_defconfig2
-rw-r--r--arch/ia64/configs/tiger_defconfig2
-rw-r--r--arch/ia64/configs/zx1_defconfig2
-rw-r--r--arch/ia64/defconfig3
-rw-r--r--arch/ia64/hp/sim/boot/boot_head.S1
-rw-r--r--arch/ia64/kernel/cpufreq/acpi-cpufreq.c6
-rw-r--r--arch/ia64/kernel/irq.c5
-rw-r--r--arch/ia64/kernel/mca.c34
-rw-r--r--arch/ia64/kernel/process.c10
-rw-r--r--arch/ia64/kernel/ptrace.c10
-rw-r--r--arch/ia64/kernel/setup.c7
-rw-r--r--arch/ia64/kernel/vmlinux.lds.S12
-rw-r--r--arch/ia64/mm/fault.c14
-rw-r--r--arch/ia64/sn/kernel/irq.c12
-rw-r--r--arch/powerpc/boot/flatdevtree.c18
-rw-r--r--arch/powerpc/kernel/Makefile1
-rw-r--r--arch/powerpc/kernel/misc_32.S12
-rw-r--r--arch/powerpc/mm/hash_utils_64.c2
-rw-r--r--arch/powerpc/platforms/cell/spu_syscalls.c1
-rw-r--r--arch/powerpc/platforms/ps3/device-init.c2
-rw-r--r--arch/ppc/kernel/misc.S12
-rw-r--r--arch/sh/kernel/early_printk.c2
-rw-r--r--arch/sh/kernel/machvec.c7
-rw-r--r--arch/sh/kernel/ptrace.c1
-rw-r--r--arch/sh64/kernel/setup.c4
-rw-r--r--arch/sh64/kernel/signal.c1
-rw-r--r--arch/sparc/kernel/ebus.c1
-rw-r--r--arch/sparc/mm/init.c3
-rw-r--r--arch/sparc/mm/io-unit.c18
-rw-r--r--arch/sparc/mm/iommu.c12
-rw-r--r--arch/sparc/mm/sun4c.c2
-rw-r--r--arch/sparc64/kernel/head.S14
-rw-r--r--arch/sparc64/kernel/mdesc.c38
-rw-r--r--arch/sparc64/kernel/trampoline.S7
-rw-r--r--arch/sparc64/lib/Makefile2
-rw-r--r--arch/sparc64/lib/NG2copy_from_user.S40
-rw-r--r--arch/sparc64/lib/NG2copy_to_user.S49
-rw-r--r--arch/sparc64/lib/NG2memcpy.S520
-rw-r--r--arch/sparc64/lib/NG2page.S61
-rw-r--r--arch/sparc64/lib/NG2patch.S33
-rw-r--r--arch/sparc64/lib/NGpage.S1
-rw-r--r--arch/x86_64/Makefile4
-rw-r--r--arch/x86_64/kernel/head.S3
-rw-r--r--arch/x86_64/kernel/nmi.c4
-rw-r--r--arch/x86_64/kernel/pci-dma.c4
61 files changed, 1041 insertions, 165 deletions
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 8fc0edb5211..2feeef81d84 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -23,24 +23,24 @@
23#include "generic.h" 23#include "generic.h"
24 24
25#ifdef CONFIG_PCI 25#ifdef CONFIG_PCI
26static int __init micrel_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 26static int micrel_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
27{ 27{
28 return KS8695_IRQ_EXTERN0; 28 return KS8695_IRQ_EXTERN0;
29} 29}
30 30
31static struct ks8695_pci_cfg micrel_pci = { 31static struct ks8695_pci_cfg __initdata micrel_pci = {
32 .mode = KS8695_MODE_MINIPCI, 32 .mode = KS8695_MODE_MINIPCI,
33 .map_irq = micrel_pci_map_irq, 33 .map_irq = micrel_pci_map_irq,
34}; 34};
35#endif 35#endif
36 36
37 37
38static void micrel_init(void) 38static void __init micrel_init(void)
39{ 39{
40 printk(KERN_INFO "Micrel KS8695 Development Board initializing\n"); 40 printk(KERN_INFO "Micrel KS8695 Development Board initializing\n");
41 41
42#ifdef CONFIG_PCI 42#ifdef CONFIG_PCI
43 ks8695_init_pci(&micrel_pci); 43// ks8695_init_pci(&micrel_pci);
44#endif 44#endif
45 45
46 /* Add devices */ 46 /* Add devices */
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 88d5fd34fe3..26d131a7707 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -6,7 +6,7 @@
6 6
7config CPU_S3C2442 7config CPU_S3C2442
8 bool 8 bool
9 depends on ARCH_S3C2420 9 depends on ARCH_S3C2410
10 select S3C2410_CLOCK 10 select S3C2410_CLOCK
11 select S3C2410_GPIO 11 select S3C2410_GPIO
12 select S3C2410_PM if PM 12 select S3C2410_PM if PM
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index 2edcecdea8b..ef801563bbf 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <linux/etherdevice.h> 11#include <linux/etherdevice.h>
12#include <linux/i2c-gpio.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/linkage.h> 14#include <linux/linkage.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
@@ -123,6 +124,19 @@ static struct platform_device ngw_gpio_leds = {
123 } 124 }
124}; 125};
125 126
127static struct i2c_gpio_platform_data i2c_gpio_data = {
128 .sda_pin = GPIO_PIN_PA(6),
129 .scl_pin = GPIO_PIN_PA(7),
130};
131
132static struct platform_device i2c_gpio_device = {
133 .name = "i2c-gpio",
134 .id = 0,
135 .dev = {
136 .platform_data = &i2c_gpio_data,
137 },
138};
139
126static int __init atngw100_init(void) 140static int __init atngw100_init(void)
127{ 141{
128 unsigned i; 142 unsigned i;
@@ -147,6 +161,10 @@ static int __init atngw100_init(void)
147 } 161 }
148 platform_device_register(&ngw_gpio_leds); 162 platform_device_register(&ngw_gpio_leds);
149 163
164 at32_select_gpio(i2c_gpio_data.sda_pin, 0);
165 at32_select_gpio(i2c_gpio_data.scl_pin, 0);
166 platform_device_register(&i2c_gpio_device);
167
150 return 0; 168 return 0;
151} 169}
152postcore_initcall(atngw100_init); 170postcore_initcall(atngw100_init);
diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
index 71bc7d364fb..718578f6406 100644
--- a/arch/avr32/boards/atstk1000/Kconfig
+++ b/arch/avr32/boards/atstk1000/Kconfig
@@ -50,4 +50,30 @@ config BOARD_ATSTK1002_SPI1
50 GPIO lines and accessed through the J1 jumper block. Say "y" 50 GPIO lines and accessed through the J1 jumper block. Say "y"
51 here to configure that SPI controller. 51 here to configure that SPI controller.
52 52
53config BOARD_ATSTK1002_J2_LED
54 bool
55 default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
56
57choice
58 prompt "LEDs connected to J2:"
59 depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
60 optional
61 help
62 Select this if you have jumpered the J2 jumper block to the
63 LED0..LED7 amber leds, or to the RGB leds, using a ten-pin
64 IDC cable. A default "heartbeat" trigger is provided, but
65 you can of course override this.
66
67config BOARD_ATSTK1002_J2_LED8
68 bool "LED0..LED7"
69 help
70 Select this if J2 is jumpered to LED0..LED7 amber leds.
71
72config BOARD_ATSTK1002_J2_RGB
73 bool "RGB leds"
74 help
75 Select this if J2 is jumpered to the RGB leds.
76
77endchoice
78
53endif # stk 1002 79endif # stk 1002
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index cb93eabb9c6..c9981b731ef 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -11,6 +11,7 @@
11#include <linux/etherdevice.h> 11#include <linux/etherdevice.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/leds.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
15#include <linux/string.h> 16#include <linux/string.h>
16#include <linux/types.h> 17#include <linux/types.h>
@@ -120,6 +121,65 @@ static void __init set_hw_addr(struct platform_device *pdev)
120 clk_put(pclk); 121 clk_put(pclk);
121} 122}
122 123
124#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
125
126static struct gpio_led stk_j2_led[] = {
127#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
128#define LEDSTRING "J2 jumpered to LED8"
129 { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
130 { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
131 { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
132 { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
133 { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
134 { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
135 { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
136 { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
137 .default_trigger = "heartbeat", },
138#else /* RGB */
139#define LEDSTRING "J2 jumpered to RGB LEDs"
140 { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
141 { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
142 { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
143
144 { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
145 .default_trigger = "heartbeat", },
146 { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
147 { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
148 .default_trigger = "heartbeat", },
149 /* PB16, PB30 unused */
150#endif
151};
152
153static struct gpio_led_platform_data stk_j2_led_data = {
154 .num_leds = ARRAY_SIZE(stk_j2_led),
155 .leds = stk_j2_led,
156};
157
158static struct platform_device stk_j2_led_dev = {
159 .name = "leds-gpio",
160 .id = 2, /* gpio block J2 */
161 .dev = {
162 .platform_data = &stk_j2_led_data,
163 },
164};
165
166static void setup_j2_leds(void)
167{
168 unsigned i;
169
170 for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
171 at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
172
173 printk("STK1002: " LEDSTRING "\n");
174 platform_device_register(&stk_j2_led_dev);
175}
176
177#else
178static void setup_j2_leds(void)
179{
180}
181#endif
182
123void __init setup_board(void) 183void __init setup_board(void)
124{ 184{
125#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM 185#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
@@ -185,6 +245,8 @@ static int __init atstk1002_init(void)
185 at32_add_device_ssc(0, ATMEL_SSC_TX); 245 at32_add_device_ssc(0, ATMEL_SSC_TX);
186#endif 246#endif
187 247
248 setup_j2_leds();
249
188 return 0; 250 return 0;
189} 251}
190postcore_initcall(atstk1002_init); 252postcore_initcall(atstk1002_init);
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index f9524933258..f16a46e8849 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -1228,6 +1228,11 @@ menuconfig INSTRUMENTATION
1228 bool "Instrumentation Support" 1228 bool "Instrumentation Support"
1229 depends on EXPERIMENTAL 1229 depends on EXPERIMENTAL
1230 default y 1230 default y
1231 ---help---
1232 Say Y here to get to see options related to performance measurement,
1233 debugging, and testing. This option alone does not add any kernel code.
1234
1235 If you say N, all options in this submenu will be skipped and disabled.
1231 1236
1232if INSTRUMENTATION 1237if INSTRUMENTATION
1233 1238
diff --git a/arch/i386/Makefile b/arch/i386/Makefile
index 01f0ff0daaf..52b932478c6 100644
--- a/arch/i386/Makefile
+++ b/arch/i386/Makefile
@@ -51,8 +51,8 @@ cflags-y += -maccumulate-outgoing-args
51CFLAGS += $(shell if [ $(call cc-version) -lt 0400 ] ; then echo $(call cc-option,-fno-unit-at-a-time); fi ;) 51CFLAGS += $(shell if [ $(call cc-version) -lt 0400 ] ; then echo $(call cc-option,-fno-unit-at-a-time); fi ;)
52 52
53# do binutils support CFI? 53# do binutils support CFI?
54cflags-y += $(call as-instr,.cfi_startproc\n.cfi_endproc,-DCONFIG_AS_CFI=1,) 54cflags-y += $(call as-instr,.cfi_startproc\n.cfi_rel_offset esp${comma}0\n.cfi_endproc,-DCONFIG_AS_CFI=1,)
55AFLAGS += $(call as-instr,.cfi_startproc\n.cfi_endproc,-DCONFIG_AS_CFI=1,) 55AFLAGS += $(call as-instr,.cfi_startproc\n.cfi_rel_offset esp${comma}0\n.cfi_endproc,-DCONFIG_AS_CFI=1,)
56 56
57# is .cfi_signal_frame supported too? 57# is .cfi_signal_frame supported too?
58cflags-y += $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1,) 58cflags-y += $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1,)
diff --git a/arch/i386/boot/edd.c b/arch/i386/boot/edd.c
index 658834d9f92..82b5c846a19 100644
--- a/arch/i386/boot/edd.c
+++ b/arch/i386/boot/edd.c
@@ -19,40 +19,12 @@
19 19
20#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) 20#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
21 21
22struct edd_dapa {
23 u8 pkt_size;
24 u8 rsvd;
25 u16 sector_cnt;
26 u16 buf_off, buf_seg;
27 u64 lba;
28 u64 buf_lin_addr;
29};
30
31/* 22/*
32 * Read the MBR (first sector) from a specific device. 23 * Read the MBR (first sector) from a specific device.
33 */ 24 */
34static int read_mbr(u8 devno, void *buf) 25static int read_mbr(u8 devno, void *buf)
35{ 26{
36 struct edd_dapa dapa; 27 u16 ax, bx, cx, dx;
37 u16 ax, bx, cx, dx, si;
38
39 memset(&dapa, 0, sizeof dapa);
40 dapa.pkt_size = sizeof(dapa);
41 dapa.sector_cnt = 1;
42 dapa.buf_off = (size_t)buf;
43 dapa.buf_seg = ds();
44 /* dapa.lba = 0; */
45
46 ax = 0x4200; /* Extended Read */
47 si = (size_t)&dapa;
48 dx = devno;
49 asm("pushfl; stc; int $0x13; setc %%al; popfl"
50 : "+a" (ax), "+S" (si), "+d" (dx)
51 : "m" (dapa)
52 : "ebx", "ecx", "edi", "memory");
53
54 if (!(u8)ax)
55 return 0; /* OK */
56 28
57 ax = 0x0201; /* Legacy Read, one sector */ 29 ax = 0x0201; /* Legacy Read, one sector */
58 cx = 0x0001; /* Sector 0-0-1 */ 30 cx = 0x0001; /* Sector 0-0-1 */
@@ -65,11 +37,10 @@ static int read_mbr(u8 devno, void *buf)
65 return -(u8)ax; /* 0 or -1 */ 37 return -(u8)ax; /* 0 or -1 */
66} 38}
67 39
68static u32 read_mbr_sig(u8 devno, struct edd_info *ei) 40static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig)
69{ 41{
70 int sector_size; 42 int sector_size;
71 char *mbrbuf_ptr, *mbrbuf_end; 43 char *mbrbuf_ptr, *mbrbuf_end;
72 u32 mbrsig;
73 u32 buf_base, mbr_base; 44 u32 buf_base, mbr_base;
74 extern char _end[]; 45 extern char _end[];
75 46
@@ -85,15 +56,15 @@ static u32 read_mbr_sig(u8 devno, struct edd_info *ei)
85 56
86 /* Make sure we actually have space on the heap... */ 57 /* Make sure we actually have space on the heap... */
87 if (!(boot_params.hdr.loadflags & CAN_USE_HEAP)) 58 if (!(boot_params.hdr.loadflags & CAN_USE_HEAP))
88 return 0; 59 return -1;
89 if (mbrbuf_end > (char *)(size_t)boot_params.hdr.heap_end_ptr) 60 if (mbrbuf_end > (char *)(size_t)boot_params.hdr.heap_end_ptr)
90 return 0; 61 return -1;
91 62
92 if (read_mbr(devno, mbrbuf_ptr)) 63 if (read_mbr(devno, mbrbuf_ptr))
93 return 0; 64 return -1;
94 65
95 mbrsig = *(u32 *)&mbrbuf_ptr[EDD_MBR_SIG_OFFSET]; 66 *mbrsig = *(u32 *)&mbrbuf_ptr[EDD_MBR_SIG_OFFSET];
96 return mbrsig; 67 return 0;
97} 68}
98 69
99static int get_edd_info(u8 devno, struct edd_info *ei) 70static int get_edd_info(u8 devno, struct edd_info *ei)
@@ -160,6 +131,7 @@ void query_edd(void)
160 int do_edd = 1; 131 int do_edd = 1;
161 int devno; 132 int devno;
162 struct edd_info ei, *edp; 133 struct edd_info ei, *edp;
134 u32 *mbrptr;
163 135
164 if (cmdline_find_option("edd", eddarg, sizeof eddarg) > 0) { 136 if (cmdline_find_option("edd", eddarg, sizeof eddarg) > 0) {
165 if (!strcmp(eddarg, "skipmbr") || !strcmp(eddarg, "skip")) 137 if (!strcmp(eddarg, "skipmbr") || !strcmp(eddarg, "skip"))
@@ -168,7 +140,8 @@ void query_edd(void)
168 do_edd = 0; 140 do_edd = 0;
169 } 141 }
170 142
171 edp = (struct edd_info *)boot_params.eddbuf; 143 edp = boot_params.eddbuf;
144 mbrptr = boot_params.edd_mbr_sig_buffer;
172 145
173 if (!do_edd) 146 if (!do_edd)
174 return; 147 return;
@@ -186,11 +159,8 @@ void query_edd(void)
186 boot_params.eddbuf_entries++; 159 boot_params.eddbuf_entries++;
187 } 160 }
188 161
189 if (do_mbr) { 162 if (do_mbr && !read_mbr_sig(devno, &ei, mbrptr++))
190 u32 mbr_sig; 163 boot_params.edd_mbr_sig_buf_entries = devno-0x80+1;
191 mbr_sig = read_mbr_sig(devno, &ei);
192 boot_params.edd_mbr_sig_buffer[devno-0x80] = mbr_sig;
193 }
194 } 164 }
195} 165}
196 166
diff --git a/arch/i386/boot/video.c b/arch/i386/boot/video.c
index 958130ef004..693f20d3102 100644
--- a/arch/i386/boot/video.c
+++ b/arch/i386/boot/video.c
@@ -61,7 +61,7 @@ static void store_video_mode(void)
61 61
62 /* Not all BIOSes are clean with respect to the top bit */ 62 /* Not all BIOSes are clean with respect to the top bit */
63 boot_params.screen_info.orig_video_mode = ax & 0x7f; 63 boot_params.screen_info.orig_video_mode = ax & 0x7f;
64 boot_params.screen_info.orig_video_page = page; 64 boot_params.screen_info.orig_video_page = page >> 8;
65} 65}
66 66
67/* 67/*
diff --git a/arch/i386/kernel/alternative.c b/arch/i386/kernel/alternative.c
index 1b66d5c70ea..9f4ac8b02de 100644
--- a/arch/i386/kernel/alternative.c
+++ b/arch/i386/kernel/alternative.c
@@ -366,6 +366,8 @@ void apply_paravirt(struct paravirt_patch_site *start,
366 unsigned int used; 366 unsigned int used;
367 367
368 BUG_ON(p->len > MAX_PATCH_LEN); 368 BUG_ON(p->len > MAX_PATCH_LEN);
369 /* prep the buffer with the original instructions */
370 memcpy(insnbuf, p->instr, p->len);
369 used = paravirt_ops.patch(p->instrtype, p->clobbers, insnbuf, 371 used = paravirt_ops.patch(p->instrtype, p->clobbers, insnbuf,
370 (unsigned long)p->instr, p->len); 372 (unsigned long)p->instr, p->len);
371 373
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index f9fff29e01a..3d67ae18d76 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -1085,7 +1085,7 @@ static int __init detect_init_APIC (void)
1085 if (l & MSR_IA32_APICBASE_ENABLE) 1085 if (l & MSR_IA32_APICBASE_ENABLE)
1086 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1086 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1087 1087
1088 if (nmi_watchdog != NMI_NONE) 1088 if (nmi_watchdog != NMI_NONE && nmi_watchdog != NMI_DISABLED)
1089 nmi_watchdog = NMI_LOCAL_APIC; 1089 nmi_watchdog = NMI_LOCAL_APIC;
1090 1090
1091 printk(KERN_INFO "Found and enabled local APIC!\n"); 1091 printk(KERN_INFO "Found and enabled local APIC!\n");
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index 99beac7f96c..8c1c965eb2a 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -77,7 +77,7 @@ static int __init check_nmi_watchdog(void)
77 unsigned int *prev_nmi_count; 77 unsigned int *prev_nmi_count;
78 int cpu; 78 int cpu;
79 79
80 if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DEFAULT)) 80 if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED))
81 return 0; 81 return 0;
82 82
83 if (!atomic_read(&nmi_active)) 83 if (!atomic_read(&nmi_active))
@@ -424,7 +424,7 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
424 if (!!old_state == !!nmi_watchdog_enabled) 424 if (!!old_state == !!nmi_watchdog_enabled)
425 return 0; 425 return 0;
426 426
427 if (atomic_read(&nmi_active) < 0) { 427 if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) {
428 printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); 428 printk( KERN_WARNING "NMI watchdog is permanently disabled\n");
429 return -EIO; 429 return -EIO;
430 } 430 }
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 21aa4fc5f8e..8c39913d172 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -327,17 +327,7 @@ config FORCE_CPEI_RETARGET
327 This option it useful to enable this feature on older BIOS's as well. 327 This option it useful to enable this feature on older BIOS's as well.
328 You can also enable this by using boot command line option force_cpei=1. 328 You can also enable this by using boot command line option force_cpei=1.
329 329
330config PREEMPT 330source "kernel/Kconfig.preempt"
331 bool "Preemptible Kernel"
332 help
333 This option reduces the latency of the kernel when reacting to
334 real-time or interactive events by allowing a low priority process to
335 be preempted even if it is in kernel mode executing a system call.
336 This allows applications to run more reliably even when the system is
337 under load.
338
339 Say Y here if you are building a kernel for a desktop, embedded
340 or real-time system. Say N if you are unsure.
341 331
342source "mm/Kconfig" 332source "mm/Kconfig"
343 333
diff --git a/arch/ia64/configs/bigsur_defconfig b/arch/ia64/configs/bigsur_defconfig
index 9eb48c0927b..6dd8655664f 100644
--- a/arch/ia64/configs/bigsur_defconfig
+++ b/arch/ia64/configs/bigsur_defconfig
@@ -42,7 +42,7 @@ CONFIG_CC_ALIGN_FUNCTIONS=0
42CONFIG_CC_ALIGN_LABELS=0 42CONFIG_CC_ALIGN_LABELS=0
43CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
44CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
45CONFIG_SLAB=y 45CONFIG_SLUB=y
46# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0 47CONFIG_BASE_SMALL=0
48# CONFIG_SLOB is not set 48# CONFIG_SLOB is not set
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
index 3a9ed951db0..e86fbd39c79 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -43,7 +43,7 @@ CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0 43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
46CONFIG_SLAB=y 46CONFIG_SLUB=y
47# CONFIG_TINY_SHMEM is not set 47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0 48CONFIG_BASE_SMALL=0
49# CONFIG_SLOB is not set 49# CONFIG_SLOB is not set
diff --git a/arch/ia64/configs/sim_defconfig b/arch/ia64/configs/sim_defconfig
index c420d9f3df9..546a772f438 100644
--- a/arch/ia64/configs/sim_defconfig
+++ b/arch/ia64/configs/sim_defconfig
@@ -43,7 +43,7 @@ CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0 43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
46CONFIG_SLAB=y 46CONFIG_SLUB=y
47# CONFIG_TINY_SHMEM is not set 47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0 48CONFIG_BASE_SMALL=0
49# CONFIG_SLOB is not set 49# CONFIG_SLOB is not set
diff --git a/arch/ia64/configs/sn2_defconfig b/arch/ia64/configs/sn2_defconfig
index 4c9ffc47bc7..9aecfceeb38 100644
--- a/arch/ia64/configs/sn2_defconfig
+++ b/arch/ia64/configs/sn2_defconfig
@@ -46,7 +46,7 @@ CONFIG_BASE_FULL=y
46CONFIG_FUTEX=y 46CONFIG_FUTEX=y
47CONFIG_EPOLL=y 47CONFIG_EPOLL=y
48CONFIG_SHMEM=y 48CONFIG_SHMEM=y
49CONFIG_SLAB=y 49CONFIG_SLUB=y
50CONFIG_VM_EVENT_COUNTERS=y 50CONFIG_VM_EVENT_COUNTERS=y
51CONFIG_RT_MUTEXES=y 51CONFIG_RT_MUTEXES=y
52# CONFIG_TINY_SHMEM is not set 52# CONFIG_TINY_SHMEM is not set
diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig
index 3dbb3987df2..797acf9066c 100644
--- a/arch/ia64/configs/tiger_defconfig
+++ b/arch/ia64/configs/tiger_defconfig
@@ -53,7 +53,7 @@ CONFIG_TIMERFD=y
53CONFIG_EVENTFD=y 53CONFIG_EVENTFD=y
54CONFIG_SHMEM=y 54CONFIG_SHMEM=y
55CONFIG_VM_EVENT_COUNTERS=y 55CONFIG_VM_EVENT_COUNTERS=y
56CONFIG_SLAB=y 56CONFIG_SLUB=y
57# CONFIG_SLUB is not set 57# CONFIG_SLUB is not set
58# CONFIG_SLOB is not set 58# CONFIG_SLOB is not set
59CONFIG_RT_MUTEXES=y 59CONFIG_RT_MUTEXES=y
diff --git a/arch/ia64/configs/zx1_defconfig b/arch/ia64/configs/zx1_defconfig
index 4a060fc3993..0a06b1333c9 100644
--- a/arch/ia64/configs/zx1_defconfig
+++ b/arch/ia64/configs/zx1_defconfig
@@ -48,7 +48,7 @@ CONFIG_BASE_FULL=y
48CONFIG_FUTEX=y 48CONFIG_FUTEX=y
49CONFIG_EPOLL=y 49CONFIG_EPOLL=y
50CONFIG_SHMEM=y 50CONFIG_SHMEM=y
51CONFIG_SLAB=y 51CONFIG_SLUB=y
52CONFIG_VM_EVENT_COUNTERS=y 52CONFIG_VM_EVENT_COUNTERS=y
53CONFIG_RT_MUTEXES=y 53CONFIG_RT_MUTEXES=y
54# CONFIG_TINY_SHMEM is not set 54# CONFIG_TINY_SHMEM is not set
diff --git a/arch/ia64/defconfig b/arch/ia64/defconfig
index 03172dc8c40..0210545e7f6 100644
--- a/arch/ia64/defconfig
+++ b/arch/ia64/defconfig
@@ -53,8 +53,7 @@ CONFIG_TIMERFD=y
53CONFIG_EVENTFD=y 53CONFIG_EVENTFD=y
54CONFIG_SHMEM=y 54CONFIG_SHMEM=y
55CONFIG_VM_EVENT_COUNTERS=y 55CONFIG_VM_EVENT_COUNTERS=y
56CONFIG_SLAB=y 56CONFIG_SLUB=y
57# CONFIG_SLUB is not set
58# CONFIG_SLOB is not set 57# CONFIG_SLOB is not set
59CONFIG_RT_MUTEXES=y 58CONFIG_RT_MUTEXES=y
60# CONFIG_TINY_SHMEM is not set 59# CONFIG_TINY_SHMEM is not set
diff --git a/arch/ia64/hp/sim/boot/boot_head.S b/arch/ia64/hp/sim/boot/boot_head.S
index a9bd71ac78e..8808565491f 100644
--- a/arch/ia64/hp/sim/boot/boot_head.S
+++ b/arch/ia64/hp/sim/boot/boot_head.S
@@ -26,6 +26,7 @@ GLOBAL_ENTRY(_start)
26 movl sp = stack_mem+16384-16 26 movl sp = stack_mem+16384-16
27 bsw.1 27 bsw.1
28 br.call.sptk.many rp=start_bootloader 28 br.call.sptk.many rp=start_bootloader
290: nop 0 /* dummy nop to make unwinding work */
29END(_start) 30END(_start)
30 31
31/* 32/*
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
index 15c08d52f09..8c6ec707084 100644
--- a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -113,10 +113,8 @@ processor_get_freq (
113 113
114 saved_mask = current->cpus_allowed; 114 saved_mask = current->cpus_allowed;
115 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 115 set_cpus_allowed(current, cpumask_of_cpu(cpu));
116 if (smp_processor_id() != cpu) { 116 if (smp_processor_id() != cpu)
117 ret = -EAGAIN;
118 goto migrate_end; 117 goto migrate_end;
119 }
120 118
121 /* processor_get_pstate gets the instantaneous frequency */ 119 /* processor_get_pstate gets the instantaneous frequency */
122 ret = processor_get_pstate(&value); 120 ret = processor_get_pstate(&value);
@@ -125,7 +123,7 @@ processor_get_freq (
125 set_cpus_allowed(current, saved_mask); 123 set_cpus_allowed(current, saved_mask);
126 printk(KERN_WARNING "get performance failed with error %d\n", 124 printk(KERN_WARNING "get performance failed with error %d\n",
127 ret); 125 ret);
128 ret = -EAGAIN; 126 ret = 0;
129 goto migrate_end; 127 goto migrate_end;
130 } 128 }
131 clock_freq = extract_clock(data, value, cpu); 129 clock_freq = extract_clock(data, value, cpu);
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index cc3ee4ef37a..44be1c952b7 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -33,6 +33,11 @@ void ack_bad_irq(unsigned int irq)
33} 33}
34 34
35#ifdef CONFIG_IA64_GENERIC 35#ifdef CONFIG_IA64_GENERIC
36ia64_vector __ia64_irq_to_vector(int irq)
37{
38 return irq_cfg[irq].vector;
39}
40
36unsigned int __ia64_local_vector_to_irq (ia64_vector vec) 41unsigned int __ia64_local_vector_to_irq (ia64_vector vec)
37{ 42{
38 return __get_cpu_var(vector_irq)[vec]; 43 return __get_cpu_var(vector_irq)[vec];
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index ff28620cb99..63b73f3d4c9 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -2018,22 +2018,26 @@ ia64_mca_late_init(void)
2018 2018
2019 if (cpe_vector >= 0) { 2019 if (cpe_vector >= 0) {
2020 /* If platform supports CPEI, enable the irq. */ 2020 /* If platform supports CPEI, enable the irq. */
2021 cpe_poll_enabled = 0; 2021 irq = local_vector_to_irq(cpe_vector);
2022 for (irq = 0; irq < NR_IRQS; ++irq) 2022 if (irq > 0) {
2023 if (irq_to_vector(irq) == cpe_vector) { 2023 cpe_poll_enabled = 0;
2024 desc = irq_desc + irq; 2024 desc = irq_desc + irq;
2025 desc->status |= IRQ_PER_CPU; 2025 desc->status |= IRQ_PER_CPU;
2026 setup_irq(irq, &mca_cpe_irqaction); 2026 setup_irq(irq, &mca_cpe_irqaction);
2027 ia64_cpe_irq = irq; 2027 ia64_cpe_irq = irq;
2028 } 2028 ia64_mca_register_cpev(cpe_vector);
2029 ia64_mca_register_cpev(cpe_vector); 2029 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n",
2030 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__); 2030 __FUNCTION__);
2031 } else { 2031 return 0;
2032 /* If platform doesn't support CPEI, get the timer going. */
2033 if (cpe_poll_enabled) {
2034 ia64_mca_cpe_poll(0UL);
2035 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
2036 } 2032 }
2033 printk(KERN_ERR "%s: Failed to find irq for CPE "
2034 "interrupt handler, vector %d\n",
2035 __FUNCTION__, cpe_vector);
2036 }
2037 /* If platform doesn't support CPEI, get the timer going. */
2038 if (cpe_poll_enabled) {
2039 ia64_mca_cpe_poll(0UL);
2040 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
2037 } 2041 }
2038 } 2042 }
2039#endif 2043#endif
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index 4158906c45a..c613fc0e91c 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -198,9 +198,13 @@ default_idle (void)
198{ 198{
199 local_irq_enable(); 199 local_irq_enable();
200 while (!need_resched()) { 200 while (!need_resched()) {
201 if (can_do_pal_halt) 201 if (can_do_pal_halt) {
202 safe_halt(); 202 local_irq_disable();
203 else 203 if (!need_resched()) {
204 safe_halt();
205 }
206 local_irq_enable();
207 } else
204 cpu_relax(); 208 cpu_relax();
205 } 209 }
206} 210}
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index 00f80324694..122444a9789 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -951,10 +951,14 @@ access_uarea (struct task_struct *child, unsigned long addr,
951 return 0; 951 return 0;
952 952
953 case PT_CR_IPSR: 953 case PT_CR_IPSR:
954 if (write_access) 954 if (write_access) {
955 pt->cr_ipsr = ((*data & IPSR_MASK) 955 unsigned long tmp = *data;
956 /* psr.ri==3 is a reserved value: SDM 2:25 */
957 if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
958 tmp &= ~IA64_PSR_RI;
959 pt->cr_ipsr = ((tmp & IPSR_MASK)
956 | (pt->cr_ipsr & ~IPSR_MASK)); 960 | (pt->cr_ipsr & ~IPSR_MASK));
957 else 961 } else
958 *data = (pt->cr_ipsr & IPSR_MASK); 962 *data = (pt->cr_ipsr & IPSR_MASK);
959 return 0; 963 return 0;
960 964
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index cd9a37a552c..407efea04bf 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -389,6 +389,13 @@ early_console_setup (char *cmdline)
389 if (!efi_setup_pcdp_console(cmdline)) 389 if (!efi_setup_pcdp_console(cmdline))
390 earlycons++; 390 earlycons++;
391#endif 391#endif
392#ifdef CONFIG_HP_SIMSERIAL_CONSOLE
393 {
394 extern struct console hpsim_cons;
395 register_console(&hpsim_cons);
396 earlycons++;
397 }
398#endif
392 399
393 return (earlycons) ? 0 : -1; 400 return (earlycons) ? 0 : -1;
394} 401}
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 83e80677de7..00232b4357b 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -20,6 +20,8 @@ PHDRS {
20 code PT_LOAD; 20 code PT_LOAD;
21 percpu PT_LOAD; 21 percpu PT_LOAD;
22 data PT_LOAD; 22 data PT_LOAD;
23 note PT_NOTE;
24 unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
23} 25}
24SECTIONS 26SECTIONS
25{ 27{
@@ -62,6 +64,9 @@ SECTIONS
62 64
63 /* Read-only data */ 65 /* Read-only data */
64 66
67 NOTES :code :note /* put .notes in text and mark in PT_NOTE */
68 code_continues : {} :code /* switch back to regular program... */
69
65 /* Exception table */ 70 /* Exception table */
66 . = ALIGN(16); 71 . = ALIGN(16);
67 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) 72 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
@@ -99,7 +104,8 @@ SECTIONS
99 __start_unwind = .; 104 __start_unwind = .;
100 *(.IA_64.unwind*) 105 *(.IA_64.unwind*)
101 __end_unwind = .; 106 __end_unwind = .;
102 } 107 } :code :unwind
108 code_continues2 : {} : code
103 109
104 RODATA 110 RODATA
105 111
@@ -276,10 +282,6 @@ SECTIONS
276 .debug_typenames 0 : { *(.debug_typenames) } 282 .debug_typenames 0 : { *(.debug_typenames) }
277 .debug_varnames 0 : { *(.debug_varnames) } 283 .debug_varnames 0 : { *(.debug_varnames) }
278 /* These must appear regardless of . */ 284 /* These must appear regardless of . */
279 /* Discard them for now since Intel SoftSDV cannot handle them.
280 .comment 0 : { *(.comment) }
281 .note 0 : { *(.note) }
282 */
283 /DISCARD/ : { *(.comment) } 285 /DISCARD/ : { *(.comment) }
284 /DISCARD/ : { *(.note) } 286 /DISCARD/ : { *(.note) }
285} 287}
diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c
index 73ccb6010c0..9150ffaff9e 100644
--- a/arch/ia64/mm/fault.c
+++ b/arch/ia64/mm/fault.c
@@ -112,11 +112,17 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re
112 down_read(&mm->mmap_sem); 112 down_read(&mm->mmap_sem);
113 113
114 vma = find_vma_prev(mm, address, &prev_vma); 114 vma = find_vma_prev(mm, address, &prev_vma);
115 if (!vma) 115 if (!vma && !prev_vma )
116 goto bad_area; 116 goto bad_area;
117 117
118 /* find_vma_prev() returns vma such that address < vma->vm_end or NULL */ 118 /*
119 if (address < vma->vm_start) 119 * find_vma_prev() returns vma such that address < vma->vm_end or NULL
120 *
121 * May find no vma, but could be that the last vm area is the
122 * register backing store that needs to expand upwards, in
123 * this case vma will be null, but prev_vma will ne non-null
124 */
125 if (( !vma && prev_vma ) || (address < vma->vm_start) )
120 goto check_expansion; 126 goto check_expansion;
121 127
122 good_area: 128 good_area:
@@ -172,6 +178,8 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re
172 178
173 check_expansion: 179 check_expansion:
174 if (!(prev_vma && (prev_vma->vm_flags & VM_GROWSUP) && (address == prev_vma->vm_end))) { 180 if (!(prev_vma && (prev_vma->vm_flags & VM_GROWSUP) && (address == prev_vma->vm_end))) {
181 if (!vma)
182 goto bad_area;
175 if (!(vma->vm_flags & VM_GROWSDOWN)) 183 if (!(vma->vm_flags & VM_GROWSDOWN))
176 goto bad_area; 184 goto bad_area;
177 if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start) 185 if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start)
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 7f6d2360a26..36004738944 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -256,6 +256,13 @@ struct irq_chip irq_type_sn = {
256 .set_affinity = sn_set_affinity_irq 256 .set_affinity = sn_set_affinity_irq
257}; 257};
258 258
259ia64_vector sn_irq_to_vector(int irq)
260{
261 if (irq >= IA64_NUM_VECTORS)
262 return 0;
263 return (ia64_vector)irq;
264}
265
259unsigned int sn_local_vector_to_irq(u8 vector) 266unsigned int sn_local_vector_to_irq(u8 vector)
260{ 267{
261 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector)); 268 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
@@ -398,7 +405,10 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
398 struct sn_pcibus_provider *pci_provider; 405 struct sn_pcibus_provider *pci_provider;
399 406
400 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; 407 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
401 if (pci_provider && pci_provider->force_interrupt) 408
409 /* Don't force an interrupt if the irq has been disabled */
410 if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) &&
411 pci_provider && pci_provider->force_interrupt)
402 (*pci_provider->force_interrupt)(sn_irq_info); 412 (*pci_provider->force_interrupt)(sn_irq_info);
403} 413}
404 414
diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c
index b732644788d..13761bf160c 100644
--- a/arch/powerpc/boot/flatdevtree.c
+++ b/arch/powerpc/boot/flatdevtree.c
@@ -134,20 +134,6 @@ static char *ft_next(struct ft_cxt *cxt, char *p, struct ft_atom *ret)
134#define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8) 134#define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8)
135#define EXPAND_INCR 1024 /* alloc this much extra when expanding */ 135#define EXPAND_INCR 1024 /* alloc this much extra when expanding */
136 136
137/* See if the regions are in the standard order and non-overlapping */
138static int ft_ordered(struct ft_cxt *cxt)
139{
140 char *p = (char *)cxt->bph + HDR_SIZE;
141 enum ft_rgn_id r;
142
143 for (r = FT_RSVMAP; r <= FT_STRINGS; ++r) {
144 if (p > cxt->rgn[r].start)
145 return 0;
146 p = cxt->rgn[r].start + cxt->rgn[r].size;
147 }
148 return p <= (char *)cxt->bph + cxt->max_size;
149}
150
151/* Copy the tree to a newly-allocated region and put things in order */ 137/* Copy the tree to a newly-allocated region and put things in order */
152static int ft_reorder(struct ft_cxt *cxt, int nextra) 138static int ft_reorder(struct ft_cxt *cxt, int nextra)
153{ 139{
@@ -573,10 +559,6 @@ int ft_open(struct ft_cxt *cxt, void *blob, unsigned int max_size,
573 cxt->rgn[FT_STRUCT].size = struct_size(cxt); 559 cxt->rgn[FT_STRUCT].size = struct_size(cxt);
574 cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings); 560 cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings);
575 cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size); 561 cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size);
576 /* Leave as '0' to force first ft_make_space call to do a ft_reorder
577 * and move dt to an area allocated by realloc.
578 cxt->isordered = ft_ordered(cxt);
579 */
580 562
581 cxt->p = cxt->rgn[FT_STRUCT].start; 563 cxt->p = cxt->rgn[FT_STRUCT].start;
582 cxt->str_anchor = cxt->rgn[FT_STRINGS].start; 564 cxt->str_anchor = cxt->rgn[FT_STRINGS].start;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index f39a72f30aa..b0cb2e662c2 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -81,6 +81,7 @@ obj-y += iomap.o
81endif 81endif
82 82
83ifeq ($(CONFIG_PPC_ISERIES),y) 83ifeq ($(CONFIG_PPC_ISERIES),y)
84CFLAGS_lparmap.s += -g0
84extra-y += lparmap.s 85extra-y += lparmap.s
85$(obj)/head_64.o: $(obj)/lparmap.s 86$(obj)/head_64.o: $(obj)/lparmap.s
86AFLAGS_head_64.o += -I$(obj) 87AFLAGS_head_64.o += -I$(obj)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index e708ab7ca9e..8533de50347 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -301,9 +301,19 @@ _GLOBAL(_tlbie)
301 mfspr r4,SPRN_MMUCR 301 mfspr r4,SPRN_MMUCR
302 mfspr r5,SPRN_PID /* Get PID */ 302 mfspr r5,SPRN_PID /* Get PID */
303 rlwimi r4,r5,0,24,31 /* Set TID */ 303 rlwimi r4,r5,0,24,31 /* Set TID */
304 mtspr SPRN_MMUCR,r4
305 304
305 /* We have to run the search with interrupts disabled, even critical
306 * and debug interrupts (in fact the only critical exceptions we have
307 * are debug and machine check). Otherwise an interrupt which causes
308 * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
309 mfmsr r5
310 lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
311 addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
312 andc r6,r5,r6
313 mtmsr r6
314 mtspr SPRN_MMUCR,r4
306 tlbsx. r3, 0, r3 315 tlbsx. r3, 0, r3
316 mtmsr r5
307 bne 10f 317 bne 10f
308 sync 318 sync
309 /* There are only 64 TLB entries, so r3 < 64, 319 /* There are only 64 TLB entries, so r3 < 64,
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index f1789578747..a47151e806c 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -795,7 +795,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
795 795
796#ifdef CONFIG_PPC_MM_SLICES 796#ifdef CONFIG_PPC_MM_SLICES
797 /* We only prefault standard pages for now */ 797 /* We only prefault standard pages for now */
798 if (unlikely(get_slice_psize(mm, ea) != mm->context.user_psize)); 798 if (unlikely(get_slice_psize(mm, ea) != mm->context.user_psize))
799 return; 799 return;
800#endif 800#endif
801 801
diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c
index dd2c6688c8a..027ac32cc63 100644
--- a/arch/powerpc/platforms/cell/spu_syscalls.c
+++ b/arch/powerpc/platforms/cell/spu_syscalls.c
@@ -45,6 +45,7 @@ asmlinkage long sys_spu_create(const char __user *name,
45 if (owner && try_module_get(owner)) { 45 if (owner && try_module_get(owner)) {
46 if (flags & SPU_CREATE_AFFINITY_SPU) { 46 if (flags & SPU_CREATE_AFFINITY_SPU) {
47 neighbor = fget_light(neighbor_fd, &fput_needed); 47 neighbor = fget_light(neighbor_fd, &fput_needed);
48 ret = -EBADF;
48 if (neighbor) { 49 if (neighbor) {
49 ret = spufs_calls.create_thread(name, flags, 50 ret = spufs_calls.create_thread(name, flags,
50 mode, neighbor); 51 mode, neighbor);
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index e23a5a874ad..ce15cada88d 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -372,7 +372,7 @@ static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo)
372 notify_event->dev_type == repo->dev_type) { 372 notify_event->dev_type == repo->dev_type) {
373 pr_debug("%s:%u: device ready: dev_id %u\n", __func__, 373 pr_debug("%s:%u: device ready: dev_id %u\n", __func__,
374 __LINE__, repo->dev_id); 374 __LINE__, repo->dev_id);
375 result = 0; 375 error = 0;
376 break; 376 break;
377 } 377 }
378 378
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 0da55368655..a22e1f4d94c 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -237,9 +237,19 @@ _GLOBAL(_tlbie)
237 mfspr r4,SPRN_MMUCR 237 mfspr r4,SPRN_MMUCR
238 mfspr r5,SPRN_PID /* Get PID */ 238 mfspr r5,SPRN_PID /* Get PID */
239 rlwimi r4,r5,0,24,31 /* Set TID */ 239 rlwimi r4,r5,0,24,31 /* Set TID */
240 mtspr SPRN_MMUCR,r4
241 240
241 /* We have to run the search with interrupts disabled, even critical
242 * and debug interrupts (in fact the only critical exceptions we have
243 * are debug and machine check). Otherwise an interrupt which causes
244 * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
245 mfmsr r5
246 lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
247 addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
248 andc r6,r5,r6
249 mtmsr r6
250 mtspr SPRN_MMUCR,r4
242 tlbsx. r3, 0, r3 251 tlbsx. r3, 0, r3
252 mtmsr r5
243 bne 10f 253 bne 10f
244 sync 254 sync
245 /* There are only 64 TLB entries, so r3 < 64, 255 /* There are only 64 TLB entries, so r3 < 64,
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 9833493d886..80b637c3020 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -76,7 +76,7 @@ static void scif_sercon_putc(int c)
76 sci_in(&scif_port, SCxSR); 76 sci_in(&scif_port, SCxSR);
77 sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40)); 77 sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
78 78
79 while ((sci_in(&scif_port, SCxSR) & 0x40) == 0); 79 while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
80 ; 80 ;
81 81
82 if (c == '\n') 82 if (c == '\n')
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index 23c5948f012..129b2cfd18a 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -91,6 +91,13 @@ void __init sh_mv_setup(void)
91 (unsigned long)&__machvec_start); 91 (unsigned long)&__machvec_start);
92 92
93 /* 93 /*
94 * Sanity check for machvec section alignment. Ensure
95 * __initmv hasn't been misused.
96 */
97 if (machvec_size % sizeof(struct sh_machine_vector))
98 panic("machvec misaligned, invalid __initmv use?");
99
100 /*
94 * If the machvec hasn't been preselected, use the first 101 * If the machvec hasn't been preselected, use the first
95 * vector (usually the only one) from .machvec.init. 102 * vector (usually the only one) from .machvec.init.
96 */ 103 */
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c
index 891d1d46c90..f64a2d2416d 100644
--- a/arch/sh/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace.c
@@ -93,6 +93,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
93 case PTRACE_PEEKTEXT: /* read word at location addr. */ 93 case PTRACE_PEEKTEXT: /* read word at location addr. */
94 case PTRACE_PEEKDATA: 94 case PTRACE_PEEKDATA:
95 ret = generic_ptrace_peekdata(child, addr, data); 95 ret = generic_ptrace_peekdata(child, addr, data);
96 break;
96 97
97 /* read the word at location addr in the USER area. */ 98 /* read the word at location addr in the USER area. */
98 case PTRACE_PEEKUSR: { 99 case PTRACE_PEEKUSR: {
diff --git a/arch/sh64/kernel/setup.c b/arch/sh64/kernel/setup.c
index 53e9d20a874..2b7264c0c6f 100644
--- a/arch/sh64/kernel/setup.c
+++ b/arch/sh64/kernel/setup.c
@@ -59,10 +59,6 @@
59#include <asm/setup.h> 59#include <asm/setup.h>
60#include <asm/smp.h> 60#include <asm/smp.h>
61 61
62#ifdef CONFIG_VT
63#include <linux/console.h>
64#endif
65
66struct screen_info screen_info; 62struct screen_info screen_info;
67 63
68#ifdef CONFIG_BLK_DEV_RAM 64#ifdef CONFIG_BLK_DEV_RAM
diff --git a/arch/sh64/kernel/signal.c b/arch/sh64/kernel/signal.c
index 0bb4a8f9427..79fc48cf54c 100644
--- a/arch/sh64/kernel/signal.c
+++ b/arch/sh64/kernel/signal.c
@@ -25,7 +25,6 @@
25#include <linux/ptrace.h> 25#include <linux/ptrace.h>
26#include <linux/unistd.h> 26#include <linux/unistd.h>
27#include <linux/stddef.h> 27#include <linux/stddef.h>
28#include <linux/personality.h>
29#include <asm/ucontext.h> 28#include <asm/ucontext.h>
30#include <asm/uaccess.h> 29#include <asm/uaccess.h>
31#include <asm/pgtable.h> 30#include <asm/pgtable.h>
diff --git a/arch/sparc/kernel/ebus.c b/arch/sparc/kernel/ebus.c
index ac352eb6dff..e2d02fd13f3 100644
--- a/arch/sparc/kernel/ebus.c
+++ b/arch/sparc/kernel/ebus.c
@@ -238,6 +238,7 @@ void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *d
238 sd = &dev->ofdev.dev.archdata; 238 sd = &dev->ofdev.dev.archdata;
239 sd->prom_node = dp; 239 sd->prom_node = dp;
240 sd->op = &dev->ofdev; 240 sd->op = &dev->ofdev;
241 sd->iommu = dev->bus->ofdev.dev.parent->archdata.iommu;
241 242
242 dev->ofdev.node = dp; 243 dev->ofdev.node = dp;
243 dev->ofdev.dev.parent = &dev->bus->ofdev.dev; 244 dev->ofdev.dev.parent = &dev->bus->ofdev.dev;
diff --git a/arch/sparc/mm/init.c b/arch/sparc/mm/init.c
index a1bef07755a..c13e6cd279a 100644
--- a/arch/sparc/mm/init.c
+++ b/arch/sparc/mm/init.c
@@ -206,8 +206,7 @@ unsigned long __init bootmem_init(unsigned long *pages_avail)
206#ifdef CONFIG_BLK_DEV_INITRD 206#ifdef CONFIG_BLK_DEV_INITRD
207 /* Now have to check initial ramdisk, so that bootmap does not overwrite it */ 207 /* Now have to check initial ramdisk, so that bootmap does not overwrite it */
208 if (sparc_ramdisk_image) { 208 if (sparc_ramdisk_image) {
209 if (sparc_ramdisk_image >= (unsigned long)&_end - 2 * PAGE_SIZE) 209 sparc_ramdisk_image -= KERNBASE;
210 sparc_ramdisk_image -= KERNBASE;
211 initrd_start = sparc_ramdisk_image + phys_base; 210 initrd_start = sparc_ramdisk_image + phys_base;
212 initrd_end = initrd_start + sparc_ramdisk_size; 211 initrd_end = initrd_start + sparc_ramdisk_size;
213 if (initrd_end > end_of_phys_memory) { 212 if (initrd_end > end_of_phys_memory) {
diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c
index 4ccda77d08d..7c89893b1fe 100644
--- a/arch/sparc/mm/io-unit.c
+++ b/arch/sparc/mm/io-unit.c
@@ -66,7 +66,7 @@ iounit_init(int sbi_node, int io_node, struct sbus_bus *sbus)
66 } 66 }
67 if(!xpt) panic("Cannot map External Page Table."); 67 if(!xpt) panic("Cannot map External Page Table.");
68 68
69 sbus->iommu = (struct iommu_struct *)iounit; 69 sbus->ofdev.dev.archdata.iommu = iounit;
70 iounit->page_table = xpt; 70 iounit->page_table = xpt;
71 spin_lock_init(&iounit->lock); 71 spin_lock_init(&iounit->lock);
72 72
@@ -127,7 +127,7 @@ nexti: scan = find_next_zero_bit(iounit->bmap, limit, scan);
127static __u32 iounit_get_scsi_one(char *vaddr, unsigned long len, struct sbus_bus *sbus) 127static __u32 iounit_get_scsi_one(char *vaddr, unsigned long len, struct sbus_bus *sbus)
128{ 128{
129 unsigned long ret, flags; 129 unsigned long ret, flags;
130 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 130 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
131 131
132 spin_lock_irqsave(&iounit->lock, flags); 132 spin_lock_irqsave(&iounit->lock, flags);
133 ret = iounit_get_area(iounit, (unsigned long)vaddr, len); 133 ret = iounit_get_area(iounit, (unsigned long)vaddr, len);
@@ -138,7 +138,7 @@ static __u32 iounit_get_scsi_one(char *vaddr, unsigned long len, struct sbus_bus
138static void iounit_get_scsi_sgl(struct scatterlist *sg, int sz, struct sbus_bus *sbus) 138static void iounit_get_scsi_sgl(struct scatterlist *sg, int sz, struct sbus_bus *sbus)
139{ 139{
140 unsigned long flags; 140 unsigned long flags;
141 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 141 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
142 142
143 /* FIXME: Cache some resolved pages - often several sg entries are to the same page */ 143 /* FIXME: Cache some resolved pages - often several sg entries are to the same page */
144 spin_lock_irqsave(&iounit->lock, flags); 144 spin_lock_irqsave(&iounit->lock, flags);
@@ -153,7 +153,7 @@ static void iounit_get_scsi_sgl(struct scatterlist *sg, int sz, struct sbus_bus
153static void iounit_release_scsi_one(__u32 vaddr, unsigned long len, struct sbus_bus *sbus) 153static void iounit_release_scsi_one(__u32 vaddr, unsigned long len, struct sbus_bus *sbus)
154{ 154{
155 unsigned long flags; 155 unsigned long flags;
156 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 156 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
157 157
158 spin_lock_irqsave(&iounit->lock, flags); 158 spin_lock_irqsave(&iounit->lock, flags);
159 len = ((vaddr & ~PAGE_MASK) + len + (PAGE_SIZE-1)) >> PAGE_SHIFT; 159 len = ((vaddr & ~PAGE_MASK) + len + (PAGE_SIZE-1)) >> PAGE_SHIFT;
@@ -168,7 +168,7 @@ static void iounit_release_scsi_sgl(struct scatterlist *sg, int sz, struct sbus_
168{ 168{
169 unsigned long flags; 169 unsigned long flags;
170 unsigned long vaddr, len; 170 unsigned long vaddr, len;
171 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 171 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
172 172
173 spin_lock_irqsave(&iounit->lock, flags); 173 spin_lock_irqsave(&iounit->lock, flags);
174 while (sz != 0) { 174 while (sz != 0) {
@@ -211,7 +211,7 @@ static int iounit_map_dma_area(dma_addr_t *pba, unsigned long va, __u32 addr, in
211 i = ((addr - IOUNIT_DMA_BASE) >> PAGE_SHIFT); 211 i = ((addr - IOUNIT_DMA_BASE) >> PAGE_SHIFT);
212 212
213 for_each_sbus(sbus) { 213 for_each_sbus(sbus) {
214 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 214 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
215 215
216 iopte = (iopte_t *)(iounit->page_table + i); 216 iopte = (iopte_t *)(iounit->page_table + i);
217 *iopte = MKIOPTE(__pa(page)); 217 *iopte = MKIOPTE(__pa(page));
@@ -235,7 +235,7 @@ static void iounit_unmap_dma_area(unsigned long addr, int len)
235static struct page *iounit_translate_dvma(unsigned long addr) 235static struct page *iounit_translate_dvma(unsigned long addr)
236{ 236{
237 struct sbus_bus *sbus = sbus_root; /* They are all the same */ 237 struct sbus_bus *sbus = sbus_root; /* They are all the same */
238 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 238 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
239 int i; 239 int i;
240 iopte_t *iopte; 240 iopte_t *iopte;
241 241
@@ -279,7 +279,7 @@ __u32 iounit_map_dma_init(struct sbus_bus *sbus, int size)
279 unsigned long rotor, scan, limit; 279 unsigned long rotor, scan, limit;
280 unsigned long flags; 280 unsigned long flags;
281 __u32 ret; 281 __u32 ret;
282 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 282 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
283 283
284 npages = (size + (PAGE_SIZE-1)) >> PAGE_SHIFT; 284 npages = (size + (PAGE_SIZE-1)) >> PAGE_SHIFT;
285 i = 0x0213; 285 i = 0x0213;
@@ -315,7 +315,7 @@ nexti: scan = find_next_zero_bit(iounit->bmap, limit, scan);
315__u32 iounit_map_dma_page(__u32 vaddr, void *addr, struct sbus_bus *sbus) 315__u32 iounit_map_dma_page(__u32 vaddr, void *addr, struct sbus_bus *sbus)
316{ 316{
317 int scan = (vaddr - IOUNIT_DMA_BASE) >> PAGE_SHIFT; 317 int scan = (vaddr - IOUNIT_DMA_BASE) >> PAGE_SHIFT;
318 struct iounit_struct *iounit = (struct iounit_struct *)sbus->iommu; 318 struct iounit_struct *iounit = sbus->ofdev.dev.archdata.iommu;
319 319
320 iounit->page_table[scan] = MKIOPTE(__pa(((unsigned long)addr) & PAGE_MASK)); 320 iounit->page_table[scan] = MKIOPTE(__pa(((unsigned long)addr) & PAGE_MASK));
321 return vaddr + (((unsigned long)addr) & ~PAGE_MASK); 321 return vaddr + (((unsigned long)addr) & ~PAGE_MASK);
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c
index be042efd1ba..52e907af9d2 100644
--- a/arch/sparc/mm/iommu.c
+++ b/arch/sparc/mm/iommu.c
@@ -132,7 +132,7 @@ iommu_init(int iommund, struct sbus_bus *sbus)
132 impl, vers, iommu->page_table, 132 impl, vers, iommu->page_table,
133 (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES); 133 (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES);
134 134
135 sbus->iommu = iommu; 135 sbus->ofdev.dev.archdata.iommu = iommu;
136} 136}
137 137
138/* This begs to be btfixup-ed by srmmu. */ 138/* This begs to be btfixup-ed by srmmu. */
@@ -166,7 +166,7 @@ static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte)
166 166
167static u32 iommu_get_one(struct page *page, int npages, struct sbus_bus *sbus) 167static u32 iommu_get_one(struct page *page, int npages, struct sbus_bus *sbus)
168{ 168{
169 struct iommu_struct *iommu = sbus->iommu; 169 struct iommu_struct *iommu = sbus->ofdev.dev.archdata.iommu;
170 int ioptex; 170 int ioptex;
171 iopte_t *iopte, *iopte0; 171 iopte_t *iopte, *iopte0;
172 unsigned int busa, busa0; 172 unsigned int busa, busa0;
@@ -291,7 +291,7 @@ static void iommu_get_scsi_sgl_pflush(struct scatterlist *sg, int sz, struct sbu
291 291
292static void iommu_release_one(u32 busa, int npages, struct sbus_bus *sbus) 292static void iommu_release_one(u32 busa, int npages, struct sbus_bus *sbus)
293{ 293{
294 struct iommu_struct *iommu = sbus->iommu; 294 struct iommu_struct *iommu = sbus->ofdev.dev.archdata.iommu;
295 int ioptex; 295 int ioptex;
296 int i; 296 int i;
297 297
@@ -334,7 +334,7 @@ static int iommu_map_dma_area(dma_addr_t *pba, unsigned long va,
334 unsigned long addr, int len) 334 unsigned long addr, int len)
335{ 335{
336 unsigned long page, end; 336 unsigned long page, end;
337 struct iommu_struct *iommu = sbus_root->iommu; 337 struct iommu_struct *iommu = sbus_root->ofdev.dev.archdata.iommu;
338 iopte_t *iopte = iommu->page_table; 338 iopte_t *iopte = iommu->page_table;
339 iopte_t *first; 339 iopte_t *first;
340 int ioptex; 340 int ioptex;
@@ -399,7 +399,7 @@ static int iommu_map_dma_area(dma_addr_t *pba, unsigned long va,
399 399
400static void iommu_unmap_dma_area(unsigned long busa, int len) 400static void iommu_unmap_dma_area(unsigned long busa, int len)
401{ 401{
402 struct iommu_struct *iommu = sbus_root->iommu; 402 struct iommu_struct *iommu = sbus_root->ofdev.dev.archdata.iommu;
403 iopte_t *iopte = iommu->page_table; 403 iopte_t *iopte = iommu->page_table;
404 unsigned long end; 404 unsigned long end;
405 int ioptex = (busa - iommu->start) >> PAGE_SHIFT; 405 int ioptex = (busa - iommu->start) >> PAGE_SHIFT;
@@ -420,7 +420,7 @@ static void iommu_unmap_dma_area(unsigned long busa, int len)
420 420
421static struct page *iommu_translate_dvma(unsigned long busa) 421static struct page *iommu_translate_dvma(unsigned long busa)
422{ 422{
423 struct iommu_struct *iommu = sbus_root->iommu; 423 struct iommu_struct *iommu = sbus_root->ofdev.dev.archdata.iommu;
424 iopte_t *iopte = iommu->page_table; 424 iopte_t *iopte = iommu->page_table;
425 425
426 iopte += ((busa - iommu->start) >> PAGE_SHIFT); 426 iopte += ((busa - iommu->start) >> PAGE_SHIFT);
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index 79d60d86f6f..005a3e72d4f 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -268,7 +268,6 @@ static inline void sun4c_init_clean_mmu(unsigned long kernel_end)
268 unsigned char savectx, ctx; 268 unsigned char savectx, ctx;
269 269
270 savectx = sun4c_get_context(); 270 savectx = sun4c_get_context();
271 kernel_end = SUN4C_REAL_PGDIR_ALIGN(kernel_end);
272 for (ctx = 0; ctx < num_contexts; ctx++) { 271 for (ctx = 0; ctx < num_contexts; ctx++) {
273 sun4c_set_context(ctx); 272 sun4c_set_context(ctx);
274 for (vaddr = 0; vaddr < 0x20000000; vaddr += SUN4C_REAL_PGDIR_SIZE) 273 for (vaddr = 0; vaddr < 0x20000000; vaddr += SUN4C_REAL_PGDIR_SIZE)
@@ -2064,7 +2063,6 @@ void __init sun4c_paging_init(void)
2064 unsigned long end_pfn, pages_avail; 2063 unsigned long end_pfn, pages_avail;
2065 2064
2066 kernel_end = (unsigned long) &end; 2065 kernel_end = (unsigned long) &end;
2067 kernel_end += (SUN4C_REAL_PGDIR_SIZE * 4);
2068 kernel_end = SUN4C_REAL_PGDIR_ALIGN(kernel_end); 2066 kernel_end = SUN4C_REAL_PGDIR_ALIGN(kernel_end);
2069 2067
2070 pages_avail = 0; 2068 pages_avail = 0;
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index ac18bd8e273..63144ad476f 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -501,7 +501,7 @@ niagara_tlb_fixup:
501 cmp %g1, SUN4V_CHIP_NIAGARA1 501 cmp %g1, SUN4V_CHIP_NIAGARA1
502 be,pt %xcc, niagara_patch 502 be,pt %xcc, niagara_patch
503 cmp %g1, SUN4V_CHIP_NIAGARA2 503 cmp %g1, SUN4V_CHIP_NIAGARA2
504 be,pt %xcc, niagara_patch 504 be,pt %xcc, niagara2_patch
505 nop 505 nop
506 506
507 call generic_patch_copyops 507 call generic_patch_copyops
@@ -512,6 +512,15 @@ niagara_tlb_fixup:
512 nop 512 nop
513 513
514 ba,a,pt %xcc, 80f 514 ba,a,pt %xcc, 80f
515niagara2_patch:
516 call niagara2_patch_copyops
517 nop
518 call niagara_patch_bzero
519 nop
520 call niagara2_patch_pageops
521 nop
522
523 ba,a,pt %xcc, 80f
515 524
516niagara_patch: 525niagara_patch:
517 call niagara_patch_copyops 526 call niagara_patch_copyops
@@ -706,12 +715,13 @@ setup_trap_table:
706 715
707 membar #Sync 716 membar #Sync
708 717
718 BRANCH_IF_SUN4V(o2, 1f)
719
709 /* Kill PROM timer */ 720 /* Kill PROM timer */
710 sethi %hi(0x80000000), %o2 721 sethi %hi(0x80000000), %o2
711 sllx %o2, 32, %o2 722 sllx %o2, 32, %o2
712 wr %o2, 0, %tick_cmpr 723 wr %o2, 0, %tick_cmpr
713 724
714 BRANCH_IF_SUN4V(o2, 1f)
715 BRANCH_IF_ANY_CHEETAH(o2, o3, 1f) 725 BRANCH_IF_ANY_CHEETAH(o2, o3, 1f)
716 726
717 ba,pt %xcc, 2f 727 ba,pt %xcc, 2f
diff --git a/arch/sparc64/kernel/mdesc.c b/arch/sparc64/kernel/mdesc.c
index 95059c2ec41..9f22e4ff601 100644
--- a/arch/sparc64/kernel/mdesc.c
+++ b/arch/sparc64/kernel/mdesc.c
@@ -9,6 +9,7 @@
9#include <linux/list.h> 9#include <linux/list.h>
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/miscdevice.h>
12 13
13#include <asm/hypervisor.h> 14#include <asm/hypervisor.h>
14#include <asm/mdesc.h> 15#include <asm/mdesc.h>
@@ -836,6 +837,43 @@ void __devinit mdesc_fill_in_cpu_data(cpumask_t mask)
836 mdesc_release(hp); 837 mdesc_release(hp);
837} 838}
838 839
840static ssize_t mdesc_read(struct file *file, char __user *buf,
841 size_t len, loff_t *offp)
842{
843 struct mdesc_handle *hp = mdesc_grab();
844 int err;
845
846 if (!hp)
847 return -ENODEV;
848
849 err = hp->handle_size;
850 if (len < hp->handle_size)
851 err = -EMSGSIZE;
852 else if (copy_to_user(buf, &hp->mdesc, hp->handle_size))
853 err = -EFAULT;
854 mdesc_release(hp);
855
856 return err;
857}
858
859static const struct file_operations mdesc_fops = {
860 .read = mdesc_read,
861 .owner = THIS_MODULE,
862};
863
864static struct miscdevice mdesc_misc = {
865 .minor = MISC_DYNAMIC_MINOR,
866 .name = "mdesc",
867 .fops = &mdesc_fops,
868};
869
870static int __init mdesc_misc_init(void)
871{
872 return misc_register(&mdesc_misc);
873}
874
875__initcall(mdesc_misc_init);
876
839void __init sun4v_mdesc_init(void) 877void __init sun4v_mdesc_init(void)
840{ 878{
841 struct mdesc_handle *hp; 879 struct mdesc_handle *hp;
diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S
index 9448595f906..9533a25ce5d 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc64/kernel/trampoline.S
@@ -95,14 +95,13 @@ spitfire_startup:
95 membar #Sync 95 membar #Sync
96 96
97startup_continue: 97startup_continue:
98 mov %o0, %l0
99 BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
100
98 sethi %hi(0x80000000), %g2 101 sethi %hi(0x80000000), %g2
99 sllx %g2, 32, %g2 102 sllx %g2, 32, %g2
100 wr %g2, 0, %tick_cmpr 103 wr %g2, 0, %tick_cmpr
101 104
102 mov %o0, %l0
103
104 BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
105
106 /* Call OBP by hand to lock KERNBASE into i/d tlbs. 105 /* Call OBP by hand to lock KERNBASE into i/d tlbs.
107 * We lock 2 consequetive entries if we are 'bigkernel'. 106 * We lock 2 consequetive entries if we are 'bigkernel'.
108 */ 107 */
diff --git a/arch/sparc64/lib/Makefile b/arch/sparc64/lib/Makefile
index f95fbfa3eeb..f095e13910b 100644
--- a/arch/sparc64/lib/Makefile
+++ b/arch/sparc64/lib/Makefile
@@ -13,6 +13,8 @@ lib-y := PeeCeeI.o copy_page.o clear_page.o strlen.o strncmp.o \
13 U3memcpy.o U3copy_from_user.o U3copy_to_user.o U3patch.o \ 13 U3memcpy.o U3copy_from_user.o U3copy_to_user.o U3patch.o \
14 NGmemcpy.o NGcopy_from_user.o NGcopy_to_user.o NGpatch.o \ 14 NGmemcpy.o NGcopy_from_user.o NGcopy_to_user.o NGpatch.o \
15 NGpage.o NGbzero.o \ 15 NGpage.o NGbzero.o \
16 NG2memcpy.o NG2copy_from_user.o NG2copy_to_user.o NG2patch.o \
17 NG2page.o \
16 GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o GENpatch.o \ 18 GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o GENpatch.o \
17 GENpage.o GENbzero.o \ 19 GENpage.o GENbzero.o \
18 copy_in_user.o user_fixup.o memmove.o \ 20 copy_in_user.o user_fixup.o memmove.o \
diff --git a/arch/sparc64/lib/NG2copy_from_user.S b/arch/sparc64/lib/NG2copy_from_user.S
new file mode 100644
index 00000000000..c77ef5f2210
--- /dev/null
+++ b/arch/sparc64/lib/NG2copy_from_user.S
@@ -0,0 +1,40 @@
1/* NG2copy_from_user.S: Niagara-2 optimized copy from userspace.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5
6#define EX_LD(x) \
798: x; \
8 .section .fixup; \
9 .align 4; \
1099: wr %g0, ASI_AIUS, %asi;\
11 retl; \
12 mov 1, %o0; \
13 .section __ex_table,"a";\
14 .align 4; \
15 .word 98b, 99b; \
16 .text; \
17 .align 4;
18
19#ifndef ASI_AIUS
20#define ASI_AIUS 0x11
21#endif
22
23#ifndef ASI_BLK_AIUS_4V
24#define ASI_BLK_AIUS_4V 0x17
25#endif
26
27#define FUNC_NAME NG2copy_from_user
28#define LOAD(type,addr,dest) type##a [addr] %asi, dest
29#define LOAD_BLK(addr,dest) ldda [addr] ASI_BLK_AIUS_4V, dest
30#define EX_RETVAL(x) 0
31
32#ifdef __KERNEL__
33#define PREAMBLE \
34 rd %asi, %g1; \
35 cmp %g1, ASI_AIUS; \
36 bne,pn %icc, memcpy_user_stub; \
37 nop
38#endif
39
40#include "NG2memcpy.S"
diff --git a/arch/sparc64/lib/NG2copy_to_user.S b/arch/sparc64/lib/NG2copy_to_user.S
new file mode 100644
index 00000000000..4bd4093acbb
--- /dev/null
+++ b/arch/sparc64/lib/NG2copy_to_user.S
@@ -0,0 +1,49 @@
1/* NG2copy_to_user.S: Niagara-2 optimized copy to userspace.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5
6#define EX_ST(x) \
798: x; \
8 .section .fixup; \
9 .align 4; \
1099: wr %g0, ASI_AIUS, %asi;\
11 retl; \
12 mov 1, %o0; \
13 .section __ex_table,"a";\
14 .align 4; \
15 .word 98b, 99b; \
16 .text; \
17 .align 4;
18
19#ifndef ASI_AIUS
20#define ASI_AIUS 0x11
21#endif
22
23#ifndef ASI_BLK_AIUS_4V
24#define ASI_BLK_AIUS_4V 0x17
25#endif
26
27#ifndef ASI_BLK_INIT_QUAD_LDD_AIUS
28#define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23
29#endif
30
31#define FUNC_NAME NG2copy_to_user
32#define STORE(type,src,addr) type##a src, [addr] ASI_AIUS
33#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_AIUS
34#define STORE_BLK(src,addr) stda src, [addr] ASI_BLK_AIUS_4V
35#define EX_RETVAL(x) 0
36
37#ifdef __KERNEL__
38 /* Writing to %asi is _expensive_ so we hardcode it.
39 * Reading %asi to check for KERNEL_DS is comparatively
40 * cheap.
41 */
42#define PREAMBLE \
43 rd %asi, %g1; \
44 cmp %g1, ASI_AIUS; \
45 bne,pn %icc, memcpy_user_stub; \
46 nop
47#endif
48
49#include "NG2memcpy.S"
diff --git a/arch/sparc64/lib/NG2memcpy.S b/arch/sparc64/lib/NG2memcpy.S
new file mode 100644
index 00000000000..0aed75653b5
--- /dev/null
+++ b/arch/sparc64/lib/NG2memcpy.S
@@ -0,0 +1,520 @@
1/* NG2memcpy.S: Niagara-2 optimized memcpy.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5
6#ifdef __KERNEL__
7#include <asm/visasm.h>
8#include <asm/asi.h>
9#define GLOBAL_SPARE %g7
10#else
11#define ASI_PNF 0x82
12#define ASI_BLK_P 0xf0
13#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
14#define FPRS_FEF 0x04
15#ifdef MEMCPY_DEBUG
16#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs; \
17 clr %g1; clr %g2; clr %g3; subcc %g0, %g0, %g0;
18#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
19#else
20#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs
21#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
22#endif
23#define GLOBAL_SPARE %g5
24#endif
25
26#ifndef STORE_ASI
27#ifndef SIMULATE_NIAGARA_ON_NON_NIAGARA
28#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P
29#else
30#define STORE_ASI 0x80 /* ASI_P */
31#endif
32#endif
33
34#ifndef EX_LD
35#define EX_LD(x) x
36#endif
37
38#ifndef EX_ST
39#define EX_ST(x) x
40#endif
41
42#ifndef EX_RETVAL
43#define EX_RETVAL(x) x
44#endif
45
46#ifndef LOAD
47#define LOAD(type,addr,dest) type [addr], dest
48#endif
49
50#ifndef LOAD_BLK
51#define LOAD_BLK(addr,dest) ldda [addr] ASI_BLK_P, dest
52#endif
53
54#ifndef STORE
55#ifndef MEMCPY_DEBUG
56#define STORE(type,src,addr) type src, [addr]
57#else
58#define STORE(type,src,addr) type##a src, [addr] 0x80
59#endif
60#endif
61
62#ifndef STORE_BLK
63#define STORE_BLK(src,addr) stda src, [addr] ASI_BLK_P
64#endif
65
66#ifndef STORE_INIT
67#define STORE_INIT(src,addr) stxa src, [addr] STORE_ASI
68#endif
69
70#ifndef FUNC_NAME
71#define FUNC_NAME NG2memcpy
72#endif
73
74#ifndef PREAMBLE
75#define PREAMBLE
76#endif
77
78#ifndef XCC
79#define XCC xcc
80#endif
81
82#define FREG_FROB(x0, x1, x2, x3, x4, x5, x6, x7, x8) \
83 faligndata %x0, %x1, %f0; \
84 faligndata %x1, %x2, %f2; \
85 faligndata %x2, %x3, %f4; \
86 faligndata %x3, %x4, %f6; \
87 faligndata %x4, %x5, %f8; \
88 faligndata %x5, %x6, %f10; \
89 faligndata %x6, %x7, %f12; \
90 faligndata %x7, %x8, %f14;
91
92#define FREG_MOVE_1(x0) \
93 fmovd %x0, %f0;
94#define FREG_MOVE_2(x0, x1) \
95 fmovd %x0, %f0; \
96 fmovd %x1, %f2;
97#define FREG_MOVE_3(x0, x1, x2) \
98 fmovd %x0, %f0; \
99 fmovd %x1, %f2; \
100 fmovd %x2, %f4;
101#define FREG_MOVE_4(x0, x1, x2, x3) \
102 fmovd %x0, %f0; \
103 fmovd %x1, %f2; \
104 fmovd %x2, %f4; \
105 fmovd %x3, %f6;
106#define FREG_MOVE_5(x0, x1, x2, x3, x4) \
107 fmovd %x0, %f0; \
108 fmovd %x1, %f2; \
109 fmovd %x2, %f4; \
110 fmovd %x3, %f6; \
111 fmovd %x4, %f8;
112#define FREG_MOVE_6(x0, x1, x2, x3, x4, x5) \
113 fmovd %x0, %f0; \
114 fmovd %x1, %f2; \
115 fmovd %x2, %f4; \
116 fmovd %x3, %f6; \
117 fmovd %x4, %f8; \
118 fmovd %x5, %f10;
119#define FREG_MOVE_7(x0, x1, x2, x3, x4, x5, x6) \
120 fmovd %x0, %f0; \
121 fmovd %x1, %f2; \
122 fmovd %x2, %f4; \
123 fmovd %x3, %f6; \
124 fmovd %x4, %f8; \
125 fmovd %x5, %f10; \
126 fmovd %x6, %f12;
127#define FREG_MOVE_8(x0, x1, x2, x3, x4, x5, x6, x7) \
128 fmovd %x0, %f0; \
129 fmovd %x1, %f2; \
130 fmovd %x2, %f4; \
131 fmovd %x3, %f6; \
132 fmovd %x4, %f8; \
133 fmovd %x5, %f10; \
134 fmovd %x6, %f12; \
135 fmovd %x7, %f14;
136#define FREG_LOAD_1(base, x0) \
137 EX_LD(LOAD(ldd, base + 0x00, %x0))
138#define FREG_LOAD_2(base, x0, x1) \
139 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
140 EX_LD(LOAD(ldd, base + 0x08, %x1));
141#define FREG_LOAD_3(base, x0, x1, x2) \
142 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
143 EX_LD(LOAD(ldd, base + 0x08, %x1)); \
144 EX_LD(LOAD(ldd, base + 0x10, %x2));
145#define FREG_LOAD_4(base, x0, x1, x2, x3) \
146 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
147 EX_LD(LOAD(ldd, base + 0x08, %x1)); \
148 EX_LD(LOAD(ldd, base + 0x10, %x2)); \
149 EX_LD(LOAD(ldd, base + 0x18, %x3));
150#define FREG_LOAD_5(base, x0, x1, x2, x3, x4) \
151 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
152 EX_LD(LOAD(ldd, base + 0x08, %x1)); \
153 EX_LD(LOAD(ldd, base + 0x10, %x2)); \
154 EX_LD(LOAD(ldd, base + 0x18, %x3)); \
155 EX_LD(LOAD(ldd, base + 0x20, %x4));
156#define FREG_LOAD_6(base, x0, x1, x2, x3, x4, x5) \
157 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
158 EX_LD(LOAD(ldd, base + 0x08, %x1)); \
159 EX_LD(LOAD(ldd, base + 0x10, %x2)); \
160 EX_LD(LOAD(ldd, base + 0x18, %x3)); \
161 EX_LD(LOAD(ldd, base + 0x20, %x4)); \
162 EX_LD(LOAD(ldd, base + 0x28, %x5));
163#define FREG_LOAD_7(base, x0, x1, x2, x3, x4, x5, x6) \
164 EX_LD(LOAD(ldd, base + 0x00, %x0)); \
165 EX_LD(LOAD(ldd, base + 0x08, %x1)); \
166 EX_LD(LOAD(ldd, base + 0x10, %x2)); \
167 EX_LD(LOAD(ldd, base + 0x18, %x3)); \
168 EX_LD(LOAD(ldd, base + 0x20, %x4)); \
169 EX_LD(LOAD(ldd, base + 0x28, %x5)); \
170 EX_LD(LOAD(ldd, base + 0x30, %x6));
171
172 .register %g2,#scratch
173 .register %g3,#scratch
174
175 .text
176 .align 64
177
178 .globl FUNC_NAME
179 .type FUNC_NAME,#function
180FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
181 srlx %o2, 31, %g2
182 cmp %g2, 0
183 tne %xcc, 5
184 PREAMBLE
185 mov %o0, GLOBAL_SPARE
186 cmp %o2, 0
187 be,pn %XCC, 85f
188 or %o0, %o1, %o3
189 cmp %o2, 16
190 blu,a,pn %XCC, 80f
191 or %o3, %o2, %o3
192
193 /* 2 blocks (128 bytes) is the minimum we can do the block
194 * copy with. We need to ensure that we'll iterate at least
195 * once in the block copy loop. At worst we'll need to align
196 * the destination to a 64-byte boundary which can chew up
197 * to (64 - 1) bytes from the length before we perform the
198 * block copy loop.
199 *
200 * However, the cut-off point, performance wise, is around
201 * 4 64-byte blocks.
202 */
203 cmp %o2, (4 * 64)
204 blu,pt %XCC, 75f
205 andcc %o3, 0x7, %g0
206
207 /* %o0: dst
208 * %o1: src
209 * %o2: len (known to be >= 128)
210 *
211 * The block copy loops can use %o4, %g2, %g3 as
212 * temporaries while copying the data. %o5 must
213 * be preserved between VISEntryHalf and VISExitHalf
214 */
215
216 LOAD(prefetch, %o1 + 0x000, #one_read)
217 LOAD(prefetch, %o1 + 0x040, #one_read)
218 LOAD(prefetch, %o1 + 0x080, #one_read)
219
220 /* Align destination on 64-byte boundary. */
221 andcc %o0, (64 - 1), %o4
222 be,pt %XCC, 2f
223 sub %o4, 64, %o4
224 sub %g0, %o4, %o4 ! bytes to align dst
225 sub %o2, %o4, %o2
2261: subcc %o4, 1, %o4
227 EX_LD(LOAD(ldub, %o1, %g1))
228 EX_ST(STORE(stb, %g1, %o0))
229 add %o1, 1, %o1
230 bne,pt %XCC, 1b
231 add %o0, 1, %o0
232
2332:
234 /* Clobbers o5/g1/g2/g3/g7/icc/xcc. We must preserve
235 * o5 from here until we hit VISExitHalf.
236 */
237 VISEntryHalf
238
239 alignaddr %o1, %g0, %g0
240
241 add %o1, (64 - 1), %o4
242 andn %o4, (64 - 1), %o4
243 andn %o2, (64 - 1), %g1
244 sub %o2, %g1, %o2
245
246 and %o1, (64 - 1), %g2
247 add %o1, %g1, %o1
248 sub %o0, %o4, %g3
249 brz,pt %g2, 190f
250 cmp %g2, 32
251 blu,a 5f
252 cmp %g2, 16
253 cmp %g2, 48
254 blu,a 4f
255 cmp %g2, 40
256 cmp %g2, 56
257 blu 170f
258 nop
259 ba,a,pt %xcc, 180f
260
2614: /* 32 <= low bits < 48 */
262 blu 150f
263 nop
264 ba,a,pt %xcc, 160f
2655: /* 0 < low bits < 32 */
266 blu,a 6f
267 cmp %g2, 8
268 cmp %g2, 24
269 blu 130f
270 nop
271 ba,a,pt %xcc, 140f
2726: /* 0 < low bits < 16 */
273 bgeu 120f
274 nop
275 /* fall through for 0 < low bits < 8 */
276110: sub %o4, 64, %g2
277 EX_LD(LOAD_BLK(%g2, %f0))
2781: EX_ST(STORE_INIT(%g0, %o4 + %g3))
279 EX_LD(LOAD_BLK(%o4, %f16))
280 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f14, f16)
281 EX_ST(STORE_BLK(%f0, %o4 + %g3))
282 FREG_MOVE_8(f16, f18, f20, f22, f24, f26, f28, f30)
283 subcc %g1, 64, %g1
284 add %o4, 64, %o4
285 bne,pt %xcc, 1b
286 LOAD(prefetch, %o4 + 64, #one_read)
287 ba,pt %xcc, 195f
288 nop
289
290120: sub %o4, 56, %g2
291 FREG_LOAD_7(%g2, f0, f2, f4, f6, f8, f10, f12)
2921: EX_ST(STORE_INIT(%g0, %o4 + %g3))
293 EX_LD(LOAD_BLK(%o4, %f16))
294 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f16, f18)
295 EX_ST(STORE_BLK(%f0, %o4 + %g3))
296 FREG_MOVE_7(f18, f20, f22, f24, f26, f28, f30)
297 subcc %g1, 64, %g1
298 add %o4, 64, %o4
299 bne,pt %xcc, 1b
300 LOAD(prefetch, %o4 + 64, #one_read)
301 ba,pt %xcc, 195f
302 nop
303
304130: sub %o4, 48, %g2
305 FREG_LOAD_6(%g2, f0, f2, f4, f6, f8, f10)
3061: EX_ST(STORE_INIT(%g0, %o4 + %g3))
307 EX_LD(LOAD_BLK(%o4, %f16))
308 FREG_FROB(f0, f2, f4, f6, f8, f10, f16, f18, f20)
309 EX_ST(STORE_BLK(%f0, %o4 + %g3))
310 FREG_MOVE_6(f20, f22, f24, f26, f28, f30)
311 subcc %g1, 64, %g1
312 add %o4, 64, %o4
313 bne,pt %xcc, 1b
314 LOAD(prefetch, %o4 + 64, #one_read)
315 ba,pt %xcc, 195f
316 nop
317
318140: sub %o4, 40, %g2
319 FREG_LOAD_5(%g2, f0, f2, f4, f6, f8)
3201: EX_ST(STORE_INIT(%g0, %o4 + %g3))
321 EX_LD(LOAD_BLK(%o4, %f16))
322 FREG_FROB(f0, f2, f4, f6, f8, f16, f18, f20, f22)
323 EX_ST(STORE_BLK(%f0, %o4 + %g3))
324 FREG_MOVE_5(f22, f24, f26, f28, f30)
325 subcc %g1, 64, %g1
326 add %o4, 64, %o4
327 bne,pt %xcc, 1b
328 LOAD(prefetch, %o4 + 64, #one_read)
329 ba,pt %xcc, 195f
330 nop
331
332150: sub %o4, 32, %g2
333 FREG_LOAD_4(%g2, f0, f2, f4, f6)
3341: EX_ST(STORE_INIT(%g0, %o4 + %g3))
335 EX_LD(LOAD_BLK(%o4, %f16))
336 FREG_FROB(f0, f2, f4, f6, f16, f18, f20, f22, f24)
337 EX_ST(STORE_BLK(%f0, %o4 + %g3))
338 FREG_MOVE_4(f24, f26, f28, f30)
339 subcc %g1, 64, %g1
340 add %o4, 64, %o4
341 bne,pt %xcc, 1b
342 LOAD(prefetch, %o4 + 64, #one_read)
343 ba,pt %xcc, 195f
344 nop
345
346160: sub %o4, 24, %g2
347 FREG_LOAD_3(%g2, f0, f2, f4)
3481: EX_ST(STORE_INIT(%g0, %o4 + %g3))
349 EX_LD(LOAD_BLK(%o4, %f16))
350 FREG_FROB(f0, f2, f4, f16, f18, f20, f22, f24, f26)
351 EX_ST(STORE_BLK(%f0, %o4 + %g3))
352 FREG_MOVE_3(f26, f28, f30)
353 subcc %g1, 64, %g1
354 add %o4, 64, %o4
355 bne,pt %xcc, 1b
356 LOAD(prefetch, %o4 + 64, #one_read)
357 ba,pt %xcc, 195f
358 nop
359
360170: sub %o4, 16, %g2
361 FREG_LOAD_2(%g2, f0, f2)
3621: EX_ST(STORE_INIT(%g0, %o4 + %g3))
363 EX_LD(LOAD_BLK(%o4, %f16))
364 FREG_FROB(f0, f2, f16, f18, f20, f22, f24, f26, f28)
365 EX_ST(STORE_BLK(%f0, %o4 + %g3))
366 FREG_MOVE_2(f28, f30)
367 subcc %g1, 64, %g1
368 add %o4, 64, %o4
369 bne,pt %xcc, 1b
370 LOAD(prefetch, %o4 + 64, #one_read)
371 ba,pt %xcc, 195f
372 nop
373
374180: sub %o4, 8, %g2
375 FREG_LOAD_1(%g2, f0)
3761: EX_ST(STORE_INIT(%g0, %o4 + %g3))
377 EX_LD(LOAD_BLK(%o4, %f16))
378 FREG_FROB(f0, f16, f18, f20, f22, f24, f26, f28, f30)
379 EX_ST(STORE_BLK(%f0, %o4 + %g3))
380 FREG_MOVE_1(f30)
381 subcc %g1, 64, %g1
382 add %o4, 64, %o4
383 bne,pt %xcc, 1b
384 LOAD(prefetch, %o4 + 64, #one_read)
385 ba,pt %xcc, 195f
386 nop
387
388190:
3891: EX_ST(STORE_INIT(%g0, %o4 + %g3))
390 subcc %g1, 64, %g1
391 EX_LD(LOAD_BLK(%o4, %f0))
392 EX_ST(STORE_BLK(%f0, %o4 + %g3))
393 add %o4, 64, %o4
394 bne,pt %xcc, 1b
395 LOAD(prefetch, %o4 + 64, #one_read)
396
397195:
398 add %o4, %g3, %o0
399 membar #Sync
400
401 VISExitHalf
402
403 /* %o2 contains any final bytes still needed to be copied
404 * over. If anything is left, we copy it one byte at a time.
405 */
406 brz,pt %o2, 85f
407 sub %o0, %o1, %o3
408 ba,a,pt %XCC, 90f
409
410 .align 64
41175: /* 16 < len <= 64 */
412 bne,pn %XCC, 75f
413 sub %o0, %o1, %o3
414
41572:
416 andn %o2, 0xf, %o4
417 and %o2, 0xf, %o2
4181: subcc %o4, 0x10, %o4
419 EX_LD(LOAD(ldx, %o1, %o5))
420 add %o1, 0x08, %o1
421 EX_LD(LOAD(ldx, %o1, %g1))
422 sub %o1, 0x08, %o1
423 EX_ST(STORE(stx, %o5, %o1 + %o3))
424 add %o1, 0x8, %o1
425 EX_ST(STORE(stx, %g1, %o1 + %o3))
426 bgu,pt %XCC, 1b
427 add %o1, 0x8, %o1
42873: andcc %o2, 0x8, %g0
429 be,pt %XCC, 1f
430 nop
431 sub %o2, 0x8, %o2
432 EX_LD(LOAD(ldx, %o1, %o5))
433 EX_ST(STORE(stx, %o5, %o1 + %o3))
434 add %o1, 0x8, %o1
4351: andcc %o2, 0x4, %g0
436 be,pt %XCC, 1f
437 nop
438 sub %o2, 0x4, %o2
439 EX_LD(LOAD(lduw, %o1, %o5))
440 EX_ST(STORE(stw, %o5, %o1 + %o3))
441 add %o1, 0x4, %o1
4421: cmp %o2, 0
443 be,pt %XCC, 85f
444 nop
445 ba,pt %xcc, 90f
446 nop
447
44875:
449 andcc %o0, 0x7, %g1
450 sub %g1, 0x8, %g1
451 be,pn %icc, 2f
452 sub %g0, %g1, %g1
453 sub %o2, %g1, %o2
454
4551: subcc %g1, 1, %g1
456 EX_LD(LOAD(ldub, %o1, %o5))
457 EX_ST(STORE(stb, %o5, %o1 + %o3))
458 bgu,pt %icc, 1b
459 add %o1, 1, %o1
460
4612: add %o1, %o3, %o0
462 andcc %o1, 0x7, %g1
463 bne,pt %icc, 8f
464 sll %g1, 3, %g1
465
466 cmp %o2, 16
467 bgeu,pt %icc, 72b
468 nop
469 ba,a,pt %xcc, 73b
470
4718: mov 64, %o3
472 andn %o1, 0x7, %o1
473 EX_LD(LOAD(ldx, %o1, %g2))
474 sub %o3, %g1, %o3
475 andn %o2, 0x7, %o4
476 sllx %g2, %g1, %g2
4771: add %o1, 0x8, %o1
478 EX_LD(LOAD(ldx, %o1, %g3))
479 subcc %o4, 0x8, %o4
480 srlx %g3, %o3, %o5
481 or %o5, %g2, %o5
482 EX_ST(STORE(stx, %o5, %o0))
483 add %o0, 0x8, %o0
484 bgu,pt %icc, 1b
485 sllx %g3, %g1, %g2
486
487 srl %g1, 3, %g1
488 andcc %o2, 0x7, %o2
489 be,pn %icc, 85f
490 add %o1, %g1, %o1
491 ba,pt %xcc, 90f
492 sub %o0, %o1, %o3
493
494 .align 64
49580: /* 0 < len <= 16 */
496 andcc %o3, 0x3, %g0
497 bne,pn %XCC, 90f
498 sub %o0, %o1, %o3
499
5001:
501 subcc %o2, 4, %o2
502 EX_LD(LOAD(lduw, %o1, %g1))
503 EX_ST(STORE(stw, %g1, %o1 + %o3))
504 bgu,pt %XCC, 1b
505 add %o1, 4, %o1
506
50785: retl
508 mov EX_RETVAL(GLOBAL_SPARE), %o0
509
510 .align 32
51190:
512 subcc %o2, 1, %o2
513 EX_LD(LOAD(ldub, %o1, %g1))
514 EX_ST(STORE(stb, %g1, %o1 + %o3))
515 bgu,pt %XCC, 90b
516 add %o1, 1, %o1
517 retl
518 mov EX_RETVAL(GLOBAL_SPARE), %o0
519
520 .size FUNC_NAME, .-FUNC_NAME
diff --git a/arch/sparc64/lib/NG2page.S b/arch/sparc64/lib/NG2page.S
new file mode 100644
index 00000000000..73b6b7c72cb
--- /dev/null
+++ b/arch/sparc64/lib/NG2page.S
@@ -0,0 +1,61 @@
1/* NG2page.S: Niagara-2 optimized clear and copy page.
2 *
3 * Copyright (C) 2007 (davem@davemloft.net)
4 */
5
6#include <asm/asi.h>
7#include <asm/page.h>
8#include <asm/visasm.h>
9
10 .text
11 .align 32
12
13 /* This is heavily simplified from the sun4u variants
14 * because Niagara-2 does not have any D-cache aliasing issues.
15 */
16NG2copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
17 prefetch [%o1 + 0x00], #one_read
18 prefetch [%o1 + 0x40], #one_read
19 VISEntryHalf
20 set PAGE_SIZE, %g7
21 sub %o0, %o1, %g3
221: stxa %g0, [%o1 + %g3] ASI_BLK_INIT_QUAD_LDD_P
23 subcc %g7, 64, %g7
24 ldda [%o1] ASI_BLK_P, %f0
25 stda %f0, [%o1 + %g3] ASI_BLK_P
26 add %o1, 64, %o1
27 bne,pt %xcc, 1b
28 prefetch [%o1 + 0x40], #one_read
29 membar #Sync
30 VISExitHalf
31 retl
32 nop
33
34#define BRANCH_ALWAYS 0x10680000
35#define NOP 0x01000000
36#define NG_DO_PATCH(OLD, NEW) \
37 sethi %hi(NEW), %g1; \
38 or %g1, %lo(NEW), %g1; \
39 sethi %hi(OLD), %g2; \
40 or %g2, %lo(OLD), %g2; \
41 sub %g1, %g2, %g1; \
42 sethi %hi(BRANCH_ALWAYS), %g3; \
43 sll %g1, 11, %g1; \
44 srl %g1, 11 + 2, %g1; \
45 or %g3, %lo(BRANCH_ALWAYS), %g3; \
46 or %g3, %g1, %g3; \
47 stw %g3, [%g2]; \
48 sethi %hi(NOP), %g3; \
49 or %g3, %lo(NOP), %g3; \
50 stw %g3, [%g2 + 0x4]; \
51 flush %g2;
52
53 .globl niagara2_patch_pageops
54 .type niagara2_patch_pageops,#function
55niagara2_patch_pageops:
56 NG_DO_PATCH(copy_user_page, NG2copy_user_page)
57 NG_DO_PATCH(_clear_page, NGclear_page)
58 NG_DO_PATCH(clear_user_page, NGclear_user_page)
59 retl
60 nop
61 .size niagara2_patch_pageops,.-niagara2_patch_pageops
diff --git a/arch/sparc64/lib/NG2patch.S b/arch/sparc64/lib/NG2patch.S
new file mode 100644
index 00000000000..28c36f06a6d
--- /dev/null
+++ b/arch/sparc64/lib/NG2patch.S
@@ -0,0 +1,33 @@
1/* NG2patch.S: Patch Ultra-I routines with Niagara-2 variant.
2 *
3 * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
4 */
5
6#define BRANCH_ALWAYS 0x10680000
7#define NOP 0x01000000
8#define NG_DO_PATCH(OLD, NEW) \
9 sethi %hi(NEW), %g1; \
10 or %g1, %lo(NEW), %g1; \
11 sethi %hi(OLD), %g2; \
12 or %g2, %lo(OLD), %g2; \
13 sub %g1, %g2, %g1; \
14 sethi %hi(BRANCH_ALWAYS), %g3; \
15 sll %g1, 11, %g1; \
16 srl %g1, 11 + 2, %g1; \
17 or %g3, %lo(BRANCH_ALWAYS), %g3; \
18 or %g3, %g1, %g3; \
19 stw %g3, [%g2]; \
20 sethi %hi(NOP), %g3; \
21 or %g3, %lo(NOP), %g3; \
22 stw %g3, [%g2 + 0x4]; \
23 flush %g2;
24
25 .globl niagara2_patch_copyops
26 .type niagara2_patch_copyops,#function
27niagara2_patch_copyops:
28 NG_DO_PATCH(memcpy, NG2memcpy)
29 NG_DO_PATCH(___copy_from_user, NG2copy_from_user)
30 NG_DO_PATCH(___copy_to_user, NG2copy_to_user)
31 retl
32 nop
33 .size niagara2_patch_copyops,.-niagara2_patch_copyops
diff --git a/arch/sparc64/lib/NGpage.S b/arch/sparc64/lib/NGpage.S
index 8ce3a0c9c53..428920de05b 100644
--- a/arch/sparc64/lib/NGpage.S
+++ b/arch/sparc64/lib/NGpage.S
@@ -45,6 +45,7 @@ NGcopy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
45 retl 45 retl
46 nop 46 nop
47 47
48 .globl NGclear_page, NGclear_user_page
48NGclear_page: /* %o0=dest */ 49NGclear_page: /* %o0=dest */
49NGclear_user_page: /* %o0=dest, %o1=vaddr */ 50NGclear_user_page: /* %o0=dest, %o1=vaddr */
50 mov 8, %g1 51 mov 8, %g1
diff --git a/arch/x86_64/Makefile b/arch/x86_64/Makefile
index 128561d3e87..b024e4a8689 100644
--- a/arch/x86_64/Makefile
+++ b/arch/x86_64/Makefile
@@ -57,8 +57,8 @@ cflags-y += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
57cflags-y += -maccumulate-outgoing-args 57cflags-y += -maccumulate-outgoing-args
58 58
59# do binutils support CFI? 59# do binutils support CFI?
60cflags-y += $(call as-instr,.cfi_startproc\n.cfi_endproc,-DCONFIG_AS_CFI=1,) 60cflags-y += $(call as-instr,.cfi_startproc\n.cfi_rel_offset rsp${comma}0\n.cfi_endproc,-DCONFIG_AS_CFI=1,)
61AFLAGS += $(call as-instr,.cfi_startproc\n.cfi_endproc,-DCONFIG_AS_CFI=1,) 61AFLAGS += $(call as-instr,.cfi_startproc\n.cfi_rel_offset rsp${comma}0\n.cfi_endproc,-DCONFIG_AS_CFI=1,)
62 62
63# is .cfi_signal_frame supported too? 63# is .cfi_signal_frame supported too?
64cflags-y += $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1,) 64cflags-y += $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1,)
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S
index e89abcdbdde..b6167fe3330 100644
--- a/arch/x86_64/kernel/head.S
+++ b/arch/x86_64/kernel/head.S
@@ -345,8 +345,7 @@ NEXT_PAGE(level2_kernel_pgt)
345 /* 40MB kernel mapping. The kernel code cannot be bigger than that. 345 /* 40MB kernel mapping. The kernel code cannot be bigger than that.
346 When you change this change KERNEL_TEXT_SIZE in page.h too. */ 346 When you change this change KERNEL_TEXT_SIZE in page.h too. */
347 /* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */ 347 /* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */
348 PMDS(0x0000000000000000, __PAGE_KERNEL_LARGE_EXEC|_PAGE_GLOBAL, 348 PMDS(0x0000000000000000, __PAGE_KERNEL_LARGE_EXEC|_PAGE_GLOBAL, KERNEL_TEXT_SIZE/PMD_SIZE)
349 KERNEL_TEXT_SIZE/PMD_SIZE)
350 /* Module mapping starts here */ 349 /* Module mapping starts here */
351 .fill (PTRS_PER_PMD - (KERNEL_TEXT_SIZE/PMD_SIZE)),8,0 350 .fill (PTRS_PER_PMD - (KERNEL_TEXT_SIZE/PMD_SIZE)),8,0
352 351
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index cb8ee9d02f8..0ec6d2ddb93 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -85,7 +85,7 @@ int __init check_nmi_watchdog (void)
85 int *counts; 85 int *counts;
86 int cpu; 86 int cpu;
87 87
88 if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DEFAULT)) 88 if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED))
89 return 0; 89 return 0;
90 90
91 if (!atomic_read(&nmi_active)) 91 if (!atomic_read(&nmi_active))
@@ -442,7 +442,7 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
442 if (!!old_state == !!nmi_watchdog_enabled) 442 if (!!old_state == !!nmi_watchdog_enabled)
443 return 0; 443 return 0;
444 444
445 if (atomic_read(&nmi_active) < 0) { 445 if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) {
446 printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); 446 printk( KERN_WARNING "NMI watchdog is permanently disabled\n");
447 return -EIO; 447 return -EIO;
448 } 448 }
diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86_64/kernel/pci-dma.c
index 05d745ede56..29711445c81 100644
--- a/arch/x86_64/kernel/pci-dma.c
+++ b/arch/x86_64/kernel/pci-dma.c
@@ -82,6 +82,10 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
82 if (dma_mask == 0) 82 if (dma_mask == 0)
83 dma_mask = DMA_32BIT_MASK; 83 dma_mask = DMA_32BIT_MASK;
84 84
85 /* Device not DMA able */
86 if (dev->dma_mask == NULL)
87 return NULL;
88
85 /* Don't invoke OOM killer */ 89 /* Don't invoke OOM killer */
86 gfp |= __GFP_NORETRY; 90 gfp |= __GFP_NORETRY;
87 91
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-09 16:29:34 -0400