diff options
Diffstat (limited to 'arch/x86/kernel/amd_iommu_init.c')
-rw-r--r-- | arch/x86/kernel/amd_iommu_init.c | 357 |
1 files changed, 271 insertions, 86 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 2a13e430437..c9d8ff2eb13 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -25,20 +25,13 @@ | |||
25 | #include <asm/pci-direct.h> | 25 | #include <asm/pci-direct.h> |
26 | #include <asm/amd_iommu_types.h> | 26 | #include <asm/amd_iommu_types.h> |
27 | #include <asm/amd_iommu.h> | 27 | #include <asm/amd_iommu.h> |
28 | #include <asm/gart.h> | 28 | #include <asm/iommu.h> |
29 | 29 | ||
30 | /* | 30 | /* |
31 | * definitions for the ACPI scanning code | 31 | * definitions for the ACPI scanning code |
32 | */ | 32 | */ |
33 | #define UPDATE_LAST_BDF(x) do {\ | ||
34 | if ((x) > amd_iommu_last_bdf) \ | ||
35 | amd_iommu_last_bdf = (x); \ | ||
36 | } while (0); | ||
37 | |||
38 | #define DEVID(bus, devfn) (((bus) << 8) | (devfn)) | ||
39 | #define PCI_BUS(x) (((x) >> 8) & 0xff) | 33 | #define PCI_BUS(x) (((x) >> 8) & 0xff) |
40 | #define IVRS_HEADER_LENGTH 48 | 34 | #define IVRS_HEADER_LENGTH 48 |
41 | #define TBL_SIZE(x) (1 << (PAGE_SHIFT + get_order(amd_iommu_last_bdf * (x)))) | ||
42 | 35 | ||
43 | #define ACPI_IVHD_TYPE 0x10 | 36 | #define ACPI_IVHD_TYPE 0x10 |
44 | #define ACPI_IVMD_TYPE_ALL 0x20 | 37 | #define ACPI_IVMD_TYPE_ALL 0x20 |
@@ -71,6 +64,17 @@ | |||
71 | #define ACPI_DEVFLAG_LINT1 0x80 | 64 | #define ACPI_DEVFLAG_LINT1 0x80 |
72 | #define ACPI_DEVFLAG_ATSDIS 0x10000000 | 65 | #define ACPI_DEVFLAG_ATSDIS 0x10000000 |
73 | 66 | ||
67 | /* | ||
68 | * ACPI table definitions | ||
69 | * | ||
70 | * These data structures are laid over the table to parse the important values | ||
71 | * out of it. | ||
72 | */ | ||
73 | |||
74 | /* | ||
75 | * structure describing one IOMMU in the ACPI table. Typically followed by one | ||
76 | * or more ivhd_entrys. | ||
77 | */ | ||
74 | struct ivhd_header { | 78 | struct ivhd_header { |
75 | u8 type; | 79 | u8 type; |
76 | u8 flags; | 80 | u8 flags; |
@@ -83,6 +87,10 @@ struct ivhd_header { | |||
83 | u32 reserved; | 87 | u32 reserved; |
84 | } __attribute__((packed)); | 88 | } __attribute__((packed)); |
85 | 89 | ||
90 | /* | ||
91 | * A device entry describing which devices a specific IOMMU translates and | ||
92 | * which requestor ids they use. | ||
93 | */ | ||
86 | struct ivhd_entry { | 94 | struct ivhd_entry { |
87 | u8 type; | 95 | u8 type; |
88 | u16 devid; | 96 | u16 devid; |
@@ -90,6 +98,10 @@ struct ivhd_entry { | |||
90 | u32 ext; | 98 | u32 ext; |
91 | } __attribute__((packed)); | 99 | } __attribute__((packed)); |
92 | 100 | ||
101 | /* | ||
102 | * An AMD IOMMU memory definition structure. It defines things like exclusion | ||
103 | * ranges for devices and regions that should be unity mapped. | ||
104 | */ | ||
93 | struct ivmd_header { | 105 | struct ivmd_header { |
94 | u8 type; | 106 | u8 type; |
95 | u8 flags; | 107 | u8 flags; |
@@ -103,22 +115,80 @@ struct ivmd_header { | |||
103 | 115 | ||
104 | static int __initdata amd_iommu_detected; | 116 | static int __initdata amd_iommu_detected; |
105 | 117 | ||
106 | u16 amd_iommu_last_bdf; | 118 | u16 amd_iommu_last_bdf; /* largest PCI device id we have |
107 | struct list_head amd_iommu_unity_map; | 119 | to handle */ |
108 | unsigned amd_iommu_aperture_order = 26; | 120 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings |
109 | int amd_iommu_isolate; | 121 | we find in ACPI */ |
122 | unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */ | ||
123 | int amd_iommu_isolate; /* if 1, device isolation is enabled */ | ||
124 | |||
125 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the | ||
126 | system */ | ||
110 | 127 | ||
111 | struct list_head amd_iommu_list; | 128 | /* |
129 | * Pointer to the device table which is shared by all AMD IOMMUs | ||
130 | * it is indexed by the PCI device id or the HT unit id and contains | ||
131 | * information about the domain the device belongs to as well as the | ||
132 | * page table root pointer. | ||
133 | */ | ||
112 | struct dev_table_entry *amd_iommu_dev_table; | 134 | struct dev_table_entry *amd_iommu_dev_table; |
135 | |||
136 | /* | ||
137 | * The alias table is a driver specific data structure which contains the | ||
138 | * mappings of the PCI device ids to the actual requestor ids on the IOMMU. | ||
139 | * More than one device can share the same requestor id. | ||
140 | */ | ||
113 | u16 *amd_iommu_alias_table; | 141 | u16 *amd_iommu_alias_table; |
142 | |||
143 | /* | ||
144 | * The rlookup table is used to find the IOMMU which is responsible | ||
145 | * for a specific device. It is also indexed by the PCI device id. | ||
146 | */ | ||
114 | struct amd_iommu **amd_iommu_rlookup_table; | 147 | struct amd_iommu **amd_iommu_rlookup_table; |
148 | |||
149 | /* | ||
150 | * The pd table (protection domain table) is used to find the protection domain | ||
151 | * data structure a device belongs to. Indexed with the PCI device id too. | ||
152 | */ | ||
115 | struct protection_domain **amd_iommu_pd_table; | 153 | struct protection_domain **amd_iommu_pd_table; |
154 | |||
155 | /* | ||
156 | * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap | ||
157 | * to know which ones are already in use. | ||
158 | */ | ||
116 | unsigned long *amd_iommu_pd_alloc_bitmap; | 159 | unsigned long *amd_iommu_pd_alloc_bitmap; |
117 | 160 | ||
118 | static u32 dev_table_size; | 161 | static u32 dev_table_size; /* size of the device table */ |
119 | static u32 alias_table_size; | 162 | static u32 alias_table_size; /* size of the alias table */ |
120 | static u32 rlookup_table_size; | 163 | static u32 rlookup_table_size; /* size if the rlookup table */ |
121 | 164 | ||
165 | static inline void update_last_devid(u16 devid) | ||
166 | { | ||
167 | if (devid > amd_iommu_last_bdf) | ||
168 | amd_iommu_last_bdf = devid; | ||
169 | } | ||
170 | |||
171 | static inline unsigned long tbl_size(int entry_size) | ||
172 | { | ||
173 | unsigned shift = PAGE_SHIFT + | ||
174 | get_order(amd_iommu_last_bdf * entry_size); | ||
175 | |||
176 | return 1UL << shift; | ||
177 | } | ||
178 | |||
179 | /**************************************************************************** | ||
180 | * | ||
181 | * AMD IOMMU MMIO register space handling functions | ||
182 | * | ||
183 | * These functions are used to program the IOMMU device registers in | ||
184 | * MMIO space required for that driver. | ||
185 | * | ||
186 | ****************************************************************************/ | ||
187 | |||
188 | /* | ||
189 | * This function set the exclusion range in the IOMMU. DMA accesses to the | ||
190 | * exclusion range are passed through untranslated | ||
191 | */ | ||
122 | static void __init iommu_set_exclusion_range(struct amd_iommu *iommu) | 192 | static void __init iommu_set_exclusion_range(struct amd_iommu *iommu) |
123 | { | 193 | { |
124 | u64 start = iommu->exclusion_start & PAGE_MASK; | 194 | u64 start = iommu->exclusion_start & PAGE_MASK; |
@@ -137,6 +207,7 @@ static void __init iommu_set_exclusion_range(struct amd_iommu *iommu) | |||
137 | &entry, sizeof(entry)); | 207 | &entry, sizeof(entry)); |
138 | } | 208 | } |
139 | 209 | ||
210 | /* Programs the physical address of the device table into the IOMMU hardware */ | ||
140 | static void __init iommu_set_device_table(struct amd_iommu *iommu) | 211 | static void __init iommu_set_device_table(struct amd_iommu *iommu) |
141 | { | 212 | { |
142 | u32 entry; | 213 | u32 entry; |
@@ -149,6 +220,7 @@ static void __init iommu_set_device_table(struct amd_iommu *iommu) | |||
149 | &entry, sizeof(entry)); | 220 | &entry, sizeof(entry)); |
150 | } | 221 | } |
151 | 222 | ||
223 | /* Generic functions to enable/disable certain features of the IOMMU. */ | ||
152 | static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit) | 224 | static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit) |
153 | { | 225 | { |
154 | u32 ctrl; | 226 | u32 ctrl; |
@@ -167,6 +239,7 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) | |||
167 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); | 239 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
168 | } | 240 | } |
169 | 241 | ||
242 | /* Function to enable the hardware */ | ||
170 | void __init iommu_enable(struct amd_iommu *iommu) | 243 | void __init iommu_enable(struct amd_iommu *iommu) |
171 | { | 244 | { |
172 | printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at "); | 245 | printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at "); |
@@ -176,6 +249,10 @@ void __init iommu_enable(struct amd_iommu *iommu) | |||
176 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); | 249 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); |
177 | } | 250 | } |
178 | 251 | ||
252 | /* | ||
253 | * mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in | ||
254 | * the system has one. | ||
255 | */ | ||
179 | static u8 * __init iommu_map_mmio_space(u64 address) | 256 | static u8 * __init iommu_map_mmio_space(u64 address) |
180 | { | 257 | { |
181 | u8 *ret; | 258 | u8 *ret; |
@@ -199,16 +276,33 @@ static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) | |||
199 | release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); | 276 | release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); |
200 | } | 277 | } |
201 | 278 | ||
279 | /**************************************************************************** | ||
280 | * | ||
281 | * The functions below belong to the first pass of AMD IOMMU ACPI table | ||
282 | * parsing. In this pass we try to find out the highest device id this | ||
283 | * code has to handle. Upon this information the size of the shared data | ||
284 | * structures is determined later. | ||
285 | * | ||
286 | ****************************************************************************/ | ||
287 | |||
288 | /* | ||
289 | * This function reads the last device id the IOMMU has to handle from the PCI | ||
290 | * capability header for this IOMMU | ||
291 | */ | ||
202 | static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) | 292 | static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) |
203 | { | 293 | { |
204 | u32 cap; | 294 | u32 cap; |
205 | 295 | ||
206 | cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); | 296 | cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); |
207 | UPDATE_LAST_BDF(DEVID(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); | 297 | update_last_devid(calc_devid(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); |
208 | 298 | ||
209 | return 0; | 299 | return 0; |
210 | } | 300 | } |
211 | 301 | ||
302 | /* | ||
303 | * After reading the highest device id from the IOMMU PCI capability header | ||
304 | * this function looks if there is a higher device id defined in the ACPI table | ||
305 | */ | ||
212 | static int __init find_last_devid_from_ivhd(struct ivhd_header *h) | 306 | static int __init find_last_devid_from_ivhd(struct ivhd_header *h) |
213 | { | 307 | { |
214 | u8 *p = (void *)h, *end = (void *)h; | 308 | u8 *p = (void *)h, *end = (void *)h; |
@@ -229,7 +323,8 @@ static int __init find_last_devid_from_ivhd(struct ivhd_header *h) | |||
229 | case IVHD_DEV_RANGE_END: | 323 | case IVHD_DEV_RANGE_END: |
230 | case IVHD_DEV_ALIAS: | 324 | case IVHD_DEV_ALIAS: |
231 | case IVHD_DEV_EXT_SELECT: | 325 | case IVHD_DEV_EXT_SELECT: |
232 | UPDATE_LAST_BDF(dev->devid); | 326 | /* all the above subfield types refer to device ids */ |
327 | update_last_devid(dev->devid); | ||
233 | break; | 328 | break; |
234 | default: | 329 | default: |
235 | break; | 330 | break; |
@@ -242,6 +337,11 @@ static int __init find_last_devid_from_ivhd(struct ivhd_header *h) | |||
242 | return 0; | 337 | return 0; |
243 | } | 338 | } |
244 | 339 | ||
340 | /* | ||
341 | * Iterate over all IVHD entries in the ACPI table and find the highest device | ||
342 | * id which we need to handle. This is the first of three functions which parse | ||
343 | * the ACPI table. So we check the checksum here. | ||
344 | */ | ||
245 | static int __init find_last_devid_acpi(struct acpi_table_header *table) | 345 | static int __init find_last_devid_acpi(struct acpi_table_header *table) |
246 | { | 346 | { |
247 | int i; | 347 | int i; |
@@ -277,19 +377,31 @@ static int __init find_last_devid_acpi(struct acpi_table_header *table) | |||
277 | return 0; | 377 | return 0; |
278 | } | 378 | } |
279 | 379 | ||
380 | /**************************************************************************** | ||
381 | * | ||
382 | * The following functions belong the the code path which parses the ACPI table | ||
383 | * the second time. In this ACPI parsing iteration we allocate IOMMU specific | ||
384 | * data structures, initialize the device/alias/rlookup table and also | ||
385 | * basically initialize the hardware. | ||
386 | * | ||
387 | ****************************************************************************/ | ||
388 | |||
389 | /* | ||
390 | * Allocates the command buffer. This buffer is per AMD IOMMU. We can | ||
391 | * write commands to that buffer later and the IOMMU will execute them | ||
392 | * asynchronously | ||
393 | */ | ||
280 | static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) | 394 | static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) |
281 | { | 395 | { |
282 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL, | 396 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
283 | get_order(CMD_BUFFER_SIZE)); | 397 | get_order(CMD_BUFFER_SIZE)); |
284 | u64 entry = 0; | 398 | u64 entry; |
285 | 399 | ||
286 | if (cmd_buf == NULL) | 400 | if (cmd_buf == NULL) |
287 | return NULL; | 401 | return NULL; |
288 | 402 | ||
289 | iommu->cmd_buf_size = CMD_BUFFER_SIZE; | 403 | iommu->cmd_buf_size = CMD_BUFFER_SIZE; |
290 | 404 | ||
291 | memset(cmd_buf, 0, CMD_BUFFER_SIZE); | ||
292 | |||
293 | entry = (u64)virt_to_phys(cmd_buf); | 405 | entry = (u64)virt_to_phys(cmd_buf); |
294 | entry |= MMIO_CMD_SIZE_512; | 406 | entry |= MMIO_CMD_SIZE_512; |
295 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, | 407 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
@@ -302,11 +414,10 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) | |||
302 | 414 | ||
303 | static void __init free_command_buffer(struct amd_iommu *iommu) | 415 | static void __init free_command_buffer(struct amd_iommu *iommu) |
304 | { | 416 | { |
305 | if (iommu->cmd_buf) | 417 | free_pages((unsigned long)iommu->cmd_buf, get_order(CMD_BUFFER_SIZE)); |
306 | free_pages((unsigned long)iommu->cmd_buf, | ||
307 | get_order(CMD_BUFFER_SIZE)); | ||
308 | } | 418 | } |
309 | 419 | ||
420 | /* sets a specific bit in the device table entry. */ | ||
310 | static void set_dev_entry_bit(u16 devid, u8 bit) | 421 | static void set_dev_entry_bit(u16 devid, u8 bit) |
311 | { | 422 | { |
312 | int i = (bit >> 5) & 0x07; | 423 | int i = (bit >> 5) & 0x07; |
@@ -315,7 +426,18 @@ static void set_dev_entry_bit(u16 devid, u8 bit) | |||
315 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); | 426 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); |
316 | } | 427 | } |
317 | 428 | ||
318 | static void __init set_dev_entry_from_acpi(u16 devid, u32 flags, u32 ext_flags) | 429 | /* Writes the specific IOMMU for a device into the rlookup table */ |
430 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) | ||
431 | { | ||
432 | amd_iommu_rlookup_table[devid] = iommu; | ||
433 | } | ||
434 | |||
435 | /* | ||
436 | * This function takes the device specific flags read from the ACPI | ||
437 | * table and sets up the device table entry with that information | ||
438 | */ | ||
439 | static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, | ||
440 | u16 devid, u32 flags, u32 ext_flags) | ||
319 | { | 441 | { |
320 | if (flags & ACPI_DEVFLAG_INITPASS) | 442 | if (flags & ACPI_DEVFLAG_INITPASS) |
321 | set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); | 443 | set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); |
@@ -331,13 +453,14 @@ static void __init set_dev_entry_from_acpi(u16 devid, u32 flags, u32 ext_flags) | |||
331 | set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); | 453 | set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); |
332 | if (flags & ACPI_DEVFLAG_LINT1) | 454 | if (flags & ACPI_DEVFLAG_LINT1) |
333 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); | 455 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); |
334 | } | ||
335 | 456 | ||
336 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) | 457 | set_iommu_for_device(iommu, devid); |
337 | { | ||
338 | amd_iommu_rlookup_table[devid] = iommu; | ||
339 | } | 458 | } |
340 | 459 | ||
460 | /* | ||
461 | * Reads the device exclusion range from ACPI and initialize IOMMU with | ||
462 | * it | ||
463 | */ | ||
341 | static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) | 464 | static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) |
342 | { | 465 | { |
343 | struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; | 466 | struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; |
@@ -346,12 +469,22 @@ static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) | |||
346 | return; | 469 | return; |
347 | 470 | ||
348 | if (iommu) { | 471 | if (iommu) { |
472 | /* | ||
473 | * We only can configure exclusion ranges per IOMMU, not | ||
474 | * per device. But we can enable the exclusion range per | ||
475 | * device. This is done here | ||
476 | */ | ||
349 | set_dev_entry_bit(m->devid, DEV_ENTRY_EX); | 477 | set_dev_entry_bit(m->devid, DEV_ENTRY_EX); |
350 | iommu->exclusion_start = m->range_start; | 478 | iommu->exclusion_start = m->range_start; |
351 | iommu->exclusion_length = m->range_length; | 479 | iommu->exclusion_length = m->range_length; |
352 | } | 480 | } |
353 | } | 481 | } |
354 | 482 | ||
483 | /* | ||
484 | * This function reads some important data from the IOMMU PCI space and | ||
485 | * initializes the driver data structure with it. It reads the hardware | ||
486 | * capabilities and the first/last device entries | ||
487 | */ | ||
355 | static void __init init_iommu_from_pci(struct amd_iommu *iommu) | 488 | static void __init init_iommu_from_pci(struct amd_iommu *iommu) |
356 | { | 489 | { |
357 | int bus = PCI_BUS(iommu->devid); | 490 | int bus = PCI_BUS(iommu->devid); |
@@ -363,10 +496,16 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu) | |||
363 | iommu->cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_CAP_HDR_OFFSET); | 496 | iommu->cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_CAP_HDR_OFFSET); |
364 | 497 | ||
365 | range = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); | 498 | range = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); |
366 | iommu->first_device = DEVID(MMIO_GET_BUS(range), MMIO_GET_FD(range)); | 499 | iommu->first_device = calc_devid(MMIO_GET_BUS(range), |
367 | iommu->last_device = DEVID(MMIO_GET_BUS(range), MMIO_GET_LD(range)); | 500 | MMIO_GET_FD(range)); |
501 | iommu->last_device = calc_devid(MMIO_GET_BUS(range), | ||
502 | MMIO_GET_LD(range)); | ||
368 | } | 503 | } |
369 | 504 | ||
505 | /* | ||
506 | * Takes a pointer to an AMD IOMMU entry in the ACPI table and | ||
507 | * initializes the hardware and our data structures with it. | ||
508 | */ | ||
370 | static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | 509 | static void __init init_iommu_from_acpi(struct amd_iommu *iommu, |
371 | struct ivhd_header *h) | 510 | struct ivhd_header *h) |
372 | { | 511 | { |
@@ -374,7 +513,7 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
374 | u8 *end = p, flags = 0; | 513 | u8 *end = p, flags = 0; |
375 | u16 dev_i, devid = 0, devid_start = 0, devid_to = 0; | 514 | u16 dev_i, devid = 0, devid_start = 0, devid_to = 0; |
376 | u32 ext_flags = 0; | 515 | u32 ext_flags = 0; |
377 | bool alias = 0; | 516 | bool alias = false; |
378 | struct ivhd_entry *e; | 517 | struct ivhd_entry *e; |
379 | 518 | ||
380 | /* | 519 | /* |
@@ -414,22 +553,23 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
414 | case IVHD_DEV_ALL: | 553 | case IVHD_DEV_ALL: |
415 | for (dev_i = iommu->first_device; | 554 | for (dev_i = iommu->first_device; |
416 | dev_i <= iommu->last_device; ++dev_i) | 555 | dev_i <= iommu->last_device; ++dev_i) |
417 | set_dev_entry_from_acpi(dev_i, e->flags, 0); | 556 | set_dev_entry_from_acpi(iommu, dev_i, |
557 | e->flags, 0); | ||
418 | break; | 558 | break; |
419 | case IVHD_DEV_SELECT: | 559 | case IVHD_DEV_SELECT: |
420 | devid = e->devid; | 560 | devid = e->devid; |
421 | set_dev_entry_from_acpi(devid, e->flags, 0); | 561 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
422 | break; | 562 | break; |
423 | case IVHD_DEV_SELECT_RANGE_START: | 563 | case IVHD_DEV_SELECT_RANGE_START: |
424 | devid_start = e->devid; | 564 | devid_start = e->devid; |
425 | flags = e->flags; | 565 | flags = e->flags; |
426 | ext_flags = 0; | 566 | ext_flags = 0; |
427 | alias = 0; | 567 | alias = false; |
428 | break; | 568 | break; |
429 | case IVHD_DEV_ALIAS: | 569 | case IVHD_DEV_ALIAS: |
430 | devid = e->devid; | 570 | devid = e->devid; |
431 | devid_to = e->ext >> 8; | 571 | devid_to = e->ext >> 8; |
432 | set_dev_entry_from_acpi(devid, e->flags, 0); | 572 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
433 | amd_iommu_alias_table[devid] = devid_to; | 573 | amd_iommu_alias_table[devid] = devid_to; |
434 | break; | 574 | break; |
435 | case IVHD_DEV_ALIAS_RANGE: | 575 | case IVHD_DEV_ALIAS_RANGE: |
@@ -437,24 +577,25 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
437 | flags = e->flags; | 577 | flags = e->flags; |
438 | devid_to = e->ext >> 8; | 578 | devid_to = e->ext >> 8; |
439 | ext_flags = 0; | 579 | ext_flags = 0; |
440 | alias = 1; | 580 | alias = true; |
441 | break; | 581 | break; |
442 | case IVHD_DEV_EXT_SELECT: | 582 | case IVHD_DEV_EXT_SELECT: |
443 | devid = e->devid; | 583 | devid = e->devid; |
444 | set_dev_entry_from_acpi(devid, e->flags, e->ext); | 584 | set_dev_entry_from_acpi(iommu, devid, e->flags, |
585 | e->ext); | ||
445 | break; | 586 | break; |
446 | case IVHD_DEV_EXT_SELECT_RANGE: | 587 | case IVHD_DEV_EXT_SELECT_RANGE: |
447 | devid_start = e->devid; | 588 | devid_start = e->devid; |
448 | flags = e->flags; | 589 | flags = e->flags; |
449 | ext_flags = e->ext; | 590 | ext_flags = e->ext; |
450 | alias = 0; | 591 | alias = false; |
451 | break; | 592 | break; |
452 | case IVHD_DEV_RANGE_END: | 593 | case IVHD_DEV_RANGE_END: |
453 | devid = e->devid; | 594 | devid = e->devid; |
454 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { | 595 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { |
455 | if (alias) | 596 | if (alias) |
456 | amd_iommu_alias_table[dev_i] = devid_to; | 597 | amd_iommu_alias_table[dev_i] = devid_to; |
457 | set_dev_entry_from_acpi( | 598 | set_dev_entry_from_acpi(iommu, |
458 | amd_iommu_alias_table[dev_i], | 599 | amd_iommu_alias_table[dev_i], |
459 | flags, ext_flags); | 600 | flags, ext_flags); |
460 | } | 601 | } |
@@ -467,6 +608,7 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
467 | } | 608 | } |
468 | } | 609 | } |
469 | 610 | ||
611 | /* Initializes the device->iommu mapping for the driver */ | ||
470 | static int __init init_iommu_devices(struct amd_iommu *iommu) | 612 | static int __init init_iommu_devices(struct amd_iommu *iommu) |
471 | { | 613 | { |
472 | u16 i; | 614 | u16 i; |
@@ -494,6 +636,11 @@ static void __init free_iommu_all(void) | |||
494 | } | 636 | } |
495 | } | 637 | } |
496 | 638 | ||
639 | /* | ||
640 | * This function clues the initialization function for one IOMMU | ||
641 | * together and also allocates the command buffer and programs the | ||
642 | * hardware. It does NOT enable the IOMMU. This is done afterwards. | ||
643 | */ | ||
497 | static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) | 644 | static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) |
498 | { | 645 | { |
499 | spin_lock_init(&iommu->lock); | 646 | spin_lock_init(&iommu->lock); |
@@ -521,6 +668,10 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) | |||
521 | return 0; | 668 | return 0; |
522 | } | 669 | } |
523 | 670 | ||
671 | /* | ||
672 | * Iterates over all IOMMU entries in the ACPI table, allocates the | ||
673 | * IOMMU structure and initializes it with init_iommu_one() | ||
674 | */ | ||
524 | static int __init init_iommu_all(struct acpi_table_header *table) | 675 | static int __init init_iommu_all(struct acpi_table_header *table) |
525 | { | 676 | { |
526 | u8 *p = (u8 *)table, *end = (u8 *)table; | 677 | u8 *p = (u8 *)table, *end = (u8 *)table; |
@@ -528,8 +679,6 @@ static int __init init_iommu_all(struct acpi_table_header *table) | |||
528 | struct amd_iommu *iommu; | 679 | struct amd_iommu *iommu; |
529 | int ret; | 680 | int ret; |
530 | 681 | ||
531 | INIT_LIST_HEAD(&amd_iommu_list); | ||
532 | |||
533 | end += table->length; | 682 | end += table->length; |
534 | p += IVRS_HEADER_LENGTH; | 683 | p += IVRS_HEADER_LENGTH; |
535 | 684 | ||
@@ -555,6 +704,14 @@ static int __init init_iommu_all(struct acpi_table_header *table) | |||
555 | return 0; | 704 | return 0; |
556 | } | 705 | } |
557 | 706 | ||
707 | /**************************************************************************** | ||
708 | * | ||
709 | * The next functions belong to the third pass of parsing the ACPI | ||
710 | * table. In this last pass the memory mapping requirements are | ||
711 | * gathered (like exclusion and unity mapping reanges). | ||
712 | * | ||
713 | ****************************************************************************/ | ||
714 | |||
558 | static void __init free_unity_maps(void) | 715 | static void __init free_unity_maps(void) |
559 | { | 716 | { |
560 | struct unity_map_entry *entry, *next; | 717 | struct unity_map_entry *entry, *next; |
@@ -565,6 +722,7 @@ static void __init free_unity_maps(void) | |||
565 | } | 722 | } |
566 | } | 723 | } |
567 | 724 | ||
725 | /* called when we find an exclusion range definition in ACPI */ | ||
568 | static int __init init_exclusion_range(struct ivmd_header *m) | 726 | static int __init init_exclusion_range(struct ivmd_header *m) |
569 | { | 727 | { |
570 | int i; | 728 | int i; |
@@ -588,6 +746,7 @@ static int __init init_exclusion_range(struct ivmd_header *m) | |||
588 | return 0; | 746 | return 0; |
589 | } | 747 | } |
590 | 748 | ||
749 | /* called for unity map ACPI definition */ | ||
591 | static int __init init_unity_map_range(struct ivmd_header *m) | 750 | static int __init init_unity_map_range(struct ivmd_header *m) |
592 | { | 751 | { |
593 | struct unity_map_entry *e = 0; | 752 | struct unity_map_entry *e = 0; |
@@ -619,13 +778,12 @@ static int __init init_unity_map_range(struct ivmd_header *m) | |||
619 | return 0; | 778 | return 0; |
620 | } | 779 | } |
621 | 780 | ||
781 | /* iterates over all memory definitions we find in the ACPI table */ | ||
622 | static int __init init_memory_definitions(struct acpi_table_header *table) | 782 | static int __init init_memory_definitions(struct acpi_table_header *table) |
623 | { | 783 | { |
624 | u8 *p = (u8 *)table, *end = (u8 *)table; | 784 | u8 *p = (u8 *)table, *end = (u8 *)table; |
625 | struct ivmd_header *m; | 785 | struct ivmd_header *m; |
626 | 786 | ||
627 | INIT_LIST_HEAD(&amd_iommu_unity_map); | ||
628 | |||
629 | end += table->length; | 787 | end += table->length; |
630 | p += IVRS_HEADER_LENGTH; | 788 | p += IVRS_HEADER_LENGTH; |
631 | 789 | ||
@@ -642,6 +800,10 @@ static int __init init_memory_definitions(struct acpi_table_header *table) | |||
642 | return 0; | 800 | return 0; |
643 | } | 801 | } |
644 | 802 | ||
803 | /* | ||
804 | * This function finally enables all IOMMUs found in the system after | ||
805 | * they have been initialized | ||
806 | */ | ||
645 | static void __init enable_iommus(void) | 807 | static void __init enable_iommus(void) |
646 | { | 808 | { |
647 | struct amd_iommu *iommu; | 809 | struct amd_iommu *iommu; |
@@ -678,6 +840,34 @@ static struct sys_device device_amd_iommu = { | |||
678 | .cls = &amd_iommu_sysdev_class, | 840 | .cls = &amd_iommu_sysdev_class, |
679 | }; | 841 | }; |
680 | 842 | ||
843 | /* | ||
844 | * This is the core init function for AMD IOMMU hardware in the system. | ||
845 | * This function is called from the generic x86 DMA layer initialization | ||
846 | * code. | ||
847 | * | ||
848 | * This function basically parses the ACPI table for AMD IOMMU (IVRS) | ||
849 | * three times: | ||
850 | * | ||
851 | * 1 pass) Find the highest PCI device id the driver has to handle. | ||
852 | * Upon this information the size of the data structures is | ||
853 | * determined that needs to be allocated. | ||
854 | * | ||
855 | * 2 pass) Initialize the data structures just allocated with the | ||
856 | * information in the ACPI table about available AMD IOMMUs | ||
857 | * in the system. It also maps the PCI devices in the | ||
858 | * system to specific IOMMUs | ||
859 | * | ||
860 | * 3 pass) After the basic data structures are allocated and | ||
861 | * initialized we update them with information about memory | ||
862 | * remapping requirements parsed out of the ACPI table in | ||
863 | * this last pass. | ||
864 | * | ||
865 | * After that the hardware is initialized and ready to go. In the last | ||
866 | * step we do some Linux specific things like registering the driver in | ||
867 | * the dma_ops interface and initializing the suspend/resume support | ||
868 | * functions. Finally it prints some information about AMD IOMMUs and | ||
869 | * the driver state and enables the hardware. | ||
870 | */ | ||
681 | int __init amd_iommu_init(void) | 871 | int __init amd_iommu_init(void) |
682 | { | 872 | { |
683 | int i, ret = 0; | 873 | int i, ret = 0; |
@@ -699,14 +889,14 @@ int __init amd_iommu_init(void) | |||
699 | if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) | 889 | if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) |
700 | return -ENODEV; | 890 | return -ENODEV; |
701 | 891 | ||
702 | dev_table_size = TBL_SIZE(DEV_TABLE_ENTRY_SIZE); | 892 | dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE); |
703 | alias_table_size = TBL_SIZE(ALIAS_TABLE_ENTRY_SIZE); | 893 | alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE); |
704 | rlookup_table_size = TBL_SIZE(RLOOKUP_TABLE_ENTRY_SIZE); | 894 | rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE); |
705 | 895 | ||
706 | ret = -ENOMEM; | 896 | ret = -ENOMEM; |
707 | 897 | ||
708 | /* Device table - directly used by all IOMMUs */ | 898 | /* Device table - directly used by all IOMMUs */ |
709 | amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL, | 899 | amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
710 | get_order(dev_table_size)); | 900 | get_order(dev_table_size)); |
711 | if (amd_iommu_dev_table == NULL) | 901 | if (amd_iommu_dev_table == NULL) |
712 | goto out; | 902 | goto out; |
@@ -730,27 +920,23 @@ int __init amd_iommu_init(void) | |||
730 | * Protection Domain table - maps devices to protection domains | 920 | * Protection Domain table - maps devices to protection domains |
731 | * This table has the same size as the rlookup_table | 921 | * This table has the same size as the rlookup_table |
732 | */ | 922 | */ |
733 | amd_iommu_pd_table = (void *)__get_free_pages(GFP_KERNEL, | 923 | amd_iommu_pd_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
734 | get_order(rlookup_table_size)); | 924 | get_order(rlookup_table_size)); |
735 | if (amd_iommu_pd_table == NULL) | 925 | if (amd_iommu_pd_table == NULL) |
736 | goto free; | 926 | goto free; |
737 | 927 | ||
738 | amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(GFP_KERNEL, | 928 | amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages( |
929 | GFP_KERNEL | __GFP_ZERO, | ||
739 | get_order(MAX_DOMAIN_ID/8)); | 930 | get_order(MAX_DOMAIN_ID/8)); |
740 | if (amd_iommu_pd_alloc_bitmap == NULL) | 931 | if (amd_iommu_pd_alloc_bitmap == NULL) |
741 | goto free; | 932 | goto free; |
742 | 933 | ||
743 | /* | 934 | /* |
744 | * memory is allocated now; initialize the device table with all zeroes | 935 | * let all alias entries point to itself |
745 | * and let all alias entries point to itself | ||
746 | */ | 936 | */ |
747 | memset(amd_iommu_dev_table, 0, dev_table_size); | ||
748 | for (i = 0; i < amd_iommu_last_bdf; ++i) | 937 | for (i = 0; i < amd_iommu_last_bdf; ++i) |
749 | amd_iommu_alias_table[i] = i; | 938 | amd_iommu_alias_table[i] = i; |
750 | 939 | ||
751 | memset(amd_iommu_pd_table, 0, rlookup_table_size); | ||
752 | memset(amd_iommu_pd_alloc_bitmap, 0, MAX_DOMAIN_ID / 8); | ||
753 | |||
754 | /* | 940 | /* |
755 | * never allocate domain 0 because its used as the non-allocated and | 941 | * never allocate domain 0 because its used as the non-allocated and |
756 | * error value placeholder | 942 | * error value placeholder |
@@ -795,24 +981,19 @@ out: | |||
795 | return ret; | 981 | return ret; |
796 | 982 | ||
797 | free: | 983 | free: |
798 | if (amd_iommu_pd_alloc_bitmap) | 984 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, 1); |
799 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, 1); | ||
800 | 985 | ||
801 | if (amd_iommu_pd_table) | 986 | free_pages((unsigned long)amd_iommu_pd_table, |
802 | free_pages((unsigned long)amd_iommu_pd_table, | 987 | get_order(rlookup_table_size)); |
803 | get_order(rlookup_table_size)); | ||
804 | 988 | ||
805 | if (amd_iommu_rlookup_table) | 989 | free_pages((unsigned long)amd_iommu_rlookup_table, |
806 | free_pages((unsigned long)amd_iommu_rlookup_table, | 990 | get_order(rlookup_table_size)); |
807 | get_order(rlookup_table_size)); | ||
808 | 991 | ||
809 | if (amd_iommu_alias_table) | 992 | free_pages((unsigned long)amd_iommu_alias_table, |
810 | free_pages((unsigned long)amd_iommu_alias_table, | 993 | get_order(alias_table_size)); |
811 | get_order(alias_table_size)); | ||
812 | 994 | ||
813 | if (amd_iommu_dev_table) | 995 | free_pages((unsigned long)amd_iommu_dev_table, |
814 | free_pages((unsigned long)amd_iommu_dev_table, | 996 | get_order(dev_table_size)); |
815 | get_order(dev_table_size)); | ||
816 | 997 | ||
817 | free_iommu_all(); | 998 | free_iommu_all(); |
818 | 999 | ||
@@ -821,6 +1002,13 @@ free: | |||
821 | goto out; | 1002 | goto out; |
822 | } | 1003 | } |
823 | 1004 | ||
1005 | /**************************************************************************** | ||
1006 | * | ||
1007 | * Early detect code. This code runs at IOMMU detection time in the DMA | ||
1008 | * layer. It just looks if there is an IVRS ACPI table to detect AMD | ||
1009 | * IOMMUs | ||
1010 | * | ||
1011 | ****************************************************************************/ | ||
824 | static int __init early_amd_iommu_detect(struct acpi_table_header *table) | 1012 | static int __init early_amd_iommu_detect(struct acpi_table_header *table) |
825 | { | 1013 | { |
826 | return 0; | 1014 | return 0; |
@@ -828,7 +1016,7 @@ static int __init early_amd_iommu_detect(struct acpi_table_header *table) | |||
828 | 1016 | ||
829 | void __init amd_iommu_detect(void) | 1017 | void __init amd_iommu_detect(void) |
830 | { | 1018 | { |
831 | if (swiotlb || no_iommu || iommu_detected) | 1019 | if (swiotlb || no_iommu || (iommu_detected && !gart_iommu_aperture)) |
832 | return; | 1020 | return; |
833 | 1021 | ||
834 | if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { | 1022 | if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { |
@@ -841,6 +1029,13 @@ void __init amd_iommu_detect(void) | |||
841 | } | 1029 | } |
842 | } | 1030 | } |
843 | 1031 | ||
1032 | /**************************************************************************** | ||
1033 | * | ||
1034 | * Parsing functions for the AMD IOMMU specific kernel command line | ||
1035 | * options. | ||
1036 | * | ||
1037 | ****************************************************************************/ | ||
1038 | |||
844 | static int __init parse_amd_iommu_options(char *str) | 1039 | static int __init parse_amd_iommu_options(char *str) |
845 | { | 1040 | { |
846 | for (; *str; ++str) { | 1041 | for (; *str; ++str) { |
@@ -853,20 +1048,10 @@ static int __init parse_amd_iommu_options(char *str) | |||
853 | 1048 | ||
854 | static int __init parse_amd_iommu_size_options(char *str) | 1049 | static int __init parse_amd_iommu_size_options(char *str) |
855 | { | 1050 | { |
856 | for (; *str; ++str) { | 1051 | unsigned order = PAGE_SHIFT + get_order(memparse(str, &str)); |
857 | if (strcmp(str, "32M") == 0) | 1052 | |
858 | amd_iommu_aperture_order = 25; | 1053 | if ((order > 24) && (order < 31)) |
859 | if (strcmp(str, "64M") == 0) | 1054 | amd_iommu_aperture_order = order; |
860 | amd_iommu_aperture_order = 26; | ||
861 | if (strcmp(str, "128M") == 0) | ||
862 | amd_iommu_aperture_order = 27; | ||
863 | if (strcmp(str, "256M") == 0) | ||
864 | amd_iommu_aperture_order = 28; | ||
865 | if (strcmp(str, "512M") == 0) | ||
866 | amd_iommu_aperture_order = 29; | ||
867 | if (strcmp(str, "1G") == 0) | ||
868 | amd_iommu_aperture_order = 30; | ||
869 | } | ||
870 | 1055 | ||
871 | return 1; | 1056 | return 1; |
872 | } | 1057 | } |