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Diffstat (limited to 'arch/ppc64/kernel/iSeries_pci.c')
-rw-r--r--arch/ppc64/kernel/iSeries_pci.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/arch/ppc64/kernel/iSeries_pci.c b/arch/ppc64/kernel/iSeries_pci.c
index 1313a7a2f00..0a28b6ca65d 100644
--- a/arch/ppc64/kernel/iSeries_pci.c
+++ b/arch/ppc64/kernel/iSeries_pci.c
@@ -225,7 +225,6 @@ static struct iSeries_Device_Node *build_device_node(HvBusNumber Bus,
225 node->DsaAddr.Dsa.deviceId = 0x10; 225 node->DsaAddr.Dsa.deviceId = 0x10;
226 node->AgentId = AgentId; 226 node->AgentId = AgentId;
227 node->DevFn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(AgentId), Function); 227 node->DevFn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(AgentId), Function);
228 node->IoRetry = 0;
229 iSeries_Get_Location_Code(node); 228 iSeries_Get_Location_Code(node);
230 return node; 229 return node;
231} 230}
@@ -658,38 +657,34 @@ static struct pci_ops iSeries_pci_ops = {
658 * Check Return Code 657 * Check Return Code
659 * -> On Failure, print and log information. 658 * -> On Failure, print and log information.
660 * Increment Retry Count, if exceeds max, panic partition. 659 * Increment Retry Count, if exceeds max, panic partition.
661 * -> If in retry, print and log success
662 * 660 *
663 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234 661 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
664 * PCI: Device 23.90 ReadL Retry( 1) 662 * PCI: Device 23.90 ReadL Retry( 1)
665 * PCI: Device 23.90 ReadL Retry Successful(1) 663 * PCI: Device 23.90 ReadL Retry Successful(1)
666 */ 664 */
667static int CheckReturnCode(char *TextHdr, struct iSeries_Device_Node *DevNode, 665static int CheckReturnCode(char *TextHdr, struct iSeries_Device_Node *DevNode,
668 u64 ret) 666 int *retry, u64 ret)
669{ 667{
670 if (ret != 0) { 668 if (ret != 0) {
671 ++Pci_Error_Count; 669 ++Pci_Error_Count;
672 ++DevNode->IoRetry; 670 (*retry)++;
673 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n", 671 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
674 TextHdr, DevNode->DsaAddr.Dsa.busNumber, DevNode->DevFn, 672 TextHdr, DevNode->DsaAddr.Dsa.busNumber, DevNode->DevFn,
675 DevNode->IoRetry, (int)ret); 673 *retry, (int)ret);
676 /* 674 /*
677 * Bump the retry and check for retry count exceeded. 675 * Bump the retry and check for retry count exceeded.
678 * If, Exceeded, panic the system. 676 * If, Exceeded, panic the system.
679 */ 677 */
680 if ((DevNode->IoRetry > Pci_Retry_Max) && 678 if (((*retry) > Pci_Retry_Max) &&
681 (Pci_Error_Flag > 0)) { 679 (Pci_Error_Flag > 0)) {
682 mf_display_src(0xB6000103); 680 mf_display_src(0xB6000103);
683 panic_timeout = 0; 681 panic_timeout = 0;
684 panic("PCI: Hardware I/O Error, SRC B6000103, " 682 panic("PCI: Hardware I/O Error, SRC B6000103, "
685 "Automatic Reboot Disabled.\n"); 683 "Automatic Reboot Disabled.\n");
686 } 684 }
687 return -1; /* Retry Try */ 685 return -1; /* Retry Try */
688 } 686 }
689 /* If retry was in progress, log success and rest retry count */ 687 return 0;
690 if (DevNode->IoRetry > 0)
691 DevNode->IoRetry = 0;
692 return 0;
693} 688}
694 689
695/* 690/*
@@ -735,6 +730,7 @@ u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
735{ 730{
736 u64 BarOffset; 731 u64 BarOffset;
737 u64 dsa; 732 u64 dsa;
733 int retry = 0;
738 struct HvCallPci_LoadReturn ret; 734 struct HvCallPci_LoadReturn ret;
739 struct iSeries_Device_Node *DevNode = 735 struct iSeries_Device_Node *DevNode =
740 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 736 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -754,7 +750,7 @@ u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
754 do { 750 do {
755 ++Pci_Io_Read_Count; 751 ++Pci_Io_Read_Count;
756 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0); 752 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0);
757 } while (CheckReturnCode("RDB", DevNode, ret.rc) != 0); 753 } while (CheckReturnCode("RDB", DevNode, &retry, ret.rc) != 0);
758 754
759 return (u8)ret.value; 755 return (u8)ret.value;
760} 756}
@@ -764,6 +760,7 @@ u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
764{ 760{
765 u64 BarOffset; 761 u64 BarOffset;
766 u64 dsa; 762 u64 dsa;
763 int retry = 0;
767 struct HvCallPci_LoadReturn ret; 764 struct HvCallPci_LoadReturn ret;
768 struct iSeries_Device_Node *DevNode = 765 struct iSeries_Device_Node *DevNode =
769 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 766 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -784,7 +781,7 @@ u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
784 ++Pci_Io_Read_Count; 781 ++Pci_Io_Read_Count;
785 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa, 782 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
786 BarOffset, 0); 783 BarOffset, 0);
787 } while (CheckReturnCode("RDW", DevNode, ret.rc) != 0); 784 } while (CheckReturnCode("RDW", DevNode, &retry, ret.rc) != 0);
788 785
789 return swab16((u16)ret.value); 786 return swab16((u16)ret.value);
790} 787}
@@ -794,6 +791,7 @@ u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
794{ 791{
795 u64 BarOffset; 792 u64 BarOffset;
796 u64 dsa; 793 u64 dsa;
794 int retry = 0;
797 struct HvCallPci_LoadReturn ret; 795 struct HvCallPci_LoadReturn ret;
798 struct iSeries_Device_Node *DevNode = 796 struct iSeries_Device_Node *DevNode =
799 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 797 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -814,7 +812,7 @@ u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
814 ++Pci_Io_Read_Count; 812 ++Pci_Io_Read_Count;
815 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa, 813 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
816 BarOffset, 0); 814 BarOffset, 0);
817 } while (CheckReturnCode("RDL", DevNode, ret.rc) != 0); 815 } while (CheckReturnCode("RDL", DevNode, &retry, ret.rc) != 0);
818 816
819 return swab32((u32)ret.value); 817 return swab32((u32)ret.value);
820} 818}
@@ -831,6 +829,7 @@ void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
831{ 829{
832 u64 BarOffset; 830 u64 BarOffset;
833 u64 dsa; 831 u64 dsa;
832 int retry = 0;
834 u64 rc; 833 u64 rc;
835 struct iSeries_Device_Node *DevNode = 834 struct iSeries_Device_Node *DevNode =
836 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 835 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -850,7 +849,7 @@ void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
850 do { 849 do {
851 ++Pci_Io_Write_Count; 850 ++Pci_Io_Write_Count;
852 rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0); 851 rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0);
853 } while (CheckReturnCode("WWB", DevNode, rc) != 0); 852 } while (CheckReturnCode("WWB", DevNode, &retry, rc) != 0);
854} 853}
855EXPORT_SYMBOL(iSeries_Write_Byte); 854EXPORT_SYMBOL(iSeries_Write_Byte);
856 855
@@ -858,6 +857,7 @@ void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
858{ 857{
859 u64 BarOffset; 858 u64 BarOffset;
860 u64 dsa; 859 u64 dsa;
860 int retry = 0;
861 u64 rc; 861 u64 rc;
862 struct iSeries_Device_Node *DevNode = 862 struct iSeries_Device_Node *DevNode =
863 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 863 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -877,7 +877,7 @@ void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
877 do { 877 do {
878 ++Pci_Io_Write_Count; 878 ++Pci_Io_Write_Count;
879 rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, swab16(data), 0); 879 rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, swab16(data), 0);
880 } while (CheckReturnCode("WWW", DevNode, rc) != 0); 880 } while (CheckReturnCode("WWW", DevNode, &retry, rc) != 0);
881} 881}
882EXPORT_SYMBOL(iSeries_Write_Word); 882EXPORT_SYMBOL(iSeries_Write_Word);
883 883
@@ -885,6 +885,7 @@ void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
885{ 885{
886 u64 BarOffset; 886 u64 BarOffset;
887 u64 dsa; 887 u64 dsa;
888 int retry = 0;
888 u64 rc; 889 u64 rc;
889 struct iSeries_Device_Node *DevNode = 890 struct iSeries_Device_Node *DevNode =
890 xlate_iomm_address(IoAddress, &dsa, &BarOffset); 891 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
@@ -904,6 +905,6 @@ void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
904 do { 905 do {
905 ++Pci_Io_Write_Count; 906 ++Pci_Io_Write_Count;
906 rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, swab32(data), 0); 907 rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, swab32(data), 0);
907 } while (CheckReturnCode("WWL", DevNode, rc) != 0); 908 } while (CheckReturnCode("WWL", DevNode, &retry, rc) != 0);
908} 909}
909EXPORT_SYMBOL(iSeries_Write_Long); 910EXPORT_SYMBOL(iSeries_Write_Long);