1 files changed, 22 insertions, 24 deletions

diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index c48cd817807..232e701245d 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -155,43 +155,43 @@ static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
                                                      32 - ffs(mask)));
 }
 
-static void mpc8xxx_irq_unmask(unsigned int virq)
+static void mpc8xxx_irq_unmask(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
         struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
         unsigned long flags;
 
         spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
 
-        setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq)));
 
         spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
 }
 
-static void mpc8xxx_irq_mask(unsigned int virq)
+static void mpc8xxx_irq_mask(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
         struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
         unsigned long flags;
 
         spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
 
-        clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq)));
 
         spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
 }
 
-static void mpc8xxx_irq_ack(unsigned int virq)
+static void mpc8xxx_irq_ack(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
         struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
 
-        out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(d->irq)));
 }
 
-static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
         struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
         unsigned long flags;
 
@@ -199,14 +199,14 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
         case IRQ_TYPE_EDGE_FALLING:
                 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
                 setbits32(mm->regs + GPIO_ICR,
-                          mpc8xxx_gpio2mask(virq_to_hw(virq)));
+                          mpc8xxx_gpio2mask(virq_to_hw(d->irq)));
                 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
                 break;
 
         case IRQ_TYPE_EDGE_BOTH:
                 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
                 clrbits32(mm->regs + GPIO_ICR,
-                          mpc8xxx_gpio2mask(virq_to_hw(virq)));
+                          mpc8xxx_gpio2mask(virq_to_hw(d->irq)));
                 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
                 break;
 
@@ -217,11 +217,11 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
         return 0;
 }
 
-static int mpc512x_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
         struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
-        unsigned long gpio = virq_to_hw(virq);
+        unsigned long gpio = virq_to_hw(d->irq);
         void __iomem *reg;
         unsigned int shift;
         unsigned long flags;
@@ -264,10 +264,10 @@ static int mpc512x_irq_set_type(unsigned int virq, unsigned int flow_type)
 
 static struct irq_chip mpc8xxx_irq_chip = {
         .name           = "mpc8xxx-gpio",
-        .unmask         = mpc8xxx_irq_unmask,
-        .mask           = mpc8xxx_irq_mask,
-        .ack            = mpc8xxx_irq_ack,
-        .set_type       = mpc8xxx_irq_set_type,
+        .irq_unmask     = mpc8xxx_irq_unmask,
+        .irq_mask       = mpc8xxx_irq_mask,
+        .irq_ack        = mpc8xxx_irq_ack,
+        .irq_set_type   = mpc8xxx_irq_set_type,
 };
 
 static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
@@ -276,7 +276,7 @@ static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
         struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data;
 
         if (mpc8xxx_gc->of_dev_id_data)
-                mpc8xxx_irq_chip.set_type = mpc8xxx_gc->of_dev_id_data;
+                mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data;
 
         set_irq_chip_data(virq, h->host_data);
         set_irq_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
@@ -310,6 +310,7 @@ static struct of_device_id mpc8xxx_gpio_ids[] __initdata = {
         { .compatible = "fsl,mpc8572-gpio", },
         { .compatible = "fsl,mpc8610-gpio", },
         { .compatible = "fsl,mpc5121-gpio", .data = mpc512x_irq_set_type, },
+        { .compatible = "fsl,qoriq-gpio",   },
         {}
 };
 
@@ -389,9 +390,6 @@ static int __init mpc8xxx_add_gpiochips(void)
         for_each_matching_node(np, mpc8xxx_gpio_ids)
                 mpc8xxx_add_controller(np);
 
-        for_each_compatible_node(np, NULL, "fsl,qoriq-gpio")
-                mpc8xxx_add_controller(np);
-
         return 0;
 }
 arch_initcall(mpc8xxx_add_gpiochips);