diff options
Diffstat (limited to 'arch/powerpc/platforms/cell/spufs/hw_ops.c')
-rw-r--r-- | arch/powerpc/platforms/cell/spufs/hw_ops.c | 19 |
1 files changed, 6 insertions, 13 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/hw_ops.c b/arch/powerpc/platforms/cell/spufs/hw_ops.c index 9a53e29f9d7..5445719bff7 100644 --- a/arch/powerpc/platforms/cell/spufs/hw_ops.c +++ b/arch/powerpc/platforms/cell/spufs/hw_ops.c | |||
@@ -62,7 +62,6 @@ static unsigned int spu_hw_mbox_stat_poll(struct spu_context *ctx, | |||
62 | unsigned int events) | 62 | unsigned int events) |
63 | { | 63 | { |
64 | struct spu *spu = ctx->spu; | 64 | struct spu *spu = ctx->spu; |
65 | struct spu_priv1 __iomem *priv1 = spu->priv1; | ||
66 | int ret = 0; | 65 | int ret = 0; |
67 | u32 stat; | 66 | u32 stat; |
68 | 67 | ||
@@ -78,18 +77,16 @@ static unsigned int spu_hw_mbox_stat_poll(struct spu_context *ctx, | |||
78 | if (stat & 0xff0000) | 77 | if (stat & 0xff0000) |
79 | ret |= POLLIN | POLLRDNORM; | 78 | ret |= POLLIN | POLLRDNORM; |
80 | else { | 79 | else { |
81 | out_be64(&priv1->int_stat_class2_RW, 0x1); | 80 | spu_int_stat_clear(spu, 2, 0x1); |
82 | out_be64(&priv1->int_mask_class2_RW, | 81 | spu_int_mask_or(spu, 2, 0x1); |
83 | in_be64(&priv1->int_mask_class2_RW) | 0x1); | ||
84 | } | 82 | } |
85 | } | 83 | } |
86 | if (events & (POLLOUT | POLLWRNORM)) { | 84 | if (events & (POLLOUT | POLLWRNORM)) { |
87 | if (stat & 0x00ff00) | 85 | if (stat & 0x00ff00) |
88 | ret = POLLOUT | POLLWRNORM; | 86 | ret = POLLOUT | POLLWRNORM; |
89 | else { | 87 | else { |
90 | out_be64(&priv1->int_stat_class2_RW, 0x10); | 88 | spu_int_stat_clear(spu, 2, 0x10); |
91 | out_be64(&priv1->int_mask_class2_RW, | 89 | spu_int_mask_or(spu, 2, 0x10); |
92 | in_be64(&priv1->int_mask_class2_RW) | 0x10); | ||
93 | } | 90 | } |
94 | } | 91 | } |
95 | spin_unlock_irq(&spu->register_lock); | 92 | spin_unlock_irq(&spu->register_lock); |
@@ -100,7 +97,6 @@ static int spu_hw_ibox_read(struct spu_context *ctx, u32 * data) | |||
100 | { | 97 | { |
101 | struct spu *spu = ctx->spu; | 98 | struct spu *spu = ctx->spu; |
102 | struct spu_problem __iomem *prob = spu->problem; | 99 | struct spu_problem __iomem *prob = spu->problem; |
103 | struct spu_priv1 __iomem *priv1 = spu->priv1; | ||
104 | struct spu_priv2 __iomem *priv2 = spu->priv2; | 100 | struct spu_priv2 __iomem *priv2 = spu->priv2; |
105 | int ret; | 101 | int ret; |
106 | 102 | ||
@@ -111,8 +107,7 @@ static int spu_hw_ibox_read(struct spu_context *ctx, u32 * data) | |||
111 | ret = 4; | 107 | ret = 4; |
112 | } else { | 108 | } else { |
113 | /* make sure we get woken up by the interrupt */ | 109 | /* make sure we get woken up by the interrupt */ |
114 | out_be64(&priv1->int_mask_class2_RW, | 110 | spu_int_mask_or(spu, 2, 0x1); |
115 | in_be64(&priv1->int_mask_class2_RW) | 0x1); | ||
116 | ret = 0; | 111 | ret = 0; |
117 | } | 112 | } |
118 | spin_unlock_irq(&spu->register_lock); | 113 | spin_unlock_irq(&spu->register_lock); |
@@ -123,7 +118,6 @@ static int spu_hw_wbox_write(struct spu_context *ctx, u32 data) | |||
123 | { | 118 | { |
124 | struct spu *spu = ctx->spu; | 119 | struct spu *spu = ctx->spu; |
125 | struct spu_problem __iomem *prob = spu->problem; | 120 | struct spu_problem __iomem *prob = spu->problem; |
126 | struct spu_priv1 __iomem *priv1 = spu->priv1; | ||
127 | int ret; | 121 | int ret; |
128 | 122 | ||
129 | spin_lock_irq(&spu->register_lock); | 123 | spin_lock_irq(&spu->register_lock); |
@@ -134,8 +128,7 @@ static int spu_hw_wbox_write(struct spu_context *ctx, u32 data) | |||
134 | } else { | 128 | } else { |
135 | /* make sure we get woken up by the interrupt when space | 129 | /* make sure we get woken up by the interrupt when space |
136 | becomes available */ | 130 | becomes available */ |
137 | out_be64(&priv1->int_mask_class2_RW, | 131 | spu_int_mask_or(spu, 2, 0x10); |
138 | in_be64(&priv1->int_mask_class2_RW) | 0x10); | ||
139 | ret = 0; | 132 | ret = 0; |
140 | } | 133 | } |
141 | spin_unlock_irq(&spu->register_lock); | 134 | spin_unlock_irq(&spu->register_lock); |