diff options
Diffstat (limited to 'arch/mips/pci/ops-titan.c')
-rw-r--r-- | arch/mips/pci/ops-titan.c | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/arch/mips/pci/ops-titan.c b/arch/mips/pci/ops-titan.c new file mode 100644 index 00000000000..233ec6f2054 --- /dev/null +++ b/arch/mips/pci/ops-titan.c | |||
@@ -0,0 +1,100 @@ | |||
1 | /* | ||
2 | * Copyright 2003 PMC-Sierra | ||
3 | * Author: Manish Lachwani (lachwani@pmc-sierra.com) | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | * | ||
10 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
11 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
12 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
13 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
14 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
15 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
16 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
17 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
18 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
19 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License along | ||
22 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
23 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
24 | */ | ||
25 | #include <linux/types.h> | ||
26 | #include <linux/pci.h> | ||
27 | #include <linux/kernel.h> | ||
28 | |||
29 | #include <asm/titan_dep.h> | ||
30 | |||
31 | static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, | ||
32 | int size, u32 * val) | ||
33 | { | ||
34 | uint32_t address, tmp; | ||
35 | int dev, busno, func; | ||
36 | |||
37 | busno = bus->number; | ||
38 | dev = PCI_SLOT(devfn); | ||
39 | func = PCI_FUNC(devfn); | ||
40 | |||
41 | address = (busno << 16) | (dev << 11) | (func << 8) | | ||
42 | (reg & 0xfc) | 0x80000000; | ||
43 | |||
44 | |||
45 | /* start the configuration cycle */ | ||
46 | TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address); | ||
47 | tmp = TITAN_READ(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3); | ||
48 | |||
49 | switch (size) { | ||
50 | case 1: | ||
51 | tmp &= 0xff; | ||
52 | case 2: | ||
53 | tmp &= 0xffff; | ||
54 | } | ||
55 | *val = tmp; | ||
56 | |||
57 | return PCIBIOS_SUCCESSFUL; | ||
58 | } | ||
59 | |||
60 | static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg, | ||
61 | int size, u32 val) | ||
62 | { | ||
63 | uint32_t address; | ||
64 | int dev, busno, func; | ||
65 | |||
66 | busno = bus->number; | ||
67 | dev = PCI_SLOT(devfn); | ||
68 | func = PCI_FUNC(devfn); | ||
69 | |||
70 | address = (busno << 16) | (dev << 11) | (func << 8) | | ||
71 | (reg & 0xfc) | 0x80000000; | ||
72 | |||
73 | /* start the configuration cycle */ | ||
74 | TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address); | ||
75 | |||
76 | /* write the data */ | ||
77 | switch (size) { | ||
78 | case 1: | ||
79 | TITAN_WRITE_8(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3), val); | ||
80 | break; | ||
81 | |||
82 | case 2: | ||
83 | TITAN_WRITE_16(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2), val); | ||
84 | break; | ||
85 | |||
86 | case 4: | ||
87 | TITAN_WRITE(TITAN_PCI_0_CONFIG_DATA, val); | ||
88 | break; | ||
89 | } | ||
90 | |||
91 | return PCIBIOS_SUCCESSFUL; | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * Titan PCI structure | ||
96 | */ | ||
97 | struct pci_ops titan_pci_ops = { | ||
98 | titan_read_config, | ||
99 | titan_write_config, | ||
100 | }; | ||