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-rw-r--r--arch/m68knommu/platform/520x/config.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 6a1fd743817..92614de42cd 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -81,15 +81,11 @@ static struct platform_device *m520x_devices[] __initdata = {
81 81
82/***************************************************************************/ 82/***************************************************************************/
83 83
84#define INTC0 (MCF_MBAR + MCFICM_INTC0)
85
86static void __init m520x_uart_init_line(int line, int irq) 84static void __init m520x_uart_init_line(int line, int irq)
87{ 85{
88 u16 par; 86 u16 par;
89 u8 par2; 87 u8 par2;
90 88
91 writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
92
93 switch (line) { 89 switch (line) {
94 case 0: 90 case 0:
95 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); 91 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
@@ -128,11 +124,6 @@ static void __init m520x_fec_init(void)
128{ 124{
129 u8 v; 125 u8 v;
130 126
131 /* Unmask FEC interrupts at ColdFire interrupt controller */
132 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
133 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
134 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
135
136 /* Set multi-function pins to ethernet mode */ 127 /* Set multi-function pins to ethernet mode */
137 v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC); 128 v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
138 writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC); 129 writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);