diff options
Diffstat (limited to 'arch/m68knommu/platform')
-rw-r--r-- | arch/m68knommu/platform/5206e/config.c | 1 | ||||
-rw-r--r-- | arch/m68knommu/platform/528x/config.c | 228 |
2 files changed, 1 insertions, 228 deletions
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c index d01a5d2b755..db902540bf2 100644 --- a/arch/m68knommu/platform/5206e/config.c +++ b/arch/m68knommu/platform/5206e/config.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <asm/coldfire.h> | 17 | #include <asm/coldfire.h> |
18 | #include <asm/mcfsim.h> | 18 | #include <asm/mcfsim.h> |
19 | #include <asm/mcfdma.h> | 19 | #include <asm/mcfdma.h> |
20 | #include <asm/mcfuart.h> | ||
20 | 21 | ||
21 | /***************************************************************************/ | 22 | /***************************************************************************/ |
22 | 23 | ||
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c index dfdb5c2ed8e..44baeb225dc 100644 --- a/arch/m68knommu/platform/528x/config.c +++ b/arch/m68knommu/platform/528x/config.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <asm/coldfire.h> | 24 | #include <asm/coldfire.h> |
25 | #include <asm/mcfsim.h> | 25 | #include <asm/mcfsim.h> |
26 | #include <asm/mcfuart.h> | 26 | #include <asm/mcfuart.h> |
27 | #include <asm/mcfqspi.h> | ||
28 | 27 | ||
29 | #ifdef CONFIG_MTD_PARTITIONS | 28 | #ifdef CONFIG_MTD_PARTITIONS |
30 | #include <linux/mtd/partitions.h> | 29 | #include <linux/mtd/partitions.h> |
@@ -33,233 +32,6 @@ | |||
33 | /***************************************************************************/ | 32 | /***************************************************************************/ |
34 | 33 | ||
35 | void coldfire_reset(void); | 34 | void coldfire_reset(void); |
36 | static void coldfire_qspi_cs_control(u8 cs, u8 command); | ||
37 | |||
38 | /***************************************************************************/ | ||
39 | |||
40 | #if defined(CONFIG_SPI) | ||
41 | |||
42 | #if defined(CONFIG_WILDFIRE) | ||
43 | #define SPI_NUM_CHIPSELECTS 0x02 | ||
44 | #define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */ | ||
45 | #define SPI_CS_MASK 0x18 | ||
46 | |||
47 | #define FLASH_BLOCKSIZE (1024*64) | ||
48 | #define FLASH_NUMBLOCKS 16 | ||
49 | #define FLASH_TYPE "m25p80" | ||
50 | |||
51 | #define M25P80_CS 0 | ||
52 | #define MMC_CS 1 | ||
53 | |||
54 | #ifdef CONFIG_MTD_PARTITIONS | ||
55 | static struct mtd_partition stm25p_partitions[] = { | ||
56 | /* sflash */ | ||
57 | [0] = { | ||
58 | .name = "stm25p80", | ||
59 | .offset = 0x00000000, | ||
60 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS, | ||
61 | .mask_flags = 0 | ||
62 | } | ||
63 | }; | ||
64 | |||
65 | #endif | ||
66 | |||
67 | #elif defined(CONFIG_WILDFIREMOD) | ||
68 | |||
69 | #define SPI_NUM_CHIPSELECTS 0x08 | ||
70 | #define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */ | ||
71 | #define SPI_CS_MASK 0x78 | ||
72 | |||
73 | #define FLASH_BLOCKSIZE (1024*64) | ||
74 | #define FLASH_NUMBLOCKS 64 | ||
75 | #define FLASH_TYPE "m25p32" | ||
76 | /* Reserve 1M for the kernel parition */ | ||
77 | #define FLASH_KERNEL_SIZE (1024 * 1024) | ||
78 | |||
79 | #define M25P80_CS 5 | ||
80 | #define MMC_CS 6 | ||
81 | |||
82 | #ifdef CONFIG_MTD_PARTITIONS | ||
83 | static struct mtd_partition stm25p_partitions[] = { | ||
84 | /* sflash */ | ||
85 | [0] = { | ||
86 | .name = "kernel", | ||
87 | .offset = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE, | ||
88 | .size = FLASH_KERNEL_SIZE, | ||
89 | .mask_flags = 0 | ||
90 | }, | ||
91 | [1] = { | ||
92 | .name = "image", | ||
93 | .offset = 0x00000000, | ||
94 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE, | ||
95 | .mask_flags = 0 | ||
96 | }, | ||
97 | [2] = { | ||
98 | .name = "all", | ||
99 | .offset = 0x00000000, | ||
100 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS, | ||
101 | .mask_flags = 0 | ||
102 | } | ||
103 | }; | ||
104 | #endif | ||
105 | |||
106 | #else | ||
107 | #define SPI_NUM_CHIPSELECTS 0x04 | ||
108 | #define SPI_PAR_VAL 0x7F /* Enable DIN, DOUT, CLK, CS0 - CS4 */ | ||
109 | #endif | ||
110 | |||
111 | #ifdef MMC_CS | ||
112 | static struct coldfire_spi_chip flash_chip_info = { | ||
113 | .mode = SPI_MODE_0, | ||
114 | .bits_per_word = 16, | ||
115 | .del_cs_to_clk = 17, | ||
116 | .del_after_trans = 1, | ||
117 | .void_write_data = 0 | ||
118 | }; | ||
119 | |||
120 | static struct coldfire_spi_chip mmc_chip_info = { | ||
121 | .mode = SPI_MODE_0, | ||
122 | .bits_per_word = 16, | ||
123 | .del_cs_to_clk = 17, | ||
124 | .del_after_trans = 1, | ||
125 | .void_write_data = 0xFFFF | ||
126 | }; | ||
127 | #endif | ||
128 | |||
129 | #ifdef M25P80_CS | ||
130 | static struct flash_platform_data stm25p80_platform_data = { | ||
131 | .name = "ST M25P80 SPI Flash chip", | ||
132 | #ifdef CONFIG_MTD_PARTITIONS | ||
133 | .parts = stm25p_partitions, | ||
134 | .nr_parts = sizeof(stm25p_partitions) / sizeof(*stm25p_partitions), | ||
135 | #endif | ||
136 | .type = FLASH_TYPE | ||
137 | }; | ||
138 | #endif | ||
139 | |||
140 | static struct spi_board_info spi_board_info[] __initdata = { | ||
141 | #ifdef M25P80_CS | ||
142 | { | ||
143 | .modalias = "m25p80", | ||
144 | .max_speed_hz = 16000000, | ||
145 | .bus_num = 1, | ||
146 | .chip_select = M25P80_CS, | ||
147 | .platform_data = &stm25p80_platform_data, | ||
148 | .controller_data = &flash_chip_info | ||
149 | }, | ||
150 | #endif | ||
151 | #ifdef MMC_CS | ||
152 | { | ||
153 | .modalias = "mmc_spi", | ||
154 | .max_speed_hz = 16000000, | ||
155 | .bus_num = 1, | ||
156 | .chip_select = MMC_CS, | ||
157 | .controller_data = &mmc_chip_info | ||
158 | } | ||
159 | #endif | ||
160 | }; | ||
161 | |||
162 | static struct coldfire_spi_master coldfire_master_info = { | ||
163 | .bus_num = 1, | ||
164 | .num_chipselect = SPI_NUM_CHIPSELECTS, | ||
165 | .irq_source = MCF5282_QSPI_IRQ_SOURCE, | ||
166 | .irq_vector = MCF5282_QSPI_IRQ_VECTOR, | ||
167 | .irq_mask = ((0x01 << MCF5282_QSPI_IRQ_SOURCE) | 0x01), | ||
168 | .irq_lp = 0x2B, /* Level 5 and Priority 3 */ | ||
169 | .par_val = SPI_PAR_VAL, | ||
170 | .cs_control = coldfire_qspi_cs_control, | ||
171 | }; | ||
172 | |||
173 | static struct resource coldfire_spi_resources[] = { | ||
174 | [0] = { | ||
175 | .name = "qspi-par", | ||
176 | .start = MCF5282_QSPI_PAR, | ||
177 | .end = MCF5282_QSPI_PAR, | ||
178 | .flags = IORESOURCE_MEM | ||
179 | }, | ||
180 | |||
181 | [1] = { | ||
182 | .name = "qspi-module", | ||
183 | .start = MCF5282_QSPI_QMR, | ||
184 | .end = MCF5282_QSPI_QMR + 0x18, | ||
185 | .flags = IORESOURCE_MEM | ||
186 | }, | ||
187 | |||
188 | [2] = { | ||
189 | .name = "qspi-int-level", | ||
190 | .start = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE, | ||
191 | .end = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE, | ||
192 | .flags = IORESOURCE_MEM | ||
193 | }, | ||
194 | |||
195 | [3] = { | ||
196 | .name = "qspi-int-mask", | ||
197 | .start = MCF5282_INTC0 + MCFINTC_IMRL, | ||
198 | .end = MCF5282_INTC0 + MCFINTC_IMRL, | ||
199 | .flags = IORESOURCE_MEM | ||
200 | } | ||
201 | }; | ||
202 | |||
203 | static struct platform_device coldfire_spi = { | ||
204 | .name = "spi_coldfire", | ||
205 | .id = -1, | ||
206 | .resource = coldfire_spi_resources, | ||
207 | .num_resources = ARRAY_SIZE(coldfire_spi_resources), | ||
208 | .dev = { | ||
209 | .platform_data = &coldfire_master_info, | ||
210 | } | ||
211 | }; | ||
212 | |||
213 | static void coldfire_qspi_cs_control(u8 cs, u8 command) | ||
214 | { | ||
215 | u8 cs_bit = ((0x01 << cs) << 3) & SPI_CS_MASK; | ||
216 | |||
217 | #if defined(CONFIG_WILDFIRE) | ||
218 | u8 cs_mask = ~(((0x01 << cs) << 3) & SPI_CS_MASK); | ||
219 | #endif | ||
220 | #if defined(CONFIG_WILDFIREMOD) | ||
221 | u8 cs_mask = (cs << 3) & SPI_CS_MASK; | ||
222 | #endif | ||
223 | |||
224 | /* | ||
225 | * Don't do anything if the chip select is not | ||
226 | * one of the port qs pins. | ||
227 | */ | ||
228 | if (command & QSPI_CS_INIT) { | ||
229 | #if defined(CONFIG_WILDFIRE) | ||
230 | MCF5282_GPIO_DDRQS |= cs_bit; | ||
231 | MCF5282_GPIO_PQSPAR &= ~cs_bit; | ||
232 | #endif | ||
233 | |||
234 | #if defined(CONFIG_WILDFIREMOD) | ||
235 | MCF5282_GPIO_DDRQS |= SPI_CS_MASK; | ||
236 | MCF5282_GPIO_PQSPAR &= ~SPI_CS_MASK; | ||
237 | #endif | ||
238 | } | ||
239 | |||
240 | if (command & QSPI_CS_ASSERT) { | ||
241 | MCF5282_GPIO_PORTQS &= ~SPI_CS_MASK; | ||
242 | MCF5282_GPIO_PORTQS |= cs_mask; | ||
243 | } else if (command & QSPI_CS_DROP) { | ||
244 | MCF5282_GPIO_PORTQS |= SPI_CS_MASK; | ||
245 | } | ||
246 | } | ||
247 | |||
248 | static int __init spi_dev_init(void) | ||
249 | { | ||
250 | int retval; | ||
251 | |||
252 | retval = platform_device_register(&coldfire_spi); | ||
253 | if (retval < 0) | ||
254 | return retval; | ||
255 | |||
256 | if (ARRAY_SIZE(spi_board_info)) | ||
257 | retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
258 | |||
259 | return retval; | ||
260 | } | ||
261 | |||
262 | #endif /* CONFIG_SPI */ | ||
263 | 35 | ||
264 | /***************************************************************************/ | 36 | /***************************************************************************/ |
265 | 37 | ||