1 files changed, 20 insertions, 40 deletions

diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index 48b187f2d2b..8b1f6eb7687 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -275,12 +275,14 @@ static void flush_tlb_all_ipi(void *info)
  *==========================================================================*/
 void smp_flush_tlb_mm(struct mm_struct *mm)
 {
-        int cpu_id = smp_processor_id();
+        int cpu_id;
         cpumask_t cpu_mask;
-        unsigned long *mmc = &mm->context[cpu_id];
+        unsigned long *mmc;
         unsigned long flags;
 
         preempt_disable();
+        cpu_id = smp_processor_id();
+        mmc = &mm->context[cpu_id];
         cpu_mask = mm->cpu_vm_mask;
         cpu_clear(cpu_id, cpu_mask);
 
@@ -343,12 +345,14 @@ void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
 void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
 {
         struct mm_struct *mm = vma->vm_mm;
-        int cpu_id = smp_processor_id();
+        int cpu_id;
         cpumask_t cpu_mask;
-        unsigned long *mmc = &mm->context[cpu_id];
+        unsigned long *mmc;
         unsigned long flags;
 
         preempt_disable();
+        cpu_id = smp_processor_id();
+        mmc = &mm->context[cpu_id];
         cpu_mask = mm->cpu_vm_mask;
         cpu_clear(cpu_id, cpu_mask);
 
@@ -892,7 +896,6 @@ unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num,
         int try)
 {
         spinlock_t *ipilock;
-        unsigned long flags = 0;
         volatile unsigned long *ipicr_addr;
         unsigned long ipicr_val;
         unsigned long my_physid_mask;
@@ -916,50 +919,27 @@ unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num,
          * write IPICRi (send IPIi)
          * unlock ipi_lock[i]
          */
+        spin_lock(ipilock);
         __asm__ __volatile__ (
-                ";; LOCK ipi_lock[i]            \n\t"
+                ";; CHECK IPICRi == 0           \n\t"
                 ".fillinsn                      \n"
                 "1:                             \n\t"
-                "mvfc   %1, psw                 \n\t"
-                "clrpsw #0x40 -> nop            \n\t"
-                DCACHE_CLEAR("r4", "r5", "%2")
-                "lock   r4, @%2                 \n\t"
-                "addi   r4, #-1                 \n\t"
-                "unlock r4, @%2                 \n\t"
-                "mvtc   %1, psw                 \n\t"
-                "bnez   r4, 2f                  \n\t"
-                LOCK_SECTION_START(".balign 4 \n\t")
-                ".fillinsn                      \n"
-                "2:                             \n\t"
-                "ld     r4, @%2                 \n\t"
-                "blez   r4, 2b                  \n\t"
+                "ld     %0, @%1                 \n\t"
+                "and    %0, %4                  \n\t"
+                "beqz   %0, 2f                  \n\t"
+                "bnez   %3, 3f                  \n\t"
                 "bra    1b                      \n\t"
-                LOCK_SECTION_END
-                ";; CHECK IPICRi == 0           \n\t"
-                ".fillinsn                      \n"
-                "3:                             \n\t"
-                "ld     %0, @%3                 \n\t"
-                "and    %0, %6                  \n\t"
-                "beqz   %0, 4f                  \n\t"
-                "bnez   %5, 5f                  \n\t"
-                "bra    3b                      \n\t"
                 ";; WRITE IPICRi (send IPIi)    \n\t"
                 ".fillinsn                      \n"
-                "4:                             \n\t"
-                "st     %4, @%3                 \n\t"
-                ";; UNLOCK ipi_lock[i]          \n\t"
+                "2:                             \n\t"
+                "st     %2, @%1                 \n\t"
                 ".fillinsn                      \n"
-                "5:                             \n\t"
-                "ldi    r4, #1                  \n\t"
-                "st     r4, @%2                 \n\t"
+                "3:                             \n\t"
                 : "=&r"(ipicr_val)
-                : "r"(flags), "r"(&ipilock->slock), "r"(ipicr_addr),
-                  "r"(mask), "r"(try), "r"(my_physid_mask)
-                : "memory", "r4"
-#ifdef CONFIG_CHIP_M32700_TS1
-                , "r5"
-#endif  /* CONFIG_CHIP_M32700_TS1 */
+                : "r"(ipicr_addr), "r"(mask), "r"(try), "r"(my_physid_mask)
+                : "memory"
         );
+        spin_unlock(ipilock);
 
         return ipicr_val;
 }