14 files changed, 485 insertions, 0 deletions

diff --git a/arch/arm/mach-vexpress/include/mach/clkdev.h b/arch/arm/mach-vexpress/include/mach/clkdev.h
new file mode 100644
index 00000000000..3f8307d73ca
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/clkdev.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#include <plat/clock.h>
+
+struct clk {
+        const struct clk_ops    *ops;
+        unsigned long           rate;
+        const struct icst_params *params;
+};
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
new file mode 100644
index 00000000000..8650f04136e
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -0,0 +1,47 @@
+#ifndef __MACH_CT_CA9X4_H
+#define __MACH_CT_CA9X4_H
+
+/*
+ * Physical base addresses
+ */
+#define CT_CA9X4_CLCDC          (0x10020000)
+#define CT_CA9X4_AXIRAM         (0x10060000)
+#define CT_CA9X4_DMC            (0x100e0000)
+#define CT_CA9X4_SMC            (0x100e1000)
+#define CT_CA9X4_SCC            (0x100e2000)
+#define CT_CA9X4_SP804_TIMER    (0x100e4000)
+#define CT_CA9X4_SP805_WDT      (0x100e5000)
+#define CT_CA9X4_TZPC           (0x100e6000)
+#define CT_CA9X4_GPIO           (0x100e8000)
+#define CT_CA9X4_FASTAXI        (0x100e9000)
+#define CT_CA9X4_SLOWAXI        (0x100ea000)
+#define CT_CA9X4_TZASC          (0x100ec000)
+#define CT_CA9X4_CORESIGHT      (0x10200000)
+#define CT_CA9X4_MPIC           (0x1e000000)
+#define CT_CA9X4_SYSTIMER       (0x1e004000)
+#define CT_CA9X4_SYSWDT         (0x1e007000)
+#define CT_CA9X4_L2CC           (0x1e00a000)
+
+#define CT_CA9X4_TIMER0         (CT_CA9X4_SP804_TIMER + 0x000)
+#define CT_CA9X4_TIMER1         (CT_CA9X4_SP804_TIMER + 0x020)
+
+#define A9_MPCORE_SCU           (CT_CA9X4_MPIC + 0x0000)
+#define A9_MPCORE_GIC_CPU       (CT_CA9X4_MPIC + 0x0100)
+#define A9_MPCORE_GIT           (CT_CA9X4_MPIC + 0x0200)
+#define A9_MPCORE_GIC_DIST      (CT_CA9X4_MPIC + 0x1000)
+
+/*
+ * Interrupts.  Those in {} are for AMBA devices
+ */
+#define IRQ_CT_CA9X4_CLCDC      { 76 }
+#define IRQ_CT_CA9X4_DMC        { -1 }
+#define IRQ_CT_CA9X4_SMC        { 77, 78 }
+#define IRQ_CT_CA9X4_TIMER0     80
+#define IRQ_CT_CA9X4_TIMER1     81
+#define IRQ_CT_CA9X4_GPIO       { 82 }
+#define IRQ_CT_CA9X4_PMU_CPU0   92
+#define IRQ_CT_CA9X4_PMU_CPU1   93
+#define IRQ_CT_CA9X4_PMU_CPU2   94
+#define IRQ_CT_CA9X4_PMU_CPU3   95
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
new file mode 100644
index 00000000000..5167e2aceeb
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -0,0 +1,23 @@
+/* arch/arm/mach-realview/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define DEBUG_LL_UART_OFFSET    0x00009000
+
+                .macro  addruart,rx,tmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                moveq   \rx,      #0x10000000
+                movne   \rx,      #0xf8000000   @ virtual base
+                orr     \rx, \rx, #DEBUG_LL_UART_OFFSET
+                .endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
new file mode 100644
index 00000000000..20e9fb514f0
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -0,0 +1,67 @@
+#include <asm/hardware/gic.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =gic_cpu_base_addr
+        ldr     \base, [\base]
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        /*
+         * The interrupt numbering scheme is defined in the
+         * interrupt controller spec.  To wit:
+         *
+         * Interrupts 0-15 are IPI
+         * 16-28 are reserved
+         * 29-31 are local.  We allow 30 to be used for the watchdog.
+         * 32-1020 are global
+         * 1021-1022 are reserved
+         * 1023 is "spurious" (no interrupt)
+         *
+         * For now, we ignore all local interrupts so only return an interrupt if it's
+         * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
+         *
+         * A simple read from the controller will tell us the number of the highest
+         * priority enabled interrupt.  We then just need to check whether it is in the
+         * valid range for an IRQ (30-1020 inclusive).
+         */
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
+        ldr     \tmp, =1021
+        bic     \irqnr, \irqstat, #0x1c00
+        cmp     \irqnr, #29
+        cmpcc   \irqnr, \irqnr
+        cmpne   \irqnr, \tmp
+        cmpcs   \irqnr, \irqnr
+        .endm
+
+        /* We assume that irqstat (the raw value of the IRQ acknowledge
+         * register) is preserved from the macro above.
+         * If there is an IPI, we immediately signal end of interrupt on the
+         * controller, since this requires the original irqstat value which
+         * we won't easily be able to recreate later.
+         */
+
+        .macro test_for_ipi, irqnr, irqstat, base, tmp
+        bic     \irqnr, \irqstat, #0x1c00
+        cmp     \irqnr, #16
+        strcc   \irqstat, [\base, #GIC_CPU_EOI]
+        cmpcs   \irqnr, \irqnr
+        .endm
+
+        /* As above, this assumes that irqstat and base are preserved.. */
+
+        .macro test_for_ltirq, irqnr, irqstat, base, tmp
+        bic     \irqnr, \irqstat, #0x1c00
+        mov     \tmp, #0
+        cmp     \irqnr, #29
+        moveq   \tmp, #1
+        streq   \irqstat, [\base, #GIC_CPU_EOI]
+        cmp     \tmp, #0
+        .endm
+
diff --git a/arch/arm/mach-vexpress/include/mach/hardware.h b/arch/arm/mach-vexpress/include/mach/hardware.h
new file mode 100644
index 00000000000..40a8c178f10
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/hardware.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
new file mode 100644
index 00000000000..748bb524ee7
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/io.h
@@ -0,0 +1,28 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/io.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/irqs.h b/arch/arm/mach-vexpress/include/mach/irqs.h
new file mode 100644
index 00000000000..7054cbfc9de
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/irqs.h
@@ -0,0 +1,4 @@
+#define IRQ_LOCALTIMER          29
+#define IRQ_LOCALWDOG           30
+
+#define NR_IRQS 128
diff --git a/arch/arm/mach-vexpress/include/mach/memory.h b/arch/arm/mach-vexpress/include/mach/memory.h
new file mode 100644
index 00000000000..be28232ae63
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/memory.h
@@ -0,0 +1,25 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/memory.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x60000000)
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
new file mode 100644
index 00000000000..98a8ded055b
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -0,0 +1,121 @@
+#ifndef __MACH_MOTHERBOARD_H
+#define __MACH_MOTHERBOARD_H
+
+/*
+ * Physical addresses, offset from V2M_PA_CS0-3
+ */
+#define V2M_NOR0                (V2M_PA_CS0)
+#define V2M_NOR1                (V2M_PA_CS1)
+#define V2M_SRAM                (V2M_PA_CS2)
+#define V2M_VIDEO_SRAM          (V2M_PA_CS3 + 0x00000000)
+#define V2M_LAN9118             (V2M_PA_CS3 + 0x02000000)
+#define V2M_ISP1761             (V2M_PA_CS3 + 0x03000000)
+
+/*
+ * Physical addresses, offset from V2M_PA_CS7
+ */
+#define V2M_SYSREGS             (V2M_PA_CS7 + 0x00000000)
+#define V2M_SYSCTL              (V2M_PA_CS7 + 0x00001000)
+#define V2M_SERIAL_BUS_PCI      (V2M_PA_CS7 + 0x00002000)
+
+#define V2M_AACI                (V2M_PA_CS7 + 0x00004000)
+#define V2M_MMCI                (V2M_PA_CS7 + 0x00005000)
+#define V2M_KMI0                (V2M_PA_CS7 + 0x00006000)
+#define V2M_KMI1                (V2M_PA_CS7 + 0x00007000)
+
+#define V2M_UART0               (V2M_PA_CS7 + 0x00009000)
+#define V2M_UART1               (V2M_PA_CS7 + 0x0000a000)
+#define V2M_UART2               (V2M_PA_CS7 + 0x0000b000)
+#define V2M_UART3               (V2M_PA_CS7 + 0x0000c000)
+
+#define V2M_WDT                 (V2M_PA_CS7 + 0x0000f000)
+
+#define V2M_TIMER01             (V2M_PA_CS7 + 0x00011000)
+#define V2M_TIMER23             (V2M_PA_CS7 + 0x00012000)
+
+#define V2M_SERIAL_BUS_DVI      (V2M_PA_CS7 + 0x00016000)
+#define V2M_RTC                 (V2M_PA_CS7 + 0x00017000)
+
+#define V2M_CF                  (V2M_PA_CS7 + 0x0001a000)
+#define V2M_CLCD                (V2M_PA_CS7 + 0x0001f000)
+
+#define V2M_SYS_ID              (V2M_SYSREGS + 0x000)
+#define V2M_SYS_SW              (V2M_SYSREGS + 0x004)
+#define V2M_SYS_LED             (V2M_SYSREGS + 0x008)
+#define V2M_SYS_100HZ           (V2M_SYSREGS + 0x024)
+#define V2M_SYS_FLAGS           (V2M_SYSREGS + 0x030)
+#define V2M_SYS_FLAGSSET        (V2M_SYSREGS + 0x030)
+#define V2M_SYS_FLAGSCLR        (V2M_SYSREGS + 0x034)
+#define V2M_SYS_NVFLAGS         (V2M_SYSREGS + 0x038)
+#define V2M_SYS_NVFLAGSSET      (V2M_SYSREGS + 0x038)
+#define V2M_SYS_NVFLAGSCLR      (V2M_SYSREGS + 0x03c)
+#define V2M_SYS_MCI             (V2M_SYSREGS + 0x048)
+#define V2M_SYS_FLASH           (V2M_SYSREGS + 0x03c)
+#define V2M_SYS_CFGSW           (V2M_SYSREGS + 0x058)
+#define V2M_SYS_24MHZ           (V2M_SYSREGS + 0x05c)
+#define V2M_SYS_MISC            (V2M_SYSREGS + 0x060)
+#define V2M_SYS_DMA             (V2M_SYSREGS + 0x064)
+#define V2M_SYS_PROCID0         (V2M_SYSREGS + 0x084)
+#define V2M_SYS_PROCID1         (V2M_SYSREGS + 0x088)
+#define V2M_SYS_CFGDATA         (V2M_SYSREGS + 0x0a0)
+#define V2M_SYS_CFGCTRL         (V2M_SYSREGS + 0x0a4)
+#define V2M_SYS_CFGSTAT         (V2M_SYSREGS + 0x0a8)
+
+#define V2M_TIMER0              (V2M_TIMER01 + 0x000)
+#define V2M_TIMER1              (V2M_TIMER01 + 0x020)
+
+#define V2M_TIMER2              (V2M_TIMER23 + 0x000)
+#define V2M_TIMER3              (V2M_TIMER23 + 0x020)
+
+
+/*
+ * Interrupts.  Those in {} are for AMBA devices
+ */
+#define IRQ_V2M_WDT             { (32 + 0) }
+#define IRQ_V2M_TIMER0          (32 + 2)
+#define IRQ_V2M_TIMER1          (32 + 2)
+#define IRQ_V2M_TIMER2          (32 + 3)
+#define IRQ_V2M_TIMER3          (32 + 3)
+#define IRQ_V2M_RTC             { (32 + 4) }
+#define IRQ_V2M_UART0           { (32 + 5) }
+#define IRQ_V2M_UART1           { (32 + 6) }
+#define IRQ_V2M_UART2           { (32 + 7) }
+#define IRQ_V2M_UART3           { (32 + 8) }
+#define IRQ_V2M_MMCI            { (32 + 9), (32 + 10) }
+#define IRQ_V2M_AACI            { (32 + 11) }
+#define IRQ_V2M_KMI0            { (32 + 12) }
+#define IRQ_V2M_KMI1            { (32 + 13) }
+#define IRQ_V2M_CLCD            { (32 + 14) }
+#define IRQ_V2M_LAN9118         (32 + 15)
+#define IRQ_V2M_ISP1761         (32 + 16)
+#define IRQ_V2M_PCIE            (32 + 17)
+
+
+/*
+ * Configuration
+ */
+#define SYS_CFG_START           (1 << 31)
+#define SYS_CFG_WRITE           (1 << 30)
+#define SYS_CFG_OSC             (1 << 20)
+#define SYS_CFG_VOLT            (2 << 20)
+#define SYS_CFG_AMP             (3 << 20)
+#define SYS_CFG_TEMP            (4 << 20)
+#define SYS_CFG_RESET           (5 << 20)
+#define SYS_CFG_SCC             (6 << 20)
+#define SYS_CFG_MUXFPGA         (7 << 20)
+#define SYS_CFG_SHUTDOWN        (8 << 20)
+#define SYS_CFG_REBOOT          (9 << 20)
+#define SYS_CFG_DVIMODE         (11 << 20)
+#define SYS_CFG_POWER           (12 << 20)
+#define SYS_CFG_SITE_MB         (0 << 16)
+#define SYS_CFG_SITE_DB1        (1 << 16)
+#define SYS_CFG_SITE_DB2        (2 << 16)
+#define SYS_CFG_STACK(n)        ((n) << 12)
+
+#define SYS_CFG_ERR             (1 << 1)
+#define SYS_CFG_COMPLETE        (1 << 0)
+
+int v2m_cfg_write(u32 devfn, u32 data);
+int v2m_cfg_read(u32 devfn, u32 *data);
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/smp.h b/arch/arm/mach-vexpress/include/mach/smp.h
new file mode 100644
index 00000000000..72a9621ed08
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/smp.h
@@ -0,0 +1,21 @@
+#ifndef __MACH_SMP_H
+#define __MACH_SMP_H
+
+#include <asm/hardware/gic.h>
+
+#define hard_smp_processor_id()                         \
+        ({                                              \
+                unsigned int cpunum;                    \
+                __asm__("mrc p15, 0, %0, c0, c0, 5"     \
+                        : "=r" (cpunum));               \
+                cpunum &= 0x0F;                         \
+        })
+
+/*
+ * We use IRQ1 as the IPI
+ */
+static inline void smp_cross_call(const struct cpumask *mask)
+{
+        gic_raise_softirq(mask, 1);
+}
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
new file mode 100644
index 00000000000..899a4e628a4
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -0,0 +1,37 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/system.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static inline void arch_idle(void)
+{
+        /*
+         * This should do all the clock switching
+         * and wait for interrupt tricks
+         */
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+}
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/timex.h b/arch/arm/mach-vexpress/include/mach/timex.h
new file mode 100644
index 00000000000..00029bacd43
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/timex.h
@@ -0,0 +1,23 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/timex.h
+ *
+ *  RealView architecture timex specifications
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#define CLOCK_TICK_RATE         (50000000 / 16)
diff --git a/arch/arm/mach-vexpress/include/mach/uncompress.h b/arch/arm/mach-vexpress/include/mach/uncompress.h
new file mode 100644
index 00000000000..7972c5748d0
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/uncompress.h
@@ -0,0 +1,52 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/uncompress.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#define AMBA_UART_DR(base)      (*(volatile unsigned char *)((base) + 0x00))
+#define AMBA_UART_LCRH(base)    (*(volatile unsigned char *)((base) + 0x2c))
+#define AMBA_UART_CR(base)      (*(volatile unsigned char *)((base) + 0x30))
+#define AMBA_UART_FR(base)      (*(volatile unsigned char *)((base) + 0x18))
+
+#define get_uart_base() (0x10000000 + 0x00009000)
+
+/*
+ * This does not append a newline
+ */
+static inline void putc(int c)
+{
+        unsigned long base = get_uart_base();
+
+        while (AMBA_UART_FR(base) & (1 << 5))
+                barrier();
+
+        AMBA_UART_DR(base) = c;
+}
+
+static inline void flush(void)
+{
+        unsigned long base = get_uart_base();
+
+        while (AMBA_UART_FR(base) & (1 << 3))
+                barrier();
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
new file mode 100644
index 00000000000..f43a36ef678
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/vmalloc.h
@@ -0,0 +1,21 @@
+/*
+ *  arch/arm/mach-vexpress/include/mach/vmalloc.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#define VMALLOC_END             0xf8000000UL