diff options
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-smdkc110.c')
| -rw-r--r-- | arch/arm/mach-s5pv210/mach-smdkc110.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 9f4f0bdd2cc..8211bb87c54 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
| @@ -30,16 +30,16 @@ | |||
| 30 | #include <plat/iic.h> | 30 | #include <plat/iic.h> |
| 31 | 31 | ||
| 32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 33 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 33 | #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 34 | S3C2410_UCON_RXILEVEL | \ | 34 | S3C2410_UCON_RXILEVEL | \ |
| 35 | S3C2410_UCON_TXIRQMODE | \ | 35 | S3C2410_UCON_TXIRQMODE | \ |
| 36 | S3C2410_UCON_RXIRQMODE | \ | 36 | S3C2410_UCON_RXIRQMODE | \ |
| 37 | S3C2410_UCON_RXFIFO_TOI | \ | 37 | S3C2410_UCON_RXFIFO_TOI | \ |
| 38 | S3C2443_UCON_RXERR_IRQEN) | 38 | S3C2443_UCON_RXERR_IRQEN) |
| 39 | 39 | ||
| 40 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | 40 | #define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8 |
| 41 | 41 | ||
| 42 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 42 | #define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
| 43 | S5PV210_UFCON_TXTRIG4 | \ | 43 | S5PV210_UFCON_TXTRIG4 | \ |
| 44 | S5PV210_UFCON_RXTRIG4) | 44 | S5PV210_UFCON_RXTRIG4) |
| 45 | 45 | ||
| @@ -47,30 +47,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
| 47 | [0] = { | 47 | [0] = { |
| 48 | .hwport = 0, | 48 | .hwport = 0, |
| 49 | .flags = 0, | 49 | .flags = 0, |
| 50 | .ucon = S5PV210_UCON_DEFAULT, | 50 | .ucon = SMDKC110_UCON_DEFAULT, |
| 51 | .ulcon = S5PV210_ULCON_DEFAULT, | 51 | .ulcon = SMDKC110_ULCON_DEFAULT, |
| 52 | .ufcon = S5PV210_UFCON_DEFAULT, | 52 | .ufcon = SMDKC110_UFCON_DEFAULT, |
| 53 | }, | 53 | }, |
| 54 | [1] = { | 54 | [1] = { |
| 55 | .hwport = 1, | 55 | .hwport = 1, |
| 56 | .flags = 0, | 56 | .flags = 0, |
| 57 | .ucon = S5PV210_UCON_DEFAULT, | 57 | .ucon = SMDKC110_UCON_DEFAULT, |
| 58 | .ulcon = S5PV210_ULCON_DEFAULT, | 58 | .ulcon = SMDKC110_ULCON_DEFAULT, |
| 59 | .ufcon = S5PV210_UFCON_DEFAULT, | 59 | .ufcon = SMDKC110_UFCON_DEFAULT, |
| 60 | }, | 60 | }, |
| 61 | [2] = { | 61 | [2] = { |
| 62 | .hwport = 2, | 62 | .hwport = 2, |
| 63 | .flags = 0, | 63 | .flags = 0, |
| 64 | .ucon = S5PV210_UCON_DEFAULT, | 64 | .ucon = SMDKC110_UCON_DEFAULT, |
| 65 | .ulcon = S5PV210_ULCON_DEFAULT, | 65 | .ulcon = SMDKC110_ULCON_DEFAULT, |
| 66 | .ufcon = S5PV210_UFCON_DEFAULT, | 66 | .ufcon = SMDKC110_UFCON_DEFAULT, |
| 67 | }, | 67 | }, |
| 68 | [3] = { | 68 | [3] = { |
| 69 | .hwport = 3, | 69 | .hwport = 3, |
| 70 | .flags = 0, | 70 | .flags = 0, |
| 71 | .ucon = S5PV210_UCON_DEFAULT, | 71 | .ucon = SMDKC110_UCON_DEFAULT, |
| 72 | .ulcon = S5PV210_ULCON_DEFAULT, | 72 | .ulcon = SMDKC110_ULCON_DEFAULT, |
| 73 | .ufcon = S5PV210_UFCON_DEFAULT, | 73 | .ufcon = SMDKC110_UFCON_DEFAULT, |
| 74 | }, | 74 | }, |
| 75 | }; | 75 | }; |
| 76 | 76 | ||