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-rw-r--r--arch/arm/mach-omap2/timer-gp.c149
1 files changed, 134 insertions, 15 deletions
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 3234deedb94..557603f9931 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -3,6 +3,11 @@
3 * 3 *
4 * OMAP2 GP timer support. 4 * OMAP2 GP timer support.
5 * 5 *
6 * Update to use new clocksource/clockevent layers
7 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
8 * Copyright (C) 2007 MontaVista Software, Inc.
9 *
10 * Original driver:
6 * Copyright (C) 2005 Nokia Corporation 11 * Copyright (C) 2005 Nokia Corporation
7 * Author: Paul Mundt <paul.mundt@nokia.com> 12 * Author: Paul Mundt <paul.mundt@nokia.com>
8 * Juha Yrjölä <juha.yrjola@nokia.com> 13 * Juha Yrjölä <juha.yrjola@nokia.com>
@@ -25,24 +30,23 @@
25#include <linux/clk.h> 30#include <linux/clk.h>
26#include <linux/delay.h> 31#include <linux/delay.h>
27#include <linux/irq.h> 32#include <linux/irq.h>
33#include <linux/clocksource.h>
34#include <linux/clockchips.h>
28 35
29#include <asm/mach/time.h> 36#include <asm/mach/time.h>
30#include <asm/arch/dmtimer.h> 37#include <asm/arch/dmtimer.h>
31 38
32static struct omap_dm_timer *gptimer; 39static struct omap_dm_timer *gptimer;
33 40static struct clock_event_device clockevent_gpt;
34static inline void omap2_gp_timer_start(unsigned long load_val)
35{
36 omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
37 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
38 omap_dm_timer_start(gptimer);
39}
40 41
41static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) 42static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
42{ 43{
43 omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); 44 struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
44 timer_tick(); 45 struct clock_event_device *evt = &clockevent_gpt;
46
47 omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
45 48
49 evt->event_handler(evt);
46 return IRQ_HANDLED; 50 return IRQ_HANDLED;
47} 51}
48 52
@@ -52,20 +56,135 @@ static struct irqaction omap2_gp_timer_irq = {
52 .handler = omap2_gp_timer_interrupt, 56 .handler = omap2_gp_timer_interrupt,
53}; 57};
54 58
55static void __init omap2_gp_timer_init(void) 59static int omap2_gp_timer_set_next_event(unsigned long cycles,
60 struct clock_event_device *evt)
56{ 61{
57 u32 tick_period; 62 omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
63
64 return 0;
65}
66
67static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
68 struct clock_event_device *evt)
69{
70 u32 period;
71
72 omap_dm_timer_stop(gptimer);
73
74 switch (mode) {
75 case CLOCK_EVT_MODE_PERIODIC:
76 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
77 period -= 1;
78
79 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
80 break;
81 case CLOCK_EVT_MODE_ONESHOT:
82 break;
83 case CLOCK_EVT_MODE_UNUSED:
84 case CLOCK_EVT_MODE_SHUTDOWN:
85 case CLOCK_EVT_MODE_RESUME:
86 break;
87 }
88}
89
90static struct clock_event_device clockevent_gpt = {
91 .name = "gp timer",
92 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
93 .shift = 32,
94 .set_next_event = omap2_gp_timer_set_next_event,
95 .set_mode = omap2_gp_timer_set_mode,
96};
97
98static void __init omap2_gp_clockevent_init(void)
99{
100 u32 tick_rate;
58 101
59 omap_dm_timer_init();
60 gptimer = omap_dm_timer_request_specific(1); 102 gptimer = omap_dm_timer_request_specific(1);
61 BUG_ON(gptimer == NULL); 103 BUG_ON(gptimer == NULL);
62 104
105#if defined(CONFIG_OMAP_32K_TIMER)
106 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
107#else
63 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); 108 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
64 tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; 109#endif
65 tick_period -= 1; 110 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
66 111
112 omap2_gp_timer_irq.dev_id = (void *)gptimer;
67 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); 113 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
68 omap2_gp_timer_start(tick_period); 114 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
115
116 clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,
117 clockevent_gpt.shift);
118 clockevent_gpt.max_delta_ns =
119 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
120 clockevent_gpt.min_delta_ns =
121 clockevent_delta2ns(1, &clockevent_gpt);
122
123 clockevent_gpt.cpumask = cpumask_of_cpu(0);
124 clockevents_register_device(&clockevent_gpt);
125}
126
127#ifdef CONFIG_OMAP_32K_TIMER
128/*
129 * When 32k-timer is enabled, don't use GPTimer for clocksource
130 * instead, just leave default clocksource which uses the 32k
131 * sync counter. See clocksource setup in see plat-omap/common.c.
132 */
133
134static inline void __init omap2_gp_clocksource_init(void) {}
135#else
136/*
137 * clocksource
138 */
139static struct omap_dm_timer *gpt_clocksource;
140static cycle_t clocksource_read_cycles(void)
141{
142 return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
143}
144
145static struct clocksource clocksource_gpt = {
146 .name = "gp timer",
147 .rating = 300,
148 .read = clocksource_read_cycles,
149 .mask = CLOCKSOURCE_MASK(32),
150 .shift = 24,
151 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
152};
153
154/* Setup free-running counter for clocksource */
155static void __init omap2_gp_clocksource_init(void)
156{
157 static struct omap_dm_timer *gpt;
158 u32 tick_rate, tick_period;
159 static char err1[] __initdata = KERN_ERR
160 "%s: failed to request dm-timer\n";
161 static char err2[] __initdata = KERN_ERR
162 "%s: can't register clocksource!\n";
163
164 gpt = omap_dm_timer_request();
165 if (!gpt)
166 printk(err1, clocksource_gpt.name);
167 gpt_clocksource = gpt;
168
169 omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
170 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
171 tick_period = (tick_rate / HZ) - 1;
172
173 omap_dm_timer_set_load_start(gpt, 1, 0);
174
175 clocksource_gpt.mult =
176 clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift);
177 if (clocksource_register(&clocksource_gpt))
178 printk(err2, clocksource_gpt.name);
179}
180#endif
181
182static void __init omap2_gp_timer_init(void)
183{
184 omap_dm_timer_init();
185
186 omap2_gp_clockevent_init();
187 omap2_gp_clocksource_init();
69} 188}
70 189
71struct sys_timer omap_timer = { 190struct sys_timer omap_timer = {