diff options
Diffstat (limited to 'arch/arm/mach-msm/gpio.c')
-rw-r--r-- | arch/arm/mach-msm/gpio.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index 176af9dcb8e..5ea273b00da 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c | |||
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
293 | val = readl(msm_chip->regs.int_edge); | 293 | val = readl(msm_chip->regs.int_edge); |
294 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { | 294 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { |
295 | writel(val | mask, msm_chip->regs.int_edge); | 295 | writel(val | mask, msm_chip->regs.int_edge); |
296 | irq_desc[d->irq].handle_irq = handle_edge_irq; | 296 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
297 | } else { | 297 | } else { |
298 | writel(val & ~mask, msm_chip->regs.int_edge); | 298 | writel(val & ~mask, msm_chip->regs.int_edge); |
299 | irq_desc[d->irq].handle_irq = handle_level_irq; | 299 | __irq_set_handler_locked(d->irq, handle_level_irq); |
300 | } | 300 | } |
301 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { | 301 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { |
302 | msm_chip->both_edge_detect |= mask; | 302 | msm_chip->both_edge_detect |= mask; |
@@ -354,9 +354,9 @@ static int __init msm_init_gpio(void) | |||
354 | msm_gpio_chips[j].chip.base + | 354 | msm_gpio_chips[j].chip.base + |
355 | msm_gpio_chips[j].chip.ngpio) | 355 | msm_gpio_chips[j].chip.ngpio) |
356 | j++; | 356 | j++; |
357 | set_irq_chip_data(i, &msm_gpio_chips[j]); | 357 | irq_set_chip_data(i, &msm_gpio_chips[j]); |
358 | set_irq_chip(i, &msm_gpio_irq_chip); | 358 | irq_set_chip_and_handler(i, &msm_gpio_irq_chip, |
359 | set_irq_handler(i, handle_edge_irq); | 359 | handle_edge_irq); |
360 | set_irq_flags(i, IRQF_VALID); | 360 | set_irq_flags(i, IRQF_VALID); |
361 | } | 361 | } |
362 | 362 | ||
@@ -366,10 +366,10 @@ static int __init msm_init_gpio(void) | |||
366 | gpiochip_add(&msm_gpio_chips[i].chip); | 366 | gpiochip_add(&msm_gpio_chips[i].chip); |
367 | } | 367 | } |
368 | 368 | ||
369 | set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); | 369 | irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); |
370 | set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); | 370 | irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); |
371 | set_irq_wake(INT_GPIO_GROUP1, 1); | 371 | irq_set_irq_wake(INT_GPIO_GROUP1, 1); |
372 | set_irq_wake(INT_GPIO_GROUP2, 2); | 372 | irq_set_irq_wake(INT_GPIO_GROUP2, 2); |
373 | return 0; | 373 | return 0; |
374 | } | 374 | } |
375 | 375 | ||