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Diffstat (limited to 'arch/arm/mach-davinci/devices-da8xx.c')
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 58a02dc7b15..4e66881c7ae 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,23 +24,25 @@
24#include "clock.h" 24#include "clock.h"
25 25
26#define DA8XX_TPCC_BASE 0x01c00000 26#define DA8XX_TPCC_BASE 0x01c00000
27#define DA850_MMCSD1_BASE 0x01e1b000
28#define DA850_TPCC1_BASE 0x01e30000
29#define DA8XX_TPTC0_BASE 0x01c08000 27#define DA8XX_TPTC0_BASE 0x01c08000
30#define DA8XX_TPTC1_BASE 0x01c08400 28#define DA8XX_TPTC1_BASE 0x01c08400
31#define DA850_TPTC2_BASE 0x01e38000
32#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ 29#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
33#define DA8XX_I2C0_BASE 0x01c22000 30#define DA8XX_I2C0_BASE 0x01c22000
34#define DA8XX_RTC_BASE 0x01C23000 31#define DA8XX_RTC_BASE 0x01c23000
32#define DA8XX_MMCSD0_BASE 0x01c40000
33#define DA8XX_SPI0_BASE 0x01c41000
34#define DA830_SPI1_BASE 0x01e12000
35#define DA8XX_LCD_CNTRL_BASE 0x01e13000
36#define DA850_MMCSD1_BASE 0x01e1b000
35#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 37#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
36#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 38#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
37#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 39#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
38#define DA8XX_EMAC_MDIO_BASE 0x01e24000 40#define DA8XX_EMAC_MDIO_BASE 0x01e24000
39#define DA8XX_GPIO_BASE 0x01e26000
40#define DA8XX_I2C1_BASE 0x01e28000 41#define DA8XX_I2C1_BASE 0x01e28000
41#define DA8XX_SPI0_BASE 0x01c41000 42#define DA850_TPCC1_BASE 0x01e30000
42#define DA830_SPI1_BASE 0x01e12000 43#define DA850_TPTC2_BASE 0x01e38000
43#define DA850_SPI1_BASE 0x01f0e000 44#define DA850_SPI1_BASE 0x01f0e000
45#define DA8XX_DDR2_CTL_BASE 0xb0000000
44 46
45#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 47#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
46#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 48#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000