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-rw-r--r--arch/arm/mach-davinci/da830.c75
1 files changed, 45 insertions, 30 deletions
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 19b2748357f..b22b5cf0425 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -8,22 +8,17 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/clk.h> 12#include <linux/clk.h>
14#include <linux/platform_device.h>
15 13
16#include <asm/mach/map.h> 14#include <asm/mach/map.h>
17 15
18#include <mach/clock.h>
19#include <mach/psc.h> 16#include <mach/psc.h>
20#include <mach/mux.h>
21#include <mach/irqs.h> 17#include <mach/irqs.h>
22#include <mach/cputype.h> 18#include <mach/cputype.h>
23#include <mach/common.h> 19#include <mach/common.h>
24#include <mach/time.h> 20#include <mach/time.h>
25#include <mach/da8xx.h> 21#include <mach/da8xx.h>
26#include <mach/asp.h>
27 22
28#include "clock.h" 23#include "clock.h"
29#include "mux.h" 24#include "mux.h"
@@ -193,14 +188,14 @@ static struct clk uart1_clk = {
193 .name = "uart1", 188 .name = "uart1",
194 .parent = &pll0_sysclk2, 189 .parent = &pll0_sysclk2,
195 .lpsc = DA8XX_LPSC1_UART1, 190 .lpsc = DA8XX_LPSC1_UART1,
196 .psc_ctlr = 1, 191 .gpsc = 1,
197}; 192};
198 193
199static struct clk uart2_clk = { 194static struct clk uart2_clk = {
200 .name = "uart2", 195 .name = "uart2",
201 .parent = &pll0_sysclk2, 196 .parent = &pll0_sysclk2,
202 .lpsc = DA8XX_LPSC1_UART2, 197 .lpsc = DA8XX_LPSC1_UART2,
203 .psc_ctlr = 1, 198 .gpsc = 1,
204}; 199};
205 200
206static struct clk spi0_clk = { 201static struct clk spi0_clk = {
@@ -213,98 +208,98 @@ static struct clk spi1_clk = {
213 .name = "spi1", 208 .name = "spi1",
214 .parent = &pll0_sysclk2, 209 .parent = &pll0_sysclk2,
215 .lpsc = DA8XX_LPSC1_SPI1, 210 .lpsc = DA8XX_LPSC1_SPI1,
216 .psc_ctlr = 1, 211 .gpsc = 1,
217}; 212};
218 213
219static struct clk ecap0_clk = { 214static struct clk ecap0_clk = {
220 .name = "ecap0", 215 .name = "ecap0",
221 .parent = &pll0_sysclk2, 216 .parent = &pll0_sysclk2,
222 .lpsc = DA8XX_LPSC1_ECAP, 217 .lpsc = DA8XX_LPSC1_ECAP,
223 .psc_ctlr = 1, 218 .gpsc = 1,
224}; 219};
225 220
226static struct clk ecap1_clk = { 221static struct clk ecap1_clk = {
227 .name = "ecap1", 222 .name = "ecap1",
228 .parent = &pll0_sysclk2, 223 .parent = &pll0_sysclk2,
229 .lpsc = DA8XX_LPSC1_ECAP, 224 .lpsc = DA8XX_LPSC1_ECAP,
230 .psc_ctlr = 1, 225 .gpsc = 1,
231}; 226};
232 227
233static struct clk ecap2_clk = { 228static struct clk ecap2_clk = {
234 .name = "ecap2", 229 .name = "ecap2",
235 .parent = &pll0_sysclk2, 230 .parent = &pll0_sysclk2,
236 .lpsc = DA8XX_LPSC1_ECAP, 231 .lpsc = DA8XX_LPSC1_ECAP,
237 .psc_ctlr = 1, 232 .gpsc = 1,
238}; 233};
239 234
240static struct clk pwm0_clk = { 235static struct clk pwm0_clk = {
241 .name = "pwm0", 236 .name = "pwm0",
242 .parent = &pll0_sysclk2, 237 .parent = &pll0_sysclk2,
243 .lpsc = DA8XX_LPSC1_PWM, 238 .lpsc = DA8XX_LPSC1_PWM,
244 .psc_ctlr = 1, 239 .gpsc = 1,
245}; 240};
246 241
247static struct clk pwm1_clk = { 242static struct clk pwm1_clk = {
248 .name = "pwm1", 243 .name = "pwm1",
249 .parent = &pll0_sysclk2, 244 .parent = &pll0_sysclk2,
250 .lpsc = DA8XX_LPSC1_PWM, 245 .lpsc = DA8XX_LPSC1_PWM,
251 .psc_ctlr = 1, 246 .gpsc = 1,
252}; 247};
253 248
254static struct clk pwm2_clk = { 249static struct clk pwm2_clk = {
255 .name = "pwm2", 250 .name = "pwm2",
256 .parent = &pll0_sysclk2, 251 .parent = &pll0_sysclk2,
257 .lpsc = DA8XX_LPSC1_PWM, 252 .lpsc = DA8XX_LPSC1_PWM,
258 .psc_ctlr = 1, 253 .gpsc = 1,
259}; 254};
260 255
261static struct clk eqep0_clk = { 256static struct clk eqep0_clk = {
262 .name = "eqep0", 257 .name = "eqep0",
263 .parent = &pll0_sysclk2, 258 .parent = &pll0_sysclk2,
264 .lpsc = DA830_LPSC1_EQEP, 259 .lpsc = DA830_LPSC1_EQEP,
265 .psc_ctlr = 1, 260 .gpsc = 1,
266}; 261};
267 262
268static struct clk eqep1_clk = { 263static struct clk eqep1_clk = {
269 .name = "eqep1", 264 .name = "eqep1",
270 .parent = &pll0_sysclk2, 265 .parent = &pll0_sysclk2,
271 .lpsc = DA830_LPSC1_EQEP, 266 .lpsc = DA830_LPSC1_EQEP,
272 .psc_ctlr = 1, 267 .gpsc = 1,
273}; 268};
274 269
275static struct clk lcdc_clk = { 270static struct clk lcdc_clk = {
276 .name = "lcdc", 271 .name = "lcdc",
277 .parent = &pll0_sysclk2, 272 .parent = &pll0_sysclk2,
278 .lpsc = DA8XX_LPSC1_LCDC, 273 .lpsc = DA8XX_LPSC1_LCDC,
279 .psc_ctlr = 1, 274 .gpsc = 1,
280}; 275};
281 276
282static struct clk mcasp0_clk = { 277static struct clk mcasp0_clk = {
283 .name = "mcasp0", 278 .name = "mcasp0",
284 .parent = &pll0_sysclk2, 279 .parent = &pll0_sysclk2,
285 .lpsc = DA8XX_LPSC1_McASP0, 280 .lpsc = DA8XX_LPSC1_McASP0,
286 .psc_ctlr = 1, 281 .gpsc = 1,
287}; 282};
288 283
289static struct clk mcasp1_clk = { 284static struct clk mcasp1_clk = {
290 .name = "mcasp1", 285 .name = "mcasp1",
291 .parent = &pll0_sysclk2, 286 .parent = &pll0_sysclk2,
292 .lpsc = DA830_LPSC1_McASP1, 287 .lpsc = DA830_LPSC1_McASP1,
293 .psc_ctlr = 1, 288 .gpsc = 1,
294}; 289};
295 290
296static struct clk mcasp2_clk = { 291static struct clk mcasp2_clk = {
297 .name = "mcasp2", 292 .name = "mcasp2",
298 .parent = &pll0_sysclk2, 293 .parent = &pll0_sysclk2,
299 .lpsc = DA830_LPSC1_McASP2, 294 .lpsc = DA830_LPSC1_McASP2,
300 .psc_ctlr = 1, 295 .gpsc = 1,
301}; 296};
302 297
303static struct clk usb20_clk = { 298static struct clk usb20_clk = {
304 .name = "usb20", 299 .name = "usb20",
305 .parent = &pll0_sysclk2, 300 .parent = &pll0_sysclk2,
306 .lpsc = DA8XX_LPSC1_USB20, 301 .lpsc = DA8XX_LPSC1_USB20,
307 .psc_ctlr = 1, 302 .gpsc = 1,
308}; 303};
309 304
310static struct clk aemif_clk = { 305static struct clk aemif_clk = {
@@ -332,36 +327,36 @@ static struct clk emac_clk = {
332 .name = "emac", 327 .name = "emac",
333 .parent = &pll0_sysclk4, 328 .parent = &pll0_sysclk4,
334 .lpsc = DA8XX_LPSC1_CPGMAC, 329 .lpsc = DA8XX_LPSC1_CPGMAC,
335 .psc_ctlr = 1, 330 .gpsc = 1,
336}; 331};
337 332
338static struct clk gpio_clk = { 333static struct clk gpio_clk = {
339 .name = "gpio", 334 .name = "gpio",
340 .parent = &pll0_sysclk4, 335 .parent = &pll0_sysclk4,
341 .lpsc = DA8XX_LPSC1_GPIO, 336 .lpsc = DA8XX_LPSC1_GPIO,
342 .psc_ctlr = 1, 337 .gpsc = 1,
343}; 338};
344 339
345static struct clk i2c1_clk = { 340static struct clk i2c1_clk = {
346 .name = "i2c1", 341 .name = "i2c1",
347 .parent = &pll0_sysclk4, 342 .parent = &pll0_sysclk4,
348 .lpsc = DA8XX_LPSC1_I2C, 343 .lpsc = DA8XX_LPSC1_I2C,
349 .psc_ctlr = 1, 344 .gpsc = 1,
350}; 345};
351 346
352static struct clk usb11_clk = { 347static struct clk usb11_clk = {
353 .name = "usb11", 348 .name = "usb11",
354 .parent = &pll0_sysclk4, 349 .parent = &pll0_sysclk4,
355 .lpsc = DA8XX_LPSC1_USB11, 350 .lpsc = DA8XX_LPSC1_USB11,
356 .psc_ctlr = 1, 351 .gpsc = 1,
357}; 352};
358 353
359static struct clk emif3_clk = { 354static struct clk emif3_clk = {
360 .name = "emif3", 355 .name = "emif3",
361 .parent = &pll0_sysclk5, 356 .parent = &pll0_sysclk5,
362 .lpsc = DA8XX_LPSC1_EMIF3C, 357 .lpsc = DA8XX_LPSC1_EMIF3C,
358 .gpsc = 1,
363 .flags = ALWAYS_ENABLED, 359 .flags = ALWAYS_ENABLED,
364 .psc_ctlr = 1,
365}; 360};
366 361
367static struct clk arm_clk = { 362static struct clk arm_clk = {
@@ -411,7 +406,7 @@ static struct davinci_clk da830_clks[] = {
411 CLK(NULL, "pwm2", &pwm2_clk), 406 CLK(NULL, "pwm2", &pwm2_clk),
412 CLK("eqep.0", NULL, &eqep0_clk), 407 CLK("eqep.0", NULL, &eqep0_clk),
413 CLK("eqep.1", NULL, &eqep1_clk), 408 CLK("eqep.1", NULL, &eqep1_clk),
414 CLK("da830_lcdc", NULL, &lcdc_clk), 409 CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
415 CLK("davinci-mcasp.0", NULL, &mcasp0_clk), 410 CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
416 CLK("davinci-mcasp.1", NULL, &mcasp1_clk), 411 CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
417 CLK("davinci-mcasp.2", NULL, &mcasp2_clk), 412 CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
@@ -1143,7 +1138,21 @@ static struct davinci_id da830_ids[] = {
1143 .part_no = 0xb7df, 1138 .part_no = 0xb7df,
1144 .manufacturer = 0x017, /* 0x02f >> 1 */ 1139 .manufacturer = 0x017, /* 0x02f >> 1 */
1145 .cpu_id = DAVINCI_CPU_ID_DA830, 1140 .cpu_id = DAVINCI_CPU_ID_DA830,
1146 .name = "da830/omap l137", 1141 .name = "da830/omap-l137 rev1.0",
1142 },
1143 {
1144 .variant = 0x8,
1145 .part_no = 0xb7df,
1146 .manufacturer = 0x017,
1147 .cpu_id = DAVINCI_CPU_ID_DA830,
1148 .name = "da830/omap-l137 rev1.1",
1149 },
1150 {
1151 .variant = 0x9,
1152 .part_no = 0xb7df,
1153 .manufacturer = 0x017,
1154 .cpu_id = DAVINCI_CPU_ID_DA830,
1155 .name = "da830/omap-l137 rev2.0",
1147 }, 1156 },
1148}; 1157};
1149 1158
@@ -1178,13 +1187,11 @@ static struct davinci_timer_info da830_timer_info = {
1178static struct davinci_soc_info davinci_soc_info_da830 = { 1187static struct davinci_soc_info davinci_soc_info_da830 = {
1179 .io_desc = da830_io_desc, 1188 .io_desc = da830_io_desc,
1180 .io_desc_num = ARRAY_SIZE(da830_io_desc), 1189 .io_desc_num = ARRAY_SIZE(da830_io_desc),
1181 .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG),
1182 .ids = da830_ids, 1190 .ids = da830_ids,
1183 .ids_num = ARRAY_SIZE(da830_ids), 1191 .ids_num = ARRAY_SIZE(da830_ids),
1184 .cpu_clks = da830_clks, 1192 .cpu_clks = da830_clks,
1185 .psc_bases = da830_psc_bases, 1193 .psc_bases = da830_psc_bases,
1186 .psc_bases_num = ARRAY_SIZE(da830_psc_bases), 1194 .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
1187 .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120),
1188 .pinmux_pins = da830_pins, 1195 .pinmux_pins = da830_pins,
1189 .pinmux_pins_num = ARRAY_SIZE(da830_pins), 1196 .pinmux_pins_num = ARRAY_SIZE(da830_pins),
1190 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, 1197 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
@@ -1201,5 +1208,13 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
1201 1208
1202void __init da830_init(void) 1209void __init da830_init(void)
1203{ 1210{
1211 da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K);
1212 if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module"))
1213 return;
1214
1215 davinci_soc_info_da830.jtag_id_base =
1216 DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG);
1217 davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120);
1218
1204 davinci_common_init(&davinci_soc_info_da830); 1219 davinci_common_init(&davinci_soc_info_da830);
1205} 1220}