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Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 24 |
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diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt new file mode 100644 index 00000000000..60084655776 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt | |||
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1 | * Freescale Enhanced Secure Digital Host Controller (eSDHC) | ||
2 | |||
3 | The Enhanced Secure Digital Host Controller provides an interface | ||
4 | for MMC, SD, and SDIO types of memory cards. | ||
5 | |||
6 | Required properties: | ||
7 | - compatible : should be | ||
8 | "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors. | ||
9 | "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors. | ||
10 | - reg : should contain eSDHC registers location and length. | ||
11 | - interrupts : should contain eSDHC interrupt. | ||
12 | - interrupt-parent : interrupt source phandle. | ||
13 | - clock-frequency : specifies eSDHC base clock frequency. | ||
14 | |||
15 | Example: | ||
16 | |||
17 | sdhci@2e000 { | ||
18 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; | ||
19 | reg = <0x2e000 0x1000>; | ||
20 | interrupts = <42 0x8>; | ||
21 | interrupt-parent = <&ipic>; | ||
22 | /* Filled in by U-Boot */ | ||
23 | clock-frequency = <0>; | ||
24 | }; | ||