diff options
| -rw-r--r-- | arch/arm/mach-kirkwood/pcie.c | 52 |
1 files changed, 19 insertions, 33 deletions
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 49c4fc6b7a5..55e7f00836b 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c | |||
| @@ -108,9 +108,10 @@ static struct pci_ops pcie_ops = { | |||
| 108 | .write = pcie_wr_conf, | 108 | .write = pcie_wr_conf, |
| 109 | }; | 109 | }; |
| 110 | 110 | ||
| 111 | static int __init pcie0_ioresources_setup(struct pci_sys_data *sys) | 111 | static void __init pcie0_ioresources_init(struct pcie_port *pp) |
| 112 | { | 112 | { |
| 113 | struct pcie_port *pp = (struct pcie_port *)sys->private_data; | 113 | pp->base = (void __iomem *)PCIE_VIRT_BASE; |
| 114 | pp->irq = IRQ_KIRKWOOD_PCIE; | ||
| 114 | 115 | ||
| 115 | /* | 116 | /* |
| 116 | * IORESOURCE_IO | 117 | * IORESOURCE_IO |
| @@ -119,9 +120,6 @@ static int __init pcie0_ioresources_setup(struct pci_sys_data *sys) | |||
| 119 | pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; | 120 | pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; |
| 120 | pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; | 121 | pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; |
| 121 | pp->res[0].flags = IORESOURCE_IO; | 122 | pp->res[0].flags = IORESOURCE_IO; |
| 122 | if (request_resource(&ioport_resource, &pp->res[0])) | ||
| 123 | panic("Request PCIe 0 IO resource failed\n"); | ||
| 124 | sys->resource[0] = &pp->res[0]; | ||
| 125 | 123 | ||
| 126 | /* | 124 | /* |
| 127 | * IORESOURCE_MEM | 125 | * IORESOURCE_MEM |
| @@ -130,19 +128,12 @@ static int __init pcie0_ioresources_setup(struct pci_sys_data *sys) | |||
| 130 | pp->res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; | 128 | pp->res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; |
| 131 | pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; | 129 | pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; |
| 132 | pp->res[1].flags = IORESOURCE_MEM; | 130 | pp->res[1].flags = IORESOURCE_MEM; |
| 133 | if (request_resource(&iomem_resource, &pp->res[1])) | ||
| 134 | panic("Request PCIe 0 Memory resource failed\n"); | ||
| 135 | sys->resource[1] = &pp->res[1]; | ||
| 136 | |||
| 137 | sys->resource[2] = NULL; | ||
| 138 | sys->io_offset = 0; | ||
| 139 | |||
| 140 | return 1; | ||
| 141 | } | 131 | } |
| 142 | 132 | ||
| 143 | static int __init pcie1_ioresources_setup(struct pci_sys_data *sys) | 133 | static void __init pcie1_ioresources_init(struct pcie_port *pp) |
| 144 | { | 134 | { |
| 145 | struct pcie_port *pp = (struct pcie_port *)sys->private_data; | 135 | pp->base = (void __iomem *)PCIE1_VIRT_BASE; |
| 136 | pp->irq = IRQ_KIRKWOOD_PCIE1; | ||
| 146 | 137 | ||
| 147 | /* | 138 | /* |
| 148 | * IORESOURCE_IO | 139 | * IORESOURCE_IO |
| @@ -151,9 +142,6 @@ static int __init pcie1_ioresources_setup(struct pci_sys_data *sys) | |||
| 151 | pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE; | 142 | pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE; |
| 152 | pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1; | 143 | pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1; |
| 153 | pp->res[0].flags = IORESOURCE_IO; | 144 | pp->res[0].flags = IORESOURCE_IO; |
| 154 | if (request_resource(&ioport_resource, &pp->res[0])) | ||
| 155 | panic("Request PCIe 1 IO resource failed\n"); | ||
| 156 | sys->resource[0] = &pp->res[0]; | ||
| 157 | 145 | ||
| 158 | /* | 146 | /* |
| 159 | * IORESOURCE_MEM | 147 | * IORESOURCE_MEM |
| @@ -162,14 +150,6 @@ static int __init pcie1_ioresources_setup(struct pci_sys_data *sys) | |||
| 162 | pp->res[1].start = KIRKWOOD_PCIE1_MEM_PHYS_BASE; | 150 | pp->res[1].start = KIRKWOOD_PCIE1_MEM_PHYS_BASE; |
| 163 | pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE1_MEM_SIZE - 1; | 151 | pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE1_MEM_SIZE - 1; |
| 164 | pp->res[1].flags = IORESOURCE_MEM; | 152 | pp->res[1].flags = IORESOURCE_MEM; |
| 165 | if (request_resource(&iomem_resource, &pp->res[1])) | ||
| 166 | panic("Request PCIe 1 Memory resource failed\n"); | ||
| 167 | sys->resource[1] = &pp->res[1]; | ||
| 168 | |||
| 169 | sys->resource[2] = NULL; | ||
| 170 | sys->io_offset = 0; | ||
| 171 | |||
| 172 | return 1; | ||
| 173 | } | 153 | } |
| 174 | 154 | ||
| 175 | static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | 155 | static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) |
| @@ -193,21 +173,27 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
| 193 | 173 | ||
| 194 | switch (index) { | 174 | switch (index) { |
| 195 | case 0: | 175 | case 0: |
| 196 | pp->base = (void __iomem *)PCIE_VIRT_BASE; | ||
| 197 | pp->irq = IRQ_KIRKWOOD_PCIE; | ||
| 198 | kirkwood_clk_ctrl |= CGC_PEX0; | 176 | kirkwood_clk_ctrl |= CGC_PEX0; |
| 199 | pcie0_ioresources_setup(sys); | 177 | pcie0_ioresources_init(pp); |
| 200 | break; | 178 | break; |
| 201 | case 1: | 179 | case 1: |
| 202 | pp->base = (void __iomem *)PCIE1_VIRT_BASE; | ||
| 203 | pp->irq = IRQ_KIRKWOOD_PCIE1; | ||
| 204 | kirkwood_clk_ctrl |= CGC_PEX1; | 180 | kirkwood_clk_ctrl |= CGC_PEX1; |
| 205 | pcie1_ioresources_setup(sys); | 181 | pcie1_ioresources_init(pp); |
| 206 | break; | 182 | break; |
| 207 | default: | 183 | default: |
| 208 | panic("PCIe setup: invalid controller"); | 184 | panic("PCIe setup: invalid controller %d", index); |
| 209 | } | 185 | } |
| 210 | 186 | ||
| 187 | if (request_resource(&ioport_resource, &pp->res[0])) | ||
| 188 | panic("Request PCIe%d IO resource failed\n", index); | ||
| 189 | if (request_resource(&iomem_resource, &pp->res[1])) | ||
| 190 | panic("Request PCIe%d Memory resource failed\n", index); | ||
| 191 | |||
| 192 | sys->resource[0] = &pp->res[0]; | ||
| 193 | sys->resource[1] = &pp->res[1]; | ||
| 194 | sys->resource[2] = NULL; | ||
| 195 | sys->io_offset = 0; | ||
| 196 | |||
| 211 | /* | 197 | /* |
| 212 | * Generic PCIe unit setup. | 198 | * Generic PCIe unit setup. |
| 213 | */ | 199 | */ |
