diff options
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 90 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 2 |
4 files changed, 52 insertions, 46 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 73f600d39ad..3a7095743d4 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1262,6 +1262,10 @@ void r100_pll_errata_after_index(struct radeon_device *rdev); | |||
1262 | (rdev->family == CHIP_RS400) || \ | 1262 | (rdev->family == CHIP_RS400) || \ |
1263 | (rdev->family == CHIP_RS480)) | 1263 | (rdev->family == CHIP_RS480)) |
1264 | #define ASIC_IS_AVIVO(rdev) ((rdev->family >= CHIP_RS600)) | 1264 | #define ASIC_IS_AVIVO(rdev) ((rdev->family >= CHIP_RS600)) |
1265 | #define ASIC_IS_DCE2(rdev) ((rdev->family == CHIP_RS600) || \ | ||
1266 | (rdev->family == CHIP_RS690) || \ | ||
1267 | (rdev->family == CHIP_RS740) || \ | ||
1268 | (rdev->family >= CHIP_R600)) | ||
1265 | #define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620)) | 1269 | #define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620)) |
1266 | #define ASIC_IS_DCE32(rdev) ((rdev->family >= CHIP_RV730)) | 1270 | #define ASIC_IS_DCE32(rdev) ((rdev->family >= CHIP_RV730)) |
1267 | #define ASIC_IS_DCE4(rdev) ((rdev->family >= CHIP_CEDAR)) | 1271 | #define ASIC_IS_DCE4(rdev) ((rdev->family >= CHIP_CEDAR)) |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 63f4964e8d2..07df990a897 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -176,6 +176,7 @@ static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder) | |||
176 | return false; | 176 | return false; |
177 | } | 177 | } |
178 | } | 178 | } |
179 | |||
179 | void | 180 | void |
180 | radeon_link_encoder_connector(struct drm_device *dev) | 181 | radeon_link_encoder_connector(struct drm_device *dev) |
181 | { | 182 | { |
@@ -426,52 +427,49 @@ atombios_tv_setup(struct drm_encoder *encoder, int action) | |||
426 | 427 | ||
427 | } | 428 | } |
428 | 429 | ||
429 | void | 430 | union dvo_encoder_control { |
430 | atombios_external_tmds_setup(struct drm_encoder *encoder, int action) | 431 | ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION ext_tmds; |
431 | { | 432 | DVO_ENCODER_CONTROL_PS_ALLOCATION dvo; |
432 | struct drm_device *dev = encoder->dev; | 433 | DVO_ENCODER_CONTROL_PS_ALLOCATION_V3 dvo_v3; |
433 | struct radeon_device *rdev = dev->dev_private; | 434 | }; |
434 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
435 | ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION args; | ||
436 | int index = 0; | ||
437 | |||
438 | memset(&args, 0, sizeof(args)); | ||
439 | |||
440 | index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl); | ||
441 | |||
442 | args.sXTmdsEncoder.ucEnable = action; | ||
443 | |||
444 | if (radeon_encoder->pixel_clock > 165000) | ||
445 | args.sXTmdsEncoder.ucMisc = PANEL_ENCODER_MISC_DUAL; | ||
446 | |||
447 | /*if (pScrn->rgbBits == 8)*/ | ||
448 | args.sXTmdsEncoder.ucMisc |= (1 << 1); | ||
449 | |||
450 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
451 | |||
452 | } | ||
453 | 435 | ||
454 | static void | 436 | void |
455 | atombios_ddia_setup(struct drm_encoder *encoder, int action) | 437 | atombios_dvo_setup(struct drm_encoder *encoder, int action) |
456 | { | 438 | { |
457 | struct drm_device *dev = encoder->dev; | 439 | struct drm_device *dev = encoder->dev; |
458 | struct radeon_device *rdev = dev->dev_private; | 440 | struct radeon_device *rdev = dev->dev_private; |
459 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 441 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
460 | DVO_ENCODER_CONTROL_PS_ALLOCATION args; | 442 | union dvo_encoder_control args; |
461 | int index = 0; | 443 | int index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl); |
462 | 444 | ||
463 | memset(&args, 0, sizeof(args)); | 445 | memset(&args, 0, sizeof(args)); |
464 | 446 | ||
465 | index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl); | 447 | if (ASIC_IS_DCE3(rdev)) { |
448 | /* DCE3+ */ | ||
449 | args.dvo_v3.ucAction = action; | ||
450 | args.dvo_v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | ||
451 | args.dvo_v3.ucDVOConfig = 0; /* XXX */ | ||
452 | } else if (ASIC_IS_DCE2(rdev)) { | ||
453 | /* DCE2 (pre-DCE3 R6xx, RS600/690/740 */ | ||
454 | args.dvo.sDVOEncoder.ucAction = action; | ||
455 | args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | ||
456 | /* DFP1, CRT1, TV1 depending on the type of port */ | ||
457 | args.dvo.sDVOEncoder.ucDeviceType = ATOM_DEVICE_DFP1_INDEX; | ||
458 | |||
459 | if (radeon_encoder->pixel_clock > 165000) | ||
460 | args.dvo.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute |= PANEL_ENCODER_MISC_DUAL; | ||
461 | } else { | ||
462 | /* R4xx, R5xx */ | ||
463 | args.ext_tmds.sXTmdsEncoder.ucEnable = action; | ||
466 | 464 | ||
467 | args.sDVOEncoder.ucAction = action; | 465 | if (radeon_encoder->pixel_clock > 165000) |
468 | args.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 466 | args.ext_tmds.sXTmdsEncoder.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
469 | 467 | ||
470 | if (radeon_encoder->pixel_clock > 165000) | 468 | /*if (pScrn->rgbBits == 8)*/ |
471 | args.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute = PANEL_ENCODER_MISC_DUAL; | 469 | args.ext_tmds.sXTmdsEncoder.ucMisc |= ATOM_PANEL_MISC_888RGB; |
470 | } | ||
472 | 471 | ||
473 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 472 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
474 | |||
475 | } | 473 | } |
476 | 474 | ||
477 | union lvds_encoder_control { | 475 | union lvds_encoder_control { |
@@ -532,14 +530,14 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
532 | if (dig->lcd_misc & ATOM_PANEL_MISC_DUAL) | 530 | if (dig->lcd_misc & ATOM_PANEL_MISC_DUAL) |
533 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; | 531 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
534 | if (dig->lcd_misc & ATOM_PANEL_MISC_888RGB) | 532 | if (dig->lcd_misc & ATOM_PANEL_MISC_888RGB) |
535 | args.v1.ucMisc |= (1 << 1); | 533 | args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB; |
536 | } else { | 534 | } else { |
537 | if (dig->linkb) | 535 | if (dig->linkb) |
538 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; | 536 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
539 | if (radeon_encoder->pixel_clock > 165000) | 537 | if (radeon_encoder->pixel_clock > 165000) |
540 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; | 538 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
541 | /*if (pScrn->rgbBits == 8) */ | 539 | /*if (pScrn->rgbBits == 8) */ |
542 | args.v1.ucMisc |= (1 << 1); | 540 | args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB; |
543 | } | 541 | } |
544 | break; | 542 | break; |
545 | case 2: | 543 | case 2: |
@@ -846,6 +844,9 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
846 | memset(&args, 0, sizeof(args)); | 844 | memset(&args, 0, sizeof(args)); |
847 | 845 | ||
848 | switch (radeon_encoder->encoder_id) { | 846 | switch (radeon_encoder->encoder_id) { |
847 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | ||
848 | index = GetIndexIntoMasterTable(COMMAND, DVOOutputControl); | ||
849 | break; | ||
849 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 850 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
850 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 851 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
851 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 852 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
@@ -1085,9 +1086,14 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
1085 | break; | 1086 | break; |
1086 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: | 1087 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
1087 | case ENCODER_OBJECT_ID_INTERNAL_DDI: | 1088 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
1088 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | ||
1089 | index = GetIndexIntoMasterTable(COMMAND, DVOOutputControl); | 1089 | index = GetIndexIntoMasterTable(COMMAND, DVOOutputControl); |
1090 | break; | 1090 | break; |
1091 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | ||
1092 | if (ASIC_IS_DCE3(rdev)) | ||
1093 | is_dig = true; | ||
1094 | else | ||
1095 | index = GetIndexIntoMasterTable(COMMAND, DVOOutputControl); | ||
1096 | break; | ||
1091 | case ENCODER_OBJECT_ID_INTERNAL_LVDS: | 1097 | case ENCODER_OBJECT_ID_INTERNAL_LVDS: |
1092 | index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl); | 1098 | index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl); |
1093 | break; | 1099 | break; |
@@ -1317,7 +1323,7 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) | |||
1317 | break; | 1323 | break; |
1318 | default: | 1324 | default: |
1319 | DRM_ERROR("Unknown table version: %d, %d\n", frev, crev); | 1325 | DRM_ERROR("Unknown table version: %d, %d\n", frev, crev); |
1320 | break; | 1326 | return; |
1321 | } | 1327 | } |
1322 | 1328 | ||
1323 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 1329 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
@@ -1475,11 +1481,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1475 | } | 1481 | } |
1476 | break; | 1482 | break; |
1477 | case ENCODER_OBJECT_ID_INTERNAL_DDI: | 1483 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
1478 | atombios_ddia_setup(encoder, ATOM_ENABLE); | ||
1479 | break; | ||
1480 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: | 1484 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
1481 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | 1485 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
1482 | atombios_external_tmds_setup(encoder, ATOM_ENABLE); | 1486 | atombios_dvo_setup(encoder, ATOM_ENABLE); |
1483 | break; | 1487 | break; |
1484 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 1488 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
1485 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 1489 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
@@ -1670,11 +1674,9 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder) | |||
1670 | } | 1674 | } |
1671 | break; | 1675 | break; |
1672 | case ENCODER_OBJECT_ID_INTERNAL_DDI: | 1676 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
1673 | atombios_ddia_setup(encoder, ATOM_DISABLE); | ||
1674 | break; | ||
1675 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: | 1677 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
1676 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | 1678 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
1677 | atombios_external_tmds_setup(encoder, ATOM_DISABLE); | 1679 | atombios_dvo_setup(encoder, ATOM_DISABLE); |
1678 | break; | 1680 | break; |
1679 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 1681 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
1680 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 1682 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 0b8397000f4..59f834ba283 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -670,7 +670,7 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder, | |||
670 | 670 | ||
671 | if (rdev->is_atom_bios) { | 671 | if (rdev->is_atom_bios) { |
672 | radeon_encoder->pixel_clock = adjusted_mode->clock; | 672 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
673 | atombios_external_tmds_setup(encoder, ATOM_ENABLE); | 673 | atombios_dvo_setup(encoder, ATOM_ENABLE); |
674 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | 674 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
675 | } else { | 675 | } else { |
676 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | 676 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index ef588835201..663bc51cf99 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -524,7 +524,7 @@ struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev | |||
524 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); | 524 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
525 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); | 525 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
526 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); | 526 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
527 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); | 527 | extern void atombios_dvo_setup(struct drm_encoder *encoder, int action); |
528 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); | 528 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); |
529 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); | 529 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
530 | extern void atombios_set_edp_panel_power(struct drm_connector *connector, int action); | 530 | extern void atombios_set_edp_panel_power(struct drm_connector *connector, int action); |