diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/serial/pxa.c |
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/serial/pxa.c')
-rw-r--r-- | drivers/serial/pxa.c | 877 |
1 files changed, 877 insertions, 0 deletions
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c new file mode 100644 index 00000000000..68b25b2c26b --- /dev/null +++ b/drivers/serial/pxa.c | |||
@@ -0,0 +1,877 @@ | |||
1 | /* | ||
2 | * linux/drivers/serial/pxa.c | ||
3 | * | ||
4 | * Based on drivers/serial/8250.c by Russell King. | ||
5 | * | ||
6 | * Author: Nicolas Pitre | ||
7 | * Created: Feb 20, 2003 | ||
8 | * Copyright: (C) 2003 Monta Vista Software, Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * Note 1: This driver is made separate from the already too overloaded | ||
16 | * 8250.c because it needs some kirks of its own and that'll make it | ||
17 | * easier to add DMA support. | ||
18 | * | ||
19 | * Note 2: I'm too sick of device allocation policies for serial ports. | ||
20 | * If someone else wants to request an "official" allocation of major/minor | ||
21 | * for this driver please be my guest. And don't forget that new hardware | ||
22 | * to come from Intel might have more than 3 or 4 of those UARTs. Let's | ||
23 | * hope for a better port registration and dynamic device allocation scheme | ||
24 | * with the serial core maintainer satisfaction to appear soon. | ||
25 | */ | ||
26 | |||
27 | #include <linux/config.h> | ||
28 | |||
29 | #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
30 | #define SUPPORT_SYSRQ | ||
31 | #endif | ||
32 | |||
33 | #include <linux/module.h> | ||
34 | #include <linux/ioport.h> | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/console.h> | ||
37 | #include <linux/sysrq.h> | ||
38 | #include <linux/serial_reg.h> | ||
39 | #include <linux/circ_buf.h> | ||
40 | #include <linux/delay.h> | ||
41 | #include <linux/interrupt.h> | ||
42 | #include <linux/device.h> | ||
43 | #include <linux/tty.h> | ||
44 | #include <linux/tty_flip.h> | ||
45 | #include <linux/serial_core.h> | ||
46 | |||
47 | #include <asm/io.h> | ||
48 | #include <asm/hardware.h> | ||
49 | #include <asm/irq.h> | ||
50 | #include <asm/arch/pxa-regs.h> | ||
51 | |||
52 | |||
53 | struct uart_pxa_port { | ||
54 | struct uart_port port; | ||
55 | unsigned char ier; | ||
56 | unsigned char lcr; | ||
57 | unsigned char mcr; | ||
58 | unsigned int lsr_break_flag; | ||
59 | unsigned int cken; | ||
60 | char *name; | ||
61 | }; | ||
62 | |||
63 | static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) | ||
64 | { | ||
65 | offset <<= 2; | ||
66 | return readl(up->port.membase + offset); | ||
67 | } | ||
68 | |||
69 | static inline void serial_out(struct uart_pxa_port *up, int offset, int value) | ||
70 | { | ||
71 | offset <<= 2; | ||
72 | writel(value, up->port.membase + offset); | ||
73 | } | ||
74 | |||
75 | static void serial_pxa_enable_ms(struct uart_port *port) | ||
76 | { | ||
77 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
78 | |||
79 | up->ier |= UART_IER_MSI; | ||
80 | serial_out(up, UART_IER, up->ier); | ||
81 | } | ||
82 | |||
83 | static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
84 | { | ||
85 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
86 | |||
87 | if (up->ier & UART_IER_THRI) { | ||
88 | up->ier &= ~UART_IER_THRI; | ||
89 | serial_out(up, UART_IER, up->ier); | ||
90 | } | ||
91 | } | ||
92 | |||
93 | static void serial_pxa_stop_rx(struct uart_port *port) | ||
94 | { | ||
95 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
96 | |||
97 | up->ier &= ~UART_IER_RLSI; | ||
98 | up->port.read_status_mask &= ~UART_LSR_DR; | ||
99 | serial_out(up, UART_IER, up->ier); | ||
100 | } | ||
101 | |||
102 | static inline void | ||
103 | receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs) | ||
104 | { | ||
105 | struct tty_struct *tty = up->port.info->tty; | ||
106 | unsigned int ch, flag; | ||
107 | int max_count = 256; | ||
108 | |||
109 | do { | ||
110 | if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { | ||
111 | if (tty->low_latency) | ||
112 | tty_flip_buffer_push(tty); | ||
113 | /* | ||
114 | * If this failed then we will throw away the | ||
115 | * bytes but must do so to clear interrupts | ||
116 | */ | ||
117 | } | ||
118 | ch = serial_in(up, UART_RX); | ||
119 | flag = TTY_NORMAL; | ||
120 | up->port.icount.rx++; | ||
121 | |||
122 | if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | | ||
123 | UART_LSR_FE | UART_LSR_OE))) { | ||
124 | /* | ||
125 | * For statistics only | ||
126 | */ | ||
127 | if (*status & UART_LSR_BI) { | ||
128 | *status &= ~(UART_LSR_FE | UART_LSR_PE); | ||
129 | up->port.icount.brk++; | ||
130 | /* | ||
131 | * We do the SysRQ and SAK checking | ||
132 | * here because otherwise the break | ||
133 | * may get masked by ignore_status_mask | ||
134 | * or read_status_mask. | ||
135 | */ | ||
136 | if (uart_handle_break(&up->port)) | ||
137 | goto ignore_char; | ||
138 | } else if (*status & UART_LSR_PE) | ||
139 | up->port.icount.parity++; | ||
140 | else if (*status & UART_LSR_FE) | ||
141 | up->port.icount.frame++; | ||
142 | if (*status & UART_LSR_OE) | ||
143 | up->port.icount.overrun++; | ||
144 | |||
145 | /* | ||
146 | * Mask off conditions which should be ignored. | ||
147 | */ | ||
148 | *status &= up->port.read_status_mask; | ||
149 | |||
150 | #ifdef CONFIG_SERIAL_PXA_CONSOLE | ||
151 | if (up->port.line == up->port.cons->index) { | ||
152 | /* Recover the break flag from console xmit */ | ||
153 | *status |= up->lsr_break_flag; | ||
154 | up->lsr_break_flag = 0; | ||
155 | } | ||
156 | #endif | ||
157 | if (*status & UART_LSR_BI) { | ||
158 | flag = TTY_BREAK; | ||
159 | } else if (*status & UART_LSR_PE) | ||
160 | flag = TTY_PARITY; | ||
161 | else if (*status & UART_LSR_FE) | ||
162 | flag = TTY_FRAME; | ||
163 | } | ||
164 | if (uart_handle_sysrq_char(&up->port, ch, regs)) | ||
165 | goto ignore_char; | ||
166 | if ((*status & up->port.ignore_status_mask) == 0) { | ||
167 | tty_insert_flip_char(tty, ch, flag); | ||
168 | } | ||
169 | if ((*status & UART_LSR_OE) && | ||
170 | tty->flip.count < TTY_FLIPBUF_SIZE) { | ||
171 | /* | ||
172 | * Overrun is special, since it's reported | ||
173 | * immediately, and doesn't affect the current | ||
174 | * character. | ||
175 | */ | ||
176 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | ||
177 | } | ||
178 | ignore_char: | ||
179 | *status = serial_in(up, UART_LSR); | ||
180 | } while ((*status & UART_LSR_DR) && (max_count-- > 0)); | ||
181 | tty_flip_buffer_push(tty); | ||
182 | } | ||
183 | |||
184 | static void transmit_chars(struct uart_pxa_port *up) | ||
185 | { | ||
186 | struct circ_buf *xmit = &up->port.info->xmit; | ||
187 | int count; | ||
188 | |||
189 | if (up->port.x_char) { | ||
190 | serial_out(up, UART_TX, up->port.x_char); | ||
191 | up->port.icount.tx++; | ||
192 | up->port.x_char = 0; | ||
193 | return; | ||
194 | } | ||
195 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | ||
196 | serial_pxa_stop_tx(&up->port, 0); | ||
197 | return; | ||
198 | } | ||
199 | |||
200 | count = up->port.fifosize / 2; | ||
201 | do { | ||
202 | serial_out(up, UART_TX, xmit->buf[xmit->tail]); | ||
203 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
204 | up->port.icount.tx++; | ||
205 | if (uart_circ_empty(xmit)) | ||
206 | break; | ||
207 | } while (--count > 0); | ||
208 | |||
209 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
210 | uart_write_wakeup(&up->port); | ||
211 | |||
212 | |||
213 | if (uart_circ_empty(xmit)) | ||
214 | serial_pxa_stop_tx(&up->port, 0); | ||
215 | } | ||
216 | |||
217 | static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start) | ||
218 | { | ||
219 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
220 | |||
221 | if (!(up->ier & UART_IER_THRI)) { | ||
222 | up->ier |= UART_IER_THRI; | ||
223 | serial_out(up, UART_IER, up->ier); | ||
224 | } | ||
225 | } | ||
226 | |||
227 | static inline void check_modem_status(struct uart_pxa_port *up) | ||
228 | { | ||
229 | int status; | ||
230 | |||
231 | status = serial_in(up, UART_MSR); | ||
232 | |||
233 | if ((status & UART_MSR_ANY_DELTA) == 0) | ||
234 | return; | ||
235 | |||
236 | if (status & UART_MSR_TERI) | ||
237 | up->port.icount.rng++; | ||
238 | if (status & UART_MSR_DDSR) | ||
239 | up->port.icount.dsr++; | ||
240 | if (status & UART_MSR_DDCD) | ||
241 | uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); | ||
242 | if (status & UART_MSR_DCTS) | ||
243 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); | ||
244 | |||
245 | wake_up_interruptible(&up->port.info->delta_msr_wait); | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * This handles the interrupt from one port. | ||
250 | */ | ||
251 | static inline irqreturn_t | ||
252 | serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs) | ||
253 | { | ||
254 | struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id; | ||
255 | unsigned int iir, lsr; | ||
256 | |||
257 | iir = serial_in(up, UART_IIR); | ||
258 | if (iir & UART_IIR_NO_INT) | ||
259 | return IRQ_NONE; | ||
260 | lsr = serial_in(up, UART_LSR); | ||
261 | if (lsr & UART_LSR_DR) | ||
262 | receive_chars(up, &lsr, regs); | ||
263 | check_modem_status(up); | ||
264 | if (lsr & UART_LSR_THRE) | ||
265 | transmit_chars(up); | ||
266 | return IRQ_HANDLED; | ||
267 | } | ||
268 | |||
269 | static unsigned int serial_pxa_tx_empty(struct uart_port *port) | ||
270 | { | ||
271 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
272 | unsigned long flags; | ||
273 | unsigned int ret; | ||
274 | |||
275 | spin_lock_irqsave(&up->port.lock, flags); | ||
276 | ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; | ||
277 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
278 | |||
279 | return ret; | ||
280 | } | ||
281 | |||
282 | static unsigned int serial_pxa_get_mctrl(struct uart_port *port) | ||
283 | { | ||
284 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
285 | unsigned long flags; | ||
286 | unsigned char status; | ||
287 | unsigned int ret; | ||
288 | |||
289 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
290 | spin_lock_irqsave(&up->port.lock, flags); | ||
291 | status = serial_in(up, UART_MSR); | ||
292 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
293 | |||
294 | ret = 0; | ||
295 | if (status & UART_MSR_DCD) | ||
296 | ret |= TIOCM_CAR; | ||
297 | if (status & UART_MSR_RI) | ||
298 | ret |= TIOCM_RNG; | ||
299 | if (status & UART_MSR_DSR) | ||
300 | ret |= TIOCM_DSR; | ||
301 | if (status & UART_MSR_CTS) | ||
302 | ret |= TIOCM_CTS; | ||
303 | return ret; | ||
304 | } | ||
305 | |||
306 | static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
307 | { | ||
308 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
309 | unsigned char mcr = 0; | ||
310 | |||
311 | if (mctrl & TIOCM_RTS) | ||
312 | mcr |= UART_MCR_RTS; | ||
313 | if (mctrl & TIOCM_DTR) | ||
314 | mcr |= UART_MCR_DTR; | ||
315 | if (mctrl & TIOCM_OUT1) | ||
316 | mcr |= UART_MCR_OUT1; | ||
317 | if (mctrl & TIOCM_OUT2) | ||
318 | mcr |= UART_MCR_OUT2; | ||
319 | if (mctrl & TIOCM_LOOP) | ||
320 | mcr |= UART_MCR_LOOP; | ||
321 | |||
322 | mcr |= up->mcr; | ||
323 | |||
324 | serial_out(up, UART_MCR, mcr); | ||
325 | } | ||
326 | |||
327 | static void serial_pxa_break_ctl(struct uart_port *port, int break_state) | ||
328 | { | ||
329 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
330 | unsigned long flags; | ||
331 | |||
332 | spin_lock_irqsave(&up->port.lock, flags); | ||
333 | if (break_state == -1) | ||
334 | up->lcr |= UART_LCR_SBC; | ||
335 | else | ||
336 | up->lcr &= ~UART_LCR_SBC; | ||
337 | serial_out(up, UART_LCR, up->lcr); | ||
338 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
339 | } | ||
340 | |||
341 | #if 0 | ||
342 | static void serial_pxa_dma_init(struct pxa_uart *up) | ||
343 | { | ||
344 | up->rxdma = | ||
345 | pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up); | ||
346 | if (up->rxdma < 0) | ||
347 | goto out; | ||
348 | up->txdma = | ||
349 | pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up); | ||
350 | if (up->txdma < 0) | ||
351 | goto err_txdma; | ||
352 | up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL); | ||
353 | if (!up->dmadesc) | ||
354 | goto err_alloc; | ||
355 | |||
356 | /* ... */ | ||
357 | err_alloc: | ||
358 | pxa_free_dma(up->txdma); | ||
359 | err_rxdma: | ||
360 | pxa_free_dma(up->rxdma); | ||
361 | out: | ||
362 | return; | ||
363 | } | ||
364 | #endif | ||
365 | |||
366 | static int serial_pxa_startup(struct uart_port *port) | ||
367 | { | ||
368 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
369 | unsigned long flags; | ||
370 | int retval; | ||
371 | |||
372 | up->mcr = 0; | ||
373 | |||
374 | /* | ||
375 | * Allocate the IRQ | ||
376 | */ | ||
377 | retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); | ||
378 | if (retval) | ||
379 | return retval; | ||
380 | |||
381 | /* | ||
382 | * Clear the FIFO buffers and disable them. | ||
383 | * (they will be reenabled in set_termios()) | ||
384 | */ | ||
385 | serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); | ||
386 | serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | | ||
387 | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); | ||
388 | serial_out(up, UART_FCR, 0); | ||
389 | |||
390 | /* | ||
391 | * Clear the interrupt registers. | ||
392 | */ | ||
393 | (void) serial_in(up, UART_LSR); | ||
394 | (void) serial_in(up, UART_RX); | ||
395 | (void) serial_in(up, UART_IIR); | ||
396 | (void) serial_in(up, UART_MSR); | ||
397 | |||
398 | /* | ||
399 | * Now, initialize the UART | ||
400 | */ | ||
401 | serial_out(up, UART_LCR, UART_LCR_WLEN8); | ||
402 | |||
403 | spin_lock_irqsave(&up->port.lock, flags); | ||
404 | up->port.mctrl |= TIOCM_OUT2; | ||
405 | serial_pxa_set_mctrl(&up->port, up->port.mctrl); | ||
406 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
407 | |||
408 | /* | ||
409 | * Finally, enable interrupts. Note: Modem status interrupts | ||
410 | * are set via set_termios(), which will be occuring imminently | ||
411 | * anyway, so we don't enable them here. | ||
412 | */ | ||
413 | up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; | ||
414 | serial_out(up, UART_IER, up->ier); | ||
415 | |||
416 | /* | ||
417 | * And clear the interrupt registers again for luck. | ||
418 | */ | ||
419 | (void) serial_in(up, UART_LSR); | ||
420 | (void) serial_in(up, UART_RX); | ||
421 | (void) serial_in(up, UART_IIR); | ||
422 | (void) serial_in(up, UART_MSR); | ||
423 | |||
424 | return 0; | ||
425 | } | ||
426 | |||
427 | static void serial_pxa_shutdown(struct uart_port *port) | ||
428 | { | ||
429 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
430 | unsigned long flags; | ||
431 | |||
432 | free_irq(up->port.irq, up); | ||
433 | |||
434 | /* | ||
435 | * Disable interrupts from this port | ||
436 | */ | ||
437 | up->ier = 0; | ||
438 | serial_out(up, UART_IER, 0); | ||
439 | |||
440 | spin_lock_irqsave(&up->port.lock, flags); | ||
441 | up->port.mctrl &= ~TIOCM_OUT2; | ||
442 | serial_pxa_set_mctrl(&up->port, up->port.mctrl); | ||
443 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
444 | |||
445 | /* | ||
446 | * Disable break condition and FIFOs | ||
447 | */ | ||
448 | serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); | ||
449 | serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | | ||
450 | UART_FCR_CLEAR_RCVR | | ||
451 | UART_FCR_CLEAR_XMIT); | ||
452 | serial_out(up, UART_FCR, 0); | ||
453 | } | ||
454 | |||
455 | static void | ||
456 | serial_pxa_set_termios(struct uart_port *port, struct termios *termios, | ||
457 | struct termios *old) | ||
458 | { | ||
459 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
460 | unsigned char cval, fcr = 0; | ||
461 | unsigned long flags; | ||
462 | unsigned int baud, quot; | ||
463 | |||
464 | switch (termios->c_cflag & CSIZE) { | ||
465 | case CS5: | ||
466 | cval = 0x00; | ||
467 | break; | ||
468 | case CS6: | ||
469 | cval = 0x01; | ||
470 | break; | ||
471 | case CS7: | ||
472 | cval = 0x02; | ||
473 | break; | ||
474 | default: | ||
475 | case CS8: | ||
476 | cval = 0x03; | ||
477 | break; | ||
478 | } | ||
479 | |||
480 | if (termios->c_cflag & CSTOPB) | ||
481 | cval |= 0x04; | ||
482 | if (termios->c_cflag & PARENB) | ||
483 | cval |= UART_LCR_PARITY; | ||
484 | if (!(termios->c_cflag & PARODD)) | ||
485 | cval |= UART_LCR_EPAR; | ||
486 | |||
487 | /* | ||
488 | * Ask the core to calculate the divisor for us. | ||
489 | */ | ||
490 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | ||
491 | quot = uart_get_divisor(port, baud); | ||
492 | |||
493 | if ((up->port.uartclk / quot) < (2400 * 16)) | ||
494 | fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; | ||
495 | else | ||
496 | fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; | ||
497 | |||
498 | /* | ||
499 | * Ok, we're now changing the port state. Do it with | ||
500 | * interrupts disabled. | ||
501 | */ | ||
502 | spin_lock_irqsave(&up->port.lock, flags); | ||
503 | |||
504 | /* | ||
505 | * Ensure the port will be enabled. | ||
506 | * This is required especially for serial console. | ||
507 | */ | ||
508 | up->ier |= IER_UUE; | ||
509 | |||
510 | /* | ||
511 | * Update the per-port timeout. | ||
512 | */ | ||
513 | uart_update_timeout(port, termios->c_cflag, quot); | ||
514 | |||
515 | up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | ||
516 | if (termios->c_iflag & INPCK) | ||
517 | up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; | ||
518 | if (termios->c_iflag & (BRKINT | PARMRK)) | ||
519 | up->port.read_status_mask |= UART_LSR_BI; | ||
520 | |||
521 | /* | ||
522 | * Characters to ignore | ||
523 | */ | ||
524 | up->port.ignore_status_mask = 0; | ||
525 | if (termios->c_iflag & IGNPAR) | ||
526 | up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; | ||
527 | if (termios->c_iflag & IGNBRK) { | ||
528 | up->port.ignore_status_mask |= UART_LSR_BI; | ||
529 | /* | ||
530 | * If we're ignoring parity and break indicators, | ||
531 | * ignore overruns too (for real raw support). | ||
532 | */ | ||
533 | if (termios->c_iflag & IGNPAR) | ||
534 | up->port.ignore_status_mask |= UART_LSR_OE; | ||
535 | } | ||
536 | |||
537 | /* | ||
538 | * ignore all characters if CREAD is not set | ||
539 | */ | ||
540 | if ((termios->c_cflag & CREAD) == 0) | ||
541 | up->port.ignore_status_mask |= UART_LSR_DR; | ||
542 | |||
543 | /* | ||
544 | * CTS flow control flag and modem status interrupts | ||
545 | */ | ||
546 | up->ier &= ~UART_IER_MSI; | ||
547 | if (UART_ENABLE_MS(&up->port, termios->c_cflag)) | ||
548 | up->ier |= UART_IER_MSI; | ||
549 | |||
550 | serial_out(up, UART_IER, up->ier); | ||
551 | |||
552 | serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ | ||
553 | serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ | ||
554 | serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ | ||
555 | serial_out(up, UART_LCR, cval); /* reset DLAB */ | ||
556 | up->lcr = cval; /* Save LCR */ | ||
557 | serial_pxa_set_mctrl(&up->port, up->port.mctrl); | ||
558 | serial_out(up, UART_FCR, fcr); | ||
559 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
560 | } | ||
561 | |||
562 | static void | ||
563 | serial_pxa_pm(struct uart_port *port, unsigned int state, | ||
564 | unsigned int oldstate) | ||
565 | { | ||
566 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
567 | pxa_set_cken(up->cken, !state); | ||
568 | if (!state) | ||
569 | udelay(1); | ||
570 | } | ||
571 | |||
572 | static void serial_pxa_release_port(struct uart_port *port) | ||
573 | { | ||
574 | } | ||
575 | |||
576 | static int serial_pxa_request_port(struct uart_port *port) | ||
577 | { | ||
578 | return 0; | ||
579 | } | ||
580 | |||
581 | static void serial_pxa_config_port(struct uart_port *port, int flags) | ||
582 | { | ||
583 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
584 | up->port.type = PORT_PXA; | ||
585 | } | ||
586 | |||
587 | static int | ||
588 | serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
589 | { | ||
590 | /* we don't want the core code to modify any port params */ | ||
591 | return -EINVAL; | ||
592 | } | ||
593 | |||
594 | static const char * | ||
595 | serial_pxa_type(struct uart_port *port) | ||
596 | { | ||
597 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | ||
598 | return up->name; | ||
599 | } | ||
600 | |||
601 | #ifdef CONFIG_SERIAL_PXA_CONSOLE | ||
602 | |||
603 | extern struct uart_pxa_port serial_pxa_ports[]; | ||
604 | extern struct uart_driver serial_pxa_reg; | ||
605 | |||
606 | #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) | ||
607 | |||
608 | /* | ||
609 | * Wait for transmitter & holding register to empty | ||
610 | */ | ||
611 | static inline void wait_for_xmitr(struct uart_pxa_port *up) | ||
612 | { | ||
613 | unsigned int status, tmout = 10000; | ||
614 | |||
615 | /* Wait up to 10ms for the character(s) to be sent. */ | ||
616 | do { | ||
617 | status = serial_in(up, UART_LSR); | ||
618 | |||
619 | if (status & UART_LSR_BI) | ||
620 | up->lsr_break_flag = UART_LSR_BI; | ||
621 | |||
622 | if (--tmout == 0) | ||
623 | break; | ||
624 | udelay(1); | ||
625 | } while ((status & BOTH_EMPTY) != BOTH_EMPTY); | ||
626 | |||
627 | /* Wait up to 1s for flow control if necessary */ | ||
628 | if (up->port.flags & UPF_CONS_FLOW) { | ||
629 | tmout = 1000000; | ||
630 | while (--tmout && | ||
631 | ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) | ||
632 | udelay(1); | ||
633 | } | ||
634 | } | ||
635 | |||
636 | /* | ||
637 | * Print a string to the serial port trying not to disturb | ||
638 | * any possible real use of the port... | ||
639 | * | ||
640 | * The console_lock must be held when we get here. | ||
641 | */ | ||
642 | static void | ||
643 | serial_pxa_console_write(struct console *co, const char *s, unsigned int count) | ||
644 | { | ||
645 | struct uart_pxa_port *up = &serial_pxa_ports[co->index]; | ||
646 | unsigned int ier; | ||
647 | int i; | ||
648 | |||
649 | /* | ||
650 | * First save the UER then disable the interrupts | ||
651 | */ | ||
652 | ier = serial_in(up, UART_IER); | ||
653 | serial_out(up, UART_IER, UART_IER_UUE); | ||
654 | |||
655 | /* | ||
656 | * Now, do each character | ||
657 | */ | ||
658 | for (i = 0; i < count; i++, s++) { | ||
659 | wait_for_xmitr(up); | ||
660 | |||
661 | /* | ||
662 | * Send the character out. | ||
663 | * If a LF, also do CR... | ||
664 | */ | ||
665 | serial_out(up, UART_TX, *s); | ||
666 | if (*s == 10) { | ||
667 | wait_for_xmitr(up); | ||
668 | serial_out(up, UART_TX, 13); | ||
669 | } | ||
670 | } | ||
671 | |||
672 | /* | ||
673 | * Finally, wait for transmitter to become empty | ||
674 | * and restore the IER | ||
675 | */ | ||
676 | wait_for_xmitr(up); | ||
677 | serial_out(up, UART_IER, ier); | ||
678 | } | ||
679 | |||
680 | static int __init | ||
681 | serial_pxa_console_setup(struct console *co, char *options) | ||
682 | { | ||
683 | struct uart_pxa_port *up; | ||
684 | int baud = 9600; | ||
685 | int bits = 8; | ||
686 | int parity = 'n'; | ||
687 | int flow = 'n'; | ||
688 | |||
689 | if (co->index == -1 || co->index >= serial_pxa_reg.nr) | ||
690 | co->index = 0; | ||
691 | up = &serial_pxa_ports[co->index]; | ||
692 | |||
693 | if (options) | ||
694 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
695 | |||
696 | return uart_set_options(&up->port, co, baud, parity, bits, flow); | ||
697 | } | ||
698 | |||
699 | static struct console serial_pxa_console = { | ||
700 | .name = "ttyS", | ||
701 | .write = serial_pxa_console_write, | ||
702 | .device = uart_console_device, | ||
703 | .setup = serial_pxa_console_setup, | ||
704 | .flags = CON_PRINTBUFFER, | ||
705 | .index = -1, | ||
706 | .data = &serial_pxa_reg, | ||
707 | }; | ||
708 | |||
709 | static int __init | ||
710 | serial_pxa_console_init(void) | ||
711 | { | ||
712 | register_console(&serial_pxa_console); | ||
713 | return 0; | ||
714 | } | ||
715 | |||
716 | console_initcall(serial_pxa_console_init); | ||
717 | |||
718 | #define PXA_CONSOLE &serial_pxa_console | ||
719 | #else | ||
720 | #define PXA_CONSOLE NULL | ||
721 | #endif | ||
722 | |||
723 | struct uart_ops serial_pxa_pops = { | ||
724 | .tx_empty = serial_pxa_tx_empty, | ||
725 | .set_mctrl = serial_pxa_set_mctrl, | ||
726 | .get_mctrl = serial_pxa_get_mctrl, | ||
727 | .stop_tx = serial_pxa_stop_tx, | ||
728 | .start_tx = serial_pxa_start_tx, | ||
729 | .stop_rx = serial_pxa_stop_rx, | ||
730 | .enable_ms = serial_pxa_enable_ms, | ||
731 | .break_ctl = serial_pxa_break_ctl, | ||
732 | .startup = serial_pxa_startup, | ||
733 | .shutdown = serial_pxa_shutdown, | ||
734 | .set_termios = serial_pxa_set_termios, | ||
735 | .pm = serial_pxa_pm, | ||
736 | .type = serial_pxa_type, | ||
737 | .release_port = serial_pxa_release_port, | ||
738 | .request_port = serial_pxa_request_port, | ||
739 | .config_port = serial_pxa_config_port, | ||
740 | .verify_port = serial_pxa_verify_port, | ||
741 | }; | ||
742 | |||
743 | static struct uart_pxa_port serial_pxa_ports[] = { | ||
744 | { /* FFUART */ | ||
745 | .name = "FFUART", | ||
746 | .cken = CKEN6_FFUART, | ||
747 | .port = { | ||
748 | .type = PORT_PXA, | ||
749 | .iotype = UPIO_MEM, | ||
750 | .membase = (void *)&FFUART, | ||
751 | .mapbase = __PREG(FFUART), | ||
752 | .irq = IRQ_FFUART, | ||
753 | .uartclk = 921600 * 16, | ||
754 | .fifosize = 64, | ||
755 | .ops = &serial_pxa_pops, | ||
756 | .line = 0, | ||
757 | }, | ||
758 | }, { /* BTUART */ | ||
759 | .name = "BTUART", | ||
760 | .cken = CKEN7_BTUART, | ||
761 | .port = { | ||
762 | .type = PORT_PXA, | ||
763 | .iotype = UPIO_MEM, | ||
764 | .membase = (void *)&BTUART, | ||
765 | .mapbase = __PREG(BTUART), | ||
766 | .irq = IRQ_BTUART, | ||
767 | .uartclk = 921600 * 16, | ||
768 | .fifosize = 64, | ||
769 | .ops = &serial_pxa_pops, | ||
770 | .line = 1, | ||
771 | }, | ||
772 | }, { /* STUART */ | ||
773 | .name = "STUART", | ||
774 | .cken = CKEN5_STUART, | ||
775 | .port = { | ||
776 | .type = PORT_PXA, | ||
777 | .iotype = UPIO_MEM, | ||
778 | .membase = (void *)&STUART, | ||
779 | .mapbase = __PREG(STUART), | ||
780 | .irq = IRQ_STUART, | ||
781 | .uartclk = 921600 * 16, | ||
782 | .fifosize = 64, | ||
783 | .ops = &serial_pxa_pops, | ||
784 | .line = 2, | ||
785 | }, | ||
786 | } | ||
787 | }; | ||
788 | |||
789 | static struct uart_driver serial_pxa_reg = { | ||
790 | .owner = THIS_MODULE, | ||
791 | .driver_name = "PXA serial", | ||
792 | .devfs_name = "tts/", | ||
793 | .dev_name = "ttyS", | ||
794 | .major = TTY_MAJOR, | ||
795 | .minor = 64, | ||
796 | .nr = ARRAY_SIZE(serial_pxa_ports), | ||
797 | .cons = PXA_CONSOLE, | ||
798 | }; | ||
799 | |||
800 | static int serial_pxa_suspend(struct device *_dev, u32 state, u32 level) | ||
801 | { | ||
802 | struct uart_pxa_port *sport = dev_get_drvdata(_dev); | ||
803 | |||
804 | if (sport && level == SUSPEND_DISABLE) | ||
805 | uart_suspend_port(&serial_pxa_reg, &sport->port); | ||
806 | |||
807 | return 0; | ||
808 | } | ||
809 | |||
810 | static int serial_pxa_resume(struct device *_dev, u32 level) | ||
811 | { | ||
812 | struct uart_pxa_port *sport = dev_get_drvdata(_dev); | ||
813 | |||
814 | if (sport && level == RESUME_ENABLE) | ||
815 | uart_resume_port(&serial_pxa_reg, &sport->port); | ||
816 | |||
817 | return 0; | ||
818 | } | ||
819 | |||
820 | static int serial_pxa_probe(struct device *_dev) | ||
821 | { | ||
822 | struct platform_device *dev = to_platform_device(_dev); | ||
823 | |||
824 | serial_pxa_ports[dev->id].port.dev = _dev; | ||
825 | uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port); | ||
826 | dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]); | ||
827 | return 0; | ||
828 | } | ||
829 | |||
830 | static int serial_pxa_remove(struct device *_dev) | ||
831 | { | ||
832 | struct uart_pxa_port *sport = dev_get_drvdata(_dev); | ||
833 | |||
834 | dev_set_drvdata(_dev, NULL); | ||
835 | |||
836 | if (sport) | ||
837 | uart_remove_one_port(&serial_pxa_reg, &sport->port); | ||
838 | |||
839 | return 0; | ||
840 | } | ||
841 | |||
842 | static struct device_driver serial_pxa_driver = { | ||
843 | .name = "pxa2xx-uart", | ||
844 | .bus = &platform_bus_type, | ||
845 | .probe = serial_pxa_probe, | ||
846 | .remove = serial_pxa_remove, | ||
847 | |||
848 | .suspend = serial_pxa_suspend, | ||
849 | .resume = serial_pxa_resume, | ||
850 | }; | ||
851 | |||
852 | int __init serial_pxa_init(void) | ||
853 | { | ||
854 | int ret; | ||
855 | |||
856 | ret = uart_register_driver(&serial_pxa_reg); | ||
857 | if (ret != 0) | ||
858 | return ret; | ||
859 | |||
860 | ret = driver_register(&serial_pxa_driver); | ||
861 | if (ret != 0) | ||
862 | uart_unregister_driver(&serial_pxa_reg); | ||
863 | |||
864 | return ret; | ||
865 | } | ||
866 | |||
867 | void __exit serial_pxa_exit(void) | ||
868 | { | ||
869 | driver_unregister(&serial_pxa_driver); | ||
870 | uart_unregister_driver(&serial_pxa_reg); | ||
871 | } | ||
872 | |||
873 | module_init(serial_pxa_init); | ||
874 | module_exit(serial_pxa_exit); | ||
875 | |||
876 | MODULE_LICENSE("GPL"); | ||
877 | |||