tree-wide: fix comment/printk typos

"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>

5 files changed, 9 insertions, 9 deletions

diff --git a/arch/powerpc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h
index 4b0e1520600..6b6dc20b0be 100644
--- a/arch/powerpc/include/asm/8xx_immap.h
+++ b/arch/powerpc/include/asm/8xx_immap.h
@@ -93,7 +93,7 @@ typedef struct	mem_ctlr {
 } memctl8xx_t;
 
 /*-----------------------------------------------------------------------
- * BR - Memory Controler: Base Register                                 16-9
+ * BR - Memory Controller: Base Register                                        16-9
  */
 #define BR_BA_MSK       0xffff8000      /* Base Address Mask                    */
 #define BR_AT_MSK       0x00007000      /* Address Type Mask                    */
@@ -110,7 +110,7 @@ typedef struct	mem_ctlr {
 #define BR_V            0x00000001      /* Bank Valid                           */
 
 /*-----------------------------------------------------------------------
- * OR - Memory Controler: Option Register                               16-11
+ * OR - Memory Controller: Option Register                              16-11
  */
 #define OR_AM_MSK       0xffff8000      /* Address Mask Mask                    */
 #define OR_ATM_MSK      0x00007000      /* Address Type Mask Mask               */
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index 7fd90d02d8c..c4d2b716756 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -1469,7 +1469,7 @@ static int cell_global_start(struct op_counter_config *ctr)
  * The pm_interval register is setup to write the SPU PC value into the
  * trace buffer at the maximum rate possible.  The trace buffer is configured
  * to store the PCs, wrapping when it is full.  The performance counter is
- * intialized to the max hardware count minus the number of events, N, between
+ * initialized to the max hardware count minus the number of events, N, between
  * samples.  Once the N events have occured, a HW counter overflow occurs
  * causing the generation of a HW counter interrupt which also stops the
  * writing of the SPU PC values to the trace buffer.  Hence the last PC
diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/powerpc/platforms/83xx/suspend-asm.S
index 1930543c98d..3d1ecd21177 100644
--- a/arch/powerpc/platforms/83xx/suspend-asm.S
+++ b/arch/powerpc/platforms/83xx/suspend-asm.S
@@ -231,7 +231,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
         ori     r4, r4, 0x002a
         mtspr   SPRN_DBAT0L, r4
         lis     r8, TMP_VIRT_IMMR@h
-        ori     r4, r8, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r8, 0x001e  /* 1 MByte accessible from Kernel Space only */
         mtspr   SPRN_DBAT0U, r4
         isync
 
@@ -241,7 +241,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
         ori     r4, r4, 0x002a
         mtspr   SPRN_DBAT1L, r4
         lis     r9, (TMP_VIRT_IMMR + 0x01000000)@h
-        ori     r4, r9, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r9, 0x001e  /* 1 MByte accessible from Kernel Space only */
         mtspr   SPRN_DBAT1U, r4
         isync
 
@@ -253,7 +253,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
         li      r4, 0x0002
         mtspr   SPRN_DBAT2L, r4
         lis     r4, KERNELBASE@h
-        ori     r4, r4, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r4, 0x001e  /* 1 MByte accessible from Kernel Space only */
         mtspr   SPRN_DBAT2U, r4
         isync
 
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index b341018326d..6c4b5837fc8 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -566,10 +566,10 @@ static int ps3_setup_dynamic_device(const struct ps3_repository_device *repo)
         case PS3_DEV_TYPE_STOR_DISK:
                 result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK);
 
-                /* Some devices are not accessable from the Other OS lpar. */
+                /* Some devices are not accessible from the Other OS lpar. */
                 if (result == -ENODEV) {
                         result = 0;
-                        pr_debug("%s:%u: not accessable\n", __func__,
+                        pr_debug("%s:%u: not accessible\n", __func__,
                                  __LINE__);
                 }
 
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 59d9712d736..92290ff4761 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -44,7 +44,7 @@
  * @lock:
  * @ipi_debug_brk_mask:
  *
- * The HV mantains per SMT thread mappings of HV outlet to HV plug on
+ * The HV maintains per SMT thread mappings of HV outlet to HV plug on
  * behalf of the guest.  These mappings are implemented as 256 bit guest
  * supplied bitmaps indexed by plug number.  The addresses of the bitmaps
  * are registered with the HV through lv1_configure_irq_state_bitmap().