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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/arm/mach-s3c2410/s3c2410.c
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2410.c')
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diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
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1/* linux/arch/arm/mach-s3c2410/s3c2410.c
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 16-May-2003 BJD Created initial version
14 * 16-Aug-2003 BJD Fixed header files and copyright, added URL
15 * 05-Sep-2003 BJD Moved to kernel v2.6
16 * 18-Jan-2004 BJD Added serial port configuration
17 * 21-Aug-2004 BJD Added new struct s3c2410_board handler
18 * 28-Sep-2004 BJD Updates for new serial port bits
19 * 04-Nov-2004 BJD Updated UART configuration process
20 * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
21*/
22
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/interrupt.h>
26#include <linux/list.h>
27#include <linux/timer.h>
28#include <linux/init.h>
29#include <linux/device.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
35#include <asm/hardware.h>
36#include <asm/io.h>
37#include <asm/irq.h>
38
39#include <asm/arch/regs-clock.h>
40#include <asm/arch/regs-serial.h>
41
42#include "s3c2410.h"
43#include "cpu.h"
44#include "clock.h"
45
46/* Initial IO mappings */
47
48static struct map_desc s3c2410_iodesc[] __initdata = {
49 IODESC_ENT(USBHOST),
50 IODESC_ENT(CLKPWR),
51 IODESC_ENT(LCD),
52 IODESC_ENT(UART),
53 IODESC_ENT(TIMER),
54 IODESC_ENT(ADC),
55 IODESC_ENT(WATCHDOG)
56};
57
58static struct resource s3c_uart0_resource[] = {
59 [0] = {
60 .start = S3C2410_PA_UART0,
61 .end = S3C2410_PA_UART0 + 0x3fff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_S3CUART_RX0,
66 .end = IRQ_S3CUART_ERR0,
67 .flags = IORESOURCE_IRQ,
68 }
69
70};
71
72static struct resource s3c_uart1_resource[] = {
73 [0] = {
74 .start = S3C2410_PA_UART1,
75 .end = S3C2410_PA_UART1 + 0x3fff,
76 .flags = IORESOURCE_MEM,
77 },
78 [1] = {
79 .start = IRQ_S3CUART_RX1,
80 .end = IRQ_S3CUART_ERR1,
81 .flags = IORESOURCE_IRQ,
82 }
83};
84
85static struct resource s3c_uart2_resource[] = {
86 [0] = {
87 .start = S3C2410_PA_UART2,
88 .end = S3C2410_PA_UART2 + 0x3fff,
89 .flags = IORESOURCE_MEM,
90 },
91 [1] = {
92 .start = IRQ_S3CUART_RX2,
93 .end = IRQ_S3CUART_ERR2,
94 .flags = IORESOURCE_IRQ,
95 }
96};
97
98/* our uart devices */
99
100static struct platform_device s3c_uart0 = {
101 .name = "s3c2410-uart",
102 .id = 0,
103 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
104 .resource = s3c_uart0_resource,
105};
106
107
108static struct platform_device s3c_uart1 = {
109 .name = "s3c2410-uart",
110 .id = 1,
111 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
112 .resource = s3c_uart1_resource,
113};
114
115static struct platform_device s3c_uart2 = {
116 .name = "s3c2410-uart",
117 .id = 2,
118 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
119 .resource = s3c_uart2_resource,
120};
121
122static struct platform_device *uart_devices[] __initdata = {
123 &s3c_uart0,
124 &s3c_uart1,
125 &s3c_uart2
126};
127
128/* store our uart devices for the serial driver console */
129struct platform_device *s3c2410_uart_devices[3];
130
131static int s3c2410_uart_count = 0;
132
133/* uart registration process */
134
135void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
136{
137 struct platform_device *platdev;
138 int uart;
139
140 for (uart = 0; uart < no; uart++, cfg++) {
141 platdev = uart_devices[cfg->hwport];
142
143 s3c24xx_uart_devs[uart] = platdev;
144 platdev->dev.platform_data = cfg;
145 }
146
147 s3c2410_uart_count = uart;
148}
149
150/* s3c2410_map_io
151 *
152 * register the standard cpu IO areas, and any passed in from the
153 * machine specific initialisation.
154*/
155
156void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
157{
158 /* register our io-tables */
159
160 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
161 iotable_init(mach_desc, mach_size);
162}
163
164void __init s3c2410_init_clocks(int xtal)
165{
166 unsigned long tmp;
167 unsigned long fclk;
168 unsigned long hclk;
169 unsigned long pclk;
170
171 /* now we've got our machine bits initialised, work out what
172 * clocks we've got */
173
174 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
175
176 tmp = __raw_readl(S3C2410_CLKDIVN);
177
178 /* work out clock scalings */
179
180 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
181 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
182
183 /* print brieft summary of clocks, etc */
184
185 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
186 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
187
188 /* initialise the clocks here, to allow other things like the
189 * console to use them
190 */
191
192 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
193}
194
195int __init s3c2410_init(void)
196{
197 printk("S3C2410: Initialising architecture\n");
198
199 return platform_add_devices(s3c24xx_uart_devs, s3c2410_uart_count);
200}