From 05ab3014636ff60a319d37cdf37dca594b015eec Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 9 May 2005 23:21:59 +0100 Subject: [PATCH] Serial: Add uart_insert_char() Add uart_insert_char(), which handles inserting characters into the flip buffer. This helper function handles the correct semantics for handling overrun in addition to inserting normal characters. Signed-off-by: Russell King --- include/linux/serial_core.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index c3fb5984f250..d6025af7efac 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -479,6 +479,25 @@ uart_handle_cts_change(struct uart_port *port, unsigned int status) } } +#include + +static inline void +uart_insert_char(struct uart_port *port, unsigned int status, + unsigned int overrun, unsigned int ch, unsigned int flag) +{ + struct tty_struct *tty = port->info->tty; + + if ((status & port->ignore_status_mask & ~overrun) == 0) + tty_insert_flip_char(tty, ch, flag); + + /* + * Overrun is special. Since it's reported immediately, + * it doesn't affect the current character. + */ + if (status & ~port->ignore_status_mask & overrun) + tty_insert_flip_char(tty, 0, TTY_OVERRUN); +} + /* * UART_ENABLE_MS - determine if port should enable modem status irqs */ -- cgit v1.2.2 From c4e1f6f6bf82af89994a0ee760fc5e036c4d3c1f Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 10 May 2005 10:40:19 +0100 Subject: [PATCH] ARM: Add top_pmd, which points at the top-most page table Signed-off-by: Russell King --- include/asm-arm/page.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 4ca3a8e9348f..d26d1574d972 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -171,6 +171,9 @@ typedef unsigned long pgprot_t; #endif /* STRICT_MM_TYPECHECKS */ +/* the upper-most page table pointer */ +extern pmd_t *top_pmd; + /* Pure 2^n version of get_order */ static inline int get_order(unsigned long size) { -- cgit v1.2.2 From d2bab05ac1f9a2f5ddcd2f3256237e5c47fc127f Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 10 May 2005 14:23:01 +0100 Subject: [PATCH] ARM: Move copy/clear user_page locking into implementation Move the locking for copy_user_page() and clear_user_page() into the implementations which require locking. For simple memcpy/ memset based implementations, the locking is extra overhead which is not necessary, and prevents preemption occuring. Signed-off-by: Russell King --- include/asm-arm/page.h | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index d26d1574d972..019c45d75730 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -114,19 +114,8 @@ extern void __cpu_copy_user_page(void *to, const void *from, unsigned long user); #endif -#define clear_user_page(addr,vaddr,pg) \ - do { \ - preempt_disable(); \ - __cpu_clear_user_page(addr, vaddr); \ - preempt_enable(); \ - } while (0) - -#define copy_user_page(to,from,vaddr,pg) \ - do { \ - preempt_disable(); \ - __cpu_copy_user_page(to, from, vaddr); \ - preempt_enable(); \ - } while (0) +#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr) +#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr) #define clear_page(page) memzero((void *)(page), PAGE_SIZE) extern void copy_page(void *to, const void *from); -- cgit v1.2.2 From d7def6c22dfa9f32b3d9e5546a7a6a90c644ff5f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 10 May 2005 19:01:35 +0100 Subject: [PATCH] ARM: 2666/1: i.MX pwm controller defines Patch from Sascha Hauer This patch adds the defines for the i.MX PWM controller Signed-off-by: Steven Scholz Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- include/asm-arm/arch-imx/imx-regs.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index f32c203952cf..93b840e8fa60 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -227,6 +227,30 @@ #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) #define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) +/* + * PWM controller + */ +#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */ +#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */ +#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */ +#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */ + +#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */ +#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */ +#define PWMC_SWR (0x01<<16) /* Software Reset */ +#define PWMC_CLKSRC (0x01<<15) /* Clock Source */ +#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */ +#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */ +#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */ +#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */ +#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */ +#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ +#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */ + +#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ +#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ +#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ + /* * DMA Controller */ -- cgit v1.2.2 From 9dabf9da18018b99a51334c2ef168019389ed5bf Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 12 May 2005 19:27:13 +0100 Subject: [PATCH] ARM: 2676/1: S3C2440 - NAND register additions Patch from Ben Dooks Add the register definitions for the s3c2440 NAND controller to the s3c2410 NAND register definitions Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-nand.h | 44 +++++++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h index c443ac834698..7cff235e667a 100644 --- a/include/asm-arm/arch-s3c2410/regs-nand.h +++ b/include/asm-arm/arch-s3c2410/regs-nand.h @@ -1,16 +1,17 @@ /* linux/include/asm-arm/arch-s3c2410/regs-nand.h * - * Copyright (c) 2004 Simtec Electronics + * Copyright (c) 2004,2005 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * S3C2410 clock register definitions + * S3C2410 NAND register definitions * * Changelog: * 18-Aug-2004 BJD Copied file from 2.4 and updated + * 01-May-2005 BJD Added definitions for s3c2440 controller */ #ifndef __ASM_ARM_REGS_NAND @@ -26,6 +27,22 @@ #define S3C2410_NFSTAT S3C2410_NFREG(0x10) #define S3C2410_NFECC S3C2410_NFREG(0x14) +#define S3C2440_NFCONT S3C2410_NFREG(0x04) +#define S3C2440_NFCMD S3C2410_NFREG(0x08) +#define S3C2440_NFADDR S3C2410_NFREG(0x0C) +#define S3C2440_NFDATA S3C2410_NFREG(0x10) +#define S3C2440_NFECCD0 S3C2410_NFREG(0x14) +#define S3C2440_NFECCD1 S3C2410_NFREG(0x18) +#define S3C2440_NFECCD S3C2410_NFREG(0x1C) +#define S3C2440_NFSTAT S3C2410_NFREG(0x20) +#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24) +#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) +#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) +#define S3C2440_NFMECC1 S3C2410_NFREG(0x30) +#define S3C2440_NFSECC S3C2410_NFREG(0x34) +#define S3C2440_NFSBLK S3C2410_NFREG(0x38) +#define S3C2440_NFEBLK S3C2410_NFREG(0x3C) + #define S3C2410_NFCONF_EN (1<<15) #define S3C2410_NFCONF_512BYTE (1<<14) #define S3C2410_NFCONF_4STEP (1<<13) @@ -37,7 +54,28 @@ #define S3C2410_NFSTAT_BUSY (1<<0) -/* think ECC can only be 8bit read? */ +#define S3C2440_NFCONF_BUSWIDTH_8 (0<<0) +#define S3C2440_NFCONF_BUSWIDTH_16 (1<<0) +#define S3C2440_NFCONF_ADVFLASH (1<<3) +#define S3C2440_NFCONF_TACLS(x) ((x)<<12) +#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8) +#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4) + +#define S3C2440_NFCONT_LOCKTIGHT (1<<13) +#define S3C2440_NFCONT_SOFTLOCK (1<<12) +#define S3C2440_NFCONT_ILLEGALACC_EN (1<<10) +#define S3C2440_NFCONT_RNBINT_EN (1<<9) +#define S3C2440_NFCONT_RN_FALLING (1<<8) +#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6) +#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5) +#define S3C2440_NFCONT_INITECC (1<<4) +#define S3C2440_NFCONT_nFCE (1<<1) +#define S3C2440_NFCONT_ENABLE (1<<0) + +#define S3C2440_NFSTAT_READY (1<<0) +#define S3C2440_NFSTAT_nCE (1<<1) +#define S3C2440_NFSTAT_RnB_CHANGE (1<<2) +#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) #endif /* __ASM_ARM_REGS_NAND */ -- cgit v1.2.2