From 17b8c8c00b5d7c0d087db3c847aff16a91c714b1 Mon Sep 17 00:00:00 2001 From: Wanlong Gao Date: Sun, 10 Apr 2011 16:10:27 +0200 Subject: net:removed the unused variable removed the unused variable "np" of eth_v10.c. Signed-off-by: Wanlong Gao Signed-off-by: Jesper Nilsson --- drivers/net/cris/eth_v10.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c index ec03b401620a..9c755db6b16d 100644 --- a/drivers/net/cris/eth_v10.c +++ b/drivers/net/cris/eth_v10.c @@ -1131,7 +1131,6 @@ static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id) { struct net_device *dev = (struct net_device *)dev_id; - struct net_local *np = netdev_priv(dev); unsigned long irqbits; /* -- cgit v1.2.2 From 569ca5b3f94cd0b3295ec5943aa457cf4a4f6a3a Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Thu, 5 Apr 2012 16:10:07 +0100 Subject: xen/gnttab: add deferred freeing logic Rather than just leaking pages that can't be freed at the point where access permission for the backend domain gets revoked, put them on a list and run a timer to (infrequently) retry freeing them. (This can particularly happen when unloading a frontend driver when devices are still present, and the backend still has them in non-closed state or hasn't finished closing them yet.) Signed-off-by: Jan Beulich Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/grant-table.c | 106 +++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 96 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c index b4d4eac761db..9f514bb561af 100644 --- a/drivers/xen/grant-table.c +++ b/drivers/xen/grant-table.c @@ -426,10 +426,8 @@ static int gnttab_end_foreign_access_ref_v1(grant_ref_t ref, int readonly) nflags = *pflags; do { flags = nflags; - if (flags & (GTF_reading|GTF_writing)) { - printk(KERN_ALERT "WARNING: g.e. still in use!\n"); + if (flags & (GTF_reading|GTF_writing)) return 0; - } } while ((nflags = sync_cmpxchg(pflags, flags, 0)) != flags); return 1; @@ -458,12 +456,103 @@ static int gnttab_end_foreign_access_ref_v2(grant_ref_t ref, int readonly) return 1; } -int gnttab_end_foreign_access_ref(grant_ref_t ref, int readonly) +static inline int _gnttab_end_foreign_access_ref(grant_ref_t ref, int readonly) { return gnttab_interface->end_foreign_access_ref(ref, readonly); } + +int gnttab_end_foreign_access_ref(grant_ref_t ref, int readonly) +{ + if (_gnttab_end_foreign_access_ref(ref, readonly)) + return 1; + pr_warn("WARNING: g.e. %#x still in use!\n", ref); + return 0; +} EXPORT_SYMBOL_GPL(gnttab_end_foreign_access_ref); +struct deferred_entry { + struct list_head list; + grant_ref_t ref; + bool ro; + uint16_t warn_delay; + struct page *page; +}; +static LIST_HEAD(deferred_list); +static void gnttab_handle_deferred(unsigned long); +static DEFINE_TIMER(deferred_timer, gnttab_handle_deferred, 0, 0); + +static void gnttab_handle_deferred(unsigned long unused) +{ + unsigned int nr = 10; + struct deferred_entry *first = NULL; + unsigned long flags; + + spin_lock_irqsave(&gnttab_list_lock, flags); + while (nr--) { + struct deferred_entry *entry + = list_first_entry(&deferred_list, + struct deferred_entry, list); + + if (entry == first) + break; + list_del(&entry->list); + spin_unlock_irqrestore(&gnttab_list_lock, flags); + if (_gnttab_end_foreign_access_ref(entry->ref, entry->ro)) { + put_free_entry(entry->ref); + if (entry->page) { + pr_debug("freeing g.e. %#x (pfn %#lx)\n", + entry->ref, page_to_pfn(entry->page)); + __free_page(entry->page); + } else + pr_info("freeing g.e. %#x\n", entry->ref); + kfree(entry); + entry = NULL; + } else { + if (!--entry->warn_delay) + pr_info("g.e. %#x still pending\n", + entry->ref); + if (!first) + first = entry; + } + spin_lock_irqsave(&gnttab_list_lock, flags); + if (entry) + list_add_tail(&entry->list, &deferred_list); + else if (list_empty(&deferred_list)) + break; + } + if (!list_empty(&deferred_list) && !timer_pending(&deferred_timer)) { + deferred_timer.expires = jiffies + HZ; + add_timer(&deferred_timer); + } + spin_unlock_irqrestore(&gnttab_list_lock, flags); +} + +static void gnttab_add_deferred(grant_ref_t ref, bool readonly, + struct page *page) +{ + struct deferred_entry *entry = kmalloc(sizeof(*entry), GFP_ATOMIC); + const char *what = KERN_WARNING "leaking"; + + if (entry) { + unsigned long flags; + + entry->ref = ref; + entry->ro = readonly; + entry->page = page; + entry->warn_delay = 60; + spin_lock_irqsave(&gnttab_list_lock, flags); + list_add_tail(&entry->list, &deferred_list); + if (!timer_pending(&deferred_timer)) { + deferred_timer.expires = jiffies + HZ; + add_timer(&deferred_timer); + } + spin_unlock_irqrestore(&gnttab_list_lock, flags); + what = KERN_DEBUG "deferring"; + } + printk("%s g.e. %#x (pfn %#lx)\n", + what, ref, page ? page_to_pfn(page) : -1); +} + void gnttab_end_foreign_access(grant_ref_t ref, int readonly, unsigned long page) { @@ -471,12 +560,9 @@ void gnttab_end_foreign_access(grant_ref_t ref, int readonly, put_free_entry(ref); if (page != 0) free_page(page); - } else { - /* XXX This needs to be fixed so that the ref and page are - placed on a list to be freed up later. */ - printk(KERN_WARNING - "WARNING: leaking g.e. and page still in use!\n"); - } + } else + gnttab_add_deferred(ref, readonly, + page ? virt_to_page(page) : NULL); } EXPORT_SYMBOL_GPL(gnttab_end_foreign_access); -- cgit v1.2.2 From 2b3c83efc9a653af6a24799eeb1a2900ba0439e6 Mon Sep 17 00:00:00 2001 From: Rafal Prylowski Date: Thu, 19 Apr 2012 11:19:00 +0200 Subject: dmaengine/ep93xx_dma: Implement double buffering for M2M DMA channels Add double buffering support for M2M DMA channels. Implement this by using EP93xx M2M DMA Buffer and Control Finite State Machines to be sure that we are not disabling the channel when it's actually operating. Signed-off-by: Rafal Prylowski Tested-by: H Hartley Sweeten Acked-by: H Hartley Sweeten Acked-by: Mika Westerberg Signed-off-by: Ryan Mallon --- drivers/dma/ep93xx_dma.c | 117 +++++++++++++++++++++++++++++++++++++---------- 1 file changed, 93 insertions(+), 24 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c index e6f133b78dc2..bbfbb0622d35 100644 --- a/drivers/dma/ep93xx_dma.c +++ b/drivers/dma/ep93xx_dma.c @@ -71,6 +71,7 @@ #define M2M_CONTROL_TM_SHIFT 13 #define M2M_CONTROL_TM_TX (1 << M2M_CONTROL_TM_SHIFT) #define M2M_CONTROL_TM_RX (2 << M2M_CONTROL_TM_SHIFT) +#define M2M_CONTROL_NFBINT BIT(21) #define M2M_CONTROL_RSS_SHIFT 22 #define M2M_CONTROL_RSS_SSPRX (1 << M2M_CONTROL_RSS_SHIFT) #define M2M_CONTROL_RSS_SSPTX (2 << M2M_CONTROL_RSS_SHIFT) @@ -79,7 +80,22 @@ #define M2M_CONTROL_PWSC_SHIFT 25 #define M2M_INTERRUPT 0x0004 -#define M2M_INTERRUPT_DONEINT BIT(1) +#define M2M_INTERRUPT_MASK 6 + +#define M2M_STATUS 0x000c +#define M2M_STATUS_CTL_SHIFT 1 +#define M2M_STATUS_CTL_IDLE (0 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_CTL_STALL (1 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_CTL_MEMRD (2 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_CTL_MEMWR (3 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_CTL_BWCWAIT (4 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_CTL_MASK (7 << M2M_STATUS_CTL_SHIFT) +#define M2M_STATUS_BUF_SHIFT 4 +#define M2M_STATUS_BUF_NO (0 << M2M_STATUS_BUF_SHIFT) +#define M2M_STATUS_BUF_ON (1 << M2M_STATUS_BUF_SHIFT) +#define M2M_STATUS_BUF_NEXT (2 << M2M_STATUS_BUF_SHIFT) +#define M2M_STATUS_BUF_MASK (3 << M2M_STATUS_BUF_SHIFT) +#define M2M_STATUS_DONE BIT(6) #define M2M_BCR0 0x0010 #define M2M_BCR1 0x0014 @@ -426,15 +442,6 @@ static int m2p_hw_interrupt(struct ep93xx_dma_chan *edmac) /* * M2M DMA implementation - * - * For the M2M transfers we don't use NFB at all. This is because it simply - * doesn't work well with memcpy transfers. When you submit both buffers it is - * extremely unlikely that you get an NFB interrupt, but it instead reports - * DONE interrupt and both buffers are already transferred which means that we - * weren't able to update the next buffer. - * - * So for now we "simulate" NFB by just submitting buffer after buffer - * without double buffering. */ static int m2m_hw_setup(struct ep93xx_dma_chan *edmac) @@ -543,6 +550,11 @@ static void m2m_hw_submit(struct ep93xx_dma_chan *edmac) m2m_fill_desc(edmac); control |= M2M_CONTROL_DONEINT; + if (ep93xx_dma_advance_active(edmac)) { + m2m_fill_desc(edmac); + control |= M2M_CONTROL_NFBINT; + } + /* * Now we can finally enable the channel. For M2M channel this must be * done _after_ the BCRx registers are programmed. @@ -560,32 +572,89 @@ static void m2m_hw_submit(struct ep93xx_dma_chan *edmac) } } +/* + * According to EP93xx User's Guide, we should receive DONE interrupt when all + * M2M DMA controller transactions complete normally. This is not always the + * case - sometimes EP93xx M2M DMA asserts DONE interrupt when the DMA channel + * is still running (channel Buffer FSM in DMA_BUF_ON state, and channel + * Control FSM in DMA_MEM_RD state, observed at least in IDE-DMA operation). + * In effect, disabling the channel when only DONE bit is set could stop + * currently running DMA transfer. To avoid this, we use Buffer FSM and + * Control FSM to check current state of DMA channel. + */ static int m2m_hw_interrupt(struct ep93xx_dma_chan *edmac) { + u32 status = readl(edmac->regs + M2M_STATUS); + u32 ctl_fsm = status & M2M_STATUS_CTL_MASK; + u32 buf_fsm = status & M2M_STATUS_BUF_MASK; + bool done = status & M2M_STATUS_DONE; + bool last_done; u32 control; + struct ep93xx_dma_desc *desc; - if (!(readl(edmac->regs + M2M_INTERRUPT) & M2M_INTERRUPT_DONEINT)) + /* Accept only DONE and NFB interrupts */ + if (!(readl(edmac->regs + M2M_INTERRUPT) & M2M_INTERRUPT_MASK)) return INTERRUPT_UNKNOWN; - /* Clear the DONE bit */ - writel(0, edmac->regs + M2M_INTERRUPT); + if (done) { + /* Clear the DONE bit */ + writel(0, edmac->regs + M2M_INTERRUPT); + } - /* Disable interrupts and the channel */ - control = readl(edmac->regs + M2M_CONTROL); - control &= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_ENABLE); - writel(control, edmac->regs + M2M_CONTROL); + /* + * Check whether we are done with descriptors or not. This, together + * with DMA channel state, determines action to take in interrupt. + */ + desc = ep93xx_dma_get_active(edmac); + last_done = !desc || desc->txd.cookie; /* - * Since we only get DONE interrupt we have to find out ourselves - * whether there still is something to process. So we try to advance - * the chain an see whether it succeeds. + * Use M2M DMA Buffer FSM and Control FSM to check current state of + * DMA channel. Using DONE and NFB bits from channel status register + * or bits from channel interrupt register is not reliable. */ - if (ep93xx_dma_advance_active(edmac)) { - edmac->edma->hw_submit(edmac); - return INTERRUPT_NEXT_BUFFER; + if (!last_done && + (buf_fsm == M2M_STATUS_BUF_NO || + buf_fsm == M2M_STATUS_BUF_ON)) { + /* + * Two buffers are ready for update when Buffer FSM is in + * DMA_NO_BUF state. Only one buffer can be prepared without + * disabling the channel or polling the DONE bit. + * To simplify things, always prepare only one buffer. + */ + if (ep93xx_dma_advance_active(edmac)) { + m2m_fill_desc(edmac); + if (done && !edmac->chan.private) { + /* Software trigger for memcpy channel */ + control = readl(edmac->regs + M2M_CONTROL); + control |= M2M_CONTROL_START; + writel(control, edmac->regs + M2M_CONTROL); + } + return INTERRUPT_NEXT_BUFFER; + } else { + last_done = true; + } + } + + /* + * Disable the channel only when Buffer FSM is in DMA_NO_BUF state + * and Control FSM is in DMA_STALL state. + */ + if (last_done && + buf_fsm == M2M_STATUS_BUF_NO && + ctl_fsm == M2M_STATUS_CTL_STALL) { + /* Disable interrupts and the channel */ + control = readl(edmac->regs + M2M_CONTROL); + control &= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_NFBINT + | M2M_CONTROL_ENABLE); + writel(control, edmac->regs + M2M_CONTROL); + return INTERRUPT_DONE; } - return INTERRUPT_DONE; + /* + * Nothing to do this time. + */ + return INTERRUPT_NEXT_BUFFER; } /* -- cgit v1.2.2 From 6b866c151ad9ea44799b32c3a8c90a03c5b981da Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 31 Aug 2011 20:37:50 +0200 Subject: i2c: mxs: use global reset function The former mach specific reset_block function has been converted to a global one. Use the new one to remove mach dependency from the driver. Signed-off-by: Wolfram Sang --- drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-mxs.c | 9 ++------- 2 files changed, 3 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index d2c5095deeac..ccfd37db3dfc 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -483,6 +483,7 @@ config I2C_MV64XXX config I2C_MXS tristate "Freescale i.MX28 I2C interface" depends on SOC_IMX28 + select STMP_DEVICE help Say Y here if you want to use the I2C bus controller on the Freescale i.MX28 processors. diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 3d471d56bf15..083480241945 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c @@ -26,8 +26,7 @@ #include #include #include - -#include +#include #define DRIVER_NAME "mxs-i2c" @@ -111,13 +110,9 @@ struct mxs_i2c_dev { struct i2c_adapter adapter; }; -/* - * TODO: check if calls to here are really needed. If not, we could get rid of - * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably. - */ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) { - mxs_reset_block(i2c->regs); + stmp_reset_block(i2c->regs); writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, i2c->regs + MXS_I2C_QUEUECTRL_SET); -- cgit v1.2.2 From dba3c29ea4a1d5d544f59b94fd8a41662135e071 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 9 Apr 2012 12:08:32 +0530 Subject: mmc: omap_hsmmc: Enable Auto CMD12 Enable Auto-CMD12 for multi block read/write on HSMMC. Tested on OMAP4430, OMAP3430 and OMAP2430 SDP Signed-off-by: Balaji T K Signed-off-by: Venkatraman S Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 56d4499d4388..dfa6f87b6cc2 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -85,6 +85,7 @@ #define BRR_ENABLE (1 << 5) #define DTO_ENABLE (1 << 20) #define INIT_STREAM (1 << 1) +#define ACEN_ACMD12 (1 << 2) #define DP_SELECT (1 << 21) #define DDIR (1 << 4) #define DMA_EN 0x1 @@ -115,6 +116,7 @@ #define OMAP_MMC_MAX_CLOCK 52000000 #define DRIVER_NAME "omap_hsmmc" +#define AUTO_CMD12 (1 << 0) /* Auto CMD12 support */ /* * One controller can have multiple slots, like on some omap boards using * omap.c controller driver. Luckily this is not currently done on any known @@ -175,6 +177,7 @@ struct omap_hsmmc_host { int reqs_blocked; int use_reg; int req_in_progress; + unsigned int flags; struct omap_hsmmc_next next_data; struct omap_mmc_platform_data *pdata; @@ -766,6 +769,8 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, cmdtype = 0x3; cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); + if ((host->flags & AUTO_CMD12) && mmc_op_multi(cmd->opcode)) + cmdreg |= ACEN_ACMD12; if (data) { cmdreg |= DP_SELECT | MSBS | BCE; @@ -837,11 +842,14 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) else data->bytes_xfered = 0; - if (!data->stop) { + if (data->stop && ((!(host->flags & AUTO_CMD12)) || data->error)) { + omap_hsmmc_start_command(host, data->stop, NULL); + } else { + if (data->stop) + data->stop->resp[0] = OMAP_HSMMC_READ(host->base, + RSP76); omap_hsmmc_request_done(host, data->mrq); - return; } - omap_hsmmc_start_command(host, data->stop, NULL); } /* @@ -1844,6 +1852,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev) host->mapbase = res->start + pdata->reg_offset; host->base = ioremap(host->mapbase, SZ_4K); host->power_mode = MMC_POWER_OFF; + host->flags = AUTO_CMD12; host->next_data.cookie = 1; platform_set_drvdata(pdev, host); -- cgit v1.2.2 From 03b5d924b926dd994b16f30f7a13bfb71ee0f478 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 9 Apr 2012 12:08:33 +0530 Subject: mmc: omap_hsmmc: add DDR support Add Dual data rate support for omap_hsmmc. Signed-off-by: Balaji T K Signed-off-by: Venkatraman S Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index dfa6f87b6cc2..dc41b9e4299e 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -92,6 +92,7 @@ #define MSBS (1 << 5) #define BCE (1 << 1) #define FOUR_BIT (1 << 1) +#define DDR (1 << 19) #define DW8 (1 << 5) #define CC 0x1 #define TC 0x02 @@ -523,6 +524,10 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) u32 con; con = OMAP_HSMMC_READ(host->base, CON); + if (ios->timing == MMC_TIMING_UHS_DDR50) + con |= DDR; /* configure in DDR mode */ + else + con &= ~DDR; switch (ios->bus_width) { case MMC_BUS_WIDTH_8: OMAP_HSMMC_WRITE(host->base, CON, con | DW8); -- cgit v1.2.2 From 31463b141587001781d86b2ef360544f101bd998 Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Mon, 9 Apr 2012 12:08:34 +0530 Subject: mmc: omap_hsmmc: use spinlock IRQ safe variant Prevent possible races between HSMMC/DMA IRQs and next requests. Signed-off-by: Venkatraman S Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index dc41b9e4299e..a5bca725e414 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -806,11 +806,12 @@ omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) { int dma_ch; + unsigned long flags; - spin_lock(&host->irq_lock); + spin_lock_irqsave(&host->irq_lock, flags); host->req_in_progress = 0; dma_ch = host->dma_ch; - spin_unlock(&host->irq_lock); + spin_unlock_irqrestore(&host->irq_lock, flags); omap_hsmmc_disable_irq(host); /* Do not complete the request if DMA is still in progress */ @@ -887,13 +888,14 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) { int dma_ch; + unsigned long flags; host->data->error = errno; - spin_lock(&host->irq_lock); + spin_lock_irqsave(&host->irq_lock, flags); dma_ch = host->dma_ch; host->dma_ch = -1; - spin_unlock(&host->irq_lock); + spin_unlock_irqrestore(&host->irq_lock, flags); if (host->use_dma && dma_ch != -1) { dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, @@ -1247,6 +1249,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) struct omap_hsmmc_host *host = cb_data; struct mmc_data *data; int dma_ch, req_in_progress; + unsigned long flags; if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", @@ -1254,9 +1257,9 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) return; } - spin_lock(&host->irq_lock); + spin_lock_irqsave(&host->irq_lock, flags); if (host->dma_ch < 0) { - spin_unlock(&host->irq_lock); + spin_unlock_irqrestore(&host->irq_lock, flags); return; } @@ -1266,7 +1269,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) /* Fire up the next transfer. */ omap_hsmmc_config_dma_params(host, data, data->sg + host->dma_sg_idx); - spin_unlock(&host->irq_lock); + spin_unlock_irqrestore(&host->irq_lock, flags); return; } @@ -1277,7 +1280,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) req_in_progress = host->req_in_progress; dma_ch = host->dma_ch; host->dma_ch = -1; - spin_unlock(&host->irq_lock); + spin_unlock_irqrestore(&host->irq_lock, flags); omap_free_dma(dma_ch); -- cgit v1.2.2 From cd03d9a85802c0023e522c21a1dabaf3e5785010 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Mon, 9 Apr 2012 12:08:35 +0530 Subject: mmc: omap_hsmmc: Cleanup use of cpu_is_* for debounce_clock There really does not seem to be a need to use cpu_is_* check for getting the debounce clock as clkdev is perfectly capable of handling situations when certain clocks are only available on select platforms. Also get rid of the 'got_dbclk' flag and instead use the dbclk clock pointer to know if a valid debounce clock exists for the platform. Signed-off-by: Rajendra Nayak Signed-off-by: Venkatraman S Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 39 +++++++++++++++++---------------------- 1 file changed, 17 insertions(+), 22 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index a5bca725e414..4254b6f310aa 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -170,7 +170,6 @@ struct omap_hsmmc_host { int use_dma, dma_ch; int dma_line_tx, dma_line_rx; int slot_id; - int got_dbclk; int response_busy; int context_loss; int vdd; @@ -1097,7 +1096,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) /* Disable the clocks */ pm_runtime_put_sync(host->dev); - if (host->got_dbclk) + if (host->dbclk) clk_disable(host->dbclk); /* Turn the power off */ @@ -1108,7 +1107,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); pm_runtime_get_sync(host->dev); - if (host->got_dbclk) + if (host->dbclk) clk_enable(host->dbclk); if (ret != 0) @@ -1902,21 +1901,17 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev) omap_hsmmc_context_save(host); - if (cpu_is_omap2430()) { - host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); - /* - * MMC can still work without debounce clock. - */ - if (IS_ERR(host->dbclk)) - dev_warn(mmc_dev(host->mmc), - "Failed to get debounce clock\n"); - else - host->got_dbclk = 1; - - if (host->got_dbclk) - if (clk_enable(host->dbclk) != 0) - dev_dbg(mmc_dev(host->mmc), "Enabling debounce" - " clk failed\n"); + host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); + /* + * MMC can still work without debounce clock. + */ + if (IS_ERR(host->dbclk)) { + dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n"); + host->dbclk = NULL; + } else if (clk_enable(host->dbclk) != 0) { + dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); + clk_put(host->dbclk); + host->dbclk = NULL; } /* Since we do only SG emulation, we can have as many segs @@ -2036,7 +2031,7 @@ err_irq: pm_runtime_put_sync(host->dev); pm_runtime_disable(host->dev); clk_put(host->fclk); - if (host->got_dbclk) { + if (host->dbclk) { clk_disable(host->dbclk); clk_put(host->dbclk); } @@ -2069,7 +2064,7 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev) pm_runtime_put_sync(host->dev); pm_runtime_disable(host->dev); clk_put(host->fclk); - if (host->got_dbclk) { + if (host->dbclk) { clk_disable(host->dbclk); clk_put(host->dbclk); } @@ -2127,7 +2122,7 @@ static int omap_hsmmc_suspend(struct device *dev) OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); } - if (host->got_dbclk) + if (host->dbclk) clk_disable(host->dbclk); err: pm_runtime_put_sync(host->dev); @@ -2148,7 +2143,7 @@ static int omap_hsmmc_resume(struct device *dev) pm_runtime_get_sync(host->dev); - if (host->got_dbclk) + if (host->dbclk) clk_enable(host->dbclk); if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) -- cgit v1.2.2 From 7f8bea7f75618165d015f083c77f1db3e4584f88 Mon Sep 17 00:00:00 2001 From: Jan Luebbe Date: Thu, 5 Apr 2012 10:05:08 +0200 Subject: mmc: davinci_mmc: set MODULE_ALIAS to allow autoloading Davinci MMC platform devices (as in mach-davinci/devices-da8xx.c) use "davinci_mmc" as their name. To allow autoloading of the relevant driver, the module needs to set the MODULE_ALIAS. Signed-off-by: Jan Luebbe Signed-off-by: Chris Ball --- drivers/mmc/host/davinci_mmc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index c1f3673ae1ef..7cf6c624bf73 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -1533,4 +1533,5 @@ module_exit(davinci_mmcsd_exit); MODULE_AUTHOR("Texas Instruments India"); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller"); +MODULE_ALIAS("platform:davinci_mmc"); -- cgit v1.2.2 From 021459773d9b93e8d7388086db7b17107bdfc51d Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 10 Apr 2012 11:36:03 +0100 Subject: mmc: sdhci: Log what timeout was set if the timeout is too large Rather than just logging that we came up with an excessively large timeout say what the timeout was, this may provide some clues as to what the issue is. Signed-off-by: Mark Brown Signed-off-by: Chris Ball --- drivers/mmc/host/sdhci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ccefdebeff14..e626732aff77 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -680,8 +680,8 @@ static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) } if (count >= 0xF) { - pr_warning("%s: Too large timeout requested for CMD%d!\n", - mmc_hostname(host->mmc), cmd->opcode); + pr_warning("%s: Too large timeout 0x%x requested for CMD%d!\n", + mmc_hostname(host->mmc), count, cmd->opcode); count = 0xE; } -- cgit v1.2.2 From 6187fee46f4bc7f18f2caefdc75a073c6a25adab Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 11 Apr 2012 22:24:49 +0200 Subject: mmc: remove imxmmc driver This driver is broken since 2.6.31 when the traditional i.MX1 support was removed. In theory the i.MX1 mmc controller can be supported by the mxcmmc driver which basically is the same hardware. However, the i.MX1 controller has severe bugs which made several workarounds necessary which resulted in a different driver structure. At that time it seemed easier to write a second driver to support hardware without bugs. As noone cared for the i.MX1 driver for a long time and it does not compile, remove it. Signed-off-by: Sascha Hauer Signed-off-by: Chris Ball --- drivers/mmc/host/Kconfig | 10 - drivers/mmc/host/Makefile | 1 - drivers/mmc/host/imxmmc.c | 1169 --------------------------------------------- drivers/mmc/host/imxmmc.h | 64 --- 4 files changed, 1244 deletions(-) delete mode 100644 drivers/mmc/host/imxmmc.c delete mode 100644 drivers/mmc/host/imxmmc.h (limited to 'drivers') diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 2bc06e7344db..9f1f5e2bbfef 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -307,16 +307,6 @@ config MMC_ATMELMCI_DMA If unsure, say N. -config MMC_IMX - tristate "Motorola i.MX Multimedia Card Interface support" - depends on ARCH_MX1 - help - This selects the Motorola i.MX Multimedia card Interface. - If you have a i.MX platform with a Multimedia Card slot, - say Y or M here. - - If unsure, say N. - config MMC_MSM tristate "Qualcomm SDCC Controller Support" depends on MMC && ARCH_MSM diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 3e7e26d08073..8922b06be925 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -4,7 +4,6 @@ obj-$(CONFIG_MMC_ARMMMCI) += mmci.o obj-$(CONFIG_MMC_PXA) += pxamci.o -obj-$(CONFIG_MMC_IMX) += imxmmc.o obj-$(CONFIG_MMC_MXC) += mxcmmc.o obj-$(CONFIG_MMC_MXS) += mxs-mmc.o obj-$(CONFIG_MMC_SDHCI) += sdhci.o diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c deleted file mode 100644 index ea0f3cedef21..000000000000 --- a/drivers/mmc/host/imxmmc.c +++ /dev/null @@ -1,1169 +0,0 @@ -/* - * linux/drivers/mmc/host/imxmmc.c - Motorola i.MX MMCI driver - * - * Copyright (C) 2004 Sascha Hauer, Pengutronix - * Copyright (C) 2006 Pavel Pisa, PiKRON - * - * derived from pxamci.c by Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "imxmmc.h" - -#define DRIVER_NAME "imx-mmc" - -#define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \ - INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \ - INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO) - -struct imxmci_host { - struct mmc_host *mmc; - spinlock_t lock; - struct resource *res; - void __iomem *base; - int irq; - imx_dmach_t dma; - volatile unsigned int imask; - unsigned int power_mode; - unsigned int present; - struct imxmmc_platform_data *pdata; - - struct mmc_request *req; - struct mmc_command *cmd; - struct mmc_data *data; - - struct timer_list timer; - struct tasklet_struct tasklet; - unsigned int status_reg; - unsigned long pending_events; - /* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */ - u16 *data_ptr; - unsigned int data_cnt; - atomic_t stuck_timeout; - - unsigned int dma_nents; - unsigned int dma_size; - unsigned int dma_dir; - int dma_allocated; - - unsigned char actual_bus_width; - - int prev_cmd_code; - - struct clk *clk; -}; - -#define IMXMCI_PEND_IRQ_b 0 -#define IMXMCI_PEND_DMA_END_b 1 -#define IMXMCI_PEND_DMA_ERR_b 2 -#define IMXMCI_PEND_WAIT_RESP_b 3 -#define IMXMCI_PEND_DMA_DATA_b 4 -#define IMXMCI_PEND_CPU_DATA_b 5 -#define IMXMCI_PEND_CARD_XCHG_b 6 -#define IMXMCI_PEND_SET_INIT_b 7 -#define IMXMCI_PEND_STARTED_b 8 - -#define IMXMCI_PEND_IRQ_m (1 << IMXMCI_PEND_IRQ_b) -#define IMXMCI_PEND_DMA_END_m (1 << IMXMCI_PEND_DMA_END_b) -#define IMXMCI_PEND_DMA_ERR_m (1 << IMXMCI_PEND_DMA_ERR_b) -#define IMXMCI_PEND_WAIT_RESP_m (1 << IMXMCI_PEND_WAIT_RESP_b) -#define IMXMCI_PEND_DMA_DATA_m (1 << IMXMCI_PEND_DMA_DATA_b) -#define IMXMCI_PEND_CPU_DATA_m (1 << IMXMCI_PEND_CPU_DATA_b) -#define IMXMCI_PEND_CARD_XCHG_m (1 << IMXMCI_PEND_CARD_XCHG_b) -#define IMXMCI_PEND_SET_INIT_m (1 << IMXMCI_PEND_SET_INIT_b) -#define IMXMCI_PEND_STARTED_m (1 << IMXMCI_PEND_STARTED_b) - -static void imxmci_stop_clock(struct imxmci_host *host) -{ - int i = 0; - u16 reg; - - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg & ~STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); - while (i < 0x1000) { - if (!(i & 0x7f)) { - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg | STR_STP_CLK_STOP_CLK, - host->base + MMC_REG_STR_STP_CLK); - } - - reg = readw(host->base + MMC_REG_STATUS); - if (!(reg & STATUS_CARD_BUS_CLK_RUN)) { - /* Check twice before cut */ - reg = readw(host->base + MMC_REG_STATUS); - if (!(reg & STATUS_CARD_BUS_CLK_RUN)) - return; - } - - i++; - } - dev_dbg(mmc_dev(host->mmc), "imxmci_stop_clock blocked, no luck\n"); -} - -static int imxmci_start_clock(struct imxmci_host *host) -{ - unsigned int trials = 0; - unsigned int delay_limit = 128; - unsigned long flags; - u16 reg; - - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg & ~STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); - - clear_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); - - /* - * Command start of the clock, this usually succeeds in less - * then 6 delay loops, but during card detection (low clockrate) - * it takes up to 5000 delay loops and sometimes fails for the first time - */ - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg | STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); - - do { - unsigned int delay = delay_limit; - - while (delay--) { - reg = readw(host->base + MMC_REG_STATUS); - if (reg & STATUS_CARD_BUS_CLK_RUN) { - /* Check twice before cut */ - reg = readw(host->base + MMC_REG_STATUS); - if (reg & STATUS_CARD_BUS_CLK_RUN) - return 0; - } - - if (test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) - return 0; - } - - local_irq_save(flags); - /* - * Ensure, that request is not doubled under all possible circumstances. - * It is possible, that cock running state is missed, because some other - * IRQ or schedule delays this function execution and the clocks has - * been already stopped by other means (response processing, SDHC HW) - */ - if (!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) { - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg | STR_STP_CLK_START_CLK, - host->base + MMC_REG_STR_STP_CLK); - } - local_irq_restore(flags); - - } while (++trials < 256); - - dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n"); - - return -1; -} - -static void imxmci_softreset(struct imxmci_host *host) -{ - int i; - - /* reset sequence */ - writew(0x08, host->base + MMC_REG_STR_STP_CLK); - writew(0x0D, host->base + MMC_REG_STR_STP_CLK); - - for (i = 0; i < 8; i++) - writew(0x05, host->base + MMC_REG_STR_STP_CLK); - - writew(0xff, host->base + MMC_REG_RES_TO); - writew(512, host->base + MMC_REG_BLK_LEN); - writew(1, host->base + MMC_REG_NOB); -} - -static int imxmci_busy_wait_for_status(struct imxmci_host *host, - unsigned int *pstat, unsigned int stat_mask, - int timeout, const char *where) -{ - int loops = 0; - - while (!(*pstat & stat_mask)) { - loops += 2; - if (loops >= timeout) { - dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n", - where, *pstat, stat_mask); - return -1; - } - udelay(2); - *pstat |= readw(host->base + MMC_REG_STATUS); - } - if (!loops) - return 0; - - /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */ - if (!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock >= 8000000)) - dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n", - loops, where, *pstat, stat_mask); - return loops; -} - -static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) -{ - unsigned int nob = data->blocks; - unsigned int blksz = data->blksz; - unsigned int datasz = nob * blksz; - int i; - - if (data->flags & MMC_DATA_STREAM) - nob = 0xffff; - - host->data = data; - data->bytes_xfered = 0; - - writew(nob, host->base + MMC_REG_NOB); - writew(blksz, host->base + MMC_REG_BLK_LEN); - - /* - * DMA cannot be used for small block sizes, we have to use CPU driven transfers otherwise. - * We are in big troubles for non-512 byte transfers according to note in the paragraph - * 20.6.7 of User Manual anyway, but we need to be able to transfer SCR at least. - * The situation is even more complex in reality. The SDHC in not able to handle wll - * partial FIFO fills and reads. The length has to be rounded up to burst size multiple. - * This is required for SCR read at least. - */ - if (datasz < 512) { - host->dma_size = datasz; - if (data->flags & MMC_DATA_READ) { - host->dma_dir = DMA_FROM_DEVICE; - - /* Hack to enable read SCR */ - writew(1, host->base + MMC_REG_NOB); - writew(512, host->base + MMC_REG_BLK_LEN); - } else { - host->dma_dir = DMA_TO_DEVICE; - } - - /* Convert back to virtual address */ - host->data_ptr = (u16 *)sg_virt(data->sg); - host->data_cnt = 0; - - clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); - set_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); - - return; - } - - if (data->flags & MMC_DATA_READ) { - host->dma_dir = DMA_FROM_DEVICE; - host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, - data->sg_len, host->dma_dir); - - imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, - host->res->start + MMC_REG_BUFFER_ACCESS, - DMA_MODE_READ); - - /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/ - CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN; - } else { - host->dma_dir = DMA_TO_DEVICE; - - host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, - data->sg_len, host->dma_dir); - - imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, - host->res->start + MMC_REG_BUFFER_ACCESS, - DMA_MODE_WRITE); - - /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/ - CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN; - } - -#if 1 /* This code is there only for consistency checking and can be disabled in future */ - host->dma_size = 0; - for (i = 0; i < host->dma_nents; i++) - host->dma_size += data->sg[i].length; - - if (datasz > host->dma_size) { - dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n", - datasz, host->dma_size); - } -#endif - - host->dma_size = datasz; - - wmb(); - - set_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); - clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); - - /* start DMA engine for read, write is delayed after initial response */ - if (host->dma_dir == DMA_FROM_DEVICE) - imx_dma_enable(host->dma); -} - -static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat) -{ - unsigned long flags; - u32 imask; - - WARN_ON(host->cmd != NULL); - host->cmd = cmd; - - /* Ensure, that clock are stopped else command programming and start fails */ - imxmci_stop_clock(host); - - if (cmd->flags & MMC_RSP_BUSY) - cmdat |= CMD_DAT_CONT_BUSY; - - switch (mmc_resp_type(cmd)) { - case MMC_RSP_R1: /* short CRC, OPCODE */ - case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ - cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R1; - break; - case MMC_RSP_R2: /* long 136 bit + CRC */ - cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R2; - break; - case MMC_RSP_R3: /* short */ - cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R3; - break; - default: - break; - } - - if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events)) - cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */ - - if (host->actual_bus_width == MMC_BUS_WIDTH_4) - cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; - - writew(cmd->opcode, host->base + MMC_REG_CMD); - writew(cmd->arg >> 16, host->base + MMC_REG_ARGH); - writew(cmd->arg & 0xffff, host->base + MMC_REG_ARGL); - writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); - - atomic_set(&host->stuck_timeout, 0); - set_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events); - - - imask = IMXMCI_INT_MASK_DEFAULT; - imask &= ~INT_MASK_END_CMD_RES; - if (cmdat & CMD_DAT_CONT_DATA_ENABLE) { - /* imask &= ~INT_MASK_BUF_READY; */ - imask &= ~INT_MASK_DATA_TRAN; - if (cmdat & CMD_DAT_CONT_WRITE) - imask &= ~INT_MASK_WRITE_OP_DONE; - if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) - imask &= ~INT_MASK_BUF_READY; - } - - spin_lock_irqsave(&host->lock, flags); - host->imask = imask; - writew(host->imask, host->base + MMC_REG_INT_MASK); - spin_unlock_irqrestore(&host->lock, flags); - - dev_dbg(mmc_dev(host->mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n", - cmd->opcode, cmd->opcode, imask); - - imxmci_start_clock(host); -} - -static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *req) -{ - unsigned long flags; - - spin_lock_irqsave(&host->lock, flags); - - host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m | - IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m); - - host->imask = IMXMCI_INT_MASK_DEFAULT; - writew(host->imask, host->base + MMC_REG_INT_MASK); - - spin_unlock_irqrestore(&host->lock, flags); - - if (req && req->cmd) - host->prev_cmd_code = req->cmd->opcode; - - host->req = NULL; - host->cmd = NULL; - host->data = NULL; - mmc_request_done(host->mmc, req); -} - -static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat) -{ - struct mmc_data *data = host->data; - int data_error; - - if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { - imx_dma_disable(host->dma); - dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents, - host->dma_dir); - } - - if (stat & STATUS_ERR_MASK) { - dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", stat); - if (stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) - data->error = -EILSEQ; - else if (stat & STATUS_TIME_OUT_READ) - data->error = -ETIMEDOUT; - else - data->error = -EIO; - } else { - data->bytes_xfered = host->dma_size; - } - - data_error = data->error; - - host->data = NULL; - - return data_error; -} - -static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat) -{ - struct mmc_command *cmd = host->cmd; - int i; - u32 a, b, c; - struct mmc_data *data = host->data; - - if (!cmd) - return 0; - - host->cmd = NULL; - - if (stat & STATUS_TIME_OUT_RESP) { - dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); - cmd->error = -ETIMEDOUT; - } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { - dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); - cmd->error = -EILSEQ; - } - - if (cmd->flags & MMC_RSP_PRESENT) { - if (cmd->flags & MMC_RSP_136) { - for (i = 0; i < 4; i++) { - a = readw(host->base + MMC_REG_RES_FIFO); - b = readw(host->base + MMC_REG_RES_FIFO); - cmd->resp[i] = a << 16 | b; - } - } else { - a = readw(host->base + MMC_REG_RES_FIFO); - b = readw(host->base + MMC_REG_RES_FIFO); - c = readw(host->base + MMC_REG_RES_FIFO); - cmd->resp[0] = a << 24 | b << 8 | c >> 8; - } - } - - dev_dbg(mmc_dev(host->mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n", - cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], cmd->error); - - if (data && !cmd->error && !(stat & STATUS_ERR_MASK)) { - if (host->req->data->flags & MMC_DATA_WRITE) { - - /* Wait for FIFO to be empty before starting DMA write */ - - stat = readw(host->base + MMC_REG_STATUS); - if (imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FE, - 40, "imxmci_cmd_done DMA WR") < 0) { - cmd->error = -EIO; - imxmci_finish_data(host, stat); - if (host->req) - imxmci_finish_request(host, host->req); - dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n", - stat); - return 0; - } - - if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) - imx_dma_enable(host->dma); - } - } else { - struct mmc_request *req; - imxmci_stop_clock(host); - req = host->req; - - if (data) - imxmci_finish_data(host, stat); - - if (req) - imxmci_finish_request(host, req); - else - dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n"); - } - - return 1; -} - -static int imxmci_data_done(struct imxmci_host *host, unsigned int stat) -{ - struct mmc_data *data = host->data; - int data_error; - - if (!data) - return 0; - - data_error = imxmci_finish_data(host, stat); - - if (host->req->stop) { - imxmci_stop_clock(host); - imxmci_start_cmd(host, host->req->stop, 0); - } else { - struct mmc_request *req; - req = host->req; - if (req) - imxmci_finish_request(host, req); - else - dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n"); - } - - return 1; -} - -static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) -{ - int i; - int burst_len; - int trans_done = 0; - unsigned int stat = *pstat; - - if (host->actual_bus_width != MMC_BUS_WIDTH_4) - burst_len = 16; - else - burst_len = 64; - - /* This is unfortunately required */ - dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n", - stat); - - udelay(20); /* required for clocks < 8MHz*/ - - if (host->dma_dir == DMA_FROM_DEVICE) { - imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | - STATUS_TIME_OUT_READ, - 50, "imxmci_cpu_driven_data read"); - - while ((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && - !(stat & STATUS_TIME_OUT_READ) && - (host->data_cnt < 512)) { - - udelay(20); /* required for clocks < 8MHz*/ - - for (i = burst_len; i >= 2 ; i -= 2) { - u16 data; - data = readw(host->base + MMC_REG_BUFFER_ACCESS); - udelay(10); /* required for clocks < 8MHz*/ - if (host->data_cnt+2 <= host->dma_size) { - *(host->data_ptr++) = data; - } else { - if (host->data_cnt < host->dma_size) - *(u8 *)(host->data_ptr) = data; - } - host->data_cnt += 2; - } - - stat = readw(host->base + MMC_REG_STATUS); - - dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n", - host->data_cnt, burst_len, stat); - } - - if ((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512)) - trans_done = 1; - - if (host->dma_size & 0x1ff) - stat &= ~STATUS_CRC_READ_ERR; - - if (stat & STATUS_TIME_OUT_READ) { - dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n", - stat); - trans_done = -1; - } - - } else { - imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FE, - 20, "imxmci_cpu_driven_data write"); - - while ((stat & STATUS_APPL_BUFF_FE) && - (host->data_cnt < host->dma_size)) { - if (burst_len >= host->dma_size - host->data_cnt) { - burst_len = host->dma_size - host->data_cnt; - host->data_cnt = host->dma_size; - trans_done = 1; - } else { - host->data_cnt += burst_len; - } - - for (i = burst_len; i > 0 ; i -= 2) - writew(*(host->data_ptr++), host->base + MMC_REG_BUFFER_ACCESS); - - stat = readw(host->base + MMC_REG_STATUS); - - dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n", - burst_len, stat); - } - } - - *pstat = stat; - - return trans_done; -} - -static void imxmci_dma_irq(int dma, void *devid) -{ - struct imxmci_host *host = devid; - u32 stat = readw(host->base + MMC_REG_STATUS); - - atomic_set(&host->stuck_timeout, 0); - host->status_reg = stat; - set_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); - tasklet_schedule(&host->tasklet); -} - -static irqreturn_t imxmci_irq(int irq, void *devid) -{ - struct imxmci_host *host = devid; - u32 stat = readw(host->base + MMC_REG_STATUS); - int handled = 1; - - writew(host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT, - host->base + MMC_REG_INT_MASK); - - atomic_set(&host->stuck_timeout, 0); - host->status_reg = stat; - set_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); - set_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); - tasklet_schedule(&host->tasklet); - - return IRQ_RETVAL(handled); -} - -static void imxmci_tasklet_fnc(unsigned long data) -{ - struct imxmci_host *host = (struct imxmci_host *)data; - u32 stat; - unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */ - int timeout = 0; - - if (atomic_read(&host->stuck_timeout) > 4) { - char *what; - timeout = 1; - stat = readw(host->base + MMC_REG_STATUS); - host->status_reg = stat; - if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) - if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) - what = "RESP+DMA"; - else - what = "RESP"; - else - if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) - if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events)) - what = "DATA"; - else - what = "DMA"; - else - what = "???"; - - dev_err(mmc_dev(host->mmc), - "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n", - what, stat, - readw(host->base + MMC_REG_INT_MASK)); - dev_err(mmc_dev(host->mmc), - "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n", - readw(host->base + MMC_REG_CMD_DAT_CONT), - readw(host->base + MMC_REG_BLK_LEN), - readw(host->base + MMC_REG_NOB), - CCR(host->dma)); - dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n", - host->cmd ? host->cmd->opcode : 0, - host->prev_cmd_code, - 1 << host->actual_bus_width, host->dma_size); - } - - if (!host->present || timeout) - host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ | - STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR; - - if (test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) { - clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); - - stat = readw(host->base + MMC_REG_STATUS); - /* - * This is not required in theory, but there is chance to miss some flag - * which clears automatically by mask write, FreeScale original code keeps - * stat from IRQ time so do I - */ - stat |= host->status_reg; - - if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) - stat &= ~STATUS_CRC_READ_ERR; - - if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { - imxmci_busy_wait_for_status(host, &stat, - STATUS_END_CMD_RESP | STATUS_ERR_MASK, - 20, "imxmci_tasklet_fnc resp (ERRATUM #4)"); - } - - if (stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) { - if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) - imxmci_cmd_done(host, stat); - if (host->data && (stat & STATUS_ERR_MASK)) - imxmci_data_done(host, stat); - } - - if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) { - stat |= readw(host->base + MMC_REG_STATUS); - if (imxmci_cpu_driven_data(host, &stat)) { - if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) - imxmci_cmd_done(host, stat); - atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m, - &host->pending_events); - imxmci_data_done(host, stat); - } - } - } - - if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) && - !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { - - stat = readw(host->base + MMC_REG_STATUS); - /* Same as above */ - stat |= host->status_reg; - - if (host->dma_dir == DMA_TO_DEVICE) - data_dir_mask = STATUS_WRITE_OP_DONE; - else - data_dir_mask = STATUS_DATA_TRANS_DONE; - - if (stat & data_dir_mask) { - clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); - imxmci_data_done(host, stat); - } - } - - if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) { - - if (host->cmd) - imxmci_cmd_done(host, STATUS_TIME_OUT_RESP); - - if (host->data) - imxmci_data_done(host, STATUS_TIME_OUT_READ | - STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR); - - if (host->req) - imxmci_finish_request(host, host->req); - - mmc_detect_change(host->mmc, msecs_to_jiffies(100)); - - } -} - -static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req) -{ - struct imxmci_host *host = mmc_priv(mmc); - unsigned int cmdat; - - WARN_ON(host->req != NULL); - - host->req = req; - - cmdat = 0; - - if (req->data) { - imxmci_setup_data(host, req->data); - - cmdat |= CMD_DAT_CONT_DATA_ENABLE; - - if (req->data->flags & MMC_DATA_WRITE) - cmdat |= CMD_DAT_CONT_WRITE; - - if (req->data->flags & MMC_DATA_STREAM) - cmdat |= CMD_DAT_CONT_STREAM_BLOCK; - } - - imxmci_start_cmd(host, req->cmd, cmdat); -} - -#define CLK_RATE 19200000 - -static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -{ - struct imxmci_host *host = mmc_priv(mmc); - int prescaler; - - if (ios->bus_width == MMC_BUS_WIDTH_4) { - host->actual_bus_width = MMC_BUS_WIDTH_4; - imx_gpio_mode(PB11_PF_SD_DAT3); - BLR(host->dma) = 0; /* burst 64 byte read/write */ - } else { - host->actual_bus_width = MMC_BUS_WIDTH_1; - imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); - BLR(host->dma) = 16; /* burst 16 byte read/write */ - } - - if (host->power_mode != ios->power_mode) { - switch (ios->power_mode) { - case MMC_POWER_OFF: - break; - case MMC_POWER_UP: - set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); - break; - case MMC_POWER_ON: - break; - } - host->power_mode = ios->power_mode; - } - - if (ios->clock) { - unsigned int clk; - u16 reg; - - /* The prescaler is 5 for PERCLK2 equal to 96MHz - * then 96MHz / 5 = 19.2 MHz - */ - clk = clk_get_rate(host->clk); - prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE; - switch (prescaler) { - case 0: - case 1: prescaler = 0; - break; - case 2: prescaler = 1; - break; - case 3: prescaler = 2; - break; - case 4: prescaler = 4; - break; - default: - case 5: prescaler = 5; - break; - } - - dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n", - clk, prescaler); - - for (clk = 0; clk < 8; clk++) { - int x; - x = CLK_RATE / (1 << clk); - if (x <= ios->clock) - break; - } - - /* enable controller */ - reg = readw(host->base + MMC_REG_STR_STP_CLK); - writew(reg | STR_STP_CLK_ENABLE, - host->base + MMC_REG_STR_STP_CLK); - - imxmci_stop_clock(host); - writew((prescaler << 3) | clk, host->base + MMC_REG_CLK_RATE); - /* - * Under my understanding, clock should not be started there, because it would - * initiate SDHC sequencer and send last or random command into card - */ - /* imxmci_start_clock(host); */ - - dev_dbg(mmc_dev(host->mmc), - "MMC_CLK_RATE: 0x%08x\n", - readw(host->base + MMC_REG_CLK_RATE)); - } else { - imxmci_stop_clock(host); - } -} - -static int imxmci_get_ro(struct mmc_host *mmc) -{ - struct imxmci_host *host = mmc_priv(mmc); - - if (host->pdata && host->pdata->get_ro) - return !!host->pdata->get_ro(mmc_dev(mmc)); - /* - * Board doesn't support read only detection; let the mmc core - * decide what to do. - */ - return -ENOSYS; -} - - -static const struct mmc_host_ops imxmci_ops = { - .request = imxmci_request, - .set_ios = imxmci_set_ios, - .get_ro = imxmci_get_ro, -}; - -static void imxmci_check_status(unsigned long data) -{ - struct imxmci_host *host = (struct imxmci_host *)data; - - if (host->pdata && host->pdata->card_present && - host->pdata->card_present(mmc_dev(host->mmc)) != host->present) { - host->present ^= 1; - dev_info(mmc_dev(host->mmc), "card %s\n", - host->present ? "inserted" : "removed"); - - set_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events); - tasklet_schedule(&host->tasklet); - } - - if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) || - test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { - atomic_inc(&host->stuck_timeout); - if (atomic_read(&host->stuck_timeout) > 4) - tasklet_schedule(&host->tasklet); - } else { - atomic_set(&host->stuck_timeout, 0); - - } - - mod_timer(&host->timer, jiffies + (HZ>>1)); -} - -static int __init imxmci_probe(struct platform_device *pdev) -{ - struct mmc_host *mmc; - struct imxmci_host *host = NULL; - struct resource *r; - int ret = 0, irq; - u16 rev_no; - - pr_info("i.MX mmc driver\n"); - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - irq = platform_get_irq(pdev, 0); - if (!r || irq < 0) - return -ENXIO; - - r = request_mem_region(r->start, resource_size(r), pdev->name); - if (!r) - return -EBUSY; - - mmc = mmc_alloc_host(sizeof(struct imxmci_host), &pdev->dev); - if (!mmc) { - ret = -ENOMEM; - goto out; - } - - mmc->ops = &imxmci_ops; - mmc->f_min = 150000; - mmc->f_max = CLK_RATE/2; - mmc->ocr_avail = MMC_VDD_32_33; - mmc->caps = MMC_CAP_4_BIT_DATA; - - /* MMC core transfer sizes tunable parameters */ - mmc->max_segs = 64; - mmc->max_seg_size = 64*512; /* default PAGE_CACHE_SIZE */ - mmc->max_req_size = 64*512; /* default PAGE_CACHE_SIZE */ - mmc->max_blk_size = 2048; - mmc->max_blk_count = 65535; - - host = mmc_priv(mmc); - host->base = ioremap(r->start, resource_size(r)); - if (!host->base) { - ret = -ENOMEM; - goto out; - } - - host->mmc = mmc; - host->dma_allocated = 0; - host->pdata = pdev->dev.platform_data; - if (!host->pdata) - dev_warn(&pdev->dev, "No platform data provided!\n"); - - spin_lock_init(&host->lock); - host->res = r; - host->irq = irq; - - host->clk = clk_get(&pdev->dev, "perclk2"); - if (IS_ERR(host->clk)) { - ret = PTR_ERR(host->clk); - goto out; - } - clk_enable(host->clk); - - imx_gpio_mode(PB8_PF_SD_DAT0); - imx_gpio_mode(PB9_PF_SD_DAT1); - imx_gpio_mode(PB10_PF_SD_DAT2); - /* Configured as GPIO with pull-up to ensure right MCC card mode */ - /* Switched to PB11_PF_SD_DAT3 if 4 bit bus is configured */ - imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); - /* imx_gpio_mode(PB11_PF_SD_DAT3); */ - imx_gpio_mode(PB12_PF_SD_CLK); - imx_gpio_mode(PB13_PF_SD_CMD); - - imxmci_softreset(host); - - rev_no = readw(host->base + MMC_REG_REV_NO); - if (rev_no != 0x390) { - dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", - readw(host->base + MMC_REG_REV_NO)); - goto out; - } - - /* recommended in data sheet */ - writew(0x2db4, host->base + MMC_REG_READ_TO); - - host->imask = IMXMCI_INT_MASK_DEFAULT; - writew(host->imask, host->base + MMC_REG_INT_MASK); - - host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); - if(host->dma < 0) { - dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n"); - ret = -EBUSY; - goto out; - } - host->dma_allocated = 1; - imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host); - RSSR(host->dma) = DMA_REQ_SDHC; - - tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host); - host->status_reg=0; - host->pending_events=0; - - ret = request_irq(host->irq, imxmci_irq, 0, DRIVER_NAME, host); - if (ret) - goto out; - - if (host->pdata && host->pdata->card_present) - host->present = host->pdata->card_present(mmc_dev(mmc)); - else /* if there is no way to detect assume that card is present */ - host->present = 1; - - init_timer(&host->timer); - host->timer.data = (unsigned long)host; - host->timer.function = imxmci_check_status; - add_timer(&host->timer); - mod_timer(&host->timer, jiffies + (HZ >> 1)); - - platform_set_drvdata(pdev, mmc); - - mmc_add_host(mmc); - - return 0; - -out: - if (host) { - if (host->dma_allocated) { - imx_dma_free(host->dma); - host->dma_allocated = 0; - } - if (host->clk) { - clk_disable(host->clk); - clk_put(host->clk); - } - if (host->base) - iounmap(host->base); - } - if (mmc) - mmc_free_host(mmc); - release_mem_region(r->start, resource_size(r)); - return ret; -} - -static int __exit imxmci_remove(struct platform_device *pdev) -{ - struct mmc_host *mmc = platform_get_drvdata(pdev); - - platform_set_drvdata(pdev, NULL); - - if (mmc) { - struct imxmci_host *host = mmc_priv(mmc); - - tasklet_disable(&host->tasklet); - - del_timer_sync(&host->timer); - mmc_remove_host(mmc); - - free_irq(host->irq, host); - iounmap(host->base); - if (host->dma_allocated) { - imx_dma_free(host->dma); - host->dma_allocated = 0; - } - - tasklet_kill(&host->tasklet); - - clk_disable(host->clk); - clk_put(host->clk); - - release_mem_region(host->res->start, resource_size(host->res)); - - mmc_free_host(mmc); - } - return 0; -} - -#ifdef CONFIG_PM -static int imxmci_suspend(struct platform_device *dev, pm_message_t state) -{ - struct mmc_host *mmc = platform_get_drvdata(dev); - int ret = 0; - - if (mmc) - ret = mmc_suspend_host(mmc); - - return ret; -} - -static int imxmci_resume(struct platform_device *dev) -{ - struct mmc_host *mmc = platform_get_drvdata(dev); - struct imxmci_host *host; - int ret = 0; - - if (mmc) { - host = mmc_priv(mmc); - if (host) - set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); - ret = mmc_resume_host(mmc); - } - - return ret; -} -#else -#define imxmci_suspend NULL -#define imxmci_resume NULL -#endif /* CONFIG_PM */ - -static struct platform_driver imxmci_driver = { - .remove = __exit_p(imxmci_remove), - .suspend = imxmci_suspend, - .resume = imxmci_resume, - .driver = { - .name = DRIVER_NAME, - .owner = THIS_MODULE, - } -}; - -static int __init imxmci_init(void) -{ - return platform_driver_probe(&imxmci_driver, imxmci_probe); -} - -static void __exit imxmci_exit(void) -{ - platform_driver_unregister(&imxmci_driver); -} - -module_init(imxmci_init); -module_exit(imxmci_exit); - -MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); -MODULE_AUTHOR("Sascha Hauer, Pengutronix"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:imx-mmc"); diff --git a/drivers/mmc/host/imxmmc.h b/drivers/mmc/host/imxmmc.h deleted file mode 100644 index 09d5d4ee3a77..000000000000 --- a/drivers/mmc/host/imxmmc.h +++ /dev/null @@ -1,64 +0,0 @@ -#define MMC_REG_STR_STP_CLK 0x00 -#define MMC_REG_STATUS 0x04 -#define MMC_REG_CLK_RATE 0x08 -#define MMC_REG_CMD_DAT_CONT 0x0C -#define MMC_REG_RES_TO 0x10 -#define MMC_REG_READ_TO 0x14 -#define MMC_REG_BLK_LEN 0x18 -#define MMC_REG_NOB 0x1C -#define MMC_REG_REV_NO 0x20 -#define MMC_REG_INT_MASK 0x24 -#define MMC_REG_CMD 0x28 -#define MMC_REG_ARGH 0x2C -#define MMC_REG_ARGL 0x30 -#define MMC_REG_RES_FIFO 0x34 -#define MMC_REG_BUFFER_ACCESS 0x38 - -#define STR_STP_CLK_IPG_CLK_GATE_DIS (1<<15) -#define STR_STP_CLK_IPG_PERCLK_GATE_DIS (1<<14) -#define STR_STP_CLK_ENDIAN (1<<5) -#define STR_STP_CLK_RESET (1<<3) -#define STR_STP_CLK_ENABLE (1<<2) -#define STR_STP_CLK_START_CLK (1<<1) -#define STR_STP_CLK_STOP_CLK (1<<0) -#define STATUS_CARD_PRESENCE (1<<15) -#define STATUS_SDIO_INT_ACTIVE (1<<14) -#define STATUS_END_CMD_RESP (1<<13) -#define STATUS_WRITE_OP_DONE (1<<12) -#define STATUS_DATA_TRANS_DONE (1<<11) -#define STATUS_WR_CRC_ERROR_CODE_MASK (3<<10) -#define STATUS_CARD_BUS_CLK_RUN (1<<8) -#define STATUS_APPL_BUFF_FF (1<<7) -#define STATUS_APPL_BUFF_FE (1<<6) -#define STATUS_RESP_CRC_ERR (1<<5) -#define STATUS_CRC_READ_ERR (1<<3) -#define STATUS_CRC_WRITE_ERR (1<<2) -#define STATUS_TIME_OUT_RESP (1<<1) -#define STATUS_TIME_OUT_READ (1<<0) -#define STATUS_ERR_MASK 0x2f -#define CLK_RATE_PRESCALER(x) ((x) & 0x7) -#define CLK_RATE_CLK_RATE(x) (((x) & 0x7) << 3) -#define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1<<12) -#define CMD_DAT_CONT_STOP_READWAIT (1<<11) -#define CMD_DAT_CONT_START_READWAIT (1<<10) -#define CMD_DAT_CONT_BUS_WIDTH_1 (0<<8) -#define CMD_DAT_CONT_BUS_WIDTH_4 (2<<8) -#define CMD_DAT_CONT_INIT (1<<7) -#define CMD_DAT_CONT_BUSY (1<<6) -#define CMD_DAT_CONT_STREAM_BLOCK (1<<5) -#define CMD_DAT_CONT_WRITE (1<<4) -#define CMD_DAT_CONT_DATA_ENABLE (1<<3) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R1 (1) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R2 (2) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R3 (3) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R4 (4) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R5 (5) -#define CMD_DAT_CONT_RESPONSE_FORMAT_R6 (6) -#define INT_MASK_AUTO_CARD_DETECT (1<<6) -#define INT_MASK_DAT0_EN (1<<5) -#define INT_MASK_SDIO (1<<4) -#define INT_MASK_BUF_READY (1<<3) -#define INT_MASK_END_CMD_RES (1<<2) -#define INT_MASK_WRITE_OP_DONE (1<<1) -#define INT_MASK_DATA_TRAN (1<<0) -#define INT_ALL (0x7f) -- cgit v1.2.2 From bbbc4c4d8c5face097d695f9bf3a39647ba6b7e7 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Mon, 16 Apr 2012 19:16:54 -0400 Subject: mmc: sdio: avoid spurious calls to interrupt handlers Commit 06e8935feb ("optimized SDIO IRQ handling for single irq") introduced some spurious calls to SDIO function interrupt handlers, such as when the SDIO IRQ thread is started, or the safety check performed upon a system resume. Let's add a flag to perform the optimization only when a real interrupt is signaled by the host driver and we know there is no point confirming it. Reported-by: Sujit Reddy Thumma Signed-off-by: Nicolas Pitre Cc: stable Signed-off-by: Chris Ball --- drivers/mmc/core/sdio.c | 2 +- drivers/mmc/core/sdio_irq.c | 11 +++++++---- 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 2c7c83f832d2..13d0e95380ab 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -947,7 +947,7 @@ static int mmc_sdio_resume(struct mmc_host *host) } if (!err && host->sdio_irqs) - mmc_signal_sdio_irq(host); + wake_up_process(host->sdio_irq_thread); mmc_release_host(host); /* diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c index f573e7f9f740..3d8ceb4084de 100644 --- a/drivers/mmc/core/sdio_irq.c +++ b/drivers/mmc/core/sdio_irq.c @@ -28,18 +28,20 @@ #include "sdio_ops.h" -static int process_sdio_pending_irqs(struct mmc_card *card) +static int process_sdio_pending_irqs(struct mmc_host *host) { + struct mmc_card *card = host->card; int i, ret, count; unsigned char pending; struct sdio_func *func; /* * Optimization, if there is only 1 function interrupt registered - * call irq handler directly + * and we know an IRQ was signaled then call irq handler directly. + * Otherwise do the full probe. */ func = card->sdio_single_irq; - if (func) { + if (func && host->sdio_irq_pending) { func->irq_handler(func); return 1; } @@ -116,7 +118,8 @@ static int sdio_irq_thread(void *_host) ret = __mmc_claim_host(host, &host->sdio_irq_thread_abort); if (ret) break; - ret = process_sdio_pending_irqs(host->card); + ret = process_sdio_pending_irqs(host); + host->sdio_irq_pending = false; mmc_release_host(host); /* -- cgit v1.2.2 From ca5879d3ffebd967e94b2dc3b1a3dc089709206f Mon Sep 17 00:00:00 2001 From: Pavan Kunapuli Date: Wed, 18 Apr 2012 18:48:02 +0530 Subject: mmc: tegra: support SDHCI SPEC 300 Tegra3 SDHOST controller doesn't advertise v3.00 support by default. This support has to be enabled by configuring a vendor register in the tegra3 sd host address space. Signed-off-by: Pavan Kunapuli Acked-by: Stephen Warren Signed-off-by: Chris Ball --- drivers/mmc/host/sdhci-tegra.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 53b26502f6e2..cff0c522b4ab 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -32,8 +32,13 @@ #include "sdhci-pltfm.h" +/* Tegra SDHOST controller vendor register definitions */ +#define SDHCI_TEGRA_VENDOR_MISC_CTRL 0x120 +#define SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300 0x20 + #define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0) #define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1) +#define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2) struct sdhci_tegra_soc_data { struct sdhci_pltfm_data *pdata; @@ -120,6 +125,25 @@ static irqreturn_t carddetect_irq(int irq, void *data) return IRQ_HANDLED; }; +static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_tegra *tegra_host = pltfm_host->priv; + const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; + + if (!(mask & SDHCI_RESET_ALL)) + return; + + /* Erratum: Enable SDHCI spec v3.00 support */ + if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300) { + u32 misc_ctrl; + + misc_ctrl = sdhci_readb(host, SDHCI_TEGRA_VENDOR_MISC_CTRL); + misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300; + sdhci_writeb(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); + } +} + static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -148,6 +172,7 @@ static struct sdhci_ops tegra_sdhci_ops = { .read_w = tegra_sdhci_readw, .write_l = tegra_sdhci_writel, .platform_8bit_width = tegra_sdhci_8bit, + .platform_reset_exit = tegra_sdhci_reset_exit, }; #ifdef CONFIG_ARCH_TEGRA_2x_SOC @@ -178,6 +203,7 @@ static struct sdhci_pltfm_data sdhci_tegra30_pdata = { static struct sdhci_tegra_soc_data soc_data_tegra30 = { .pdata = &sdhci_tegra30_pdata, + .nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300, }; #endif -- cgit v1.2.2 From 48b332f9916f33ba0001b78e5cea49ef17f3c81e Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 18 Apr 2012 11:11:57 +0100 Subject: mmc: omap_hsmmc: release correct resource res can be one of several resources, as this variable is re-used several times during probe. This can cause the wrong resource parameters to be passed to release_mem_region(). Get the original memory resource before calling release_mem_region(). Signed-off-by: Russell King Acked-by: Tony Lindgren Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 4254b6f310aa..d15b149649bf 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2042,7 +2042,9 @@ err1: err_alloc: omap_hsmmc_gpio_free(pdata); err: - release_mem_region(res->start, resource_size(res)); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res) + release_mem_region(res->start, resource_size(res)); return ret; } -- cgit v1.2.2 From 0dd1bfeb6cc89467261cc62ca81e0ac5da78ec0a Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Mon, 23 Apr 2012 15:18:02 +0800 Subject: mmc: core: check PM_SLEEP for mmc_bus_suspend/resume callbacks If PM_SLEEP is not enabled, mmc.c will give warnning since mmc_bus_suspend/ mmc_bus_resume functions are defined but not used. This patch can fix this warnning. Reported-by: Andrew Lunn Signed-off-by: Chuanxiao Dong Signed-off-by: Chris Ball --- drivers/mmc/core/bus.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index c60cee92a2b2..9b68933f27e7 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -122,6 +122,7 @@ static int mmc_bus_remove(struct device *dev) return 0; } +#ifdef CONFIG_PM_SLEEP static int mmc_bus_suspend(struct device *dev) { struct mmc_driver *drv = to_mmc_driver(dev->driver); @@ -143,6 +144,7 @@ static int mmc_bus_resume(struct device *dev) ret = drv->resume(card); return ret; } +#endif #ifdef CONFIG_PM_RUNTIME -- cgit v1.2.2 From d29bf01941795891828bf671f74c3a4f6fc3517f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 9 Apr 2012 22:53:21 +0200 Subject: dma/amba-pl08x: check for terminal count status only For some reason I can't figure out we're reading the PL080_INT_STATUS register instead of PL080_TC_STATUS when checking for the terminal count. The PL080_INT_STATUS is a logical OR between the error and terminal count status register and may not report what we want it to, especially if there is an error and a terminal count at the same time and the former is not lowered in time for the check in the TC register. Make sure we read what we're actually interested in. Cc: Russell King Cc: Viresh Kumar Cc: Alim Akhtar Signed-off-by: Linus Walleij Acked-by: Viresh Kumar Signed-off-by: Vinod Koul --- drivers/dma/amba-pl08x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index c301a8ec31aa..08589c683e2b 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1615,7 +1615,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev) __func__, err); writel(err, pl08x->base + PL080_ERR_CLEAR); } - tc = readl(pl08x->base + PL080_INT_STATUS); + tc = readl(pl08x->base + PL080_TC_STATUS); if (tc) writel(tc, pl08x->base + PL080_TC_CLEAR); -- cgit v1.2.2 From 0e9f480bb553d39ee06ccd45639ba7a5446a7b81 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Tue, 24 Apr 2012 17:56:29 +0200 Subject: mmc: cd-gpio: protect against NULL context in mmc_cd_gpio_free() Do not oops, even if mmc_cd_gpio_free() is mistakenly called on a driver cleanup path, even though a previous call to mmc_cd_gpio_request() failed. Signed-off-by: Guennadi Liakhovetski [stable@: please apply to 3.3-stable] Cc: stable Signed-off-by: Chris Ball --- drivers/mmc/core/cd-gpio.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/core/cd-gpio.c b/drivers/mmc/core/cd-gpio.c index 2c14be73254c..f13e38deceac 100644 --- a/drivers/mmc/core/cd-gpio.c +++ b/drivers/mmc/core/cd-gpio.c @@ -73,6 +73,9 @@ void mmc_cd_gpio_free(struct mmc_host *host) { struct mmc_cd_gpio *cd = host->hotplug.handler_priv; + if (!cd) + return; + free_irq(host->hotplug.irq, host); gpio_free(cd->gpio); kfree(cd); -- cgit v1.2.2 From 5654dc94f872f823aa13941a8fdba69a3feca39c Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Mon, 26 Mar 2012 11:51:34 -0700 Subject: clk: core: correct clk_set_rate kerneldoc Remove old and misleading documentation from the previous clk_set_rate implementaion. Reported-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 41 +++++++++++------------------------------ 1 file changed, 11 insertions(+), 30 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 9cf6f59e3e19..3ed36d3056de 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -859,38 +859,19 @@ static void clk_change_rate(struct clk *clk) * @clk: the clk whose rate is being changed * @rate: the new rate for clk * - * In the simplest case clk_set_rate will only change the rate of clk. + * In the simplest case clk_set_rate will only adjust the rate of clk. * - * If clk has the CLK_SET_RATE_GATE flag set and it is enabled this call - * will fail; only when the clk is disabled will it be able to change - * its rate. + * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to + * propagate up to clk's parent; whether or not this happens depends on the + * outcome of clk's .round_rate implementation. If *parent_rate is unchanged + * after calling .round_rate then upstream parent propagation is ignored. If + * *parent_rate comes back with a new rate for clk's parent then we propagate + * up to clk's parent and set it's rate. Upward propagation will continue + * until either a clk does not support the CLK_SET_RATE_PARENT flag or + * .round_rate stops requesting changes to clk's parent_rate. * - * Setting the CLK_SET_RATE_PARENT flag allows clk_set_rate to - * recursively propagate up to clk's parent; whether or not this happens - * depends on the outcome of clk's .round_rate implementation. If - * *parent_rate is 0 after calling .round_rate then upstream parent - * propagation is ignored. If *parent_rate comes back with a new rate - * for clk's parent then we propagate up to clk's parent and set it's - * rate. Upward propagation will continue until either a clk does not - * support the CLK_SET_RATE_PARENT flag or .round_rate stops requesting - * changes to clk's parent_rate. If there is a failure during upstream - * propagation then clk_set_rate will unwind and restore each clk's rate - * that had been successfully changed. Afterwards a rate change abort - * notification will be propagated downstream, starting from the clk - * that failed. - * - * At the end of all of the rate setting, clk_set_rate internally calls - * __clk_recalc_rates and propagates the rate changes downstream, - * starting from the highest clk whose rate was changed. This has the - * added benefit of propagating post-rate change notifiers. - * - * Note that while post-rate change and rate change abort notifications - * are guaranteed to be sent to a clk only once per call to - * clk_set_rate, pre-change notifications will be sent for every clk - * whose rate is changed. Stacking pre-change notifications is noisy - * for the drivers subscribed to them, but this allows drivers to react - * to intermediate clk rate changes up until the point where the final - * rate is achieved at the end of upstream propagation. + * Rate changes are accomplished via tree traversal that also recalculates the + * rates for the clocks and fires off POST_RATE_CHANGE notifiers. * * Returns 0 on success, -EERROR otherwise. */ -- cgit v1.2.2 From 70d347e6cd0d2a7ecc023b44ef721bc2c2a38f22 Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Mon, 26 Mar 2012 11:53:47 -0700 Subject: clk: core: remove dead code paths Some static inline dummy functions were left over from before the clock core was consolidated from several C files down to one. Remove them. Reported-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 3ed36d3056de..4daacf5783aa 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -194,7 +194,7 @@ static int __init clk_debug_init(void) late_initcall(clk_debug_init); #else static inline int clk_debug_register(struct clk *clk) { return 0; } -#endif /* CONFIG_COMMON_CLK_DEBUG */ +#endif #ifdef CONFIG_COMMON_CLK_DISABLE_UNUSED /* caller must hold prepare_lock */ @@ -246,9 +246,7 @@ static int clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -#else -static inline int clk_disable_unused(struct clk *clk) { return 0; } -#endif /* CONFIG_COMMON_CLK_DISABLE_UNUSED */ +#endif /*** helper functions ***/ -- cgit v1.2.2 From 7452b2191cd55fb3fd6ad65344466ddcdbe4676e Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Mon, 26 Mar 2012 14:45:36 -0700 Subject: clk: core: clk_calc_new_rates handles NULL parents It is possible to call clk_set_rate on a clock with a NULL parent. One such example is an adjustable-rate root clock. Ensure that clk_calc_new_rates does not dereference parent without checking first and also handle the corner cases gracefully. Reported-by: Rajendra Nayak Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 4daacf5783aa..d83a9e09e1bf 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -763,25 +763,38 @@ static void clk_calc_subtree(struct clk *clk, unsigned long new_rate) static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) { struct clk *top = clk; - unsigned long best_parent_rate = clk->parent->rate; + unsigned long best_parent_rate; unsigned long new_rate; - if (!clk->ops->round_rate && !(clk->flags & CLK_SET_RATE_PARENT)) { - clk->new_rate = clk->rate; + /* sanity */ + if (IS_ERR_OR_NULL(clk)) + return NULL; + + /* never propagate up to the parent */ + if (!(clk->flags & CLK_SET_RATE_PARENT)) { + if (!clk->ops->round_rate) { + clk->new_rate = clk->rate; + return NULL; + } else { + new_rate = clk->ops->round_rate(clk->hw, rate, NULL); + goto out; + } + } + + /* need clk->parent from here on out */ + if (!clk->parent) { + pr_debug("%s: %s has NULL parent\n", __func__, clk->name); return NULL; } - if (!clk->ops->round_rate && (clk->flags & CLK_SET_RATE_PARENT)) { + if (!clk->ops->round_rate) { top = clk_calc_new_rates(clk->parent, rate); new_rate = clk->new_rate = clk->parent->new_rate; goto out; } - if (clk->flags & CLK_SET_RATE_PARENT) - new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate); - else - new_rate = clk->ops->round_rate(clk->hw, rate, NULL); + new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate); if (best_parent_rate != clk->parent->rate) { top = clk_calc_new_rates(clk->parent, best_parent_rate); -- cgit v1.2.2 From d4d7e3ddc76c5ae3b4fbd15cb6f30aa78c28d788 Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Mon, 26 Mar 2012 16:15:52 -0700 Subject: clk: core: enforce clk_ops consistency Documentation/clk.txt has some handsome ASCII art outlining which clk_ops are mandatory for a given clock, given the capability of the hardware. Enforce those mandates with sanity checks in __clk_init. Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index d83a9e09e1bf..9924aec17aad 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1202,6 +1202,20 @@ void __clk_init(struct device *dev, struct clk *clk) if (__clk_lookup(clk->name)) goto out; + /* check that clk_ops are sane. See Documentation/clk.txt */ + if (clk->ops->set_rate && + !(clk->ops->round_rate && clk->ops->recalc_rate)) { + pr_warning("%s: %s must implement .round_rate & .recalc_rate\n", + __func__, clk->name); + goto out; + } + + if (clk->ops->set_parent && !clk->ops->get_parent) { + pr_warning("%s: %s must implement .get_parent & .set_parent\n", + __func__, clk->name); + goto out; + } + /* throw a WARN if any entries in parent_names are NULL */ for (i = 0; i < clk->num_parents; i++) WARN(!clk->parent_names[i], -- cgit v1.2.2 From 10363b5838b4d5dcbf01db219f35e91aa94f24c6 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 27 Mar 2012 15:23:20 +0800 Subject: clk: use kzalloc in clk_register_mux Change clk_register_mux to use kzalloc, just like what all other basic clk registration functions do. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk-mux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index c71ad1f41a97..50e05953c8d3 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -97,7 +97,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name, { struct clk_mux *mux; - mux = kmalloc(sizeof(struct clk_mux), GFP_KERNEL); + mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); if (!mux) { pr_err("%s: could not allocate mux clk\n", __func__); -- cgit v1.2.2 From c0d2530c03cbf3741cb7a0f8ebae93e7a563fc58 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 27 Mar 2012 15:23:21 +0800 Subject: clk: remove unnecessary EXPORT_SYMBOL_GPL It makes no sense to have EXPORT_SYMBOL_GPL on static functions. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk-divider.c | 3 --- drivers/clk/clk-fixed-rate.c | 1 - drivers/clk/clk-gate.c | 3 --- drivers/clk/clk-mux.c | 2 -- 4 files changed, 9 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index d5ac6a75ea57..231cd6e89003 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -45,7 +45,6 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, return parent_rate / div; } -EXPORT_SYMBOL_GPL(clk_divider_recalc_rate); /* * The reverse of DIV_ROUND_UP: The maximum number which @@ -117,7 +116,6 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, return r / div; } } -EXPORT_SYMBOL_GPL(clk_divider_round_rate); static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate) { @@ -147,7 +145,6 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate) return 0; } -EXPORT_SYMBOL_GPL(clk_divider_set_rate); struct clk_ops clk_divider_ops = { .recalc_rate = clk_divider_recalc_rate, diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c index 90c79fb5d1bd..651b06f49e15 100644 --- a/drivers/clk/clk-fixed-rate.c +++ b/drivers/clk/clk-fixed-rate.c @@ -32,7 +32,6 @@ static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw, { return to_clk_fixed_rate(hw)->fixed_rate; } -EXPORT_SYMBOL_GPL(clk_fixed_rate_recalc_rate); struct clk_ops clk_fixed_rate_ops = { .recalc_rate = clk_fixed_rate_recalc_rate, diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index b5902e2ef2fd..b688f4775859 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -71,7 +71,6 @@ static int clk_gate_enable(struct clk_hw *hw) return 0; } -EXPORT_SYMBOL_GPL(clk_gate_enable); static void clk_gate_disable(struct clk_hw *hw) { @@ -82,7 +81,6 @@ static void clk_gate_disable(struct clk_hw *hw) else clk_gate_clear_bit(gate); } -EXPORT_SYMBOL_GPL(clk_gate_disable); static int clk_gate_is_enabled(struct clk_hw *hw) { @@ -99,7 +97,6 @@ static int clk_gate_is_enabled(struct clk_hw *hw) return reg ? 1 : 0; } -EXPORT_SYMBOL_GPL(clk_gate_is_enabled); struct clk_ops clk_gate_ops = { .enable = clk_gate_enable, diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 50e05953c8d3..45cad61600c9 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -55,7 +55,6 @@ static u8 clk_mux_get_parent(struct clk_hw *hw) return val; } -EXPORT_SYMBOL_GPL(clk_mux_get_parent); static int clk_mux_set_parent(struct clk_hw *hw, u8 index) { @@ -82,7 +81,6 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) return 0; } -EXPORT_SYMBOL_GPL(clk_mux_set_parent); struct clk_ops clk_mux_ops = { .get_parent = clk_mux_get_parent, -- cgit v1.2.2 From 822c250e154cd44cf60a4f0d647aa70abea09520 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 27 Mar 2012 15:23:22 +0800 Subject: clk: add "const" for clk_ops of basic clks The clk_ops of basic clks should have "const" to match the definition in "struct clk" and clk_register prototype. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk-divider.c | 2 +- drivers/clk/clk-fixed-rate.c | 2 +- drivers/clk/clk-gate.c | 2 +- drivers/clk/clk-mux.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 231cd6e89003..b1c4b02aaaf1 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -146,7 +146,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate) return 0; } -struct clk_ops clk_divider_ops = { +const struct clk_ops clk_divider_ops = { .recalc_rate = clk_divider_recalc_rate, .round_rate = clk_divider_round_rate, .set_rate = clk_divider_set_rate, diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c index 651b06f49e15..027e47704de9 100644 --- a/drivers/clk/clk-fixed-rate.c +++ b/drivers/clk/clk-fixed-rate.c @@ -33,7 +33,7 @@ static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw, return to_clk_fixed_rate(hw)->fixed_rate; } -struct clk_ops clk_fixed_rate_ops = { +const struct clk_ops clk_fixed_rate_ops = { .recalc_rate = clk_fixed_rate_recalc_rate, }; EXPORT_SYMBOL_GPL(clk_fixed_rate_ops); diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index b688f4775859..fe2ff9e774c2 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -98,7 +98,7 @@ static int clk_gate_is_enabled(struct clk_hw *hw) return reg ? 1 : 0; } -struct clk_ops clk_gate_ops = { +const struct clk_ops clk_gate_ops = { .enable = clk_gate_enable, .disable = clk_gate_disable, .is_enabled = clk_gate_is_enabled, diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 45cad61600c9..54244889a948 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -82,7 +82,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) return 0; } -struct clk_ops clk_mux_ops = { +const struct clk_ops clk_mux_ops = { .get_parent = clk_mux_get_parent, .set_parent = clk_mux_set_parent, }; -- cgit v1.2.2 From 34e44fe87437b6a5aad856f15f7a849e5fc137aa Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Mon, 26 Mar 2012 19:01:48 +0530 Subject: clk: Make clk_get_rate() return 0 on error Most users of clk_get_rate() actually assume a non zero return value as a valid rate returned. Returing -EINVAL might confuse such users, so make it instead return zero on error. Besides the return value of clk_get_rate seems to be 'unsigned long'. Signed-off-by: Rajendra nayak Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 9924aec17aad..a24b121747ac 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -285,7 +285,7 @@ unsigned long __clk_get_rate(struct clk *clk) unsigned long ret; if (!clk) { - ret = -EINVAL; + ret = 0; goto out; } @@ -295,7 +295,7 @@ unsigned long __clk_get_rate(struct clk *clk) goto out; if (!clk->parent) - ret = -ENODEV; + ret = 0; out: return ret; @@ -560,7 +560,7 @@ EXPORT_SYMBOL_GPL(clk_enable); * @clk: the clk whose rate is being returned * * Simply returns the cached rate of the clk. Does not query the hardware. If - * clk is NULL then returns -EINVAL. + * clk is NULL then returns 0. */ unsigned long clk_get_rate(struct clk *clk) { -- cgit v1.2.2 From d305fb78f31209596c9135d396a0d3af7ac86947 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 21 Mar 2012 20:01:20 +0000 Subject: clk: Constify parent name arrays Drivers should be able to declare their arrays of parent names as const so the APIs need to accept const arguments. Signed-off-by: Mark Brown [mturquette@linaro.org: constified gate] Signed-off-by: Mike Turquette --- drivers/clk/clk-mux.c | 2 +- drivers/clk/clk.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 54244889a948..bd5e598b9f1e 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -89,7 +89,7 @@ const struct clk_ops clk_mux_ops = { EXPORT_SYMBOL_GPL(clk_mux_ops); struct clk *clk_register_mux(struct device *dev, const char *name, - char **parent_names, u8 num_parents, unsigned long flags, + const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock) { diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a24b121747ac..ddade8759ea9 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1328,7 +1328,7 @@ out: */ struct clk *clk_register(struct device *dev, const char *name, const struct clk_ops *ops, struct clk_hw *hw, - char **parent_names, u8 num_parents, unsigned long flags) + const char **parent_names, u8 num_parents, unsigned long flags) { struct clk *clk; -- cgit v1.2.2 From d1302a36a7f1c33d1a8babc6a510e1401a5e5aed Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Thu, 29 Mar 2012 14:30:40 -0700 Subject: clk: core: copy parent_names & return error codes This patch cleans up clk_register and solves a few bugs by teaching clk_register and __clk_init to return error codes (instead of just NULL) to better align with the existing clk.h api. Along with that change this patch also introduces a new behavior whereby clk_register copies the parent_names array, thus allowing platforms to declare their parent_names arrays as __initdata. Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 65 +++++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 53 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index ddade8759ea9..8f7c3849c8f6 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1185,34 +1185,41 @@ EXPORT_SYMBOL_GPL(clk_set_parent); * very large numbers of clocks that need to be statically initialized. It is * a layering violation to include clk-private.h from any code which implements * a clock's .ops; as such any statically initialized clock data MUST be in a - * separate C file from the logic that implements it's operations. + * separate C file from the logic that implements it's operations. Returns 0 + * on success, otherwise an error code. */ -void __clk_init(struct device *dev, struct clk *clk) +int __clk_init(struct device *dev, struct clk *clk) { - int i; + int i, ret = 0; struct clk *orphan; struct hlist_node *tmp, *tmp2; if (!clk) - return; + return -EINVAL; mutex_lock(&prepare_lock); /* check to see if a clock with this name is already registered */ - if (__clk_lookup(clk->name)) + if (__clk_lookup(clk->name)) { + pr_debug("%s: clk %s already initialized\n", + __func__, clk->name); + ret = -EEXIST; goto out; + } /* check that clk_ops are sane. See Documentation/clk.txt */ if (clk->ops->set_rate && !(clk->ops->round_rate && clk->ops->recalc_rate)) { pr_warning("%s: %s must implement .round_rate & .recalc_rate\n", __func__, clk->name); + ret = -EINVAL; goto out; } if (clk->ops->set_parent && !clk->ops->get_parent) { pr_warning("%s: %s must implement .get_parent & .set_parent\n", __func__, clk->name); + ret = -EINVAL; goto out; } @@ -1308,7 +1315,7 @@ void __clk_init(struct device *dev, struct clk *clk) out: mutex_unlock(&prepare_lock); - return; + return ret; } /** @@ -1324,29 +1331,63 @@ out: * clk_register is the primary interface for populating the clock tree with new * clock nodes. It returns a pointer to the newly allocated struct clk which * cannot be dereferenced by driver code but may be used in conjuction with the - * rest of the clock API. + * rest of the clock API. In the event of an error clk_register will return an + * error code; drivers must test for an error code after calling clk_register. */ struct clk *clk_register(struct device *dev, const char *name, const struct clk_ops *ops, struct clk_hw *hw, const char **parent_names, u8 num_parents, unsigned long flags) { + int i, ret; struct clk *clk; clk = kzalloc(sizeof(*clk), GFP_KERNEL); - if (!clk) - return NULL; + if (!clk) { + pr_err("%s: could not allocate clk\n", __func__); + ret = -ENOMEM; + goto fail_out; + } clk->name = name; clk->ops = ops; clk->hw = hw; clk->flags = flags; - clk->parent_names = parent_names; clk->num_parents = num_parents; hw->clk = clk; - __clk_init(dev, clk); + /* allocate local copy in case parent_names is __initdata */ + clk->parent_names = kzalloc((sizeof(char*) * num_parents), + GFP_KERNEL); + + if (!clk->parent_names) { + pr_err("%s: could not allocate clk->parent_names\n", __func__); + ret = -ENOMEM; + goto fail_parent_names; + } + + + /* copy each string name in case parent_names is __initdata */ + for (i = 0; i < num_parents; i++) { + clk->parent_names[i] = kstrdup(parent_names[i], GFP_KERNEL); + if (!clk->parent_names[i]) { + pr_err("%s: could not copy parent_names\n", __func__); + ret = -ENOMEM; + goto fail_parent_names_copy; + } + } + + ret = __clk_init(dev, clk); + if (!ret) + return clk; - return clk; +fail_parent_names_copy: + while (--i >= 0) + kfree(clk->parent_names[i]); + kfree(clk->parent_names); +fail_parent_names: + kfree(clk); +fail_out: + return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(clk_register); -- cgit v1.2.2 From 27d545915fd49cbe18a3877d82359896e9851efb Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Mon, 26 Mar 2012 17:51:03 -0700 Subject: clk: basic: improve parent_names & return errors This patch is the basic clk version of 'clk: core: copy parent_names & return error codes'. The registration functions are changed to allow the core code to copy the array of strings and allow platforms to declare those arrays as __initdata. This patch also converts all of the basic clk registration functions to return error codes which better aligns them with the existing clk.h api. Signed-off-by: Mike Turquette --- drivers/clk/clk-divider.c | 34 +++++++++++++++++++--------------- drivers/clk/clk-fixed-rate.c | 40 ++++++++++++++++++---------------------- drivers/clk/clk-gate.c | 34 +++++++++++++++++++--------------- drivers/clk/clk-mux.c | 10 ++++++++-- 4 files changed, 64 insertions(+), 54 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index b1c4b02aaaf1..5fc541d017f1 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -153,6 +153,18 @@ const struct clk_ops clk_divider_ops = { }; EXPORT_SYMBOL_GPL(clk_divider_ops); +/** + * clk_register_divider - register a divider clock with the clock framework + * @dev: device registering this clock + * @name: name of this clock + * @parent_name: name of clock's parent + * @flags: framework-specific flags + * @reg: register address to adjust divider + * @shift: number of bits to shift the bitfield + * @width: width of the bitfield + * @clk_divider_flags: divider-specific flags for this clock + * @lock: shared register lock for this clock + */ struct clk *clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, @@ -161,11 +173,11 @@ struct clk *clk_register_divider(struct device *dev, const char *name, struct clk_divider *div; struct clk *clk; + /* allocate the divider */ div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL); - if (!div) { pr_err("%s: could not allocate divider clk\n", __func__); - return NULL; + return ERR_PTR(-ENOMEM); } /* struct clk_divider assignments */ @@ -175,23 +187,15 @@ struct clk *clk_register_divider(struct device *dev, const char *name, div->flags = clk_divider_flags; div->lock = lock; - if (parent_name) { - div->parent[0] = kstrdup(parent_name, GFP_KERNEL); - if (!div->parent[0]) - goto out; - } - + /* register the clock */ clk = clk_register(dev, name, &clk_divider_ops, &div->hw, - div->parent, + (parent_name ? &parent_name: NULL), (parent_name ? 1 : 0), flags); - if (clk) - return clk; -out: - kfree(div->parent[0]); - kfree(div); + if (IS_ERR(clk)) + kfree(div); - return NULL; + return clk; } diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c index 027e47704de9..b555a04c8df8 100644 --- a/drivers/clk/clk-fixed-rate.c +++ b/drivers/clk/clk-fixed-rate.c @@ -38,16 +38,23 @@ const struct clk_ops clk_fixed_rate_ops = { }; EXPORT_SYMBOL_GPL(clk_fixed_rate_ops); +/** + * clk_register_fixed_rate - register fixed-rate clock with the clock framework + * @dev: device that is registering this clock + * @name: name of this clock + * @parent_name: name of clock's parent + * @flags: framework-specific flags + * @fixed_rate: non-adjustable clock rate + */ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate) { struct clk_fixed_rate *fixed; - char **parent_names = NULL; - u8 len; + struct clk *clk; + /* allocate fixed-rate clock */ fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL); - if (!fixed) { pr_err("%s: could not allocate fixed clk\n", __func__); return ERR_PTR(-ENOMEM); @@ -56,26 +63,15 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, /* struct clk_fixed_rate assignments */ fixed->fixed_rate = fixed_rate; - if (parent_name) { - parent_names = kmalloc(sizeof(char *), GFP_KERNEL); - - if (! parent_names) - goto out; - - len = sizeof(char) * strlen(parent_name); - - parent_names[0] = kmalloc(len, GFP_KERNEL); - - if (!parent_names[0]) - goto out; - - strncpy(parent_names[0], parent_name, len); - } - -out: - return clk_register(dev, name, + /* register the clock */ + clk = clk_register(dev, name, &clk_fixed_rate_ops, &fixed->hw, - parent_names, + (parent_name ? &parent_name : NULL), (parent_name ? 1 : 0), flags); + + if (IS_ERR(clk)) + kfree(fixed); + + return clk; } diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index fe2ff9e774c2..42a4b941b6e7 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -105,6 +105,17 @@ const struct clk_ops clk_gate_ops = { }; EXPORT_SYMBOL_GPL(clk_gate_ops); +/** + * clk_register_gate - register a gate clock with the clock framework + * @dev: device that is registering this clock + * @name: name of this clock + * @parent_name: name of this clock's parent + * @flags: framework-specific flags for this clock + * @reg: register address to control gating of this clock + * @bit_idx: which bit in the register controls gating of this clock + * @clk_gate_flags: gate-specific flags for this clock + * @lock: shared register lock for this clock + */ struct clk *clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, @@ -113,11 +124,11 @@ struct clk *clk_register_gate(struct device *dev, const char *name, struct clk_gate *gate; struct clk *clk; + /* allocate the gate */ gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); - if (!gate) { pr_err("%s: could not allocate gated clk\n", __func__); - return NULL; + return ERR_PTR(-ENOMEM); } /* struct clk_gate assignments */ @@ -126,22 +137,15 @@ struct clk *clk_register_gate(struct device *dev, const char *name, gate->flags = clk_gate_flags; gate->lock = lock; - if (parent_name) { - gate->parent[0] = kstrdup(parent_name, GFP_KERNEL); - if (!gate->parent[0]) - goto out; - } - + /* register the clock */ clk = clk_register(dev, name, &clk_gate_ops, &gate->hw, - gate->parent, + (parent_name ? &parent_name : NULL), (parent_name ? 1 : 0), flags); - if (clk) - return clk; -out: - kfree(gate->parent[0]); - kfree(gate); - return NULL; + if (IS_ERR(clk)) + kfree(gate); + + return clk; } diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index bd5e598b9f1e..6e58f11ab81f 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -94,9 +94,10 @@ struct clk *clk_register_mux(struct device *dev, const char *name, u8 clk_mux_flags, spinlock_t *lock) { struct clk_mux *mux; + struct clk *clk; + /* allocate the mux */ mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); - if (!mux) { pr_err("%s: could not allocate mux clk\n", __func__); return ERR_PTR(-ENOMEM); @@ -109,6 +110,11 @@ struct clk *clk_register_mux(struct device *dev, const char *name, mux->flags = clk_mux_flags; mux->lock = lock; - return clk_register(dev, name, &clk_mux_ops, &mux->hw, + clk = clk_register(dev, name, &clk_mux_ops, &mux->hw, parent_names, num_parents, flags); + + if (IS_ERR(clk)) + kfree(mux); + + return clk; } -- cgit v1.2.2 From 81536e072b54e30bbfd1a9a6b8094f7b3dd5321c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 12 Apr 2012 20:50:17 +0800 Subject: clk: always pass parent_rate into .round_rate The parent_rate will likely be used by most .round_rate implementation no matter whether flag CLK_SET_RATE_PARENT is set or not, so let's always pass parent_rate into .round_rate. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk-divider.c | 12 +++--------- drivers/clk/clk.c | 16 +++++++--------- 2 files changed, 10 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 5fc541d017f1..03b127c0313b 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -67,8 +67,8 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, if (divider->flags & CLK_DIVIDER_ONE_BASED) maxdiv--; - if (!best_parent_rate) { - parent_rate = __clk_get_rate(__clk_get_parent(hw->clk)); + if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) { + parent_rate = *best_parent_rate; bestdiv = DIV_ROUND_UP(parent_rate, rate); bestdiv = bestdiv == 0 ? 1 : bestdiv; bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv; @@ -108,13 +108,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, int div; div = clk_divider_bestdiv(hw, rate, prate); - if (prate) - return *prate / div; - else { - unsigned long r; - r = __clk_get_rate(__clk_get_parent(hw->clk)); - return r / div; - } + return *prate / div; } static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 8f7c3849c8f6..1ab4f7e5c7ef 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -582,7 +582,7 @@ EXPORT_SYMBOL_GPL(clk_get_rate); */ unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) { - unsigned long unused; + unsigned long parent_rate = 0; if (!clk) return -EINVAL; @@ -590,10 +590,10 @@ unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) if (!clk->ops->round_rate) return clk->rate; - if (clk->flags & CLK_SET_RATE_PARENT) - return clk->ops->round_rate(clk->hw, rate, &unused); - else - return clk->ops->round_rate(clk->hw, rate, NULL); + if (clk->parent) + parent_rate = clk->parent->rate; + + return clk->ops->round_rate(clk->hw, rate, &parent_rate); } /** @@ -763,7 +763,7 @@ static void clk_calc_subtree(struct clk *clk, unsigned long new_rate) static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) { struct clk *top = clk; - unsigned long best_parent_rate; + unsigned long best_parent_rate = 0; unsigned long new_rate; /* sanity */ @@ -775,9 +775,6 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) if (!clk->ops->round_rate) { clk->new_rate = clk->rate; return NULL; - } else { - new_rate = clk->ops->round_rate(clk->hw, rate, NULL); - goto out; } } @@ -794,6 +791,7 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) goto out; } + best_parent_rate = clk->parent->rate; new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate); if (best_parent_rate != clk->parent->rate) { -- cgit v1.2.2 From 1c0035d710dd3bfa86d58f851b8737c7f11a9bbc Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 12 Apr 2012 20:50:18 +0800 Subject: clk: pass parent_rate into .set_rate For most of .set_rate implementation, parent_rate will be used, so just like passing parent_rate into .recalc_rate, let's pass parent_rate into .set_rate too. It also updates the kernel doc for .set_rate ops. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk-divider.c | 5 +++-- drivers/clk/clk.c | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 03b127c0313b..90627e4069af 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -111,14 +111,15 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, return *prate / div; } -static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate) +static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) { struct clk_divider *divider = to_clk_divider(hw); unsigned int div; unsigned long flags = 0; u32 val; - div = __clk_get_rate(__clk_get_parent(hw->clk)) / rate; + div = parent_rate / rate; if (!(divider->flags & CLK_DIVIDER_ONE_BASED)) div--; diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 1ab4f7e5c7ef..62ecac53b0a2 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -848,7 +848,7 @@ static void clk_change_rate(struct clk *clk) old_rate = clk->rate; if (clk->ops->set_rate) - clk->ops->set_rate(clk->hw, clk->new_rate); + clk->ops->set_rate(clk->hw, clk->new_rate, clk->parent->rate); if (clk->ops->recalc_rate) clk->rate = clk->ops->recalc_rate(clk->hw, -- cgit v1.2.2 From f4d8af2e5ae6294d5e2220d3963def6f7ffc0873 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 12 Apr 2012 20:50:19 +0800 Subject: clk: propagate round_rate for CLK_SET_RATE_PARENT case Need to propagate round_rate call for the clk that has no .round_rate operation but with flag CLK_SET_RATE_PARENT set. For example, clk_mux is a clk with no .round_rate operation. However, it could likely be in a clk_set_rate propagation path, saying it has parent clk who has .round_rate and .set_rate operations. Signed-off-by: Shawn Guo Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 62ecac53b0a2..c6e8866289b4 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -587,8 +587,12 @@ unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) if (!clk) return -EINVAL; - if (!clk->ops->round_rate) - return clk->rate; + if (!clk->ops->round_rate) { + if (clk->flags & CLK_SET_RATE_PARENT) + return __clk_round_rate(clk->parent, rate); + else + return clk->rate; + } if (clk->parent) parent_rate = clk->parent->rate; -- cgit v1.2.2 From fbc42aab543307e9bfc1dfb029db929f3fafcacd Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 17 Apr 2012 16:45:37 +0530 Subject: clk: clk-gate: Create clk_gate_endisable() This patch tries to remove duplicate code for clk_gate clocks. This creates another routine clk_gate_endisable() which will take care of enable/disable clock with knowledge of CLK_GATE_SET_TO_DISABLE flag. It works on following logic: For enabling clock, enable = 1 set2dis = 1 -> clear bit -> set = 0 set2dis = 0 -> set bit -> set = 1 For disabling clock, enable = 0 set2dis = 1 -> set bit -> set = 1 set2dis = 0 -> clear bit -> set = 0 So, result is always: enable xor set2dis. Signed-off-by: Viresh Kumar Signed-off-by: Mike Turquette --- drivers/clk/clk-gate.c | 54 +++++++++++++++++++++++--------------------------- 1 file changed, 25 insertions(+), 29 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 42a4b941b6e7..00216164fb9d 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -28,32 +28,38 @@ #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) -static void clk_gate_set_bit(struct clk_gate *gate) +/* + * It works on following logic: + * + * For enabling clock, enable = 1 + * set2dis = 1 -> clear bit -> set = 0 + * set2dis = 0 -> set bit -> set = 1 + * + * For disabling clock, enable = 0 + * set2dis = 1 -> set bit -> set = 1 + * set2dis = 0 -> clear bit -> set = 0 + * + * So, result is always: enable xor set2dis. + */ +static void clk_gate_endisable(struct clk_hw *hw, int enable) { - u32 reg; + struct clk_gate *gate = to_clk_gate(hw); + int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0; unsigned long flags = 0; + u32 reg; + + set ^= enable; if (gate->lock) spin_lock_irqsave(gate->lock, flags); reg = readl(gate->reg); - reg |= BIT(gate->bit_idx); - writel(reg, gate->reg); - - if (gate->lock) - spin_unlock_irqrestore(gate->lock, flags); -} - -static void clk_gate_clear_bit(struct clk_gate *gate) -{ - u32 reg; - unsigned long flags = 0; - if (gate->lock) - spin_lock_irqsave(gate->lock, flags); + if (set) + reg |= BIT(gate->bit_idx); + else + reg &= ~BIT(gate->bit_idx); - reg = readl(gate->reg); - reg &= ~BIT(gate->bit_idx); writel(reg, gate->reg); if (gate->lock) @@ -62,24 +68,14 @@ static void clk_gate_clear_bit(struct clk_gate *gate) static int clk_gate_enable(struct clk_hw *hw) { - struct clk_gate *gate = to_clk_gate(hw); - - if (gate->flags & CLK_GATE_SET_TO_DISABLE) - clk_gate_clear_bit(gate); - else - clk_gate_set_bit(gate); + clk_gate_endisable(hw, 1); return 0; } static void clk_gate_disable(struct clk_hw *hw) { - struct clk_gate *gate = to_clk_gate(hw); - - if (gate->flags & CLK_GATE_SET_TO_DISABLE) - clk_gate_set_bit(gate); - else - clk_gate_clear_bit(gate); + clk_gate_endisable(hw, 0); } static int clk_gate_is_enabled(struct clk_hw *hw) -- cgit v1.2.2 From 1b2f99037a29d48d03ddd2fd0dc117888ec737f4 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 17 Apr 2012 16:45:38 +0530 Subject: clk: Don't set clk->new_rate twice if (!clk->ops->round_rate && (clk->flags & CLK_SET_RATE_PARENT)) is true, then we don't need to set clk->new_rate here, as we will call clk_calc_subtree() afterwards and it also sets clk->new_rate. Signed-off-by: Viresh Kumar Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index c6e8866289b4..2dd20c01134d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -790,7 +790,7 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) if (!clk->ops->round_rate) { top = clk_calc_new_rates(clk->parent, rate); - new_rate = clk->new_rate = clk->parent->new_rate; + new_rate = clk->parent->new_rate; goto out; } -- cgit v1.2.2 From 01033be1742abfa4359a40d21e8e8ecca39974e5 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 9 Apr 2012 15:24:58 -0500 Subject: clk: select CLKDEV_LOOKUP for COMMON_CLK Using the common clock infrastructure without the common clkdev code makes little sense, so select CLKDEV_LOOKUP for COMMON_CLK. Signed-off-by: Rob Herring --- drivers/clk/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 165e1febae53..f05a60dc1a03 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -12,6 +12,7 @@ config HAVE_MACH_CLKDEV config COMMON_CLK bool select HAVE_CLK_PREPARE + select CLKDEV_LOOKUP ---help--- The common clock framework is a single definition of struct clk, useful across many platforms, as well as an -- cgit v1.2.2 From c4bec603831d2f792a73c2422118f07000c15d5d Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 24 Apr 2012 18:07:16 -0700 Subject: spi/s3c64xx: Allow usage for ARCH_S3C24XX Newer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain hsspi-controllers compatible with the s3c64xx type. The previous patches enabled platform support for it, so make the driver also usable for the S3C24xx architecture. Signed-off-by: Heiko Stuebner Acked-by: Grant Likely Signed-off-by: Kukjin Kim --- drivers/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3ed748355b98..f899def3ea1b 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -311,7 +311,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" - depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) + depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) select S3C64XX_DMA if ARCH_S3C64XX help SPI driver for Samsung S3C64XX and newer SoCs. -- cgit v1.2.2 From affa115ed365d646ad1a8cc7d2d063b8181cce37 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 12 Apr 2012 09:01:49 +0200 Subject: dma/amba-pl08x: add support for the Nomadik variant The Nomadik PL080 variant has some extra protection bits that may be set, so we need to check these bits to see if the channels are actually available for the DMAengine to use. Cc: Russell King Cc: Alim Akhtar Cc: Alessandro Rubini Reviewed-by: Viresh Kumar Signed-off-by: Linus Walleij Signed-off-by: Vinod Koul --- drivers/dma/amba-pl08x.c | 44 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 37 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 08589c683e2b..629250e36d3b 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -95,10 +95,14 @@ static struct amba_driver pl08x_amba_driver; * struct vendor_data - vendor-specific config parameters for PL08x derivatives * @channels: the number of channels available in this variant * @dualmaster: whether this version supports dual AHB masters or not. + * @nomadik: whether the channels have Nomadik security extension bits + * that need to be checked for permission before use and some registers are + * missing */ struct vendor_data { u8 channels; bool dualmaster; + bool nomadik; }; /* @@ -385,7 +389,7 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, spin_lock_irqsave(&ch->lock, flags); - if (!ch->serving) { + if (!ch->locked && !ch->serving) { ch->serving = virt_chan; ch->signal = -1; spin_unlock_irqrestore(&ch->lock, flags); @@ -1483,6 +1487,9 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) */ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) { + /* The Nomadik variant does not have the config register */ + if (pl08x->vd->nomadik) + return; writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG); } @@ -1772,8 +1779,10 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data) spin_lock_irqsave(&ch->lock, flags); virt_chan = ch->serving; - seq_printf(s, "%d\t\t%s\n", - ch->id, virt_chan ? virt_chan->name : "(none)"); + seq_printf(s, "%d\t\t%s%s\n", + ch->id, + virt_chan ? virt_chan->name : "(none)", + ch->locked ? " LOCKED" : ""); spin_unlock_irqrestore(&ch->lock, flags); } @@ -1917,7 +1926,7 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id) } /* Initialize physical channels */ - pl08x->phy_chans = kmalloc((vd->channels * sizeof(*pl08x->phy_chans)), + pl08x->phy_chans = kzalloc((vd->channels * sizeof(*pl08x->phy_chans)), GFP_KERNEL); if (!pl08x->phy_chans) { dev_err(&adev->dev, "%s failed to allocate " @@ -1932,8 +1941,23 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id) ch->id = i; ch->base = pl08x->base + PL080_Cx_BASE(i); spin_lock_init(&ch->lock); - ch->serving = NULL; ch->signal = -1; + + /* + * Nomadik variants can have channels that are locked + * down for the secure world only. Lock up these channels + * by perpetually serving a dummy virtual channel. + */ + if (vd->nomadik) { + u32 val; + + val = readl(ch->base + PL080_CH_CONFIG); + if (val & (PL080N_CONFIG_ITPROT | PL080N_CONFIG_SECPROT)) { + dev_info(&adev->dev, "physical channel %d reserved for secure access only\n", i); + ch->locked = true; + } + } + dev_dbg(&adev->dev, "physical channel %d is %s\n", i, pl08x_phy_channel_busy(ch) ? "BUSY" : "FREE"); } @@ -2016,6 +2040,12 @@ static struct vendor_data vendor_pl080 = { .dualmaster = true, }; +static struct vendor_data vendor_nomadik = { + .channels = 8, + .dualmaster = true, + .nomadik = true, +}; + static struct vendor_data vendor_pl081 = { .channels = 2, .dualmaster = false, @@ -2036,9 +2066,9 @@ static struct amba_id pl08x_ids[] = { }, /* Nomadik 8815 PL080 variant */ { - .id = 0x00280880, + .id = 0x00280080, .mask = 0x00ffffff, - .data = &vendor_pl080, + .data = &vendor_nomadik, }, { 0, 0 }, }; -- cgit v1.2.2 From 7560e3f3581ed415828d3f431b8622fa38c2d133 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:30:06 +0100 Subject: dmaengine i.MX SDMA: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/dma/imx-sdma.c | 40 ++++++++++++++++++++++++++++------------ 1 file changed, 28 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index d3e38e28bb6b..fddccae6b476 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -322,7 +322,8 @@ struct sdma_engine { struct sdma_context_data *context; dma_addr_t context_phys; struct dma_device dma_device; - struct clk *clk; + struct clk *clk_ipg; + struct clk *clk_ahb; struct mutex channel_0_lock; struct sdma_script_start_addrs *script_addrs; }; @@ -859,7 +860,8 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan) sdmac->peripheral_type = data->peripheral_type; sdmac->event_id0 = data->dma_request; - clk_enable(sdmac->sdma->clk); + clk_enable(sdmac->sdma->clk_ipg); + clk_enable(sdmac->sdma->clk_ahb); ret = sdma_request_channel(sdmac); if (ret) @@ -896,7 +898,8 @@ static void sdma_free_chan_resources(struct dma_chan *chan) dma_free_coherent(NULL, PAGE_SIZE, sdmac->bd, sdmac->bd_phys); - clk_disable(sdma->clk); + clk_disable(sdma->clk_ipg); + clk_disable(sdma->clk_ahb); } static struct dma_async_tx_descriptor *sdma_prep_slave_sg( @@ -1169,12 +1172,14 @@ static void sdma_load_firmware(const struct firmware *fw, void *context) addr = (void *)header + header->script_addrs_start; ram_code = (void *)header + header->ram_code_start; - clk_enable(sdma->clk); + clk_enable(sdma->clk_ipg); + clk_enable(sdma->clk_ahb); /* download the RAM image for SDMA */ sdma_load_script(sdma, ram_code, header->ram_code_size, addr->ram_code_start_addr); - clk_disable(sdma->clk); + clk_disable(sdma->clk_ipg); + clk_disable(sdma->clk_ahb); sdma_add_scripts(sdma, addr); @@ -1216,7 +1221,8 @@ static int __init sdma_init(struct sdma_engine *sdma) return -ENODEV; } - clk_enable(sdma->clk); + clk_enable(sdma->clk_ipg); + clk_enable(sdma->clk_ahb); /* Be sure SDMA has not started yet */ writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); @@ -1269,12 +1275,14 @@ static int __init sdma_init(struct sdma_engine *sdma) /* Initializes channel's priorities */ sdma_set_channel_priority(&sdma->channel[0], 7); - clk_disable(sdma->clk); + clk_disable(sdma->clk_ipg); + clk_disable(sdma->clk_ahb); return 0; err_dma_alloc: - clk_disable(sdma->clk); + clk_disable(sdma->clk_ipg); + clk_disable(sdma->clk_ahb); dev_err(sdma->dev, "initialisation failed with %d\n", ret); return ret; } @@ -1313,12 +1321,21 @@ static int __init sdma_probe(struct platform_device *pdev) goto err_request_region; } - sdma->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(sdma->clk)) { - ret = PTR_ERR(sdma->clk); + sdma->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(sdma->clk_ipg)) { + ret = PTR_ERR(sdma->clk_ipg); goto err_clk; } + sdma->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(sdma->clk_ahb)) { + ret = PTR_ERR(sdma->clk_ahb); + goto err_clk; + } + + clk_prepare(sdma->clk_ipg); + clk_prepare(sdma->clk_ahb); + sdma->regs = ioremap(iores->start, resource_size(iores)); if (!sdma->regs) { ret = -ENOMEM; @@ -1426,7 +1443,6 @@ err_alloc: err_request_irq: iounmap(sdma->regs); err_ioremap: - clk_put(sdma->clk); err_clk: release_mem_region(iores->start, resource_size(iores)); err_request_region: -- cgit v1.2.2 From aa29d840e3138fdf9459cc1e0101d6f25f8a48f4 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:30:22 +0100 Subject: spi i.MX: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/spi/spi-imx.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 570f22053be8..4b6688630b9c 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -85,7 +85,8 @@ struct spi_imx_data { struct completion xfer_done; void __iomem *base; int irq; - struct clk *clk; + struct clk *clk_per; + struct clk *clk_ipg; unsigned long spi_clk; unsigned int count; @@ -845,15 +846,22 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) goto out_iounmap; } - spi_imx->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(spi_imx->clk)) { - dev_err(&pdev->dev, "unable to get clock\n"); - ret = PTR_ERR(spi_imx->clk); + spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(spi_imx->clk_ipg)) { + ret = PTR_ERR(spi_imx->clk_ipg); goto out_free_irq; } - clk_enable(spi_imx->clk); - spi_imx->spi_clk = clk_get_rate(spi_imx->clk); + spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); + if (IS_ERR(spi_imx->clk_per)) { + ret = PTR_ERR(spi_imx->clk_per); + goto out_free_irq; + } + + clk_prepare_enable(spi_imx->clk_per); + clk_prepare_enable(spi_imx->clk_ipg); + + spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); spi_imx->devtype_data->reset(spi_imx); @@ -871,8 +879,8 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) return ret; out_clk_put: - clk_disable(spi_imx->clk); - clk_put(spi_imx->clk); + clk_disable_unprepare(spi_imx->clk_per); + clk_disable_unprepare(spi_imx->clk_ipg); out_free_irq: free_irq(spi_imx->irq, spi_imx); out_iounmap: @@ -900,8 +908,8 @@ static int __devexit spi_imx_remove(struct platform_device *pdev) spi_bitbang_stop(&spi_imx->bitbang); writel(0, spi_imx->base + MXC_CSPICTRL); - clk_disable(spi_imx->clk); - clk_put(spi_imx->clk); + clk_disable_unprepare(spi_imx->clk_per); + clk_disable_unprepare(spi_imx->clk_ipg); free_irq(spi_imx->irq, spi_imx); iounmap(spi_imx->base); -- cgit v1.2.2 From 13aaea03b9e33af420a327b7ab800332d6fbabf5 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:30:36 +0100 Subject: video imxfb: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/video/imxfb.c | 50 +++++++++++++++++++++++++++++++++++--------------- 1 file changed, 35 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index f135dbead07d..caad3689b4e6 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -131,7 +131,9 @@ struct imxfb_rgb { struct imxfb_info { struct platform_device *pdev; void __iomem *regs; - struct clk *clk; + struct clk *clk_ipg; + struct clk *clk_ahb; + struct clk *clk_per; /* * These are the addresses we mapped @@ -340,7 +342,7 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); - lcd_clk = clk_get_rate(fbi->clk); + lcd_clk = clk_get_rate(fbi->clk_per); tmp = var->pixclock * (unsigned long long)lcd_clk; @@ -455,11 +457,17 @@ static int imxfb_bl_update_status(struct backlight_device *bl) fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; - if (bl->props.fb_blank != FB_BLANK_UNBLANK) - clk_enable(fbi->clk); + if (bl->props.fb_blank != FB_BLANK_UNBLANK) { + clk_prepare_enable(fbi->clk_ipg); + clk_prepare_enable(fbi->clk_ahb); + clk_prepare_enable(fbi->clk_per); + } writel(fbi->pwmr, fbi->regs + LCDC_PWMR); - if (bl->props.fb_blank != FB_BLANK_UNBLANK) - clk_disable(fbi->clk); + if (bl->props.fb_blank != FB_BLANK_UNBLANK) { + clk_disable_unprepare(fbi->clk_per); + clk_disable_unprepare(fbi->clk_ahb); + clk_disable_unprepare(fbi->clk_ipg); + } return 0; } @@ -522,7 +530,9 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) */ writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR); - clk_enable(fbi->clk); + clk_prepare_enable(fbi->clk_ipg); + clk_prepare_enable(fbi->clk_ahb); + clk_prepare_enable(fbi->clk_per); if (fbi->backlight_power) fbi->backlight_power(1); @@ -539,7 +549,9 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) if (fbi->lcd_power) fbi->lcd_power(0); - clk_disable(fbi->clk); + clk_disable_unprepare(fbi->clk_per); + clk_disable_unprepare(fbi->clk_ipg); + clk_disable_unprepare(fbi->clk_ahb); writel(0, fbi->regs + LCDC_RMCR); } @@ -770,10 +782,21 @@ static int __init imxfb_probe(struct platform_device *pdev) goto failed_req; } - fbi->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(fbi->clk)) { - ret = PTR_ERR(fbi->clk); - dev_err(&pdev->dev, "unable to get clock: %d\n", ret); + fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(fbi->clk_ipg)) { + ret = PTR_ERR(fbi->clk_ipg); + goto failed_getclock; + } + + fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(fbi->clk_ahb)) { + ret = PTR_ERR(fbi->clk_ahb); + goto failed_getclock; + } + + fbi->clk_per = devm_clk_get(&pdev->dev, "per"); + if (IS_ERR(fbi->clk_per)) { + ret = PTR_ERR(fbi->clk_per); goto failed_getclock; } @@ -858,7 +881,6 @@ failed_platform_init: failed_map: iounmap(fbi->regs); failed_ioremap: - clk_put(fbi->clk); failed_getclock: release_mem_region(res->start, resource_size(res)); failed_req: @@ -895,8 +917,6 @@ static int __devexit imxfb_remove(struct platform_device *pdev) iounmap(fbi->regs); release_mem_region(res->start, resource_size(res)); - clk_disable(fbi->clk); - clk_put(fbi->clk); platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From f4d40de39a23f0c39cca55ac63e1175c69c3d2f7 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:30:49 +0100 Subject: net fec: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/net/ethernet/freescale/fec.c | 35 +++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c index a12b3f5bc025..b2494637cb60 100644 --- a/drivers/net/ethernet/freescale/fec.c +++ b/drivers/net/ethernet/freescale/fec.c @@ -206,7 +206,8 @@ struct fec_enet_private { struct net_device *netdev; - struct clk *clk; + struct clk *clk_ipg; + struct clk *clk_ahb; /* The saved address of a sent-in-place packet/buffer, for skfree(). */ unsigned char *tx_bounce[TX_RING_SIZE]; @@ -1064,7 +1065,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) * Reference Manual has an error on this, and gets fixed on i.MX6Q * document. */ - fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000); + fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ahb), 5000000); if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) fep->phy_speed--; fep->phy_speed <<= 1; @@ -1609,12 +1610,20 @@ fec_probe(struct platform_device *pdev) } } - fep->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(fep->clk)) { - ret = PTR_ERR(fep->clk); + fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(fep->clk_ipg)) { + ret = PTR_ERR(fep->clk_ipg); goto failed_clk; } - clk_prepare_enable(fep->clk); + + fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(fep->clk_ahb)) { + ret = PTR_ERR(fep->clk_ahb); + goto failed_clk; + } + + clk_prepare_enable(fep->clk_ahb); + clk_prepare_enable(fep->clk_ipg); ret = fec_enet_init(ndev); if (ret) @@ -1637,8 +1646,8 @@ failed_register: fec_enet_mii_remove(fep); failed_mii_init: failed_init: - clk_disable_unprepare(fep->clk); - clk_put(fep->clk); + clk_disable_unprepare(fep->clk_ahb); + clk_disable_unprepare(fep->clk_ipg); failed_clk: for (i = 0; i < FEC_IRQ_NUM; i++) { irq = platform_get_irq(pdev, i); @@ -1670,8 +1679,8 @@ fec_drv_remove(struct platform_device *pdev) if (irq > 0) free_irq(irq, ndev); } - clk_disable_unprepare(fep->clk); - clk_put(fep->clk); + clk_disable_unprepare(fep->clk_ahb); + clk_disable_unprepare(fep->clk_ipg); iounmap(fep->hwp); free_netdev(ndev); @@ -1695,7 +1704,8 @@ fec_suspend(struct device *dev) fec_stop(ndev); netif_device_detach(ndev); } - clk_disable_unprepare(fep->clk); + clk_disable_unprepare(fep->clk_ahb); + clk_disable_unprepare(fep->clk_ipg); return 0; } @@ -1706,7 +1716,8 @@ fec_resume(struct device *dev) struct net_device *ndev = dev_get_drvdata(dev); struct fec_enet_private *fep = netdev_priv(ndev); - clk_prepare_enable(fep->clk); + clk_prepare_enable(fep->clk_ahb); + clk_prepare_enable(fep->clk_ipg); if (netif_running(ndev)) { fec_restart(ndev, fep->full_duplex); netif_device_attach(ndev); -- cgit v1.2.2 From 529aa29e033f3bcd3346de1532e4bd5ff969fd0d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:31:14 +0100 Subject: mmc mxcmmc: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/mmc/host/mxcmmc.c | 39 +++++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index b2058b432320..28ed52d58f7f 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -136,7 +136,8 @@ struct mxcmci_host { u16 rev_no; unsigned int cmdat; - struct clk *clk; + struct clk *clk_ipg; + struct clk *clk_per; int clock; @@ -672,7 +673,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) { unsigned int divider; int prescaler = 0; - unsigned int clk_in = clk_get_rate(host->clk); + unsigned int clk_in = clk_get_rate(host->clk_per); while (prescaler <= 0x800) { for (divider = 1; divider <= 0xF; divider++) { @@ -900,12 +901,20 @@ static int mxcmci_probe(struct platform_device *pdev) host->res = r; host->irq = irq; - host->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(host->clk)) { - ret = PTR_ERR(host->clk); + host->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(host->clk_ipg)) { + ret = PTR_ERR(host->clk_ipg); goto out_iounmap; } - clk_enable(host->clk); + + host->clk_per = devm_clk_get(&pdev->dev, "per"); + if (IS_ERR(host->clk_per)) { + ret = PTR_ERR(host->clk_per); + goto out_iounmap; + } + + clk_prepare_enable(host->clk_per); + clk_prepare_enable(host->clk_ipg); mxcmci_softreset(host); @@ -917,8 +926,8 @@ static int mxcmci_probe(struct platform_device *pdev) goto out_clk_put; } - mmc->f_min = clk_get_rate(host->clk) >> 16; - mmc->f_max = clk_get_rate(host->clk) >> 1; + mmc->f_min = clk_get_rate(host->clk_per) >> 16; + mmc->f_max = clk_get_rate(host->clk_per) >> 1; /* recommended in data sheet */ writew(0x2db4, host->base + MMC_REG_READ_TO); @@ -967,8 +976,8 @@ out_free_dma: if (host->dma) dma_release_channel(host->dma); out_clk_put: - clk_disable(host->clk); - clk_put(host->clk); + clk_disable_unprepare(host->clk_per); + clk_disable_unprepare(host->clk_ipg); out_iounmap: iounmap(host->base); out_free: @@ -999,8 +1008,8 @@ static int mxcmci_remove(struct platform_device *pdev) if (host->dma) dma_release_channel(host->dma); - clk_disable(host->clk); - clk_put(host->clk); + clk_disable_unprepare(host->clk_per); + clk_disable_unprepare(host->clk_ipg); release_mem_region(host->res->start, resource_size(host->res)); @@ -1018,7 +1027,8 @@ static int mxcmci_suspend(struct device *dev) if (mmc) ret = mmc_suspend_host(mmc); - clk_disable(host->clk); + clk_disable_unprepare(host->clk_per); + clk_disable_unprepare(host->clk_ipg); return ret; } @@ -1029,7 +1039,8 @@ static int mxcmci_resume(struct device *dev) struct mxcmci_host *host = mmc_priv(mmc); int ret = 0; - clk_enable(host->clk); + clk_prepare_enable(host->clk_per); + clk_prepare_enable(host->clk_ipg); if (mmc) ret = mmc_resume_host(mmc); -- cgit v1.2.2 From 52dac6150580f356a96b9a49715f6234fbf00d3a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:31:34 +0100 Subject: mmc sdhc i.MX: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++++++++++++++++++++++++++++---------- 1 file changed, 31 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 8abdaf6697a8..ce83d6191f4a 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -69,6 +69,9 @@ struct pltfm_imx_data { u32 scratchpad; enum imx_esdhc_type devtype; struct esdhc_platform_data boarddata; + struct clk *clk_ipg; + struct clk *clk_ahb; + struct clk *clk_per; }; static struct platform_device_id imx_esdhc_devtype[] = { @@ -437,7 +440,6 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host; struct sdhci_host *host; struct esdhc_platform_data *boarddata; - struct clk *clk; int err; struct pltfm_imx_data *imx_data; @@ -458,14 +460,29 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev) imx_data->devtype = pdev->id_entry->driver_data; pltfm_host->priv = imx_data; - clk = clk_get(mmc_dev(host->mmc), NULL); - if (IS_ERR(clk)) { - dev_err(mmc_dev(host->mmc), "clk err\n"); - err = PTR_ERR(clk); + imx_data->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(imx_data->clk_ipg)) { + err = PTR_ERR(imx_data->clk_ipg); goto err_clk_get; } - clk_prepare_enable(clk); - pltfm_host->clk = clk; + + imx_data->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(imx_data->clk_ahb)) { + err = PTR_ERR(imx_data->clk_ahb); + goto err_clk_get; + } + + imx_data->clk_per = devm_clk_get(&pdev->dev, "per"); + if (IS_ERR(imx_data->clk_per)) { + err = PTR_ERR(imx_data->clk_per); + goto err_clk_get; + } + + pltfm_host->clk = imx_data->clk_per; + + clk_prepare_enable(imx_data->clk_per); + clk_prepare_enable(imx_data->clk_ipg); + clk_prepare_enable(imx_data->clk_ahb); host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; @@ -558,8 +575,9 @@ no_card_detect_irq: gpio_free(boarddata->wp_gpio); no_card_detect_pin: no_board_data: - clk_disable_unprepare(pltfm_host->clk); - clk_put(pltfm_host->clk); + clk_disable_unprepare(imx_data->clk_per); + clk_disable_unprepare(imx_data->clk_ipg); + clk_disable_unprepare(imx_data->clk_ahb); err_clk_get: kfree(imx_data); err_imx_data: @@ -585,8 +603,10 @@ static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev) gpio_free(boarddata->cd_gpio); } - clk_disable_unprepare(pltfm_host->clk); - clk_put(pltfm_host->clk); + clk_disable_unprepare(imx_data->clk_per); + clk_disable_unprepare(imx_data->clk_ipg); + clk_disable_unprepare(imx_data->clk_ahb); + kfree(imx_data); sdhci_pltfm_free(pdev); -- cgit v1.2.2 From 3a9465fa2dc42a8ebc2fe9144f4dfa23d5899f85 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 09:31:43 +0100 Subject: serial i.MX: do not depend on grouped clocks the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer --- drivers/tty/serial/imx.c | 38 +++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index e7feceeebc2f..267ec6da5af2 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -204,7 +204,8 @@ struct imx_port { unsigned int irda_inv_rx:1; unsigned int irda_inv_tx:1; unsigned short trcv_delay; /* transceiver delay */ - struct clk *clk; + struct clk *clk_ipg; + struct clk *clk_per; struct imx_uart_data *devdata; }; @@ -672,7 +673,7 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) * RFDIV is set such way to satisfy requested uartclk value */ val = TXTL << 10 | RXTL; - ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) + ufcr_rfdiv = (clk_get_rate(sport->clk_per) + sport->port.uartclk / 2) / sport->port.uartclk; if(!ufcr_rfdiv) @@ -1285,7 +1286,7 @@ imx_console_get_options(struct imx_port *sport, int *baud, else ucfr_rfdiv = 6 - ucfr_rfdiv; - uartclk = clk_get_rate(sport->clk); + uartclk = clk_get_rate(sport->clk_per); uartclk /= ucfr_rfdiv; { /* @@ -1503,14 +1504,22 @@ static int serial_imx_probe(struct platform_device *pdev) sport->timer.function = imx_timeout; sport->timer.data = (unsigned long)sport; - sport->clk = clk_get(&pdev->dev, "uart"); - if (IS_ERR(sport->clk)) { - ret = PTR_ERR(sport->clk); + sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(sport->clk_ipg)) { + ret = PTR_ERR(sport->clk_ipg); goto unmap; } - clk_prepare_enable(sport->clk); - sport->port.uartclk = clk_get_rate(sport->clk); + sport->clk_per = devm_clk_get(&pdev->dev, "per"); + if (IS_ERR(sport->clk_per)) { + ret = PTR_ERR(sport->clk_per); + goto unmap; + } + + clk_prepare_enable(sport->clk_per); + clk_prepare_enable(sport->clk_ipg); + + sport->port.uartclk = clk_get_rate(sport->clk_per); imx_ports[sport->port.line] = sport; @@ -1531,8 +1540,8 @@ deinit: if (pdata && pdata->exit) pdata->exit(pdev); clkput: - clk_disable_unprepare(sport->clk); - clk_put(sport->clk); + clk_disable_unprepare(sport->clk_per); + clk_disable_unprepare(sport->clk_ipg); unmap: iounmap(sport->port.membase); free: @@ -1550,11 +1559,10 @@ static int serial_imx_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - if (sport) { - uart_remove_one_port(&imx_reg, &sport->port); - clk_disable_unprepare(sport->clk); - clk_put(sport->clk); - } + uart_remove_one_port(&imx_reg, &sport->port); + + clk_disable_unprepare(sport->clk_per); + clk_disable_unprepare(sport->clk_ipg); if (pdata && pdata->exit) pdata->exit(pdev); -- cgit v1.2.2 From 97c3213fd9fc28c0e86b69df09f4228424cafecc Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 20:56:35 +0100 Subject: mtd mxc_nand: prepare/unprepare clock Signed-off-by: Sascha Hauer --- drivers/mtd/nand/mxc_nand.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index cc0678a967c1..9e374e9bd296 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -690,7 +690,7 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip) if (chip == -1) { /* Disable the NFC clock */ if (host->clk_act) { - clk_disable(host->clk); + clk_disable_unprepare(host->clk); host->clk_act = 0; } return; @@ -698,7 +698,7 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip) if (!host->clk_act) { /* Enable the NFC clock */ - clk_enable(host->clk); + clk_prepare_enable(host->clk); host->clk_act = 1; } @@ -1078,7 +1078,7 @@ static int __init mxcnd_probe(struct platform_device *pdev) goto eclk; } - clk_enable(host->clk); + clk_prepare_enable(host->clk); host->clk_act = 1; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- cgit v1.2.2 From 198ad2cecde16ce309a65f2fddd5f6d3442f8250 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 20:58:21 +0100 Subject: USB ehci mxc: prepare/unprepare clock Signed-off-by: Sascha Hauer --- drivers/usb/host/ehci-mxc.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index a797d51ecbe8..ae16c346389c 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -171,7 +171,7 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) ret = PTR_ERR(priv->usbclk); goto err_clk; } - clk_enable(priv->usbclk); + clk_prepare_enable(priv->usbclk); if (!cpu_is_mx35() && !cpu_is_mx25()) { priv->ahbclk = clk_get(dev, "usb_ahb"); @@ -179,7 +179,7 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) ret = PTR_ERR(priv->ahbclk); goto err_clk_ahb; } - clk_enable(priv->ahbclk); + clk_prepare_enable(priv->ahbclk); } /* "dr" device has its own clock on i.MX51 */ @@ -189,7 +189,7 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) ret = PTR_ERR(priv->phy1clk); goto err_clk_phy; } - clk_enable(priv->phy1clk); + clk_prepare_enable(priv->phy1clk); } @@ -266,16 +266,16 @@ err_add: pdata->exit(pdev); err_init: if (priv->phy1clk) { - clk_disable(priv->phy1clk); + clk_disable_unprepare(priv->phy1clk); clk_put(priv->phy1clk); } err_clk_phy: if (priv->ahbclk) { - clk_disable(priv->ahbclk); + clk_disable_unprepare(priv->ahbclk); clk_put(priv->ahbclk); } err_clk_ahb: - clk_disable(priv->usbclk); + clk_disable_unprepare(priv->usbclk); clk_put(priv->usbclk); err_clk: iounmap(hcd->regs); @@ -307,14 +307,14 @@ static int __exit ehci_mxc_drv_remove(struct platform_device *pdev) usb_put_hcd(hcd); platform_set_drvdata(pdev, NULL); - clk_disable(priv->usbclk); + clk_disable_unprepare(priv->usbclk); clk_put(priv->usbclk); if (priv->ahbclk) { - clk_disable(priv->ahbclk); + clk_disable_unprepare(priv->ahbclk); clk_put(priv->ahbclk); } if (priv->phy1clk) { - clk_disable(priv->phy1clk); + clk_disable_unprepare(priv->phy1clk); clk_put(priv->phy1clk); } -- cgit v1.2.2 From c943740ccd7ccfc7e92c80d194d0a8a80ab7b55c Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 25 Apr 2012 16:39:06 +0200 Subject: USB ehci mxc: sanitize clock handling Every i.MX ehci controller has a ahb and a ipg clock, so request it on every SoC. Do not make a special case for the usb phy clock of the i.MX51. Just request it but make it optional. Signed-off-by: Sascha Hauer --- drivers/usb/host/ehci-mxc.c | 56 +++++++++++++++++++-------------------------- 1 file changed, 24 insertions(+), 32 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index ae16c346389c..c778ffe4e4e5 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -32,7 +32,7 @@ #define ULPI_VIEWPORT_OFFSET 0x170 struct ehci_mxc_priv { - struct clk *usbclk, *ahbclk, *phy1clk; + struct clk *usbclk, *ahbclk, *phyclk; struct usb_hcd *hcd; }; @@ -166,31 +166,26 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) } /* enable clocks */ - priv->usbclk = clk_get(dev, "usb"); + priv->usbclk = clk_get(dev, "ipg"); if (IS_ERR(priv->usbclk)) { ret = PTR_ERR(priv->usbclk); goto err_clk; } clk_prepare_enable(priv->usbclk); - if (!cpu_is_mx35() && !cpu_is_mx25()) { - priv->ahbclk = clk_get(dev, "usb_ahb"); - if (IS_ERR(priv->ahbclk)) { - ret = PTR_ERR(priv->ahbclk); - goto err_clk_ahb; - } - clk_prepare_enable(priv->ahbclk); + priv->ahbclk = clk_get(dev, "ahb"); + if (IS_ERR(priv->ahbclk)) { + ret = PTR_ERR(priv->ahbclk); + goto err_clk_ahb; } + clk_prepare_enable(priv->ahbclk); /* "dr" device has its own clock on i.MX51 */ - if (cpu_is_mx51() && (pdev->id == 0)) { - priv->phy1clk = clk_get(dev, "usb_phy1"); - if (IS_ERR(priv->phy1clk)) { - ret = PTR_ERR(priv->phy1clk); - goto err_clk_phy; - } - clk_prepare_enable(priv->phy1clk); - } + priv->phyclk = clk_get(dev, "phy"); + if (IS_ERR(priv->phyclk)) + priv->phyclk = NULL; + if (priv->phyclk) + clk_prepare_enable(priv->phyclk); /* call platform specific init function */ @@ -265,15 +260,13 @@ err_add: if (pdata && pdata->exit) pdata->exit(pdev); err_init: - if (priv->phy1clk) { - clk_disable_unprepare(priv->phy1clk); - clk_put(priv->phy1clk); - } -err_clk_phy: - if (priv->ahbclk) { - clk_disable_unprepare(priv->ahbclk); - clk_put(priv->ahbclk); + if (priv->phyclk) { + clk_disable_unprepare(priv->phyclk); + clk_put(priv->phyclk); } + + clk_disable_unprepare(priv->ahbclk); + clk_put(priv->ahbclk); err_clk_ahb: clk_disable_unprepare(priv->usbclk); clk_put(priv->usbclk); @@ -309,13 +302,12 @@ static int __exit ehci_mxc_drv_remove(struct platform_device *pdev) clk_disable_unprepare(priv->usbclk); clk_put(priv->usbclk); - if (priv->ahbclk) { - clk_disable_unprepare(priv->ahbclk); - clk_put(priv->ahbclk); - } - if (priv->phy1clk) { - clk_disable_unprepare(priv->phy1clk); - clk_put(priv->phy1clk); + clk_disable_unprepare(priv->ahbclk); + clk_put(priv->ahbclk); + + if (priv->phyclk) { + clk_disable_unprepare(priv->phyclk); + clk_put(priv->phyclk); } kfree(priv); -- cgit v1.2.2 From 60178b6329259457013d0e39cbee22aec0230dfb Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 7 Mar 2012 20:59:36 +0100 Subject: w1 i.MX: prepare/unprepare clock Signed-off-by: Sascha Hauer --- drivers/w1/masters/mxc_w1.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c index a3b6a74c67a7..1cc61a700fa8 100644 --- a/drivers/w1/masters/mxc_w1.c +++ b/drivers/w1/masters/mxc_w1.c @@ -138,7 +138,7 @@ static int __devinit mxc_w1_probe(struct platform_device *pdev) goto failed_ioremap; } - clk_enable(mdev->clk); + clk_prepare_enable(mdev->clk); __raw_writeb(mdev->clkdiv, mdev->regs + MXC_W1_TIME_DIVIDER); mdev->bus_master.data = mdev; @@ -178,7 +178,7 @@ static int __devexit mxc_w1_remove(struct platform_device *pdev) iounmap(mdev->regs); release_mem_region(res->start, resource_size(res)); - clk_disable(mdev->clk); + clk_disable_unprepare(mdev->clk); clk_put(mdev->clk); platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From 4e7b6c9a6b4700cf121a0d5924f193db83cbd008 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 3 Apr 2012 12:34:57 +0200 Subject: watchdog imx2: prepare clk before enabling it Signed-off-by: Sascha Hauer --- drivers/watchdog/imx2_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c index 7a2b734fcdc7..bcfab2b00ad2 100644 --- a/drivers/watchdog/imx2_wdt.c +++ b/drivers/watchdog/imx2_wdt.c @@ -121,7 +121,7 @@ static void imx2_wdt_start(void) { if (!test_and_set_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { /* at our first start we enable clock and do initialisations */ - clk_enable(imx2_wdt.clk); + clk_prepare_enable(imx2_wdt.clk); imx2_wdt_setup(); } else /* delete the timer that pings the watchdog after close */ -- cgit v1.2.2 From fdf7748b9f8d392a086560616bf112f0ba0c1f71 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 3 Apr 2012 12:35:16 +0200 Subject: media mx3 camera: prepare clk before enabling it Signed-off-by: Sascha Hauer --- drivers/media/video/mx3_camera.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c index 93c35ef5f0ad..e2e33df868de 100644 --- a/drivers/media/video/mx3_camera.c +++ b/drivers/media/video/mx3_camera.c @@ -508,7 +508,7 @@ static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam, /* ipu_csi_init_interface() */ csi_reg_write(mx3_cam, conf, CSI_SENS_CONF); - clk_enable(mx3_cam->clk); + clk_prepare_enable(mx3_cam->clk); rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk); dev_dbg(icd->parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate); if (rate) @@ -549,7 +549,7 @@ static void mx3_camera_remove_device(struct soc_camera_device *icd) *ichan = NULL; } - clk_disable(mx3_cam->clk); + clk_disable_unprepare(mx3_cam->clk); mx3_cam->icd = NULL; -- cgit v1.2.2 From 4fa030a43ddb0d8fe3f2530d6162c11a3b3d31de Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Sun, 18 Mar 2012 23:48:13 +0100 Subject: dmaengine i.MX ipu: clk_prepare/unprepare clock Signed-off-by: Sascha Hauer --- drivers/dma/ipu/ipu_idmac.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c index 62e3f8ec2461..5ec72044ea4c 100644 --- a/drivers/dma/ipu/ipu_idmac.c +++ b/drivers/dma/ipu/ipu_idmac.c @@ -1715,7 +1715,7 @@ static int __init ipu_probe(struct platform_device *pdev) } /* Make sure IPU HSP clock is running */ - clk_enable(ipu_data.ipu_clk); + clk_prepare_enable(ipu_data.ipu_clk); /* Disable all interrupts */ idmac_write_ipureg(&ipu_data, 0, IPU_INT_CTRL_1); @@ -1747,7 +1747,7 @@ static int __init ipu_probe(struct platform_device *pdev) err_idmac_init: err_attach_irq: ipu_irq_detach_irq(&ipu_data, pdev); - clk_disable(ipu_data.ipu_clk); + clk_disable_unprepare(ipu_data.ipu_clk); clk_put(ipu_data.ipu_clk); err_clk_get: iounmap(ipu_data.reg_ic); @@ -1765,7 +1765,7 @@ static int __exit ipu_remove(struct platform_device *pdev) ipu_idmac_exit(ipu); ipu_irq_detach_irq(ipu, pdev); - clk_disable(ipu->ipu_clk); + clk_disable_unprepare(ipu->ipu_clk); clk_put(ipu->ipu_clk); iounmap(ipu->reg_ic); iounmap(ipu->reg_ipu); -- cgit v1.2.2 From 4ec8c7f52654cdbb13770d04dc76f9a4615cd4e1 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 25 Apr 2012 16:35:16 +0200 Subject: rtc: imx dryice: Add missing clk_prepare prepare the clock before enabling it. Signed-off-by: Sascha Hauer --- drivers/rtc/rtc-imxdi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-imxdi.c b/drivers/rtc/rtc-imxdi.c index d93a9608b1f0..891cd6c61d0a 100644 --- a/drivers/rtc/rtc-imxdi.c +++ b/drivers/rtc/rtc-imxdi.c @@ -405,7 +405,7 @@ static int dryice_rtc_probe(struct platform_device *pdev) imxdi->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(imxdi->clk)) return PTR_ERR(imxdi->clk); - clk_enable(imxdi->clk); + clk_prepare_enable(imxdi->clk); /* * Initialize dryice hardware @@ -470,7 +470,7 @@ static int dryice_rtc_probe(struct platform_device *pdev) return 0; err: - clk_disable(imxdi->clk); + clk_disable_unprepare(imxdi->clk); clk_put(imxdi->clk); return rc; @@ -487,7 +487,7 @@ static int __devexit dryice_rtc_remove(struct platform_device *pdev) rtc_device_unregister(imxdi->rtc); - clk_disable(imxdi->clk); + clk_disable_unprepare(imxdi->clk); clk_put(imxdi->clk); return 0; -- cgit v1.2.2 From aa607ebf93a5fc26275a575781399df971dd1b91 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 12 Apr 2012 15:46:49 -0600 Subject: ARM: tegra: add USB ULPI PHY reset GPIO to device tree ULPI PHYs have a reset signal, and different boards use a different GPIO for this task. Add a property to device tree to represent this. I'm not sure if adding this property to the EHCI controller node is entirely correct; perhaps eventually we should have explicit separate nodes for the various PHYs. However, we don't have that right now, so this binding seems like a reasonable choice. Cc: Cc: Greg Kroah-Hartman Cc: Signed-off-by: Stephen Warren --- drivers/usb/host/ehci-tegra.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 9692bef159f5..14532fe04f5e 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -708,8 +708,9 @@ static int tegra_ehci_probe(struct platform_device *pdev) } } - tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config, - TEGRA_USB_PHY_MODE_HOST); + tegra->phy = tegra_usb_phy_open(&pdev->dev, instance, hcd->regs, + pdata->phy_config, + TEGRA_USB_PHY_MODE_HOST); if (IS_ERR(tegra->phy)) { dev_err(&pdev->dev, "Failed to open USB phy\n"); err = -ENXIO; -- cgit v1.2.2 From 6ce34a5fb4955fac1eebe080e1c2784bc8710449 Mon Sep 17 00:00:00 2001 From: Chao Xie Date: Sun, 1 Apr 2012 10:08:01 +0800 Subject: Input: pxa27x_keypad keep clock on as wakeup source When the keypad is used as wake up source, the clock can not be disabled. Or it can not detect key pressing. If the keypad is used as wake up source, when resume back, do not enable the clock and configure it again because the register content is retained. Signed-off-by: Chao Xie Signed-off-by: Haojian Zhuang --- drivers/input/keyboard/pxa27x_keypad.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index 29fe1b2be1c1..b07771e83063 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c @@ -399,7 +399,7 @@ static int pxa27x_keypad_open(struct input_dev *dev) struct pxa27x_keypad *keypad = input_get_drvdata(dev); /* Enable unit clock */ - clk_enable(keypad->clk); + clk_prepare_enable(keypad->clk); pxa27x_keypad_config(keypad); return 0; @@ -410,7 +410,7 @@ static void pxa27x_keypad_close(struct input_dev *dev) struct pxa27x_keypad *keypad = input_get_drvdata(dev); /* Disable clock unit */ - clk_disable(keypad->clk); + clk_disable_unprepare(keypad->clk); } #ifdef CONFIG_PM @@ -419,10 +419,14 @@ static int pxa27x_keypad_suspend(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct pxa27x_keypad *keypad = platform_get_drvdata(pdev); - clk_disable(keypad->clk); - + /* + * If the keypad is used a wake up source, clock can not be disabled. + * Or it can not detect the key pressing. + */ if (device_may_wakeup(&pdev->dev)) enable_irq_wake(keypad->irq); + else + clk_disable_unprepare(keypad->clk); return 0; } @@ -433,19 +437,24 @@ static int pxa27x_keypad_resume(struct device *dev) struct pxa27x_keypad *keypad = platform_get_drvdata(pdev); struct input_dev *input_dev = keypad->input_dev; - if (device_may_wakeup(&pdev->dev)) + /* + * If the keypad is used as wake up source, the clock is not turned + * off. So do not need configure it again. + */ + if (device_may_wakeup(&pdev->dev)) { disable_irq_wake(keypad->irq); + } else { + mutex_lock(&input_dev->mutex); - mutex_lock(&input_dev->mutex); + if (input_dev->users) { + /* Enable unit clock */ + clk_prepare_enable(keypad->clk); + pxa27x_keypad_config(keypad); + } - if (input_dev->users) { - /* Enable unit clock */ - clk_enable(keypad->clk); - pxa27x_keypad_config(keypad); + mutex_unlock(&input_dev->mutex); } - mutex_unlock(&input_dev->mutex); - return 0; } -- cgit v1.2.2 From 5545fa897a0a1a34249e98ea4244b256cbe58df3 Mon Sep 17 00:00:00 2001 From: Chao Xie Date: Sun, 1 Apr 2012 10:08:02 +0800 Subject: Input: pxa27x_keypad bug fix for direct_key_mask When direcct_key_num is 0, the mask should be 0. When direcct_key_num is 1, the mask should be 0b1. Signed-off-by: Chao Xie Signed-off-by: Haojian Zhuang --- drivers/input/keyboard/pxa27x_keypad.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index b07771e83063..5d717202aad8 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c @@ -383,7 +383,7 @@ static void pxa27x_keypad_config(struct pxa27x_keypad *keypad) if (pdata->direct_key_num > direct_key_num) direct_key_num = pdata->direct_key_num; - keypad->direct_key_mask = ((2 << direct_key_num) - 1) & ~mask; + keypad->direct_key_mask = ((1 << direct_key_num) - 1) & ~mask; /* enable direct key */ if (direct_key_num) -- cgit v1.2.2 From ee1d8040a6b0a8106c7d9e80b9193077224493ba Mon Sep 17 00:00:00 2001 From: Chao Xie Date: Sun, 1 Apr 2012 10:08:03 +0800 Subject: Input: pxa27x_keypad direct key may be low active KPDK_DK only indicates the pin level of direct key. So it is related to board, and low level may be active which indicates that a key is pressed. Signed-off-by: Chao Xie Signed-off-by: Haojian Zhuang --- drivers/input/keyboard/pxa27x_keypad.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index 5d717202aad8..a60f14e7983e 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c @@ -311,7 +311,15 @@ static void pxa27x_keypad_scan_direct(struct pxa27x_keypad *keypad) if (pdata->enable_rotary0 || pdata->enable_rotary1) pxa27x_keypad_scan_rotary(keypad); - new_state = KPDK_DK(kpdk) & keypad->direct_key_mask; + /* + * The KPDR_DK only output the key pin level, so it relates to board, + * and low level may be active. + */ + if (pdata->direct_key_low_active) + new_state = ~KPDK_DK(kpdk) & keypad->direct_key_mask; + else + new_state = KPDK_DK(kpdk) & keypad->direct_key_mask; + bits_changed = keypad->direct_key_state ^ new_state; if (bits_changed == 0) -- cgit v1.2.2 From fb054bf26914ee4c55cf149bc5b2a8e2c89fb81f Mon Sep 17 00:00:00 2001 From: Chao Xie Date: Sun, 1 Apr 2012 10:08:04 +0800 Subject: Input: pxa27x_keypad add choice to set direct_key_mask Direct keys usage may not start from KP_DKIN0, add a msk option to configure the specifics for platforms that can skip some keys. Signed-off-by: Chao Xie Signed-off-by: Haojian Zhuang --- drivers/input/keyboard/pxa27x_keypad.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index a60f14e7983e..7f7b72464a37 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c @@ -391,7 +391,14 @@ static void pxa27x_keypad_config(struct pxa27x_keypad *keypad) if (pdata->direct_key_num > direct_key_num) direct_key_num = pdata->direct_key_num; - keypad->direct_key_mask = ((1 << direct_key_num) - 1) & ~mask; + /* + * Direct keys usage may not start from KP_DKIN0, check the platfrom + * mask data to config the specific. + */ + if (pdata->direct_key_mask) + keypad->direct_key_mask = pdata->direct_key_mask; + else + keypad->direct_key_mask = ((1 << direct_key_num) - 1) & ~mask; /* enable direct key */ if (direct_key_num) -- cgit v1.2.2 From f4bf7cf4cab90c98fe68a7afa12fb72790fd04bf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 30 Mar 2012 22:04:56 +0200 Subject: mfd: Mark const init data with __initconst instead of __initdata for ab5500 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As long as there is no other non-const variable marked __initdata in the same compilation unit it doesn't hurt. If there were one however compilation would fail with error: $variablename causes a section type conflict because a section containing const variables is marked read only and so cannot contain non-const variables. Signed-off-by: Uwe Kleine-König Signed-off-by: Samuel Ortiz --- drivers/mfd/ab5500-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/ab5500-core.c b/drivers/mfd/ab5500-core.c index 54d0fe40845f..3765c769df19 100644 --- a/drivers/mfd/ab5500-core.c +++ b/drivers/mfd/ab5500-core.c @@ -1291,7 +1291,7 @@ struct ab_family_id { char *name; }; -static const struct ab_family_id ids[] __initdata = { +static const struct ab_family_id ids[] __initconst = { /* AB5500 */ { .id = AB5500_1_0, -- cgit v1.2.2 From 4630b130b30be6420394ba31121e111c8771ca08 Mon Sep 17 00:00:00 2001 From: Aaron Sierra Date: Wed, 28 Mar 2012 09:43:10 -0500 Subject: mfd: Add LPC driver for Intel ICH chipsets This driver currently creates resources for use by a forthcoming ICH chipset GPIO driver. It could be expanded to create the resources for converting the esb2rom (mtd) and iTCO_wdt (wdt), and potentially more, drivers to use the mfd model. Signed-off-by: Aaron Sierra Signed-off-by: Guenter Roeck Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 9 + drivers/mfd/Makefile | 1 + drivers/mfd/lpc_ich.c | 719 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 729 insertions(+) create mode 100644 drivers/mfd/lpc_ich.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 11e44386fa9b..c6edba69678a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -748,6 +748,15 @@ config LPC_SCH LPC bridge function of the Intel SCH provides support for System Management Bus and General Purpose I/O. +config LPC_ICH + tristate "Intel ICH LPC" + depends on PCI + select MFD_CORE + help + The LPC bridge function of the Intel ICH provides support for + many functional units. This driver provides needed support for + other drivers to control these functions, currently GPIO. + config MFD_RDC321X tristate "Support for RDC-R321x southbridge" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 05fa538c5efe..c4500c35d5ba 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -99,6 +99,7 @@ obj-$(CONFIG_MFD_DB5500_PRCMU) += db5500-prcmu.o obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o obj-$(CONFIG_PMIC_ADP5520) += adp5520.o obj-$(CONFIG_LPC_SCH) += lpc_sch.o +obj-$(CONFIG_LPC_ICH) += lpc_ich.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c new file mode 100644 index 000000000000..7e3a7b6ab022 --- /dev/null +++ b/drivers/mfd/lpc_ich.c @@ -0,0 +1,719 @@ +/* + * lpc_ich.c - LPC interface for Intel ICH + * + * LPC bridge function of the Intel ICH contains many other + * functional units, such as Interrupt controllers, Timers, + * Power Management, System Management, GPIO, RTC, and LPC + * Configuration Registers. + * + * This driver is derived from lpc_sch. + + * Copyright (c) 2011 Extreme Engineering Solution, Inc. + * Author: Aaron Sierra + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * This driver supports the following I/O Controller hubs: + * (See the intel documentation on http://developer.intel.com.) + * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) + * document number 290687-002, 298242-027: 82801BA (ICH2) + * document number 290733-003, 290739-013: 82801CA (ICH3-S) + * document number 290716-001, 290718-007: 82801CAM (ICH3-M) + * document number 290744-001, 290745-025: 82801DB (ICH4) + * document number 252337-001, 252663-008: 82801DBM (ICH4-M) + * document number 273599-001, 273645-002: 82801E (C-ICH) + * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) + * document number 300641-004, 300884-013: 6300ESB + * document number 301473-002, 301474-026: 82801F (ICH6) + * document number 313082-001, 313075-006: 631xESB, 632xESB + * document number 307013-003, 307014-024: 82801G (ICH7) + * document number 322896-001, 322897-001: NM10 + * document number 313056-003, 313057-017: 82801H (ICH8) + * document number 316972-004, 316973-012: 82801I (ICH9) + * document number 319973-002, 319974-002: 82801J (ICH10) + * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) + * document number 320066-003, 320257-008: EP80597 (IICH) + * document number 324645-001, 324646-001: Cougar Point (CPT) + * document number TBD : Patsburg (PBG) + * document number TBD : DH89xxCC + * document number TBD : Panther Point + * document number TBD : Lynx Point + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define ACPIBASE 0x40 +#define ACPIBASE_GPE_OFF 0x28 +#define ACPIBASE_GPE_END 0x2f +#define ACPICTRL 0x44 + +#define GPIOBASE 0x48 +#define GPIOCTRL 0x4C + +static int lpc_ich_acpi_save = -1; +static int lpc_ich_gpio_save = -1; + +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +enum lpc_cells { + LPC_GPIO = 0, +}; + +static struct mfd_cell lpc_ich_cells[] = { + [LPC_GPIO] = { + .name = "gpio_ich", + .num_resources = ARRAY_SIZE(gpio_ich_res), + .resources = gpio_ich_res, + .ignore_resource_conflicts = true, + }, +}; + +/* chipset related info */ +enum lpc_chipsets { + LPC_ICH = 0, /* ICH */ + LPC_ICH0, /* ICH0 */ + LPC_ICH2, /* ICH2 */ + LPC_ICH2M, /* ICH2-M */ + LPC_ICH3, /* ICH3-S */ + LPC_ICH3M, /* ICH3-M */ + LPC_ICH4, /* ICH4 */ + LPC_ICH4M, /* ICH4-M */ + LPC_CICH, /* C-ICH */ + LPC_ICH5, /* ICH5 & ICH5R */ + LPC_6300ESB, /* 6300ESB */ + LPC_ICH6, /* ICH6 & ICH6R */ + LPC_ICH6M, /* ICH6-M */ + LPC_ICH6W, /* ICH6W & ICH6RW */ + LPC_631XESB, /* 631xESB/632xESB */ + LPC_ICH7, /* ICH7 & ICH7R */ + LPC_ICH7DH, /* ICH7DH */ + LPC_ICH7M, /* ICH7-M & ICH7-U */ + LPC_ICH7MDH, /* ICH7-M DH */ + LPC_NM10, /* NM10 */ + LPC_ICH8, /* ICH8 & ICH8R */ + LPC_ICH8DH, /* ICH8DH */ + LPC_ICH8DO, /* ICH8DO */ + LPC_ICH8M, /* ICH8M */ + LPC_ICH8ME, /* ICH8M-E */ + LPC_ICH9, /* ICH9 */ + LPC_ICH9R, /* ICH9R */ + LPC_ICH9DH, /* ICH9DH */ + LPC_ICH9DO, /* ICH9DO */ + LPC_ICH9M, /* ICH9M */ + LPC_ICH9ME, /* ICH9M-E */ + LPC_ICH10, /* ICH10 */ + LPC_ICH10R, /* ICH10R */ + LPC_ICH10D, /* ICH10D */ + LPC_ICH10DO, /* ICH10DO */ + LPC_PCH, /* PCH Desktop Full Featured */ + LPC_PCHM, /* PCH Mobile Full Featured */ + LPC_P55, /* P55 */ + LPC_PM55, /* PM55 */ + LPC_H55, /* H55 */ + LPC_QM57, /* QM57 */ + LPC_H57, /* H57 */ + LPC_HM55, /* HM55 */ + LPC_Q57, /* Q57 */ + LPC_HM57, /* HM57 */ + LPC_PCHMSFF, /* PCH Mobile SFF Full Featured */ + LPC_QS57, /* QS57 */ + LPC_3400, /* 3400 */ + LPC_3420, /* 3420 */ + LPC_3450, /* 3450 */ + LPC_EP80579, /* EP80579 */ + LPC_CPT, /* Cougar Point */ + LPC_CPTD, /* Cougar Point Desktop */ + LPC_CPTM, /* Cougar Point Mobile */ + LPC_PBG, /* Patsburg */ + LPC_DH89XXCC, /* DH89xxCC */ + LPC_PPT, /* Panther Point */ + LPC_LPT, /* Lynx Point */ +}; + +struct lpc_ich_info lpc_chipset_info[] __devinitdata = { + [LPC_ICH] = { + .name = "ICH", + }, + [LPC_ICH0] = { + .name = "ICH0", + }, + [LPC_ICH2] = { + .name = "ICH2", + }, + [LPC_ICH2M] = { + .name = "ICH2-M", + }, + [LPC_ICH3] = { + .name = "ICH3-S", + }, + [LPC_ICH3M] = { + .name = "ICH3-M", + }, + [LPC_ICH4] = { + .name = "ICH4", + }, + [LPC_ICH4M] = { + .name = "ICH4-M", + }, + [LPC_CICH] = { + .name = "C-ICH", + }, + [LPC_ICH5] = { + .name = "ICH5 or ICH5R", + }, + [LPC_6300ESB] = { + .name = "6300ESB", + }, + [LPC_ICH6] = { + .name = "ICH6 or ICH6R", + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6M] = { + .name = "ICH6-M", + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6W] = { + .name = "ICH6W or ICH6RW", + .gpio_version = ICH_V6_GPIO, + }, + [LPC_631XESB] = { + .name = "631xESB/632xESB", + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH7] = { + .name = "ICH7 or ICH7R", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7DH] = { + .name = "ICH7DH", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7M] = { + .name = "ICH7-M or ICH7-U", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7MDH] = { + .name = "ICH7-M DH", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_NM10] = { + .name = "NM10", + }, + [LPC_ICH8] = { + .name = "ICH8 or ICH8R", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DH] = { + .name = "ICH8DH", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DO] = { + .name = "ICH8DO", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8M] = { + .name = "ICH8M", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8ME] = { + .name = "ICH8M-E", + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH9] = { + .name = "ICH9", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9R] = { + .name = "ICH9R", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DH] = { + .name = "ICH9DH", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DO] = { + .name = "ICH9DO", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9M] = { + .name = "ICH9M", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9ME] = { + .name = "ICH9M-E", + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH10] = { + .name = "ICH10", + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10R] = { + .name = "ICH10R", + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10D] = { + .name = "ICH10D", + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_ICH10DO] = { + .name = "ICH10DO", + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_PCH] = { + .name = "PCH Desktop Full Featured", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHM] = { + .name = "PCH Mobile Full Featured", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_P55] = { + .name = "P55", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PM55] = { + .name = "PM55", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H55] = { + .name = "H55", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QM57] = { + .name = "QM57", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H57] = { + .name = "H57", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM55] = { + .name = "HM55", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_Q57] = { + .name = "Q57", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM57] = { + .name = "HM57", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHMSFF] = { + .name = "PCH Mobile SFF Full Featured", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QS57] = { + .name = "QS57", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3400] = { + .name = "3400", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3420] = { + .name = "3420", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3450] = { + .name = "3450", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_EP80579] = { + .name = "EP80579", + }, + [LPC_CPT] = { + .name = "Cougar Point", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTD] = { + .name = "Cougar Point Desktop", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTM] = { + .name = "Cougar Point Mobile", + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PBG] = { + .name = "Patsburg", + }, + [LPC_DH89XXCC] = { + .name = "DH89xxCC", + }, + [LPC_PPT] = { + .name = "Panther Point", + }, + [LPC_LPT] = { + .name = "Lynx Point", + }, +}; + +/* + * This data only exists for exporting the supported PCI ids + * via MODULE_DEVICE_TABLE. We do not actually register a + * pci_driver, because the I/O Controller Hub has also other + * functions that probably will be registered by other drivers. + */ +static DEFINE_PCI_DEVICE_TABLE(lpc_ich_ids) = { + { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, + { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0}, + { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2}, + { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M}, + { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3}, + { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M}, + { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4}, + { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M}, + { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH}, + { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5}, + { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB}, + { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6}, + { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M}, + { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W}, + { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7}, + { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH}, + { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M}, + { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH}, + { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10}, + { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8}, + { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH}, + { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO}, + { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M}, + { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME}, + { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9}, + { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R}, + { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH}, + { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO}, + { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M}, + { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME}, + { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10}, + { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R}, + { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D}, + { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO}, + { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH}, + { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM}, + { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55}, + { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55}, + { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55}, + { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57}, + { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57}, + { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55}, + { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57}, + { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57}, + { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF}, + { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57}, + { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400}, + { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, + { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, + { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, + { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD}, + { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM}, + { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC}, + { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c43), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c44), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c45), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c46), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c47), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c48), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c49), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4f), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c50), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c51), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c52), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c53), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c54), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c55), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c56), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c57), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c58), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c59), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, + { 0, }, /* End of list */ +}; +MODULE_DEVICE_TABLE(pci, lpc_ich_ids); + +static void lpc_ich_restore_config_space(struct pci_dev *dev) +{ + if (lpc_ich_acpi_save >= 0) { + pci_write_config_byte(dev, ACPICTRL, lpc_ich_acpi_save); + lpc_ich_acpi_save = -1; + } + + if (lpc_ich_gpio_save >= 0) { + pci_write_config_byte(dev, GPIOCTRL, lpc_ich_gpio_save); + lpc_ich_gpio_save = -1; + } +} + +static void __devinit lpc_ich_enable_acpi_space(struct pci_dev *dev) +{ + u8 reg_save; + + pci_read_config_byte(dev, ACPICTRL, ®_save); + pci_write_config_byte(dev, ACPICTRL, reg_save | 0x10); + lpc_ich_acpi_save = reg_save; +} + +static void __devinit lpc_ich_enable_gpio_space(struct pci_dev *dev) +{ + u8 reg_save; + + pci_read_config_byte(dev, GPIOCTRL, ®_save); + pci_write_config_byte(dev, GPIOCTRL, reg_save | 0x10); + lpc_ich_gpio_save = reg_save; +} + +static void __devinit lpc_ich_finalize_cell(struct mfd_cell *cell, + const struct pci_device_id *id) +{ + cell->platform_data = &lpc_chipset_info[id->driver_data]; + cell->pdata_size = sizeof(struct lpc_ich_info); +} + +static int __devinit lpc_ich_init_gpio(struct pci_dev *dev, + const struct pci_device_id *id) +{ + u32 base_addr_cfg; + u32 base_addr; + int ret; + bool acpi_conflict = false; + struct resource *res; + + /* Setup power management base register */ + pci_read_config_dword(dev, ACPIBASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_err(&dev->dev, "I/O space for ACPI uninitialized\n"); + lpc_ich_cells[LPC_GPIO].num_resources--; + goto gpe0_done; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr + ACPIBASE_GPE_OFF; + res->end = base_addr + ACPIBASE_GPE_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + /* + * This isn't fatal for the GPIO, but we have to make sure that + * the platform_device subsystem doesn't see this resource + * or it will register an invalid region. + */ + lpc_ich_cells[LPC_GPIO].num_resources--; + acpi_conflict = true; + } else { + lpc_ich_enable_acpi_space(dev); + } + +gpe0_done: + /* Setup GPIO base register */ + pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_err(&dev->dev, "I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto gpio_done; + } + + /* Older devices provide fewer GPIO and have a smaller resource size. */ + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + switch (lpc_chipset_info[id->driver_data].gpio_version) { + case ICH_V5_GPIO: + case ICH_V10CORP_GPIO: + res->end = res->start + 128 - 1; + break; + default: + res->end = res->start + 64 - 1; + break; + } + + ret = acpi_check_resource_conflict(res); + if (ret) { + /* this isn't necessarily fatal for the GPIO */ + acpi_conflict = true; + goto gpio_done; + } + lpc_ich_enable_gpio_space(dev); + + lpc_ich_finalize_cell(&lpc_ich_cells[LPC_GPIO], id); + ret = mfd_add_devices(&dev->dev, -1, &lpc_ich_cells[LPC_GPIO], + 1, NULL, 0); + +gpio_done: + if (acpi_conflict) + pr_warn("Resource conflict(s) found affecting %s\n", + lpc_ich_cells[LPC_GPIO].name); + return ret; +} + +static int __devinit lpc_ich_probe(struct pci_dev *dev, + const struct pci_device_id *id) +{ + int ret; + bool cell_added = false; + + ret = lpc_ich_init_gpio(dev, id); + if (!ret) + cell_added = true; + + /* + * We only care if at least one or none of the cells registered + * successfully. + */ + if (!cell_added) { + lpc_ich_restore_config_space(dev); + return -ENODEV; + } + + return 0; +} + +static void __devexit lpc_ich_remove(struct pci_dev *dev) +{ + mfd_remove_devices(&dev->dev); + lpc_ich_restore_config_space(dev); +} + +static struct pci_driver lpc_ich_driver = { + .name = "lpc_ich", + .id_table = lpc_ich_ids, + .probe = lpc_ich_probe, + .remove = __devexit_p(lpc_ich_remove), +}; + +static int __init lpc_ich_init(void) +{ + return pci_register_driver(&lpc_ich_driver); +} + +static void __exit lpc_ich_exit(void) +{ + pci_unregister_driver(&lpc_ich_driver); +} + +module_init(lpc_ich_init); +module_exit(lpc_ich_exit); + +MODULE_AUTHOR("Aaron Sierra "); +MODULE_DESCRIPTION("LPC interface for Intel ICH"); +MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 6ed9f9c405f97cb7cda485f589cfa6c2bb3fb78e Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 18 Apr 2012 09:48:24 -0500 Subject: gpio: Add support for Intel ICHx/3100/Series[56] GPIO This driver works on many Intel chipsets, including the ICH6, ICH7, ICH8, ICH9, ICH10, 3100, Series 5/3400 (Ibex Peak), Series 6/C200 (Cougar Point), and NM10 (Tiger Point). Additional Intel chipsets should be easily supported if needed, eg the ICH1-5, EP80579, etc. Tested on QM67 (Cougar Point), QM57 (Ibex Peak), 3100 (Whitmore Lake), and NM10 (Tiger Point). Includes work from Jean Delvare: - Resource leak removal during module load/unload - GPIO API bit value enforcement Also includes code cleanup from Guenter Roeck and Grant Likely. Signed-off-by: Peter Tyser Signed-off-by: Aaron Sierra Acked-by: Grant Likely Signed-off-by: Samuel Ortiz --- drivers/gpio/Kconfig | 13 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ich.c | 419 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 433 insertions(+) create mode 100644 drivers/gpio/gpio-ich.c (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e03653d69357..a0d57964d31c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -178,6 +178,19 @@ config GPIO_SCH The Intel Tunnel Creek processor has 5 GPIOs powered by the core power rail and 9 from suspend power supply. +config GPIO_ICH + tristate "Intel ICH GPIO" + depends on PCI && X86 + select MFD_CORE + select LPC_ICH + help + Say yes here to support the GPIO functionality of a number of Intel + ICH-based chipsets. Currently supported devices: ICH6, ICH7, ICH8 + ICH9, ICH10, Series 5/3400 (eg Ibex Peak), Series 6/C200 (eg + Cougar Point), NM10 (Tiger Point), and 3100 (Whitmore Lake). + + If unsure, say N. + config GPIO_VX855 tristate "VIA VX855/VX875 GPIO" depends on PCI diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 007f54bd0081..183c42b61cef 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o +obj-$(CONFIG_GPIO_ICH) += gpio-ich.o obj-$(CONFIG_GPIO_IT8761E) += gpio-it8761e.o obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c new file mode 100644 index 000000000000..b7c06517403d --- /dev/null +++ b/drivers/gpio/gpio-ich.c @@ -0,0 +1,419 @@ +/* + * Intel ICH6-10, Series 5 and 6 GPIO driver + * + * Copyright (C) 2010 Extreme Engineering Solutions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include + +#define DRV_NAME "gpio_ich" + +/* + * GPIO register offsets in GPIO I/O space. + * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and + * LVLx registers. Logic in the read/write functions takes a register and + * an absolute bit number and determines the proper register offset and bit + * number in that register. For example, to read the value of GPIO bit 50 + * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)], + * bit 18 (50%32). + */ +enum GPIO_REG { + GPIO_USE_SEL = 0, + GPIO_IO_SEL, + GPIO_LVL, +}; + +static const u8 ichx_regs[3][3] = { + {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ + {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ + {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ +}; + +#define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct ichx_desc { + /* Max GPIO pins the chipset can have */ + uint ngpio; + + /* Whether the chipset has GPIO in GPE0_STS in the PM IO region */ + bool uses_gpe0; + + /* USE_SEL is bogus on some chipsets, eg 3100 */ + u32 use_sel_ignore[3]; + + /* Some chipsets have quirks, let these use their own request/get */ + int (*request)(struct gpio_chip *chip, unsigned offset); + int (*get)(struct gpio_chip *chip, unsigned offset); +}; + +static struct { + spinlock_t lock; + struct platform_device *dev; + struct gpio_chip chip; + struct resource *gpio_base; /* GPIO IO base */ + struct resource *pm_base; /* Power Mangagment IO base */ + struct ichx_desc *desc; /* Pointer to chipset-specific description */ + u32 orig_gpio_ctrl; /* Orig CTRL value, used to restore on exit */ +} ichx_priv; + +static int modparam_gpiobase = -1; /* dynamic */ +module_param_named(gpiobase, modparam_gpiobase, int, 0444); +MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, " + "which is the default."); + +static int ichx_write_bit(int reg, unsigned nr, int val, int verify) +{ + unsigned long flags; + u32 data, tmp; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + int ret = 0; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + data = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base); + if (val) + data |= 1 << bit; + else + data &= ~(1 << bit); + ICHX_WRITE(data, ichx_regs[reg][reg_nr], ichx_priv.gpio_base); + tmp = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base); + if (verify && data != tmp) + ret = -EPERM; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return ret; +} + +static int ichx_read_bit(int reg, unsigned nr) +{ + unsigned long flags; + u32 data; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + data = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base); + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return data & (1 << bit) ? 1 : 0; +} + +static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) +{ + /* + * Try setting pin as an input and verify it worked since many pins + * are output-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, + int val) +{ + /* Set GPIO output value. */ + ichx_write_bit(GPIO_LVL, nr, val, 0); + + /* + * Try setting pin as an output and verify it worked since many pins + * are input-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + return ichx_read_bit(GPIO_LVL, nr); +} + +static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + unsigned long flags; + u32 data; + + /* + * GPI 0 - 15 need to be read from the power management registers on + * a ICH6/3100 bridge. + */ + if (nr < 16) { + if (!ichx_priv.pm_base) + return -ENXIO; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + /* GPI 0 - 15 are latched, write 1 to clear*/ + ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); + data = ICHX_READ(0, ichx_priv.pm_base); + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return (data >> 16) & (1 << nr) ? 1 : 0; + } else { + return ichx_gpio_get(chip, nr); + } +} + +static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + /* + * Note we assume the BIOS properly set a bridge's USE value. Some + * chips (eg Intel 3100) have bogus USE values though, so first see if + * the chipset's USE value can be trusted for this specific bit. + * If it can't be trusted, assume that the pin can be used as a GPIO. + */ + if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) + return 1; + + return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; +} + +static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + /* + * Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100 + * bridge as they are controlled by USE register bits 0 and 1. See + * "Table 704 GPIO_USE_SEL1 register" in the i3100 datasheet for + * additional info. + */ + if (nr == 16 || nr == 17) + nr -= 16; + + return ichx_gpio_request(chip, nr); +} + +static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val) +{ + ichx_write_bit(GPIO_LVL, nr, val, 0); +} + +static void __devinit ichx_gpiolib_setup(struct gpio_chip *chip) +{ + chip->owner = THIS_MODULE; + chip->label = DRV_NAME; + chip->dev = &ichx_priv.dev->dev; + + /* Allow chip-specific overrides of request()/get() */ + chip->request = ichx_priv.desc->request ? + ichx_priv.desc->request : ichx_gpio_request; + chip->get = ichx_priv.desc->get ? + ichx_priv.desc->get : ichx_gpio_get; + + chip->set = ichx_gpio_set; + chip->direction_input = ichx_gpio_direction_input; + chip->direction_output = ichx_gpio_direction_output; + chip->base = modparam_gpiobase; + chip->ngpio = ichx_priv.desc->ngpio; + chip->can_sleep = 0; + chip->dbg_show = NULL; +} + +/* ICH6-based, 631xesb-based */ +static struct ichx_desc ich6_desc = { + /* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, +}; + +/* Intel 3100 */ +static struct ichx_desc i3100_desc = { + /* + * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on + * the Intel 3100. See "Table 712. GPIO Summary Table" of 3100 + * Datasheet for more info. + */ + .use_sel_ignore = {0x00130000, 0x00010000, 0x0}, + + /* The 3100 needs fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, +}; + +/* ICH7 and ICH8-based */ +static struct ichx_desc ich7_desc = { + .ngpio = 50, +}; + +/* ICH9-based */ +static struct ichx_desc ich9_desc = { + .ngpio = 61, +}; + +/* ICH10-based - Consumer/corporate versions have different amount of GPIO */ +static struct ichx_desc ich10_cons_desc = { + .ngpio = 61, +}; +static struct ichx_desc ich10_corp_desc = { + .ngpio = 72, +}; + +/* Intel 5 series, 6 series, 3400 series, and C200 series */ +static struct ichx_desc intel5_desc = { + .ngpio = 76, +}; + +static int __devinit ichx_gpio_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_pm; + int err; + struct lpc_ich_info *ich_info = pdev->dev.platform_data; + + if (!ich_info) + return -ENODEV; + + ichx_priv.dev = pdev; + + switch (ich_info->gpio_version) { + case ICH_I3100_GPIO: + ichx_priv.desc = &i3100_desc; + break; + case ICH_V5_GPIO: + ichx_priv.desc = &intel5_desc; + break; + case ICH_V6_GPIO: + ichx_priv.desc = &ich6_desc; + break; + case ICH_V7_GPIO: + ichx_priv.desc = &ich7_desc; + break; + case ICH_V9_GPIO: + ichx_priv.desc = &ich9_desc; + break; + case ICH_V10CORP_GPIO: + ichx_priv.desc = &ich10_corp_desc; + break; + case ICH_V10CONS_GPIO: + ichx_priv.desc = &ich10_cons_desc; + break; + default: + return -ENODEV; + } + + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); + if (!res_base || !res_base->start || !res_base->end) + return -ENODEV; + + if (!request_region(res_base->start, resource_size(res_base), + pdev->name)) + return -EBUSY; + + ichx_priv.gpio_base = res_base; + + /* + * If necessary, determine the I/O address of ACPI/power management + * registers which are needed to read the the GPE0 register for GPI pins + * 0 - 15 on some chipsets. + */ + if (!ichx_priv.desc->uses_gpe0) + goto init; + + res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); + if (!res_pm) { + pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + goto init; + } + + if (!request_region(res_pm->start, resource_size(res_pm), + pdev->name)) { + pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + goto init; + } + + ichx_priv.pm_base = res_pm; + +init: + ichx_gpiolib_setup(&ichx_priv.chip); + err = gpiochip_add(&ichx_priv.chip); + if (err) { + pr_err("Failed to register GPIOs\n"); + goto add_err; + } + + pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + + return 0; + +add_err: + release_region(ichx_priv.gpio_base->start, + resource_size(ichx_priv.gpio_base)); + if (ichx_priv.pm_base) + release_region(ichx_priv.pm_base->start, + resource_size(ichx_priv.pm_base)); + return err; +} + +static int __devexit ichx_gpio_remove(struct platform_device *pdev) +{ + int err; + + err = gpiochip_remove(&ichx_priv.chip); + if (err) { + dev_err(&pdev->dev, "%s failed, %d\n", + "gpiochip_remove()", err); + return err; + } + + release_region(ichx_priv.gpio_base->start, + resource_size(ichx_priv.gpio_base)); + if (ichx_priv.pm_base) + release_region(ichx_priv.pm_base->start, + resource_size(ichx_priv.pm_base)); + + return 0; +} + +static struct platform_driver ichx_gpio_driver = { + .driver = { + .owner = THIS_MODULE, + .name = DRV_NAME, + }, + .probe = ichx_gpio_probe, + .remove = __devexit_p(ichx_gpio_remove), +}; + +module_platform_driver(ichx_gpio_driver); + +MODULE_AUTHOR("Peter Tyser "); +MODULE_DESCRIPTION("GPIO interface for Intel ICH series"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); -- cgit v1.2.2 From 38a36f5a6ab893fac87ffd1b1c92a491dfd71ea1 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 3 Apr 2012 09:09:19 +0800 Subject: mfd: Use module_pci_driver This patch converts the drivers in drivers/mfd/* to use module_pci_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: Axel Lin Cc: Andres Salomon Cc: Ira W. Snyder Cc: Florian Fainelli Cc: Denis Turischev Cc: Harald Welte Signed-off-by: Samuel Ortiz --- drivers/mfd/cs5535-mfd.c | 13 +------------ drivers/mfd/janz-cmodio.c | 17 +---------------- drivers/mfd/lpc_sch.c | 13 +------------ drivers/mfd/rdc321x-southbridge.c | 13 +------------ drivers/mfd/vx855.c | 12 +----------- 5 files changed, 5 insertions(+), 63 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/cs5535-mfd.c b/drivers/mfd/cs5535-mfd.c index 315fef5d466a..3419e726de47 100644 --- a/drivers/mfd/cs5535-mfd.c +++ b/drivers/mfd/cs5535-mfd.c @@ -186,18 +186,7 @@ static struct pci_driver cs5535_mfd_driver = { .remove = __devexit_p(cs5535_mfd_remove), }; -static int __init cs5535_mfd_init(void) -{ - return pci_register_driver(&cs5535_mfd_driver); -} - -static void __exit cs5535_mfd_exit(void) -{ - pci_unregister_driver(&cs5535_mfd_driver); -} - -module_init(cs5535_mfd_init); -module_exit(cs5535_mfd_exit); +module_pci_driver(cs5535_mfd_driver); MODULE_AUTHOR("Andres Salomon "); MODULE_DESCRIPTION("MFD driver for CS5535/CS5536 southbridge's ISA PCI device"); diff --git a/drivers/mfd/janz-cmodio.c b/drivers/mfd/janz-cmodio.c index a9223ed1b7c5..2ea99989551a 100644 --- a/drivers/mfd/janz-cmodio.c +++ b/drivers/mfd/janz-cmodio.c @@ -283,23 +283,8 @@ static struct pci_driver cmodio_pci_driver = { .remove = __devexit_p(cmodio_pci_remove), }; -/* - * Module Init / Exit - */ - -static int __init cmodio_init(void) -{ - return pci_register_driver(&cmodio_pci_driver); -} - -static void __exit cmodio_exit(void) -{ - pci_unregister_driver(&cmodio_pci_driver); -} +module_pci_driver(cmodio_pci_driver); MODULE_AUTHOR("Ira W. Snyder "); MODULE_DESCRIPTION("Janz CMOD-IO PCI MODULbus Carrier Board Driver"); MODULE_LICENSE("GPL"); - -module_init(cmodio_init); -module_exit(cmodio_exit); diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c index abc421364a45..27026eb924cd 100644 --- a/drivers/mfd/lpc_sch.c +++ b/drivers/mfd/lpc_sch.c @@ -167,18 +167,7 @@ static struct pci_driver lpc_sch_driver = { .remove = __devexit_p(lpc_sch_remove), }; -static int __init lpc_sch_init(void) -{ - return pci_register_driver(&lpc_sch_driver); -} - -static void __exit lpc_sch_exit(void) -{ - pci_unregister_driver(&lpc_sch_driver); -} - -module_init(lpc_sch_init); -module_exit(lpc_sch_exit); +module_pci_driver(lpc_sch_driver); MODULE_AUTHOR("Denis Turischev "); MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH"); diff --git a/drivers/mfd/rdc321x-southbridge.c b/drivers/mfd/rdc321x-southbridge.c index 809bd4a61089..685d61e431ad 100644 --- a/drivers/mfd/rdc321x-southbridge.c +++ b/drivers/mfd/rdc321x-southbridge.c @@ -108,18 +108,7 @@ static struct pci_driver rdc321x_sb_driver = { .remove = __devexit_p(rdc321x_sb_remove), }; -static int __init rdc321x_sb_init(void) -{ - return pci_register_driver(&rdc321x_sb_driver); -} - -static void __exit rdc321x_sb_exit(void) -{ - pci_unregister_driver(&rdc321x_sb_driver); -} - -module_init(rdc321x_sb_init); -module_exit(rdc321x_sb_exit); +module_pci_driver(rdc321x_sb_driver); MODULE_AUTHOR("Florian Fainelli "); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/vx855.c b/drivers/mfd/vx855.c index b73cc15e0081..872aff21e4be 100644 --- a/drivers/mfd/vx855.c +++ b/drivers/mfd/vx855.c @@ -131,17 +131,7 @@ static struct pci_driver vx855_pci_driver = { .remove = __devexit_p(vx855_remove), }; -static int vx855_init(void) -{ - return pci_register_driver(&vx855_pci_driver); -} -module_init(vx855_init); - -static void vx855_exit(void) -{ - pci_unregister_driver(&vx855_pci_driver); -} -module_exit(vx855_exit); +module_pci_driver(vx855_pci_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Harald Welte "); -- cgit v1.2.2 From 18996db262d0f1e79357315e033ace24488f92ad Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 5 Apr 2012 15:16:56 +0100 Subject: mfd: Cache wm8994 chip revision There's no need to mark the chip revision registers as volatile, it won't change at runtime so we can cache it from the device at startup. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8994-regmap.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-regmap.c b/drivers/mfd/wm8994-regmap.c index bfd25af6ecb1..52e9e2944940 100644 --- a/drivers/mfd/wm8994-regmap.c +++ b/drivers/mfd/wm8994-regmap.c @@ -1122,7 +1122,6 @@ static bool wm8994_volatile_register(struct device *dev, unsigned int reg) case WM8994_RATE_STATUS: case WM8958_MIC_DETECT_3: case WM8994_DC_SERVO_4E: - case WM8994_CHIP_REVISION: case WM8994_INTERRUPT_STATUS_1: case WM8994_INTERRUPT_STATUS_2: return true; -- cgit v1.2.2 From f22a9c6fd56f0a7b24ee43466e524ad4576c6dfd Mon Sep 17 00:00:00 2001 From: Paul Parsons Date: Thu, 5 Apr 2012 17:45:04 +0100 Subject: mfd: Add PCMCIA/CF support to asic3 This patch is part of a set which adds PCMCIA/CF support for the hx4700. This patch adds asic3_set_register() calls to: 1. Enable the PCMCIA/CF in asic3_probe(). 2. Disable the PCMCIA/CF in asic3_remove(). Signed-off-by: Paul Parsons Acked-by: Philipp Zabel Signed-off-by: Samuel Ortiz --- drivers/mfd/asic3.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 1582c3d95257..f75dc6733f49 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -1000,6 +1000,9 @@ static int __init asic3_probe(struct platform_device *pdev) asic3_mfd_probe(pdev, pdata, mem); + asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), + (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 1); + dev_info(asic->dev, "ASIC3 Core driver\n"); return 0; @@ -1021,6 +1024,9 @@ static int __devexit asic3_remove(struct platform_device *pdev) int ret; struct asic3 *asic = platform_get_drvdata(pdev); + asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), + (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 0); + asic3_mfd_remove(pdev); ret = asic3_gpio_remove(pdev); -- cgit v1.2.2 From e1277f45d8748ff59608b140780f75390cb5400c Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Mon, 9 Apr 2012 13:55:55 +0530 Subject: mfd: Add rc5t583's gpio in mfd device list Adding the gpio of RC583 in the list of rc583 mfd devices to register the gpio driver of RC5T583. Signed-off-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/rc5t583.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c index 44afae0a69ce..1cb4c356afd5 100644 --- a/drivers/mfd/rc5t583.c +++ b/drivers/mfd/rc5t583.c @@ -75,6 +75,7 @@ static struct deepsleep_control_data deepsleep_data[] = { (RC5T583_EXT_PWRREQ1_CONTROL | RC5T583_EXT_PWRREQ2_CONTROL) static struct mfd_cell rc5t583_subdevs[] = { + {.name = "rc5t583-gpio",}, {.name = "rc5t583-regulator",}, {.name = "rc5t583-rtc", }, {.name = "rc5t583-key", } -- cgit v1.2.2 From 4f304245bb6cfa665ff21b12c059499eafa8b725 Mon Sep 17 00:00:00 2001 From: Paul Parsons Date: Mon, 9 Apr 2012 13:18:31 +0100 Subject: mfd: Set asic3 DS1WM clock_rate The mfd/asic3 driver does not set the ds1wm_driver_data clock_rate field before passing the structure to the DS1WM w1 busmaster driver. This was not noticed before commit 26a6afb, because ds1wm_find_divisor() unintentionally returned the correct divisor when a zero clock_rate was passed in. However after that commit DS1WM fails a zero clock_rate: ds1wm ds1wm: no suitable divisor for 0Hz clock This patch sets the ds1wm_driver_data clock_rate field. Signed-off-by: Paul Parsons Acked-by: Philipp Zabel Signed-off-by: Samuel Ortiz --- drivers/mfd/asic3.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index f75dc6733f49..4c3ec8113e7e 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -894,10 +894,13 @@ static int __init asic3_mfd_probe(struct platform_device *pdev, asic3_mmc_resources[0].start >>= asic->bus_shift; asic3_mmc_resources[0].end >>= asic->bus_shift; - ret = mfd_add_devices(&pdev->dev, pdev->id, + if (pdata->clock_rate) { + ds1wm_pdata.clock_rate = pdata->clock_rate; + ret = mfd_add_devices(&pdev->dev, pdev->id, &asic3_cell_ds1wm, 1, mem, asic->irq_base); - if (ret < 0) - goto out; + if (ret < 0) + goto out; + } if (mem_sdio && (irq >= 0)) { ret = mfd_add_devices(&pdev->dev, pdev->id, -- cgit v1.2.2 From 1baf665b8167c0ab1240e76b1eae647d5ab60b23 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 10 Apr 2012 22:51:28 +0200 Subject: mfd: Remove redundant spi driver bus initialization In ancient times it was necessary to manually initialize the bus field of an spi_driver to spi_bus_type. These days this is done in spi_driver_register() so we can drop the manual assignment. The patch was generated using the following coccinelle semantic patch: // @@ identifier _driver; @@ struct spi_driver _driver = { .driver = { - .bus = &spi_bus_type, }, }; // Signed-off-by: Lars-Peter Clausen Cc: Srinidhi Kasagar Acked-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/da9052-spi.c | 1 - drivers/mfd/stmpe-spi.c | 1 - 2 files changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9052-spi.c b/drivers/mfd/da9052-spi.c index 6faf149e8d94..6e09498c2c80 100644 --- a/drivers/mfd/da9052-spi.c +++ b/drivers/mfd/da9052-spi.c @@ -88,7 +88,6 @@ static struct spi_driver da9052_spi_driver = { .id_table = da9052_spi_id, .driver = { .name = "da9052", - .bus = &spi_bus_type, .owner = THIS_MODULE, }, }; diff --git a/drivers/mfd/stmpe-spi.c b/drivers/mfd/stmpe-spi.c index b58c43c7ea93..afd459013ecb 100644 --- a/drivers/mfd/stmpe-spi.c +++ b/drivers/mfd/stmpe-spi.c @@ -122,7 +122,6 @@ MODULE_DEVICE_TABLE(spi, stmpe_id); static struct spi_driver stmpe_spi_driver = { .driver = { .name = "stmpe-spi", - .bus = &spi_bus_type, .owner = THIS_MODULE, #ifdef CONFIG_PM .pm = &stmpe_dev_pm_ops, -- cgit v1.2.2 From 2fe372fc2a037c8de0c721b45cd0e4e9c8d8c25e Mon Sep 17 00:00:00 2001 From: Paul Parsons Date: Wed, 11 Apr 2012 00:35:34 +0100 Subject: mfd: Avoid unbalanced asic3 irq wakeup enables/disables The mfd/asic3 driver does not currently define a irq_set_wake() handler. Consequently any attempt to configure the 3 ASIC3 GPIO buttons - RECORD, CALENDAR, HOME - as wakeup sources results in Unbalanced IRQ warnings when the system is woken from sleep mode: WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8() Unbalanced IRQ 342 wake disable ... WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8() Unbalanced IRQ 337 wake disable ... WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8() Unbalanced IRQ 339 wake disable ... This patch adds a irq_set_wake() handler to the mfd/asic3 driver. Signed-off-by: Paul Parsons Cc: Philipp Zabel Signed-off-by: Samuel Ortiz --- drivers/mfd/asic3.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 4c3ec8113e7e..9d4a492e4295 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -353,12 +353,28 @@ static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type) return 0; } +static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on) +{ + struct asic3 *asic = irq_data_get_irq_chip_data(data); + u32 bank, index; + u16 bit; + + bank = asic3_irq_to_bank(asic, data->irq); + index = asic3_irq_to_index(asic, data->irq); + bit = 1< Date: Thu, 12 Apr 2012 12:40:37 +0300 Subject: mfd: Convert Intel MSIC driver to use devm_* interfaces. The devm_* functions eliminate the need for manual resource releasing and simplify error handling. Resources allocated by devm_* are freed automatically on driver detach. Signed-off-by: Pasi Savanainen Acked-by: Mika Westerberg Signed-off-by: Samuel Ortiz --- drivers/mfd/intel_msic.c | 31 +++++-------------------------- 1 file changed, 5 insertions(+), 26 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/intel_msic.c b/drivers/mfd/intel_msic.c index b76657eb0c51..59df5584cb58 100644 --- a/drivers/mfd/intel_msic.c +++ b/drivers/mfd/intel_msic.c @@ -406,7 +406,7 @@ static int __devinit intel_msic_probe(struct platform_device *pdev) return -ENXIO; } - msic = kzalloc(sizeof(*msic), GFP_KERNEL); + msic = devm_kzalloc(&pdev->dev, sizeof(*msic), GFP_KERNEL); if (!msic) return -ENOMEM; @@ -421,21 +421,13 @@ static int __devinit intel_msic_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "failed to get SRAM iomem resource\n"); - ret = -ENODEV; - goto fail_free_msic; + return -ENODEV; } - res = request_mem_region(res->start, resource_size(res), pdev->name); - if (!res) { - ret = -EBUSY; - goto fail_free_msic; - } - - msic->irq_base = ioremap_nocache(res->start, resource_size(res)); + msic->irq_base = devm_request_and_ioremap(&pdev->dev, res); if (!msic->irq_base) { dev_err(&pdev->dev, "failed to map SRAM memory\n"); - ret = -ENOMEM; - goto fail_release_region; + return -ENOMEM; } platform_set_drvdata(pdev, msic); @@ -443,7 +435,7 @@ static int __devinit intel_msic_probe(struct platform_device *pdev) ret = intel_msic_init_devices(msic); if (ret) { dev_err(&pdev->dev, "failed to initialize MSIC devices\n"); - goto fail_unmap_mem; + return ret; } dev_info(&pdev->dev, "Intel MSIC version %c%d (vendor %#x)\n", @@ -451,27 +443,14 @@ static int __devinit intel_msic_probe(struct platform_device *pdev) msic->vendor); return 0; - -fail_unmap_mem: - iounmap(msic->irq_base); -fail_release_region: - release_mem_region(res->start, resource_size(res)); -fail_free_msic: - kfree(msic); - - return ret; } static int __devexit intel_msic_remove(struct platform_device *pdev) { struct intel_msic *msic = platform_get_drvdata(pdev); - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); intel_msic_remove_devices(msic); platform_set_drvdata(pdev, NULL); - iounmap(msic->irq_base); - release_mem_region(res->start, resource_size(res)); - kfree(msic); return 0; } -- cgit v1.2.2 From 58d114b669d2b86aa79eac6688590c808072579b Mon Sep 17 00:00:00 2001 From: "Ying-Chun Liu (PaulLiu)" Date: Mon, 16 Apr 2012 00:01:50 +0800 Subject: mfd: Add device-tree support for da9502 i2c driver This patch adds device-tree support for dialog MFD and the binding documentations. Signed-off-by: Ying-Chun Liu (PaulLiu) Cc: Samuel Ortiz Cc: Mark Brown Cc: Shawn Guo Cc: Ashish Jangam Signed-off-by: Samuel Ortiz --- drivers/mfd/da9052-i2c.c | 50 ++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index 36b88e395499..d8abdb35161e 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -22,6 +22,11 @@ #include #include +#ifdef CONFIG_OF +#include +#include +#endif + static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) { int reg_val, ret; @@ -41,6 +46,24 @@ static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) return 0; } +static struct i2c_device_id da9052_i2c_id[] = { + {"da9052", DA9052}, + {"da9053-aa", DA9053_AA}, + {"da9053-ba", DA9053_BA}, + {"da9053-bb", DA9053_BB}, + {} +}; + +#ifdef CONFIG_OF +static const struct of_device_id dialog_dt_ids[] = { + { .compatible = "dlg,da9052", .data = &da9052_i2c_id[0] }, + { .compatible = "dlg,da9053-aa", .data = &da9052_i2c_id[1] }, + { .compatible = "dlg,da9053-ab", .data = &da9052_i2c_id[2] }, + { .compatible = "dlg,da9053-bb", .data = &da9052_i2c_id[3] }, + { /* sentinel */ } +}; +#endif + static int __devinit da9052_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -76,6 +99,22 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, if (ret < 0) goto err_regmap; +#ifdef CONFIG_OF + if (!id) { + struct device_node *np = client->dev.of_node; + const struct of_device_id *deviceid; + + deviceid = of_match_node(np, dialog_dt_ids); + id = (const struct i2c_device_id *)deviceid->data; + } +#endif + + if (!id) { + ret = -ENODEV; + dev_err(&client->dev, "id is null.\n"); + goto err_regmap; + } + ret = da9052_device_init(da9052, id->driver_data); if (ret != 0) goto err_regmap; @@ -100,14 +139,6 @@ static int __devexit da9052_i2c_remove(struct i2c_client *client) return 0; } -static struct i2c_device_id da9052_i2c_id[] = { - {"da9052", DA9052}, - {"da9053-aa", DA9053_AA}, - {"da9053-ba", DA9053_BA}, - {"da9053-bb", DA9053_BB}, - {} -}; - static struct i2c_driver da9052_i2c_driver = { .probe = da9052_i2c_probe, .remove = __devexit_p(da9052_i2c_remove), @@ -115,6 +146,9 @@ static struct i2c_driver da9052_i2c_driver = { .driver = { .name = "da9052", .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = dialog_dt_ids, +#endif }, }; -- cgit v1.2.2 From 201cf052810d20814a77ca0e0045a2c1a3508a1f Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Wed, 18 Apr 2012 12:13:51 +0200 Subject: mfd: Add support for tps65910 device sleep Adding support for device sleep through the external input control signal "SLEEP". Changing the SLEEP signal state can switch the device into SLEEP and ACTIVE state. Also adding sleep configuration for different resources so that they should be keep on during sleep state of device. Signed-off-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index bf2b25ebf2ca..ae7f47b6e71b 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -90,6 +90,66 @@ static const struct regmap_config tps65910_regmap_config = { .cache_type = REGCACHE_RBTREE, }; +static int __init tps65910_sleepinit(struct tps65910 *tps65910, + struct tps65910_board *pmic_pdata) +{ + struct device *dev = NULL; + int ret = 0; + + dev = tps65910->dev; + + if (!pmic_pdata->en_dev_slp) + return 0; + + /* enabling SLEEP device state */ + ret = tps65910_set_bits(tps65910, TPS65910_DEVCTRL, + DEVCTRL_DEV_SLP_MASK); + if (ret < 0) { + dev_err(dev, "set dev_slp failed: %d\n", ret); + goto err_sleep_init; + } + + /* Return if there is no sleep keepon data. */ + if (!pmic_pdata->slp_keepon) + return 0; + + if (pmic_pdata->slp_keepon->therm_keepon) { + ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK); + if (ret < 0) { + dev_err(dev, "set therm_keepon failed: %d\n", ret); + goto disable_dev_slp; + } + } + + if (pmic_pdata->slp_keepon->clkout32k_keepon) { + ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK); + if (ret < 0) { + dev_err(dev, "set clkout32k_keepon failed: %d\n", ret); + goto disable_dev_slp; + } + } + + if (pmic_pdata->slp_keepon->i2chs_keepon) { + ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK); + if (ret < 0) { + dev_err(dev, "set i2chs_keepon failed: %d\n", ret); + goto disable_dev_slp; + } + } + + return 0; + +disable_dev_slp: + tps65910_clear_bits(tps65910, TPS65910_DEVCTRL, DEVCTRL_DEV_SLP_MASK); + +err_sleep_init: + return ret; +} + + static int tps65910_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -140,6 +200,8 @@ static int tps65910_i2c_probe(struct i2c_client *i2c, tps65910_irq_init(tps65910, init_data->irq, init_data); + tps65910_sleepinit(tps65910, pmic_plat_data); + kfree(init_data); return ret; -- cgit v1.2.2 From 12693f6c1ff6f43f34a0d105307976337f64dcdd Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Mon, 16 Apr 2012 21:28:29 +0200 Subject: mfd: No need to check for the GPIO offset from asic3_gpio_to_irq The gpiolib code will only call our gpio_to_irq ops for our registered GPIO range. Signed-off-by: Samuel Ortiz --- drivers/mfd/asic3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 9d4a492e4295..383421bf5760 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -545,7 +545,7 @@ static int asic3_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { struct asic3 *asic = container_of(chip, struct asic3, gpio); - return (offset < ASIC3_NUM_GPIOS) ? asic->irq_base + offset : -ENXIO; + return asic->irq_base + offset; } static __init int asic3_gpio_probe(struct platform_device *pdev, -- cgit v1.2.2 From 4c394bb1683dbd110314ab37da7bfa6c9a77073d Mon Sep 17 00:00:00 2001 From: Russ Dill Date: Sun, 22 Apr 2012 01:48:18 -0700 Subject: mfd: Fix build breakage in omap-usb-host.c 'ARM: OMAP3: USB: Fix the EHCI ULPI PHY reset issue' removes the include for linux/gpio.h from omap-usb-host.c. This include indirectly includes plat/cpu.h which is required by omap-usb-host.c. Fix the build breakage by including it directly. Acked-by: Keshava Munegowda Acked-by: Kevin Hilman Signed-off-by: Russ Dill Signed-off-by: Samuel Ortiz --- drivers/mfd/omap-usb-host.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index c8aae6640e64..7e96bb229724 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include -- cgit v1.2.2 From 5006fe546a4eb0393782b818d4e0e2a6b4fa3803 Mon Sep 17 00:00:00 2001 From: Marc Reilly Date: Tue, 1 May 2012 12:26:46 +0200 Subject: mfd: Prepare for separating spi and i2c mc13xxx-core backends This patch abstracts the bus specific operations from the driver core. Generic init and cleanup is consolidated into mc13xxx_common_*. spi specific functions are renamed to reflect such. (The irq member of the mc13xxx struct is no longer redundant, it's used to store the irq for cleanup time). Signed-off-by: Marc Reilly Signed-off-by: Samuel Ortiz --- drivers/mfd/mc13xxx-core.c | 188 +++++++++++++++++++++++++++------------------ 1 file changed, 113 insertions(+), 75 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c index 9fd4f63c45cc..c8b7a28b2669 100644 --- a/drivers/mfd/mc13xxx-core.c +++ b/drivers/mfd/mc13xxx-core.c @@ -22,8 +22,18 @@ #include #include +enum mc13xxx_id { + MC13XXX_ID_MC13783, + MC13XXX_ID_MC13892, + MC13XXX_ID_INVALID, +}; + struct mc13xxx { struct spi_device *spidev; + + struct device *dev; + enum mc13xxx_id ictype; + struct mutex lock; int irq; int flags; @@ -144,36 +154,32 @@ struct mc13xxx { void mc13xxx_lock(struct mc13xxx *mc13xxx) { if (!mutex_trylock(&mc13xxx->lock)) { - dev_dbg(&mc13xxx->spidev->dev, "wait for %s from %pf\n", + dev_dbg(mc13xxx->dev, "wait for %s from %pf\n", __func__, __builtin_return_address(0)); mutex_lock(&mc13xxx->lock); } - dev_dbg(&mc13xxx->spidev->dev, "%s from %pf\n", + dev_dbg(mc13xxx->dev, "%s from %pf\n", __func__, __builtin_return_address(0)); } EXPORT_SYMBOL(mc13xxx_lock); void mc13xxx_unlock(struct mc13xxx *mc13xxx) { - dev_dbg(&mc13xxx->spidev->dev, "%s from %pf\n", + dev_dbg(mc13xxx->dev, "%s from %pf\n", __func__, __builtin_return_address(0)); mutex_unlock(&mc13xxx->lock); } EXPORT_SYMBOL(mc13xxx_unlock); #define MC13XXX_REGOFFSET_SHIFT 25 -int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) +static int mc13xxx_spi_reg_read(struct mc13xxx *mc13xxx, + unsigned int offset, u32 *val) { struct spi_transfer t; struct spi_message m; int ret; - BUG_ON(!mutex_is_locked(&mc13xxx->lock)); - - if (offset > MC13XXX_NUMREGS) - return -EINVAL; - *val = offset << MC13XXX_REGOFFSET_SHIFT; memset(&t, 0, sizeof(t)); @@ -195,26 +201,17 @@ int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) *val &= 0xffffff; - dev_vdbg(&mc13xxx->spidev->dev, "[0x%02x] -> 0x%06x\n", offset, *val); - return 0; } -EXPORT_SYMBOL(mc13xxx_reg_read); -int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) +static int mc13xxx_spi_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, + u32 val) { u32 buf; struct spi_transfer t; struct spi_message m; int ret; - BUG_ON(!mutex_is_locked(&mc13xxx->lock)); - - dev_vdbg(&mc13xxx->spidev->dev, "[0x%02x] <- 0x%06x\n", offset, val); - - if (offset > MC13XXX_NUMREGS || val > 0xffffff) - return -EINVAL; - buf = 1 << 31 | offset << MC13XXX_REGOFFSET_SHIFT | val; memset(&t, 0, sizeof(t)); @@ -235,6 +232,34 @@ int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) return 0; } + +int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) +{ + int ret; + + BUG_ON(!mutex_is_locked(&mc13xxx->lock)); + + if (offset > MC13XXX_NUMREGS) + return -EINVAL; + + ret = mc13xxx_spi_reg_read(mc13xxx, offset, val); + dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val); + + return ret; +} +EXPORT_SYMBOL(mc13xxx_reg_read); + +int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) +{ + BUG_ON(!mutex_is_locked(&mc13xxx->lock)); + + dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val); + + if (offset > MC13XXX_NUMREGS || val > 0xffffff) + return -EINVAL; + + return mc13xxx_spi_reg_write(mc13xxx, offset, val); +} EXPORT_SYMBOL(mc13xxx_reg_write); int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, @@ -439,7 +464,7 @@ static int mc13xxx_irq_handle(struct mc13xxx *mc13xxx, if (handled == IRQ_HANDLED) num_handled++; } else { - dev_err(&mc13xxx->spidev->dev, + dev_err(mc13xxx->dev, "BUG: irq %u but no handler\n", baseirq + irq); @@ -475,25 +500,23 @@ static irqreturn_t mc13xxx_irq_thread(int irq, void *data) return IRQ_RETVAL(handled); } -enum mc13xxx_id { - MC13XXX_ID_MC13783, - MC13XXX_ID_MC13892, - MC13XXX_ID_INVALID, -}; - static const char *mc13xxx_chipname[] = { [MC13XXX_ID_MC13783] = "mc13783", [MC13XXX_ID_MC13892] = "mc13892", }; #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask)) -static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id) +static int mc13xxx_identify(struct mc13xxx *mc13xxx) { u32 icid; u32 revision; - const char *name; int ret; + /* + * Get the generation ID from register 46, as apparently some older + * IC revisions only have this info at this location. Newer ICs seem to + * have both. + */ ret = mc13xxx_reg_read(mc13xxx, 46, &icid); if (ret) return ret; @@ -502,26 +525,23 @@ static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id) switch (icid) { case 2: - *id = MC13XXX_ID_MC13783; - name = "mc13783"; + mc13xxx->ictype = MC13XXX_ID_MC13783; break; case 7: - *id = MC13XXX_ID_MC13892; - name = "mc13892"; + mc13xxx->ictype = MC13XXX_ID_MC13892; break; default: - *id = MC13XXX_ID_INVALID; + mc13xxx->ictype = MC13XXX_ID_INVALID; break; } - if (*id == MC13XXX_ID_MC13783 || *id == MC13XXX_ID_MC13892) { + if (mc13xxx->ictype == MC13XXX_ID_MC13783 || + mc13xxx->ictype == MC13XXX_ID_MC13892) { ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision); - if (ret) - return ret; - dev_info(&mc13xxx->spidev->dev, "%s: rev: %d.%d, " + dev_info(mc13xxx->dev, "%s: rev: %d.%d, " "fin: %d, fab: %d, icid: %d/%d\n", - mc13xxx_chipname[*id], + mc13xxx_chipname[mc13xxx->ictype], maskval(revision, MC13XXX_REVISION_REVFULL), maskval(revision, MC13XXX_REVISION_REVMETAL), maskval(revision, MC13XXX_REVISION_FIN), @@ -530,26 +550,12 @@ static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id) maskval(revision, MC13XXX_REVISION_ICIDCODE)); } - if (*id != MC13XXX_ID_INVALID) { - const struct spi_device_id *devid = - spi_get_device_id(mc13xxx->spidev); - if (!devid || devid->driver_data != *id) - dev_warn(&mc13xxx->spidev->dev, "device id doesn't " - "match auto detection!\n"); - } - - return 0; + return (mc13xxx->ictype == MC13XXX_ID_INVALID) ? -ENODEV : 0; } static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx) { - const struct spi_device_id *devid = - spi_get_device_id(mc13xxx->spidev); - - if (!devid) - return NULL; - - return mc13xxx_chipname[devid->driver_data]; + return mc13xxx_chipname[mc13xxx->ictype]; } int mc13xxx_get_flags(struct mc13xxx *mc13xxx) @@ -592,7 +598,7 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, }; init_completion(&adcdone_data.done); - dev_dbg(&mc13xxx->spidev->dev, "%s\n", __func__); + dev_dbg(mc13xxx->dev, "%s\n", __func__); mc13xxx_lock(mc13xxx); @@ -637,7 +643,8 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, adc1 |= ato << MC13783_ADC1_ATO_SHIFT; if (atox) adc1 |= MC13783_ADC1_ATOX; - dev_dbg(&mc13xxx->spidev->dev, "%s: request irq\n", __func__); + + dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__); mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE, mc13xxx_handler_adcdone, __func__, &adcdone_data); mc13xxx_irq_ack(mc13xxx, MC13XXX_IRQ_ADCDONE); @@ -695,7 +702,7 @@ static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx, if (!cell.name) return -ENOMEM; - return mfd_add_devices(&mc13xxx->spidev->dev, -1, &cell, 1, NULL, 0); + return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0); } static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) @@ -706,7 +713,7 @@ static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) #ifdef CONFIG_OF static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) { - struct device_node *np = mc13xxx->spidev->dev.of_node; + struct device_node *np = mc13xxx->dev.of_node; if (!np) return -ENODEV; @@ -752,13 +759,17 @@ static const struct of_device_id mc13xxx_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids); -static int mc13xxx_probe(struct spi_device *spi) +static int mc13xxx_common_init(struct mc13xxx *mc13xxx, + struct mc13xxx_platform_data *pdata, int irq); + +static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx); + +static int mc13xxx_spi_probe(struct spi_device *spi) { const struct of_device_id *of_id; struct spi_driver *sdrv = to_spi_driver(spi->dev.driver); struct mc13xxx *mc13xxx; struct mc13xxx_platform_data *pdata = dev_get_platdata(&spi->dev); - enum mc13xxx_id id; int ret; of_id = of_match_device(mc13xxx_dt_ids, &spi->dev); @@ -774,13 +785,34 @@ static int mc13xxx_probe(struct spi_device *spi) spi->bits_per_word = 32; spi_setup(spi); + mc13xxx->dev = &spi->dev; mc13xxx->spidev = spi; + ret = mc13xxx_common_init(mc13xxx, pdata, spi->irq); + + if (ret) { + dev_set_drvdata(&spi->dev, NULL); + } else { + const struct spi_device_id *devid = + spi_get_device_id(mc13xxx->spidev); + if (!devid || devid->driver_data != mc13xxx->ictype) + dev_warn(mc13xxx->dev, + "device id doesn't match auto detection!\n"); + } + + return ret; +} + +static int mc13xxx_common_init(struct mc13xxx *mc13xxx, + struct mc13xxx_platform_data *pdata, int irq) +{ + int ret; + mutex_init(&mc13xxx->lock); mc13xxx_lock(mc13xxx); - ret = mc13xxx_identify(mc13xxx, &id); - if (ret || id == MC13XXX_ID_INVALID) + ret = mc13xxx_identify(mc13xxx); + if (ret) goto err_revision; /* mask all irqs */ @@ -792,18 +824,19 @@ static int mc13xxx_probe(struct spi_device *spi) if (ret) goto err_mask; - ret = request_threaded_irq(spi->irq, NULL, mc13xxx_irq_thread, + ret = request_threaded_irq(irq, NULL, mc13xxx_irq_thread, IRQF_ONESHOT | IRQF_TRIGGER_HIGH, "mc13xxx", mc13xxx); if (ret) { err_mask: err_revision: mc13xxx_unlock(mc13xxx); - dev_set_drvdata(&spi->dev, NULL); kfree(mc13xxx); return ret; } + mc13xxx->irq = irq; + mc13xxx_unlock(mc13xxx); if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata) @@ -838,39 +871,44 @@ err_revision: return 0; } -static int __devexit mc13xxx_remove(struct spi_device *spi) +static int __devexit mc13xxx_spi_remove(struct spi_device *spi) { struct mc13xxx *mc13xxx = dev_get_drvdata(&spi->dev); - free_irq(mc13xxx->spidev->irq, mc13xxx); + mc13xxx_common_cleanup(mc13xxx); - mfd_remove_devices(&spi->dev); + return 0; +} - kfree(mc13xxx); +static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx) +{ + free_irq(mc13xxx->irq, mc13xxx); - return 0; + mfd_remove_devices(mc13xxx->dev); + + kfree(mc13xxx); } -static struct spi_driver mc13xxx_driver = { +static struct spi_driver mc13xxx_spi_driver = { .id_table = mc13xxx_device_id, .driver = { .name = "mc13xxx", .owner = THIS_MODULE, .of_match_table = mc13xxx_dt_ids, }, - .probe = mc13xxx_probe, - .remove = __devexit_p(mc13xxx_remove), + .probe = mc13xxx_spi_probe, + .remove = __devexit_p(mc13xxx_spi_remove), }; static int __init mc13xxx_init(void) { - return spi_register_driver(&mc13xxx_driver); + return spi_register_driver(&mc13xxx_spi_driver); } subsys_initcall(mc13xxx_init); static void __exit mc13xxx_exit(void) { - spi_unregister_driver(&mc13xxx_driver); + spi_unregister_driver(&mc13xxx_spi_driver); } module_exit(mc13xxx_exit); -- cgit v1.2.2 From 91b5e741184ea9836cd7d7509e4f9b6eefa27df2 Mon Sep 17 00:00:00 2001 From: Marc Reilly Date: Sun, 1 Apr 2012 16:41:37 +1000 Subject: mfd: Use regmap for the mc13xxx-core register access This change converts the mc13xxx core to use regmap rather than direct spi r/w. The spidev member of mc13xxx struct becomes redundant and is removed. Extra debugging aids are added to mc13xxx_reg_rmw. Mutex init is moved to before regmap init. Signed-off-by: Marc Reilly Reviewed-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 1 + drivers/mfd/mc13xxx-core.c | 113 ++++++++++++++------------------------------- 2 files changed, 35 insertions(+), 79 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index c6edba69678a..411a61a99404 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -600,6 +600,7 @@ config MFD_MC13XXX depends on SPI_MASTER select MFD_CORE select MFD_MC13783 + select REGMAP_SPI help Support for the Freescale (Atlas) PMIC and audio CODECs MC13783 and MC13892. diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c index c8b7a28b2669..d761a2e54b98 100644 --- a/drivers/mfd/mc13xxx-core.c +++ b/drivers/mfd/mc13xxx-core.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include enum mc13xxx_id { MC13XXX_ID_MC13783, @@ -29,7 +31,7 @@ enum mc13xxx_id { }; struct mc13xxx { - struct spi_device *spidev; + struct regmap *regmap; struct device *dev; enum mc13xxx_id ictype; @@ -172,67 +174,6 @@ void mc13xxx_unlock(struct mc13xxx *mc13xxx) } EXPORT_SYMBOL(mc13xxx_unlock); -#define MC13XXX_REGOFFSET_SHIFT 25 -static int mc13xxx_spi_reg_read(struct mc13xxx *mc13xxx, - unsigned int offset, u32 *val) -{ - struct spi_transfer t; - struct spi_message m; - int ret; - - *val = offset << MC13XXX_REGOFFSET_SHIFT; - - memset(&t, 0, sizeof(t)); - - t.tx_buf = val; - t.rx_buf = val; - t.len = sizeof(u32); - - spi_message_init(&m); - spi_message_add_tail(&t, &m); - - ret = spi_sync(mc13xxx->spidev, &m); - - /* error in message.status implies error return from spi_sync */ - BUG_ON(!ret && m.status); - - if (ret) - return ret; - - *val &= 0xffffff; - - return 0; -} - -static int mc13xxx_spi_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, - u32 val) -{ - u32 buf; - struct spi_transfer t; - struct spi_message m; - int ret; - - buf = 1 << 31 | offset << MC13XXX_REGOFFSET_SHIFT | val; - - memset(&t, 0, sizeof(t)); - - t.tx_buf = &buf; - t.rx_buf = &buf; - t.len = sizeof(u32); - - spi_message_init(&m); - spi_message_add_tail(&t, &m); - - ret = spi_sync(mc13xxx->spidev, &m); - - BUG_ON(!ret && m.status); - - if (ret) - return ret; - - return 0; -} - int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) { int ret; @@ -242,7 +183,7 @@ int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) if (offset > MC13XXX_NUMREGS) return -EINVAL; - ret = mc13xxx_spi_reg_read(mc13xxx, offset, val); + ret = regmap_read(mc13xxx->regmap, offset, val); dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val); return ret; @@ -258,25 +199,19 @@ int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) if (offset > MC13XXX_NUMREGS || val > 0xffffff) return -EINVAL; - return mc13xxx_spi_reg_write(mc13xxx, offset, val); + return regmap_write(mc13xxx->regmap, offset, val); } EXPORT_SYMBOL(mc13xxx_reg_write); int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, u32 mask, u32 val) { - int ret; - u32 valread; - + BUG_ON(!mutex_is_locked(&mc13xxx->lock)); BUG_ON(val & ~mask); + dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n", + offset, val, mask); - ret = mc13xxx_reg_read(mc13xxx, offset, &valread); - if (ret) - return ret; - - valread = (valread & ~mask) | val; - - return mc13xxx_reg_write(mc13xxx, offset, valread); + return regmap_update_bits(mc13xxx->regmap, offset, mask, val); } EXPORT_SYMBOL(mc13xxx_reg_rmw); @@ -713,7 +648,7 @@ static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) #ifdef CONFIG_OF static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) { - struct device_node *np = mc13xxx->dev.of_node; + struct device_node *np = mc13xxx->dev->of_node; if (!np) return -ENODEV; @@ -759,6 +694,16 @@ static const struct of_device_id mc13xxx_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids); +static struct regmap_config mc13xxx_regmap_spi_config = { + .reg_bits = 7, + .pad_bits = 1, + .val_bits = 24, + + .max_register = MC13XXX_NUMREGS, + + .cache_type = REGCACHE_NONE, +}; + static int mc13xxx_common_init(struct mc13xxx *mc13xxx, struct mc13xxx_platform_data *pdata, int irq); @@ -783,10 +728,19 @@ static int mc13xxx_spi_probe(struct spi_device *spi) dev_set_drvdata(&spi->dev, mc13xxx); spi->mode = SPI_MODE_0 | SPI_CS_HIGH; spi->bits_per_word = 32; - spi_setup(spi); mc13xxx->dev = &spi->dev; - mc13xxx->spidev = spi; + mutex_init(&mc13xxx->lock); + + mc13xxx->regmap = regmap_init_spi(spi, &mc13xxx_regmap_spi_config); + if (IS_ERR(mc13xxx->regmap)) { + ret = PTR_ERR(mc13xxx->regmap); + dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n", + ret); + dev_set_drvdata(&spi->dev, NULL); + kfree(mc13xxx); + return ret; + } ret = mc13xxx_common_init(mc13xxx, pdata, spi->irq); @@ -794,7 +748,7 @@ static int mc13xxx_spi_probe(struct spi_device *spi) dev_set_drvdata(&spi->dev, NULL); } else { const struct spi_device_id *devid = - spi_get_device_id(mc13xxx->spidev); + spi_get_device_id(spi); if (!devid || devid->driver_data != mc13xxx->ictype) dev_warn(mc13xxx->dev, "device id doesn't match auto detection!\n"); @@ -808,7 +762,6 @@ static int mc13xxx_common_init(struct mc13xxx *mc13xxx, { int ret; - mutex_init(&mc13xxx->lock); mc13xxx_lock(mc13xxx); ret = mc13xxx_identify(mc13xxx); @@ -886,6 +839,8 @@ static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx) mfd_remove_devices(mc13xxx->dev); + regmap_exit(mc13xxx->regmap); + kfree(mc13xxx); } -- cgit v1.2.2 From a0c7c1d48ea9f53c67c79eda498bb8eda1422748 Mon Sep 17 00:00:00 2001 From: Marc Reilly Date: Sun, 1 Apr 2012 16:41:38 +1000 Subject: mfd: Move the mc13xxx-core spi specific code into a separate module All spi specific code is moved into a new module. The mc13xxx struct moves to a new local include file by necessity. A new config choice selects the SPI bus type support and by default is value of SPI_MASTER to remain compatible with existing configs. Signed-off-by: Marc Reilly Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 17 ++++-- drivers/mfd/Makefile | 1 + drivers/mfd/mc13xxx-core.c | 148 ++------------------------------------------- drivers/mfd/mc13xxx-spi.c | 140 ++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/mc13xxx.h | 45 ++++++++++++++ 5 files changed, 204 insertions(+), 147 deletions(-) create mode 100644 drivers/mfd/mc13xxx-spi.c create mode 100644 drivers/mfd/mc13xxx.h (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 411a61a99404..9c8294c26efb 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -600,14 +600,23 @@ config MFD_MC13XXX depends on SPI_MASTER select MFD_CORE select MFD_MC13783 - select REGMAP_SPI help - Support for the Freescale (Atlas) PMIC and audio CODECs - MC13783 and MC13892. - This driver provides common support for accessing the device, + Enable support for the Freescale MC13783 and MC13892 PMICs. + This driver provides common support for accessing the device, additional drivers must be enabled in order to use the functionality of the device. +if MFD_MC13XXX + +config MFD_MC13XXX_SPI + tristate "MC13xxx SPI interface" if SPI_MASTER + default SPI_MASTER + select REGMAP_SPI + help + Select this if your MC13xxx is connected via an SPI bus. + +endif + config ABX500_CORE bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions" default y if ARCH_U300 || ARCH_U8500 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c4500c35d5ba..7ce5b5c15dee 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o obj-$(CONFIG_TWL6040_CORE) += twl6040-core.o twl6040-irq.o obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o +obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o obj-$(CONFIG_MFD_CORE) += mfd-core.o diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c index d761a2e54b98..13a32b795615 100644 --- a/drivers/mfd/mc13xxx-core.c +++ b/drivers/mfd/mc13xxx-core.c @@ -15,36 +15,13 @@ #include #include #include -#include #include #include #include #include #include -#include -#include -enum mc13xxx_id { - MC13XXX_ID_MC13783, - MC13XXX_ID_MC13892, - MC13XXX_ID_INVALID, -}; - -struct mc13xxx { - struct regmap *regmap; - - struct device *dev; - enum mc13xxx_id ictype; - - struct mutex lock; - int irq; - int flags; - - irq_handler_t irqhandler[MC13XXX_NUM_IRQ]; - void *irqdata[MC13XXX_NUM_IRQ]; - - int adcflags; -}; +#include "mc13xxx.h" #define MC13XXX_IRQSTAT0 0 #define MC13XXX_IRQSTAT0_ADCDONEI (1 << 0) @@ -151,8 +128,6 @@ struct mc13xxx { #define MC13XXX_ADC2 45 -#define MC13XXX_NUMREGS 0x3f - void mc13xxx_lock(struct mc13xxx *mc13xxx) { if (!mutex_trylock(&mc13xxx->lock)) { @@ -674,90 +649,7 @@ static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) } #endif -static const struct spi_device_id mc13xxx_device_id[] = { - { - .name = "mc13783", - .driver_data = MC13XXX_ID_MC13783, - }, { - .name = "mc13892", - .driver_data = MC13XXX_ID_MC13892, - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(spi, mc13xxx_device_id); - -static const struct of_device_id mc13xxx_dt_ids[] = { - { .compatible = "fsl,mc13783", .data = (void *) MC13XXX_ID_MC13783, }, - { .compatible = "fsl,mc13892", .data = (void *) MC13XXX_ID_MC13892, }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids); - -static struct regmap_config mc13xxx_regmap_spi_config = { - .reg_bits = 7, - .pad_bits = 1, - .val_bits = 24, - - .max_register = MC13XXX_NUMREGS, - - .cache_type = REGCACHE_NONE, -}; - -static int mc13xxx_common_init(struct mc13xxx *mc13xxx, - struct mc13xxx_platform_data *pdata, int irq); - -static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx); - -static int mc13xxx_spi_probe(struct spi_device *spi) -{ - const struct of_device_id *of_id; - struct spi_driver *sdrv = to_spi_driver(spi->dev.driver); - struct mc13xxx *mc13xxx; - struct mc13xxx_platform_data *pdata = dev_get_platdata(&spi->dev); - int ret; - - of_id = of_match_device(mc13xxx_dt_ids, &spi->dev); - if (of_id) - sdrv->id_table = &mc13xxx_device_id[(enum mc13xxx_id) of_id->data]; - - mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL); - if (!mc13xxx) - return -ENOMEM; - - dev_set_drvdata(&spi->dev, mc13xxx); - spi->mode = SPI_MODE_0 | SPI_CS_HIGH; - spi->bits_per_word = 32; - - mc13xxx->dev = &spi->dev; - mutex_init(&mc13xxx->lock); - - mc13xxx->regmap = regmap_init_spi(spi, &mc13xxx_regmap_spi_config); - if (IS_ERR(mc13xxx->regmap)) { - ret = PTR_ERR(mc13xxx->regmap); - dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n", - ret); - dev_set_drvdata(&spi->dev, NULL); - kfree(mc13xxx); - return ret; - } - - ret = mc13xxx_common_init(mc13xxx, pdata, spi->irq); - - if (ret) { - dev_set_drvdata(&spi->dev, NULL); - } else { - const struct spi_device_id *devid = - spi_get_device_id(spi); - if (!devid || devid->driver_data != mc13xxx->ictype) - dev_warn(mc13xxx->dev, - "device id doesn't match auto detection!\n"); - } - - return ret; -} - -static int mc13xxx_common_init(struct mc13xxx *mc13xxx, +int mc13xxx_common_init(struct mc13xxx *mc13xxx, struct mc13xxx_platform_data *pdata, int irq) { int ret; @@ -823,17 +715,9 @@ err_revision: return 0; } +EXPORT_SYMBOL_GPL(mc13xxx_common_init); -static int __devexit mc13xxx_spi_remove(struct spi_device *spi) -{ - struct mc13xxx *mc13xxx = dev_get_drvdata(&spi->dev); - - mc13xxx_common_cleanup(mc13xxx); - - return 0; -} - -static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx) +void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx) { free_irq(mc13xxx->irq, mc13xxx); @@ -843,29 +727,7 @@ static void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx) kfree(mc13xxx); } - -static struct spi_driver mc13xxx_spi_driver = { - .id_table = mc13xxx_device_id, - .driver = { - .name = "mc13xxx", - .owner = THIS_MODULE, - .of_match_table = mc13xxx_dt_ids, - }, - .probe = mc13xxx_spi_probe, - .remove = __devexit_p(mc13xxx_spi_remove), -}; - -static int __init mc13xxx_init(void) -{ - return spi_register_driver(&mc13xxx_spi_driver); -} -subsys_initcall(mc13xxx_init); - -static void __exit mc13xxx_exit(void) -{ - spi_unregister_driver(&mc13xxx_spi_driver); -} -module_exit(mc13xxx_exit); +EXPORT_SYMBOL_GPL(mc13xxx_common_cleanup); MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC"); MODULE_AUTHOR("Uwe Kleine-Koenig "); diff --git a/drivers/mfd/mc13xxx-spi.c b/drivers/mfd/mc13xxx-spi.c new file mode 100644 index 000000000000..3fcdab3eb8eb --- /dev/null +++ b/drivers/mfd/mc13xxx-spi.c @@ -0,0 +1,140 @@ +/* + * Copyright 2009-2010 Pengutronix + * Uwe Kleine-Koenig + * + * loosely based on an earlier driver that has + * Copyright 2009 Pengutronix, Sascha Hauer + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mc13xxx.h" + +static const struct spi_device_id mc13xxx_device_id[] = { + { + .name = "mc13783", + .driver_data = MC13XXX_ID_MC13783, + }, { + .name = "mc13892", + .driver_data = MC13XXX_ID_MC13892, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(spi, mc13xxx_device_id); + +static const struct of_device_id mc13xxx_dt_ids[] = { + { .compatible = "fsl,mc13783", .data = (void *) MC13XXX_ID_MC13783, }, + { .compatible = "fsl,mc13892", .data = (void *) MC13XXX_ID_MC13892, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids); + +static struct regmap_config mc13xxx_regmap_spi_config = { + .reg_bits = 7, + .pad_bits = 1, + .val_bits = 24, + + .max_register = MC13XXX_NUMREGS, + + .cache_type = REGCACHE_NONE, +}; + +static int mc13xxx_spi_probe(struct spi_device *spi) +{ + const struct of_device_id *of_id; + struct spi_driver *sdrv = to_spi_driver(spi->dev.driver); + struct mc13xxx *mc13xxx; + struct mc13xxx_platform_data *pdata = dev_get_platdata(&spi->dev); + int ret; + + of_id = of_match_device(mc13xxx_dt_ids, &spi->dev); + if (of_id) + sdrv->id_table = &mc13xxx_device_id[(enum mc13xxx_id) of_id->data]; + + mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL); + if (!mc13xxx) + return -ENOMEM; + + dev_set_drvdata(&spi->dev, mc13xxx); + spi->mode = SPI_MODE_0 | SPI_CS_HIGH; + spi->bits_per_word = 32; + + mc13xxx->dev = &spi->dev; + mutex_init(&mc13xxx->lock); + + mc13xxx->regmap = regmap_init_spi(spi, &mc13xxx_regmap_spi_config); + if (IS_ERR(mc13xxx->regmap)) { + ret = PTR_ERR(mc13xxx->regmap); + dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n", + ret); + dev_set_drvdata(&spi->dev, NULL); + kfree(mc13xxx); + return ret; + } + + ret = mc13xxx_common_init(mc13xxx, pdata, spi->irq); + + if (ret) { + dev_set_drvdata(&spi->dev, NULL); + } else { + const struct spi_device_id *devid = + spi_get_device_id(spi); + if (!devid || devid->driver_data != mc13xxx->ictype) + dev_warn(mc13xxx->dev, + "device id doesn't match auto detection!\n"); + } + + return ret; +} + +static int __devexit mc13xxx_spi_remove(struct spi_device *spi) +{ + struct mc13xxx *mc13xxx = dev_get_drvdata(&spi->dev); + + mc13xxx_common_cleanup(mc13xxx); + + return 0; +} + +static struct spi_driver mc13xxx_spi_driver = { + .id_table = mc13xxx_device_id, + .driver = { + .name = "mc13xxx", + .owner = THIS_MODULE, + .of_match_table = mc13xxx_dt_ids, + }, + .probe = mc13xxx_spi_probe, + .remove = __devexit_p(mc13xxx_spi_remove), +}; + +static int __init mc13xxx_init(void) +{ + return spi_register_driver(&mc13xxx_spi_driver); +} +subsys_initcall(mc13xxx_init); + +static void __exit mc13xxx_exit(void) +{ + spi_unregister_driver(&mc13xxx_spi_driver); +} +module_exit(mc13xxx_exit); + +MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC"); +MODULE_AUTHOR("Uwe Kleine-Koenig "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/mc13xxx.h b/drivers/mfd/mc13xxx.h new file mode 100644 index 000000000000..bbba06feea06 --- /dev/null +++ b/drivers/mfd/mc13xxx.h @@ -0,0 +1,45 @@ +/* + * Copyright 2012 Creative Product Design + * Marc Reilly + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#ifndef __DRIVERS_MFD_MC13XXX_H +#define __DRIVERS_MFD_MC13XXX_H + +#include +#include +#include + +enum mc13xxx_id { + MC13XXX_ID_MC13783, + MC13XXX_ID_MC13892, + MC13XXX_ID_INVALID, +}; + +#define MC13XXX_NUMREGS 0x3f + +struct mc13xxx { + struct regmap *regmap; + + struct device *dev; + enum mc13xxx_id ictype; + + struct mutex lock; + int irq; + int flags; + + irq_handler_t irqhandler[MC13XXX_NUM_IRQ]; + void *irqdata[MC13XXX_NUM_IRQ]; + + int adcflags; +}; + +int mc13xxx_common_init(struct mc13xxx *mc13xxx, + struct mc13xxx_platform_data *pdata, int irq); + +void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx); + +#endif /* __DRIVERS_MFD_MC13XXX_H */ -- cgit v1.2.2 From df3df6469fd1e59284d6b5d4dd9dbe1bd7861040 Mon Sep 17 00:00:00 2001 From: Marc Reilly Date: Sun, 1 Apr 2012 16:41:39 +1000 Subject: mfd: Add mc13xxx i2c driver Adds support for mc13xxx family ICs connected via i2c. Signed-off-by: Marc Reilly Acked-by: Oskar Schirmer Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 9 +++- drivers/mfd/Makefile | 1 + drivers/mfd/mc13xxx-i2c.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+), 1 deletion(-) create mode 100644 drivers/mfd/mc13xxx-i2c.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 9c8294c26efb..ef86a741b7e2 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -597,7 +597,7 @@ config MFD_MC13783 config MFD_MC13XXX tristate "Support Freescale MC13783 and MC13892" - depends on SPI_MASTER + depends on SPI_MASTER || I2C select MFD_CORE select MFD_MC13783 help @@ -615,6 +615,13 @@ config MFD_MC13XXX_SPI help Select this if your MC13xxx is connected via an SPI bus. +config MFD_MC13XXX_I2C + tristate "MC13xxx I2C interface" if I2C + default I2C + select REGMAP_I2C + help + Select this if your MC13xxx is connected via an I2C bus. + endif config ABX500_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 7ce5b5c15dee..5dd6be7aa350 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_TWL6040_CORE) += twl6040-core.o twl6040-irq.o obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o +obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o obj-$(CONFIG_MFD_CORE) += mfd-core.o diff --git a/drivers/mfd/mc13xxx-i2c.c b/drivers/mfd/mc13xxx-i2c.c new file mode 100644 index 000000000000..d22501dad6a6 --- /dev/null +++ b/drivers/mfd/mc13xxx-i2c.c @@ -0,0 +1,128 @@ +/* + * Copyright 2009-2010 Creative Product Design + * Marc Reilly marc@cpdesign.com.au + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mc13xxx.h" + +static const struct i2c_device_id mc13xxx_i2c_device_id[] = { + { + .name = "mc13892", + .driver_data = MC13XXX_ID_MC13892, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(i2c, mc13xxx_i2c_device_id); + +static const struct of_device_id mc13xxx_dt_ids[] = { + { + .compatible = "fsl,mc13892", + .data = (void *) &mc13xxx_i2c_device_id[0], + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids); + +static struct regmap_config mc13xxx_regmap_i2c_config = { + .reg_bits = 8, + .val_bits = 24, + + .max_register = MC13XXX_NUMREGS, + + .cache_type = REGCACHE_NONE, +}; + +static int mc13xxx_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + const struct of_device_id *of_id; + struct i2c_driver *idrv = to_i2c_driver(client->dev.driver); + struct mc13xxx *mc13xxx; + struct mc13xxx_platform_data *pdata = dev_get_platdata(&client->dev); + int ret; + + of_id = of_match_device(mc13xxx_dt_ids, &client->dev); + if (of_id) + idrv->id_table = (const struct i2c_device_id*) of_id->data; + + mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL); + if (!mc13xxx) + return -ENOMEM; + + dev_set_drvdata(&client->dev, mc13xxx); + + mc13xxx->dev = &client->dev; + mutex_init(&mc13xxx->lock); + + mc13xxx->regmap = regmap_init_i2c(client, &mc13xxx_regmap_i2c_config); + if (IS_ERR(mc13xxx->regmap)) { + ret = PTR_ERR(mc13xxx->regmap); + dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n", + ret); + dev_set_drvdata(&client->dev, NULL); + kfree(mc13xxx); + return ret; + } + + ret = mc13xxx_common_init(mc13xxx, pdata, client->irq); + + if (ret == 0 && (id->driver_data != mc13xxx->ictype)) + dev_warn(mc13xxx->dev, + "device id doesn't match auto detection!\n"); + + return ret; +} + +static int __devexit mc13xxx_i2c_remove(struct i2c_client *client) +{ + struct mc13xxx *mc13xxx = dev_get_drvdata(&client->dev); + + mc13xxx_common_cleanup(mc13xxx); + + return 0; +} + +static struct i2c_driver mc13xxx_i2c_driver = { + .id_table = mc13xxx_i2c_device_id, + .driver = { + .owner = THIS_MODULE, + .name = "mc13xxx", + .of_match_table = mc13xxx_dt_ids, + }, + .probe = mc13xxx_i2c_probe, + .remove = __devexit_p(mc13xxx_i2c_remove), +}; + +static int __init mc13xxx_i2c_init(void) +{ + return i2c_add_driver(&mc13xxx_i2c_driver); +} +subsys_initcall(mc13xxx_i2c_init); + +static void __exit mc13xxx_i2c_exit(void) +{ + i2c_del_driver(&mc13xxx_i2c_driver); +} +module_exit(mc13xxx_i2c_exit); + +MODULE_DESCRIPTION("i2c driver for Freescale MC13XXX PMIC"); +MODULE_AUTHOR("Marc Reilly Date: Tue, 17 Apr 2012 09:30:14 +0200 Subject: mfd: Add new resources on ab8500 AB8505 and AB9540 The AB8505 and AB9540 has extended support for micro USB resistance detection, used for detecting chargers. Let's register resources for this resource. Let's also split off the separate codec device for AB9540. Signed-off-by: Virupax Sadashivpetimath Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-core.c | 60 +++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 55 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 1f08704f7ae8..ae67612317a8 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -744,6 +744,39 @@ static struct resource __devinitdata ab8500_usb_resources[] = { }, }; +static struct resource __devinitdata ab8505_iddet_resources[] = { + { + .name = "KeyDeglitch", + .start = AB8505_INT_KEYDEGLITCH, + .end = AB8505_INT_KEYDEGLITCH, + .flags = IORESOURCE_IRQ, + }, + { + .name = "KP", + .start = AB8505_INT_KP, + .end = AB8505_INT_KP, + .flags = IORESOURCE_IRQ, + }, + { + .name = "IKP", + .start = AB8505_INT_IKP, + .end = AB8505_INT_IKP, + .flags = IORESOURCE_IRQ, + }, + { + .name = "IKR", + .start = AB8505_INT_IKR, + .end = AB8505_INT_IKR, + .flags = IORESOURCE_IRQ, + }, + { + .name = "KeyStuck", + .start = AB8505_INT_KEYSTUCK, + .end = AB8505_INT_KEYSTUCK, + .flags = IORESOURCE_IRQ, + }, +}; + static struct resource __devinitdata ab8500_temp_resources[] = { { .name = "AB8500_TEMP_WARM", @@ -802,10 +835,6 @@ static struct mfd_cell __devinitdata abx500_common_devs[] = { .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), .resources = ab8500_av_acc_detect_resources, }, - { - .name = "ab8500-codec", - }, - { .name = "ab8500-poweron-key", .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), @@ -845,6 +874,9 @@ static struct mfd_cell __devinitdata ab8500_devs[] = { .num_resources = ARRAY_SIZE(ab8500_usb_resources), .resources = ab8500_usb_resources, }, + { + .name = "ab8500-codec", + }, }; static struct mfd_cell __devinitdata ab9540_devs[] = { @@ -858,6 +890,18 @@ static struct mfd_cell __devinitdata ab9540_devs[] = { .num_resources = ARRAY_SIZE(ab8500_usb_resources), .resources = ab8500_usb_resources, }, + { + .name = "ab9540-codec", + }, +}; + +/* Device list common to ab9540 and ab8505 */ +static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { + { + .name = "ab-iddet", + .num_resources = ARRAY_SIZE(ab8505_iddet_resources), + .resources = ab8505_iddet_resources, + }, }; static ssize_t show_chip_id(struct device *dev, @@ -1125,8 +1169,14 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) ab8500->irq_base); else ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, - ARRAY_SIZE(ab9540_devs), NULL, + ARRAY_SIZE(ab8500_devs), NULL, + ab8500->irq_base); + + if (is_ab9540(ab8500) || is_ab8505(ab8500)) + ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, + ARRAY_SIZE(ab9540_ab8505_devs), NULL, ab8500->irq_base); + if (ret) goto out_freeirq; -- cgit v1.2.2 From 7e82d6ff5d2c5e35d1fcb8c673287f7d780a13bb Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Tue, 17 Apr 2012 09:30:24 +0200 Subject: mfd: Handle the ab8500 irq for suspend/resume Ensure that the AB interrupt is only handled at a time when all core drivers are resumed. Ensure that the AB interrupt is marked as a wakeup interrupt. Signed-off-by: Rabin Vincent Reviewed-by: Jonas Aberg Reviewed-by: Mattias Wallin Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-i2c.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-i2c.c b/drivers/mfd/ab8500-i2c.c index b83045f102be..89b31a3409cd 100644 --- a/drivers/mfd/ab8500-i2c.c +++ b/drivers/mfd/ab8500-i2c.c @@ -101,10 +101,42 @@ static const struct platform_device_id ab8500_id[] = { { } }; +#ifdef CONFIG_PM +static int ab8500_i2c_suspend(struct device *dev) +{ + struct ab8500 *ab = dev_get_drvdata(dev); + + disable_irq(ab->irq); + enable_irq_wake(ab->irq); + + return 0; +} + +static int ab8500_i2c_resume(struct device *dev) +{ + struct ab8500 *ab = dev_get_drvdata(dev); + + disable_irq_wake(ab->irq); + enable_irq(ab->irq); + + return 0; +} + +static const struct dev_pm_ops ab8500_i2c_pm_ops = { + .suspend = ab8500_i2c_suspend, + .resume = ab8500_i2c_resume, +}; + +#define AB8500_I2C_PM_OPS (&ab8500_i2c_pm_ops) +#else +#define AB8500_I2C_PM_OPS NULL +#endif + static struct platform_driver ab8500_i2c_driver = { .driver = { .name = "ab8500-i2c", .owner = THIS_MODULE, + .pm = AB8500_I2C_PM_OPS, }, .probe = ab8500_i2c_probe, .remove = __devexit_p(ab8500_i2c_remove), -- cgit v1.2.2 From 112a80d29b529d4057777ac2cb4ec15ff5b6d210 Mon Sep 17 00:00:00 2001 From: Jonas Aaberg Date: Tue, 17 Apr 2012 09:30:33 +0200 Subject: mfd: Deny ab8500 suspend if i2c transfer is ongoing If we are in the middle of an I2C transfer we need to deny suspend of the AB8500 core. Implement an atomic reference counter for the I2C operations to make sure we don't do this. Signed-off-by: Jonas Aaberg Reviewed-by: Mattias Wallin Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-core.c | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index ae67612317a8..eee95606bdbb 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -161,9 +161,13 @@ static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, static int ab8500_set_register(struct device *dev, u8 bank, u8 reg, u8 value) { + int ret; struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); - return set_register_interruptible(ab8500, bank, reg, value); + atomic_inc(&ab8500->transfer_ongoing); + ret = set_register_interruptible(ab8500, bank, reg, value); + atomic_dec(&ab8500->transfer_ongoing); + return ret; } static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, @@ -192,9 +196,13 @@ static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, static int ab8500_get_register(struct device *dev, u8 bank, u8 reg, u8 *value) { + int ret; struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); - return get_register_interruptible(ab8500, bank, reg, value); + atomic_inc(&ab8500->transfer_ongoing); + ret = get_register_interruptible(ab8500, bank, reg, value); + atomic_dec(&ab8500->transfer_ongoing); + return ret; } static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, @@ -241,11 +249,14 @@ out: static int ab8500_mask_and_set_register(struct device *dev, u8 bank, u8 reg, u8 bitmask, u8 bitvalues) { + int ret; struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); - return mask_and_set_register_interruptible(ab8500, bank, reg, - bitmask, bitvalues); - + atomic_inc(&ab8500->transfer_ongoing); + ret= mask_and_set_register_interruptible(ab8500, bank, reg, + bitmask, bitvalues); + atomic_dec(&ab8500->transfer_ongoing); + return ret; } static struct abx500_ops ab8500_ops = { @@ -264,6 +275,7 @@ static void ab8500_irq_lock(struct irq_data *data) struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); mutex_lock(&ab8500->irq_lock); + atomic_inc(&ab8500->transfer_ongoing); } static void ab8500_irq_sync_unlock(struct irq_data *data) @@ -292,7 +304,7 @@ static void ab8500_irq_sync_unlock(struct irq_data *data) reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); } - + atomic_dec(&ab8500->transfer_ongoing); mutex_unlock(&ab8500->irq_lock); } @@ -332,6 +344,8 @@ static irqreturn_t ab8500_irq(int irq, void *dev) dev_vdbg(ab8500->dev, "interrupt\n"); + atomic_inc(&ab8500->transfer_ongoing); + for (i = 0; i < ab8500->mask_size; i++) { int regoffset = ab8500->irq_reg_offset[i]; int status; @@ -355,9 +369,10 @@ static irqreturn_t ab8500_irq(int irq, void *dev) handle_nested_irq(ab8500->irq_base + line); value &= ~(1 << bit); + } while (value); } - + atomic_dec(&ab8500->transfer_ongoing); return IRQ_HANDLED; } @@ -411,6 +426,14 @@ static void ab8500_irq_remove(struct ab8500 *ab8500) } } +int ab8500_suspend(struct ab8500 *ab8500) +{ + if (atomic_read(&ab8500->transfer_ongoing)) + return -EINVAL; + else + return 0; +} + /* AB8500 GPIO Resources */ static struct resource __devinitdata ab8500_gpio_resources[] = { { @@ -1059,6 +1082,7 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) mutex_init(&ab8500->lock); mutex_init(&ab8500->irq_lock); + atomic_set(&ab8500->transfer_ongoing, 0); if (version != AB8500_VERSION_UNDEFINED) ab8500->version = version; -- cgit v1.2.2 From 6ef9418c9e6fc41e6c1066b6423f3a1625e4b822 Mon Sep 17 00:00:00 2001 From: Rickard Andersson Date: Tue, 17 Apr 2012 09:30:57 +0200 Subject: mfd: Add parameter to disable ab8500 battery management This patch makes it possible to disable battery management via a module boot parameter. When 'ab8500-core.no_bm=1' then ab8500_btemp, ab8500_chargalg, ab8500_charger and ab8500_fg will not be probed. This boot parameter is used for scripted testing of the system. Signed-off-by: Rickard Andersson Reviewed-by: Jonas Aberg Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-core.c | 55 ++++++++++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 20 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index eee95606bdbb..08850f0d1523 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -97,6 +97,9 @@ #define AB8500_TURN_ON_STATUS 0x00 +static bool no_bm; /* No battery management */ +module_param(no_bm, bool, S_IRUGO); + #define AB9540_MODEM_CTRL2_REG 0x23 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) @@ -833,26 +836,6 @@ static struct mfd_cell __devinitdata abx500_common_devs[] = { .num_resources = ARRAY_SIZE(ab8500_rtc_resources), .resources = ab8500_rtc_resources, }, - { - .name = "ab8500-charger", - .num_resources = ARRAY_SIZE(ab8500_charger_resources), - .resources = ab8500_charger_resources, - }, - { - .name = "ab8500-btemp", - .num_resources = ARRAY_SIZE(ab8500_btemp_resources), - .resources = ab8500_btemp_resources, - }, - { - .name = "ab8500-fg", - .num_resources = ARRAY_SIZE(ab8500_fg_resources), - .resources = ab8500_fg_resources, - }, - { - .name = "ab8500-chargalg", - .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), - .resources = ab8500_chargalg_resources, - }, { .name = "ab8500-acc-det", .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), @@ -886,6 +869,29 @@ static struct mfd_cell __devinitdata abx500_common_devs[] = { }, }; +static struct mfd_cell __devinitdata ab8500_bm_devs[] = { + { + .name = "ab8500-charger", + .num_resources = ARRAY_SIZE(ab8500_charger_resources), + .resources = ab8500_charger_resources, + }, + { + .name = "ab8500-btemp", + .num_resources = ARRAY_SIZE(ab8500_btemp_resources), + .resources = ab8500_btemp_resources, + }, + { + .name = "ab8500-fg", + .num_resources = ARRAY_SIZE(ab8500_fg_resources), + .resources = ab8500_fg_resources, + }, + { + .name = "ab8500-chargalg", + .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), + .resources = ab8500_chargalg_resources, + }, +}; + static struct mfd_cell __devinitdata ab8500_devs[] = { { .name = "ab8500-gpio", @@ -1204,6 +1210,15 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) if (ret) goto out_freeirq; + if (!no_bm) { + /* Add battery management devices */ + ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, + ARRAY_SIZE(ab8500_bm_devs), NULL, + ab8500->irq_base); + if (ret) + dev_err(ab8500->dev, "error adding bm devices\n"); + } + if (is_ab9540(ab8500)) ret = sysfs_create_group(&ab8500->dev->kobj, &ab9540_attr_group); -- cgit v1.2.2 From 3524b5d1edbcaf0aae9196ac942d8307624ff3f0 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 27 Mar 2012 08:40:34 +0530 Subject: mmc: sdhci-spear: No need to check 'pdev == NULL' in probe pdev is guaranteed to be valid in probe. And so check for non-NULL is not required. Remove it. Signed-off-by: Viresh Kumar Signed-off-by: Chris Ball --- drivers/mmc/host/sdhci-spear.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index 6dfa82e03c7e..15191c1d999a 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c @@ -75,8 +75,6 @@ static int __devinit sdhci_probe(struct platform_device *pdev) struct spear_sdhci *sdhci; int ret; - BUG_ON(pdev == NULL); - iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iomem) { ret = -ENOMEM; -- cgit v1.2.2 From 6ebaf8f2b0f9e67ac2e00ba7af04a58b39312b3c Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 27 Mar 2012 08:40:35 +0530 Subject: mmc: sdhci-spear: Use devm_* derivatives This patch replaces normal calls to resource allocation routines with devm_*() derivative of those routines. This removes the need to free those resources inside the driver. Signed-off-by: Viresh Kumar Signed-off-by: Chris Ball --- drivers/mmc/host/sdhci-spear.c | 80 ++++++++++++++---------------------------- 1 file changed, 27 insertions(+), 53 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index 15191c1d999a..1fe32dfa7cd4 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c @@ -82,18 +82,18 @@ static int __devinit sdhci_probe(struct platform_device *pdev) goto err; } - if (!request_mem_region(iomem->start, resource_size(iomem), - "spear-sdhci")) { + if (!devm_request_mem_region(&pdev->dev, iomem->start, + resource_size(iomem), "spear-sdhci")) { ret = -EBUSY; dev_dbg(&pdev->dev, "cannot request region\n"); goto err; } - sdhci = kzalloc(sizeof(*sdhci), GFP_KERNEL); + sdhci = devm_kzalloc(&pdev->dev, sizeof(*sdhci), GFP_KERNEL); if (!sdhci) { ret = -ENOMEM; dev_dbg(&pdev->dev, "cannot allocate memory for sdhci\n"); - goto err_kzalloc; + goto err; } /* clk enable */ @@ -101,13 +101,13 @@ static int __devinit sdhci_probe(struct platform_device *pdev) if (IS_ERR(sdhci->clk)) { ret = PTR_ERR(sdhci->clk); dev_dbg(&pdev->dev, "Error getting clock\n"); - goto err_clk_get; + goto err; } ret = clk_enable(sdhci->clk); if (ret) { dev_dbg(&pdev->dev, "Error enabling clock\n"); - goto err_clk_enb; + goto put_clk; } /* overwrite platform_data */ @@ -122,7 +122,7 @@ static int __devinit sdhci_probe(struct platform_device *pdev) if (IS_ERR(host)) { ret = PTR_ERR(host); dev_dbg(&pdev->dev, "error allocating host\n"); - goto err_alloc_host; + goto disable_clk; } host->hw_name = "sdhci"; @@ -130,17 +130,18 @@ static int __devinit sdhci_probe(struct platform_device *pdev) host->irq = platform_get_irq(pdev, 0); host->quirks = SDHCI_QUIRK_BROKEN_ADMA; - host->ioaddr = ioremap(iomem->start, resource_size(iomem)); + host->ioaddr = devm_ioremap(&pdev->dev, iomem->start, + resource_size(iomem)); if (!host->ioaddr) { ret = -ENOMEM; dev_dbg(&pdev->dev, "failed to remap registers\n"); - goto err_ioremap; + goto free_host; } ret = sdhci_add_host(host); if (ret) { dev_dbg(&pdev->dev, "error adding host\n"); - goto err_add_host; + goto free_host; } platform_set_drvdata(pdev, host); @@ -159,11 +160,12 @@ static int __devinit sdhci_probe(struct platform_device *pdev) if (sdhci->data->card_power_gpio >= 0) { int val = 0; - ret = gpio_request(sdhci->data->card_power_gpio, "sdhci"); + ret = devm_gpio_request(&pdev->dev, + sdhci->data->card_power_gpio, "sdhci"); if (ret < 0) { dev_dbg(&pdev->dev, "gpio request fail: %d\n", sdhci->data->card_power_gpio); - goto err_pgpio_request; + goto set_drvdata; } if (sdhci->data->power_always_enb) @@ -175,60 +177,48 @@ static int __devinit sdhci_probe(struct platform_device *pdev) if (ret) { dev_dbg(&pdev->dev, "gpio set direction fail: %d\n", sdhci->data->card_power_gpio); - goto err_pgpio_direction; + goto set_drvdata; } } if (sdhci->data->card_int_gpio >= 0) { - ret = gpio_request(sdhci->data->card_int_gpio, "sdhci"); + ret = devm_gpio_request(&pdev->dev, sdhci->data->card_int_gpio, + "sdhci"); if (ret < 0) { dev_dbg(&pdev->dev, "gpio request fail: %d\n", sdhci->data->card_int_gpio); - goto err_igpio_request; + goto set_drvdata; } ret = gpio_direction_input(sdhci->data->card_int_gpio); if (ret) { dev_dbg(&pdev->dev, "gpio set direction fail: %d\n", sdhci->data->card_int_gpio); - goto err_igpio_direction; + goto set_drvdata; } - ret = request_irq(gpio_to_irq(sdhci->data->card_int_gpio), + ret = devm_request_irq(&pdev->dev, + gpio_to_irq(sdhci->data->card_int_gpio), sdhci_gpio_irq, IRQF_TRIGGER_LOW, mmc_hostname(host->mmc), pdev); if (ret) { dev_dbg(&pdev->dev, "gpio request irq fail: %d\n", sdhci->data->card_int_gpio); - goto err_igpio_request_irq; + goto set_drvdata; } } return 0; -err_igpio_request_irq: -err_igpio_direction: - if (sdhci->data->card_int_gpio >= 0) - gpio_free(sdhci->data->card_int_gpio); -err_igpio_request: -err_pgpio_direction: - if (sdhci->data->card_power_gpio >= 0) - gpio_free(sdhci->data->card_power_gpio); -err_pgpio_request: +set_drvdata: platform_set_drvdata(pdev, NULL); sdhci_remove_host(host, 1); -err_add_host: - iounmap(host->ioaddr); -err_ioremap: +free_host: sdhci_free_host(host); -err_alloc_host: +disable_clk: clk_disable(sdhci->clk); -err_clk_enb: +put_clk: clk_put(sdhci->clk); -err_clk_get: - kfree(sdhci); -err_kzalloc: - release_mem_region(iomem->start, resource_size(iomem)); err: dev_err(&pdev->dev, "spear-sdhci probe failed: %d\n", ret); return ret; @@ -237,35 +227,19 @@ err: static int __devexit sdhci_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); - struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct spear_sdhci *sdhci = dev_get_platdata(&pdev->dev); - int dead; + int dead = 0; u32 scratch; - if (sdhci->data) { - if (sdhci->data->card_int_gpio >= 0) { - free_irq(gpio_to_irq(sdhci->data->card_int_gpio), pdev); - gpio_free(sdhci->data->card_int_gpio); - } - - if (sdhci->data->card_power_gpio >= 0) - gpio_free(sdhci->data->card_power_gpio); - } - platform_set_drvdata(pdev, NULL); - dead = 0; scratch = readl(host->ioaddr + SDHCI_INT_STATUS); if (scratch == (u32)-1) dead = 1; sdhci_remove_host(host, dead); - iounmap(host->ioaddr); sdhci_free_host(host); clk_disable(sdhci->clk); clk_put(sdhci->clk); - kfree(sdhci); - if (iomem) - release_mem_region(iomem->start, resource_size(iomem)); return 0; } -- cgit v1.2.2 From 0197b3ea0f66cd2a11417f58fe1812858ea77908 Mon Sep 17 00:00:00 2001 From: Saravana Kannan Date: Wed, 25 Apr 2012 22:58:56 -0700 Subject: clk: Use a separate struct for holding init data. Create a struct clk_init_data to hold all data that needs to be passed from the platfrom specific driver to the common clock framework during clock registration. Add a pointer to this struct inside clk_hw. This has several advantages: * Completely hides struct clk from many clock platform drivers and static clock initialization code that don't care for static initialization of the struct clks. * For platforms that want to do complete static initialization, it removed the need to directly mess with the struct clk's fields while still allowing to statically allocate struct clk. This keeps the code more future proof even if they include clk-private.h. * Simplifies the generic clk_register() function and allows adding optional fields in the future without modifying the function signature. * Simplifies the static initialization of clocks on all platforms by removing the need for forward delcarations or convoluted macros. Signed-off-by: Saravana Kannan [mturquette@linaro.org: kept DEFINE_CLK_* macros and __clk_init] Signed-off-by: Mike Turquette Cc: Andrew Lunn Cc: Rob Herring Cc: Russell King Cc: Jeremy Kerr Cc: Thomas Gleixner Cc: Arnd Bergman Cc: Paul Walmsley Cc: Shawn Guo Cc: Sascha Hauer Cc: Jamie Iles Cc: Richard Zhao Cc: Saravana Kannan Cc: Magnus Damm Cc: Mark Brown Cc: Linus Walleij Cc: Stephen Boyd Cc: Amit Kucheria Cc: Deepak Saxena Cc: Grant Likely --- drivers/clk/clk-divider.c | 14 ++++--- drivers/clk/clk-fixed-rate.c | 14 ++++--- drivers/clk/clk-gate.c | 15 +++++--- drivers/clk/clk-mux.c | 10 ++++- drivers/clk/clk.c | 89 +++++++++++++++++++++++++++----------------- 5 files changed, 89 insertions(+), 53 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 90627e4069af..8ea11b444528 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -167,6 +167,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name, { struct clk_divider *div; struct clk *clk; + struct clk_init_data init; /* allocate the divider */ div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL); @@ -175,19 +176,22 @@ struct clk *clk_register_divider(struct device *dev, const char *name, return ERR_PTR(-ENOMEM); } + init.name = name; + init.ops = &clk_divider_ops; + init.flags = flags; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + /* struct clk_divider assignments */ div->reg = reg; div->shift = shift; div->width = width; div->flags = clk_divider_flags; div->lock = lock; + div->hw.init = &init; /* register the clock */ - clk = clk_register(dev, name, - &clk_divider_ops, &div->hw, - (parent_name ? &parent_name: NULL), - (parent_name ? 1 : 0), - flags); + clk = clk_register(dev, &div->hw); if (IS_ERR(clk)) kfree(div); diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c index b555a04c8df8..cbd246229786 100644 --- a/drivers/clk/clk-fixed-rate.c +++ b/drivers/clk/clk-fixed-rate.c @@ -52,6 +52,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, { struct clk_fixed_rate *fixed; struct clk *clk; + struct clk_init_data init; /* allocate fixed-rate clock */ fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL); @@ -60,15 +61,18 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, return ERR_PTR(-ENOMEM); } + init.name = name; + init.ops = &clk_fixed_rate_ops; + init.flags = flags; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + /* struct clk_fixed_rate assignments */ fixed->fixed_rate = fixed_rate; + fixed->hw.init = &init; /* register the clock */ - clk = clk_register(dev, name, - &clk_fixed_rate_ops, &fixed->hw, - (parent_name ? &parent_name : NULL), - (parent_name ? 1 : 0), - flags); + clk = clk_register(dev, &fixed->hw); if (IS_ERR(clk)) kfree(fixed); diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 00216164fb9d..578465e04be6 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -119,6 +119,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name, { struct clk_gate *gate; struct clk *clk; + struct clk_init_data init; /* allocate the gate */ gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); @@ -127,18 +128,20 @@ struct clk *clk_register_gate(struct device *dev, const char *name, return ERR_PTR(-ENOMEM); } + init.name = name; + init.ops = &clk_gate_ops; + init.flags = flags; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + /* struct clk_gate assignments */ gate->reg = reg; gate->bit_idx = bit_idx; gate->flags = clk_gate_flags; gate->lock = lock; + gate->hw.init = &init; - /* register the clock */ - clk = clk_register(dev, name, - &clk_gate_ops, &gate->hw, - (parent_name ? &parent_name : NULL), - (parent_name ? 1 : 0), - flags); + clk = clk_register(dev, &gate->hw); if (IS_ERR(clk)) kfree(gate); diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 6e58f11ab81f..8e97491902e7 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -95,6 +95,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name, { struct clk_mux *mux; struct clk *clk; + struct clk_init_data init; /* allocate the mux */ mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); @@ -103,6 +104,12 @@ struct clk *clk_register_mux(struct device *dev, const char *name, return ERR_PTR(-ENOMEM); } + init.name = name; + init.ops = &clk_mux_ops; + init.flags = flags; + init.parent_names = parent_names; + init.num_parents = num_parents; + /* struct clk_mux assignments */ mux->reg = reg; mux->shift = shift; @@ -110,8 +117,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name, mux->flags = clk_mux_flags; mux->lock = lock; - clk = clk_register(dev, name, &clk_mux_ops, &mux->hw, - parent_names, num_parents, flags); + clk = clk_register(dev, &mux->hw); if (IS_ERR(clk)) kfree(mux); diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 2dd20c01134d..c81803b9ba35 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1169,26 +1169,6 @@ EXPORT_SYMBOL_GPL(clk_set_parent); * * Initializes the lists in struct clk, queries the hardware for the * parent and rate and sets them both. - * - * Any struct clk passed into __clk_init must have the following members - * populated: - * .name - * .ops - * .hw - * .parent_names - * .num_parents - * .flags - * - * Essentially, everything that would normally be passed into clk_register is - * assumed to be initialized already in __clk_init. The other members may be - * populated, but are optional. - * - * __clk_init is only exposed via clk-private.h and is intended for use with - * very large numbers of clocks that need to be statically initialized. It is - * a layering violation to include clk-private.h from any code which implements - * a clock's .ops; as such any statically initialized clock data MUST be in a - * separate C file from the logic that implements it's operations. Returns 0 - * on success, otherwise an error code. */ int __clk_init(struct device *dev, struct clk *clk) { @@ -1320,15 +1300,48 @@ out: return ret; } +/** + * __clk_register - register a clock and return a cookie. + * + * Same as clk_register, except that the .clk field inside hw shall point to a + * preallocated (generally statically allocated) struct clk. None of the fields + * of the struct clk need to be initialized. + * + * The data pointed to by .init and .clk field shall NOT be marked as init + * data. + * + * __clk_register is only exposed via clk-private.h and is intended for use with + * very large numbers of clocks that need to be statically initialized. It is + * a layering violation to include clk-private.h from any code which implements + * a clock's .ops; as such any statically initialized clock data MUST be in a + * separate C file from the logic that implements it's operations. Returns 0 + * on success, otherwise an error code. + */ +struct clk *__clk_register(struct device *dev, struct clk_hw *hw) +{ + int ret; + struct clk *clk; + + clk = hw->clk; + clk->name = hw->init->name; + clk->ops = hw->init->ops; + clk->hw = hw; + clk->flags = hw->init->flags; + clk->parent_names = hw->init->parent_names; + clk->num_parents = hw->init->num_parents; + + ret = __clk_init(dev, clk); + if (ret) + return ERR_PTR(ret); + + return clk; +} +EXPORT_SYMBOL_GPL(__clk_register); + /** * clk_register - allocate a new clock, register it and return an opaque cookie * @dev: device that is registering this clock - * @name: clock name - * @ops: operations this clock supports * @hw: link to hardware-specific clock data - * @parent_names: array of string names for all possible parents - * @num_parents: number of possible parents - * @flags: framework-level hints and quirks * * clk_register is the primary interface for populating the clock tree with new * clock nodes. It returns a pointer to the newly allocated struct clk which @@ -1336,9 +1349,7 @@ out: * rest of the clock API. In the event of an error clk_register will return an * error code; drivers must test for an error code after calling clk_register. */ -struct clk *clk_register(struct device *dev, const char *name, - const struct clk_ops *ops, struct clk_hw *hw, - const char **parent_names, u8 num_parents, unsigned long flags) +struct clk *clk_register(struct device *dev, struct clk_hw *hw) { int i, ret; struct clk *clk; @@ -1350,15 +1361,20 @@ struct clk *clk_register(struct device *dev, const char *name, goto fail_out; } - clk->name = name; - clk->ops = ops; + clk->name = kstrdup(hw->init->name, GFP_KERNEL); + if (!clk->name) { + pr_err("%s: could not allocate clk->name\n", __func__); + ret = -ENOMEM; + goto fail_name; + } + clk->ops = hw->init->ops; clk->hw = hw; - clk->flags = flags; - clk->num_parents = num_parents; + clk->flags = hw->init->flags; + clk->num_parents = hw->init->num_parents; hw->clk = clk; /* allocate local copy in case parent_names is __initdata */ - clk->parent_names = kzalloc((sizeof(char*) * num_parents), + clk->parent_names = kzalloc((sizeof(char*) * clk->num_parents), GFP_KERNEL); if (!clk->parent_names) { @@ -1369,8 +1385,9 @@ struct clk *clk_register(struct device *dev, const char *name, /* copy each string name in case parent_names is __initdata */ - for (i = 0; i < num_parents; i++) { - clk->parent_names[i] = kstrdup(parent_names[i], GFP_KERNEL); + for (i = 0; i < clk->num_parents; i++) { + clk->parent_names[i] = kstrdup(hw->init->parent_names[i], + GFP_KERNEL); if (!clk->parent_names[i]) { pr_err("%s: could not copy parent_names\n", __func__); ret = -ENOMEM; @@ -1387,6 +1404,8 @@ fail_parent_names_copy: kfree(clk->parent_names[i]); kfree(clk->parent_names); fail_parent_names: + kfree(clk->name); +fail_name: kfree(clk); fail_out: return ERR_PTR(ret); -- cgit v1.2.2 From 0e1c03017549a9df513622b3f15ff38eb8d35a62 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 11 Apr 2012 16:03:42 +0530 Subject: clk: clk_set_rate() must fail if CLK_SET_RATE_GATE is set and clk is enabled This is well documented but isn't implemented. clk_set_rate() must check if flags have CLK_SET_RATE_GATE bit set and is enabled too. Signed-off-by: Viresh Kumar Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index c81803b9ba35..8149764f8438 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -900,6 +900,11 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (rate == clk->rate) goto out; + if ((clk->flags & CLK_SET_RATE_GATE) && __clk_is_enabled(clk)) { + ret = -EBUSY; + goto out; + } + /* calculate new rates and get the topmost changed clock */ top = clk_calc_new_rates(clk, rate); if (!top) { -- cgit v1.2.2 From 000bc9d5ed296550e7009f56cbdb4b35459beb69 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 16 Apr 2012 10:18:43 +0100 Subject: mmc: mmci: Enable Device Tree support for ux500 variants Provide a means to collect attributes specific to ST-Ericsson's ux500 variant series. This patch registers itself as the AMBA driver to be called during the probe process. Once all attributes and ux500 specifics are are collected the normal mmci core probe is called. Signed-off-by: Lee Jones Acked-by: Linus Walleij Acked-by: Arnd Bergmann Signed-off-by: Chris Ball --- drivers/mmc/host/mmci.c | 58 +++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 032b84791a16..5a7da175201c 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1196,21 +1197,70 @@ static const struct mmc_host_ops mmci_ops = { .get_cd = mmci_get_cd, }; +#ifdef CONFIG_OF +static void mmci_dt_populate_generic_pdata(struct device_node *np, + struct mmci_platform_data *pdata) +{ + int bus_width = 0; + + of_property_read_u32(np, "wp-gpios", &pdata->gpio_wp); + if (!pdata->gpio_wp) + pdata->gpio_wp = -1; + + of_property_read_u32(np, "cd-gpios", &pdata->gpio_cd); + if (!pdata->gpio_cd) + pdata->gpio_cd = -1; + + if (of_get_property(np, "cd-inverted", NULL)) + pdata->cd_invert = true; + else + pdata->cd_invert = false; + + of_property_read_u32(np, "max-frequency", &pdata->f_max); + if (!pdata->f_max) + pr_warn("%s has no 'max-frequency' property\n", np->full_name); + + if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL)) + pdata->capabilities |= MMC_CAP_MMC_HIGHSPEED; + if (of_get_property(np, "mmc-cap-sd-highspeed", NULL)) + pdata->capabilities |= MMC_CAP_SD_HIGHSPEED; + + of_property_read_u32(np, "bus-width", &bus_width); + switch (bus_width) { + case 0 : + /* No bus-width supplied. */ + break; + case 4 : + pdata->capabilities |= MMC_CAP_4_BIT_DATA; + break; + case 8 : + pdata->capabilities |= MMC_CAP_8_BIT_DATA; + break; + default : + pr_warn("%s: Unsupported bus width\n", np->full_name); + } +} +#endif + static int __devinit mmci_probe(struct amba_device *dev, const struct amba_id *id) { struct mmci_platform_data *plat = dev->dev.platform_data; + struct device_node *np = dev->dev.of_node; struct variant_data *variant = id->data; struct mmci_host *host; struct mmc_host *mmc; int ret; - /* must have platform data */ - if (!plat) { - ret = -EINVAL; - goto out; + /* Must have platform data or Device Tree. */ + if (!plat && !np) { + dev_err(&dev->dev, "No plat data or DT found\n"); + return -EINVAL; } + if (np) + mmci_dt_populate_generic_pdata(np, plat); + ret = amba_request_regions(dev, DRIVER_NAME); if (ret) goto out; -- cgit v1.2.2 From 9a597016058520665452390df919428e4edd7770 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 12 Apr 2012 16:51:13 +0100 Subject: mmc: mmci: Use correct GPIO binding for IRQ requests Now there are irqdomains in place for Snowball, we can request GPIO IRQs directly by their binding. This replaces the previous method of hard-coding the hwirq using u32 values in the DT. Signed-off-by: Lee Jones Signed-off-by: Chris Ball --- drivers/mmc/host/mmci.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 5a7da175201c..2303a16263ef 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -1203,11 +1204,11 @@ static void mmci_dt_populate_generic_pdata(struct device_node *np, { int bus_width = 0; - of_property_read_u32(np, "wp-gpios", &pdata->gpio_wp); + pdata->gpio_wp = of_get_named_gpio(np, "wp-gpios", 0); if (!pdata->gpio_wp) pdata->gpio_wp = -1; - of_property_read_u32(np, "cd-gpios", &pdata->gpio_cd); + pdata->gpio_cd = of_get_named_gpio(np, "cd-gpios", 0); if (!pdata->gpio_cd) pdata->gpio_cd = -1; -- cgit v1.2.2 From 1ca5513af77307eccea7efd4d12ef5c14f1b12ab Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:17 +0100 Subject: mfd: Fix tps65090 ifdefs for suspend mode CONFIG_PM also covers runtime only PM. Signed-off-by: Mark Brown Acked-by: Venu Byravarasu Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65090.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index a66d4df51293..ac7e8b1f0034 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -334,7 +334,7 @@ static int __devexit tps65090_i2c_remove(struct i2c_client *client) return 0; } -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP static int tps65090_i2c_suspend(struct i2c_client *client, pm_message_t state) { if (client->irq) @@ -363,7 +363,7 @@ static struct i2c_driver tps65090_driver = { }, .probe = tps65090_i2c_probe, .remove = __devexit_p(tps65090_i2c_remove), -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP .suspend = tps65090_i2c_suspend, .resume = tps65090_i2c_resume, #endif -- cgit v1.2.2 From b6c9eeef4e775e1fff76f4395d11638dc198271d Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:18 +0100 Subject: mfd: Don't use I2C-specific suspend and resume operations for tps65090 The legacy suspend operations have been deprecated and printing warnings on boot for over a year now. Signed-off-by: Mark Brown Acked-by: Venu Byravarasu Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65090.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index ac7e8b1f0034..6dc4c345ea68 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -335,21 +335,27 @@ static int __devexit tps65090_i2c_remove(struct i2c_client *client) } #ifdef CONFIG_PM_SLEEP -static int tps65090_i2c_suspend(struct i2c_client *client, pm_message_t state) +static int tps65090_suspend(struct device *dev) { + struct i2c_client *client = to_i2c_client(dev); if (client->irq) disable_irq(client->irq); return 0; } -static int tps65090_i2c_resume(struct i2c_client *client) +static int tps65090_resume(struct device *dev) { + struct i2c_client *client = to_i2c_client(dev); if (client->irq) enable_irq(client->irq); return 0; } #endif +static const struct dev_pm_ops tps65090_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(tps65090_suspend, tps65090_resume) +}; + static const struct i2c_device_id tps65090_id_table[] = { { "tps65090", 0 }, { }, @@ -360,13 +366,10 @@ static struct i2c_driver tps65090_driver = { .driver = { .name = "tps65090", .owner = THIS_MODULE, + .pm = &tps65090_pm_ops, }, .probe = tps65090_i2c_probe, .remove = __devexit_p(tps65090_i2c_remove), -#ifdef CONFIG_PM_SLEEP - .suspend = tps65090_i2c_suspend, - .resume = tps65090_i2c_resume, -#endif .id_table = tps65090_id_table, }; -- cgit v1.2.2 From 63745d4068de8ccea3580214c6dbfdca0ec37859 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:19 +0100 Subject: mfd: Fix tps65910 section annotations A warning was being generated by the reference from tps65910_i2c_probe() to tps65910_sleepinit() since the latter was annotated as __init but the former was unannotated. Since these functions can only be called during device init make them both __devinit, and while we're at it also annotate tps65910_i2c_remove() __devexit for symmetry. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index ae7f47b6e71b..7a55af921e25 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -90,7 +90,7 @@ static const struct regmap_config tps65910_regmap_config = { .cache_type = REGCACHE_RBTREE, }; -static int __init tps65910_sleepinit(struct tps65910 *tps65910, +static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, struct tps65910_board *pmic_pdata) { struct device *dev = NULL; @@ -150,8 +150,8 @@ err_sleep_init: } -static int tps65910_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) +static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) { struct tps65910 *tps65910; struct tps65910_board *pmic_plat_data; @@ -213,7 +213,7 @@ regmap_err: return ret; } -static int tps65910_i2c_remove(struct i2c_client *i2c) +static __devexit int tps65910_i2c_remove(struct i2c_client *i2c) { struct tps65910 *tps65910 = i2c_get_clientdata(i2c); @@ -239,7 +239,7 @@ static struct i2c_driver tps65910_i2c_driver = { .owner = THIS_MODULE, }, .probe = tps65910_i2c_probe, - .remove = tps65910_i2c_remove, + .remove = __devexit_p(tps65910_i2c_remove), .id_table = tps65910_i2c_id, }; -- cgit v1.2.2 From ce7e4e11221dd7fbe82c8ad28d1875b0dfa20de4 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:20 +0100 Subject: mfd: Fix wm831x register range passing for recent ARM updates The removal of mach/io.h from most ARM platforms also set the range of valid IO ports to be empty for most platforms when previously any 32 bit integer had been valid. This makes it impossible to add IO resources as the added range is smaller than that of the root resource for IO ports. Since we're not really using IO memory at all fix this by defining our own root resource outside the normal tree and make that the parent of all IO resources. This also ensures we won't conflict with read IO ports if we ever run on a platform which happens to use them. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm831x-core.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c index 838056c3493a..476e4d31a823 100644 --- a/drivers/mfd/wm831x-core.c +++ b/drivers/mfd/wm831x-core.c @@ -614,8 +614,15 @@ int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg, } EXPORT_SYMBOL_GPL(wm831x_set_bits); +static struct resource wm831x_io_parent = { + .start = 0, + .end = 0xffffffff, + .flags = IORESOURCE_IO, +}; + static struct resource wm831x_dcdc1_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_DC1_CONTROL_1, .end = WM831X_DC1_DVS_CONTROL, .flags = IORESOURCE_IO, @@ -637,6 +644,7 @@ static struct resource wm831x_dcdc1_resources[] = { static struct resource wm831x_dcdc2_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_DC2_CONTROL_1, .end = WM831X_DC2_DVS_CONTROL, .flags = IORESOURCE_IO, @@ -657,6 +665,7 @@ static struct resource wm831x_dcdc2_resources[] = { static struct resource wm831x_dcdc3_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_DC3_CONTROL_1, .end = WM831X_DC3_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -671,6 +680,7 @@ static struct resource wm831x_dcdc3_resources[] = { static struct resource wm831x_dcdc4_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_DC4_CONTROL, .end = WM831X_DC4_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -685,6 +695,7 @@ static struct resource wm831x_dcdc4_resources[] = { static struct resource wm8320_dcdc4_buck_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_DC4_CONTROL, .end = WM832X_DC4_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -707,6 +718,7 @@ static struct resource wm831x_gpio_resources[] = { static struct resource wm831x_isink1_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_CURRENT_SINK_1, .end = WM831X_CURRENT_SINK_1, .flags = IORESOURCE_IO, @@ -720,6 +732,7 @@ static struct resource wm831x_isink1_resources[] = { static struct resource wm831x_isink2_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_CURRENT_SINK_2, .end = WM831X_CURRENT_SINK_2, .flags = IORESOURCE_IO, @@ -733,6 +746,7 @@ static struct resource wm831x_isink2_resources[] = { static struct resource wm831x_ldo1_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO1_CONTROL, .end = WM831X_LDO1_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -747,6 +761,7 @@ static struct resource wm831x_ldo1_resources[] = { static struct resource wm831x_ldo2_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO2_CONTROL, .end = WM831X_LDO2_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -761,6 +776,7 @@ static struct resource wm831x_ldo2_resources[] = { static struct resource wm831x_ldo3_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO3_CONTROL, .end = WM831X_LDO3_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -775,6 +791,7 @@ static struct resource wm831x_ldo3_resources[] = { static struct resource wm831x_ldo4_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO4_CONTROL, .end = WM831X_LDO4_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -789,6 +806,7 @@ static struct resource wm831x_ldo4_resources[] = { static struct resource wm831x_ldo5_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO5_CONTROL, .end = WM831X_LDO5_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -803,6 +821,7 @@ static struct resource wm831x_ldo5_resources[] = { static struct resource wm831x_ldo6_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO6_CONTROL, .end = WM831X_LDO6_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -817,6 +836,7 @@ static struct resource wm831x_ldo6_resources[] = { static struct resource wm831x_ldo7_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO7_CONTROL, .end = WM831X_LDO7_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -831,6 +851,7 @@ static struct resource wm831x_ldo7_resources[] = { static struct resource wm831x_ldo8_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO8_CONTROL, .end = WM831X_LDO8_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -845,6 +866,7 @@ static struct resource wm831x_ldo8_resources[] = { static struct resource wm831x_ldo9_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO9_CONTROL, .end = WM831X_LDO9_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -859,6 +881,7 @@ static struct resource wm831x_ldo9_resources[] = { static struct resource wm831x_ldo10_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO10_CONTROL, .end = WM831X_LDO10_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -873,6 +896,7 @@ static struct resource wm831x_ldo10_resources[] = { static struct resource wm831x_ldo11_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_LDO11_ON_CONTROL, .end = WM831X_LDO11_SLEEP_CONTROL, .flags = IORESOURCE_IO, @@ -974,6 +998,7 @@ static struct resource wm831x_rtc_resources[] = { static struct resource wm831x_status1_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_STATUS_LED_1, .end = WM831X_STATUS_LED_1, .flags = IORESOURCE_IO, @@ -982,6 +1007,7 @@ static struct resource wm831x_status1_resources[] = { static struct resource wm831x_status2_resources[] = { { + .parent = &wm831x_io_parent, .start = WM831X_STATUS_LED_2, .end = WM831X_STATUS_LED_2, .flags = IORESOURCE_IO, -- cgit v1.2.2 From b7b142d9fc056e98e6fdef82dca3e87067517340 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:21 +0100 Subject: mfd: Convert wm8350 physical I/O to regmap API The driver still uses a custom cache implementation but the underlying physical I/O is now done using the regmap API, saving some code and avoiding allocating enormous scratch arrays on the stack. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8350-core.c | 31 +++++++++------------------ drivers/mfd/wm8350-i2c.c | 53 ++++++++++++++--------------------------------- 2 files changed, 25 insertions(+), 59 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index dd1caaac55e4..8a9b11ca076a 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -74,7 +75,7 @@ static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs, int bytes = num_regs * 2; dev_dbg(wm8350->dev, "volatile read\n"); - ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest); + ret = regmap_raw_read(wm8350->regmap, reg, dest, bytes); for (i = reg; i < reg + num_regs; i++) { /* Cache is CPU endian */ @@ -96,9 +97,6 @@ static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest) int ret = 0; int bytes = num_regs * 2; - if (wm8350->read_dev == NULL) - return -ENODEV; - if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) { dev_err(wm8350->dev, "invalid reg %x\n", reg + num_regs - 1); @@ -149,9 +147,6 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src) int end = reg + num_regs; int bytes = num_regs * 2; - if (wm8350->write_dev == NULL) - return -ENODEV; - if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) { dev_err(wm8350->dev, "invalid reg %x\n", reg + num_regs - 1); @@ -182,7 +177,7 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src) } /* Actually write it out */ - return wm8350->write_dev(wm8350, reg, bytes, (char *)src); + return regmap_raw_write(wm8350->regmap, reg, src, bytes); } /* @@ -515,9 +510,8 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode) * a PMIC so the device many not be in a virgin state and we * can't rely on the silicon values. */ - ret = wm8350->read_dev(wm8350, 0, - sizeof(u16) * (WM8350_MAX_REGISTER + 1), - wm8350->reg_cache); + ret = regmap_raw_read(wm8350->regmap, 0, wm8350->reg_cache, + sizeof(u16) * (WM8350_MAX_REGISTER + 1)); if (ret < 0) { dev_err(wm8350->dev, "failed to read initial cache values\n"); @@ -570,35 +564,30 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq, struct wm8350_platform_data *pdata) { int ret; - u16 id1, id2, mask_rev; - u16 cust_id, mode, chip_rev; + unsigned int id1, id2, mask_rev; + unsigned int cust_id, mode, chip_rev; dev_set_drvdata(wm8350->dev, wm8350); /* get WM8350 revision and config mode */ - ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1); + ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1); if (ret != 0) { dev_err(wm8350->dev, "Failed to read ID: %d\n", ret); goto err; } - ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2); + ret = regmap_read(wm8350->regmap, WM8350_ID, &id2); if (ret != 0) { dev_err(wm8350->dev, "Failed to read ID: %d\n", ret); goto err; } - ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev), - &mask_rev); + ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev); if (ret != 0) { dev_err(wm8350->dev, "Failed to read revision: %d\n", ret); goto err; } - id1 = be16_to_cpu(id1); - id2 = be16_to_cpu(id2); - mask_rev = be16_to_cpu(mask_rev); - if (id1 != 0x6143) { dev_err(wm8350->dev, "Device with ID %x is not a WM8350\n", id1); diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c index d955faaf27c4..271589f8e8e3 100644 --- a/drivers/mfd/wm8350-i2c.c +++ b/drivers/mfd/wm8350-i2c.c @@ -15,47 +15,18 @@ #include #include +#include #include #include #include #include +#include #include -static int wm8350_i2c_read_device(struct wm8350 *wm8350, char reg, - int bytes, void *dest) -{ - int ret; - - ret = i2c_master_send(wm8350->i2c_client, ®, 1); - if (ret < 0) - return ret; - ret = i2c_master_recv(wm8350->i2c_client, dest, bytes); - if (ret < 0) - return ret; - if (ret != bytes) - return -EIO; - return 0; -} - -static int wm8350_i2c_write_device(struct wm8350 *wm8350, char reg, - int bytes, void *src) -{ - /* we add 1 byte for device register */ - u8 msg[(WM8350_MAX_REGISTER << 1) + 1]; - int ret; - - if (bytes > ((WM8350_MAX_REGISTER << 1) + 1)) - return -EINVAL; - - msg[0] = reg; - memcpy(&msg[1], src, bytes); - ret = i2c_master_send(wm8350->i2c_client, msg, bytes + 1); - if (ret < 0) - return ret; - if (ret != bytes + 1) - return -EIO; - return 0; -} +static const struct regmap_config wm8350_regmap = { + .reg_bits = 8, + .val_bits = 16, +}; static int wm8350_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) @@ -67,11 +38,16 @@ static int wm8350_i2c_probe(struct i2c_client *i2c, if (wm8350 == NULL) return -ENOMEM; + wm8350->regmap = devm_regmap_init_i2c(i2c, &wm8350_regmap); + if (IS_ERR(wm8350->regmap)) { + ret = PTR_ERR(wm8350->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + i2c_set_clientdata(i2c, wm8350); wm8350->dev = &i2c->dev; - wm8350->i2c_client = i2c; - wm8350->read_dev = wm8350_i2c_read_device; - wm8350->write_dev = wm8350_i2c_write_device; ret = wm8350_device_init(wm8350, i2c->irq, i2c->dev.platform_data); if (ret < 0) @@ -80,6 +56,7 @@ static int wm8350_i2c_probe(struct i2c_client *i2c, return ret; err: + regmap_exit(wm8350->regmap); return ret; } -- cgit v1.2.2 From cc7a727941193e3e59be2e9f6522eb78bc7ee909 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:22 +0100 Subject: mfd: Read CUST_ID from the wm8994 device Read CUST_ID from the device and log it for diagnostics. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8994-core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 9d7ca1e978fa..60e617549edd 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -500,7 +500,8 @@ static __devinit int wm8994_device_init(struct wm8994 *wm8994, int irq) ret); goto err_enable; } - wm8994->revision = ret; + wm8994->revision = ret & WM8994_CHIP_REV_MASK; + wm8994->cust_id = (ret & WM8994_CUST_ID_MASK) >> WM8994_CUST_ID_SHIFT; switch (wm8994->type) { case WM8994: @@ -553,8 +554,8 @@ static __devinit int wm8994_device_init(struct wm8994 *wm8994, int irq) break; } - dev_info(wm8994->dev, "%s revision %c\n", devname, - 'A' + wm8994->revision); + dev_info(wm8994->dev, "%s revision %c CUST_ID %02x\n", devname, + 'A' + wm8994->revision, wm8994->cust_id); switch (wm8994->type) { case WM1811: -- cgit v1.2.2 From ceb57d27e28a8f979cbfd6391b7da6da51484059 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 7 May 2012 10:03:23 +0100 Subject: mfd: Convert wm8994 to module_i2c_driver() Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8994-core.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 60e617549edd..1e321d349777 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -733,23 +733,7 @@ static struct i2c_driver wm8994_i2c_driver = { .id_table = wm8994_i2c_id, }; -static int __init wm8994_i2c_init(void) -{ - int ret; - - ret = i2c_add_driver(&wm8994_i2c_driver); - if (ret != 0) - pr_err("Failed to register wm8994 I2C driver: %d\n", ret); - - return ret; -} -module_init(wm8994_i2c_init); - -static void __exit wm8994_i2c_exit(void) -{ - i2c_del_driver(&wm8994_i2c_driver); -} -module_exit(wm8994_i2c_exit); +module_i2c_driver(wm8994_i2c_driver); MODULE_DESCRIPTION("Core support for the WM8994 audio CODEC"); MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 211063dc159695bd6072c5393e9bc729481c6ede Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk Date: Thu, 8 Dec 2011 17:32:23 +0800 Subject: xen/acpi/sleep: Enable ACPI sleep via the __acpi_os_prepare_sleep Provide the registration callback to call in the Xen's ACPI sleep functionality. This means that during S3/S5 we make a hypercall XENPF_enter_acpi_sleep with the proper PM1A/PM1B registers. Based of Ke Yu's initial idea. [ From http://xenbits.xensource.com/linux-2.6.18-xen.hg change c68699484a65 ] [v1: Added Copyright and license] [v2: Added check if PM1A/B the 16-bits MSB contain something. The spec only uses 16-bits but might have more in future] Signed-off-by: Liang Tang Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/Makefile | 2 +- drivers/xen/acpi.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 drivers/xen/acpi.c (limited to 'drivers') diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile index 9adc5be57b13..fc3488631136 100644 --- a/drivers/xen/Makefile +++ b/drivers/xen/Makefile @@ -17,7 +17,7 @@ obj-$(CONFIG_XEN_SYS_HYPERVISOR) += sys-hypervisor.o obj-$(CONFIG_XEN_PVHVM) += platform-pci.o obj-$(CONFIG_XEN_TMEM) += tmem.o obj-$(CONFIG_SWIOTLB_XEN) += swiotlb-xen.o -obj-$(CONFIG_XEN_DOM0) += pci.o +obj-$(CONFIG_XEN_DOM0) += pci.o acpi.o obj-$(CONFIG_XEN_PCIDEV_BACKEND) += xen-pciback/ obj-$(CONFIG_XEN_PRIVCMD) += xen-privcmd.o obj-$(CONFIG_XEN_ACPI_PROCESSOR) += xen-acpi-processor.o diff --git a/drivers/xen/acpi.c b/drivers/xen/acpi.c new file mode 100644 index 000000000000..119d42a2bf57 --- /dev/null +++ b/drivers/xen/acpi.c @@ -0,0 +1,62 @@ +/****************************************************************************** + * acpi.c + * acpi file for domain 0 kernel + * + * Copyright (c) 2011 Konrad Rzeszutek Wilk + * Copyright (c) 2011 Yu Ke ke.yu@intel.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation; or, when distributed + * separately from the Linux kernel or incorporated into other + * software packages, subject to the following license: + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this source file (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, modify, + * merge, publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include + +int xen_acpi_notify_hypervisor_state(u8 sleep_state, + u32 pm1a_cnt, u32 pm1b_cnt) +{ + struct xen_platform_op op = { + .cmd = XENPF_enter_acpi_sleep, + .interface_version = XENPF_INTERFACE_VERSION, + .u = { + .enter_acpi_sleep = { + .pm1a_cnt_val = (u16)pm1a_cnt, + .pm1b_cnt_val = (u16)pm1b_cnt, + .sleep_state = sleep_state, + }, + }, + }; + + if ((pm1a_cnt & 0xffff0000) || (pm1b_cnt & 0xffff0000)) { + WARN(1, "Using more than 16bits of PM1A/B 0x%x/0x%x!" + "Email xen-devel@lists.xensource.com Thank you.\n", \ + pm1a_cnt, pm1b_cnt); + return -1; + } + + HYPERVISOR_dom0_op(&op); + return 1; +} -- cgit v1.2.2 From f62805f1f30a40e354bd036b4cb799863a39be4b Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Tue, 24 Apr 2012 11:55:43 +0100 Subject: xen: enter/exit lazy_mmu_mode around m2p_override calls This patch is a significant performance improvement for the m2p_override: about 6% using the gntdev device. Each m2p_add/remove_override call issues a MULTI_grant_table_op and a __flush_tlb_single if kmap_op != NULL. Batching all the calls together is a great performance benefit because it means issuing one hypercall total rather than two hypercall per page. If paravirt_lazy_mode is set PARAVIRT_LAZY_MMU, all these calls are going to be batched together, otherwise they are issued one at a time. Adding arch_enter_lazy_mmu_mode/arch_leave_lazy_mmu_mode around the m2p_add/remove_override calls forces paravirt_lazy_mode to PARAVIRT_LAZY_MMU, therefore makes sure that they are always batched. However it is not safe to call arch_enter_lazy_mmu_mode if we are in interrupt context or if we are already in PARAVIRT_LAZY_MMU mode, so check for both conditions before doing so. Changes in v4: - rebased on 3.4-rc4: all the m2p_override users call gnttab_unmap_refs and gnttab_map_refs; - check whether we are in interrupt context and the lazy_mode we are in before calling arch_enter/leave_lazy_mmu_mode. Changes in v3: - do not call arch_enter/leave_lazy_mmu_mode in xen_blkbk_unmap, that can be called in interrupt context. Signed-off-by: Stefano Stabellini [v5: s/int lazy/bool lazy/] Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/grant-table.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'drivers') diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c index 9f514bb561af..487e468f9ded 100644 --- a/drivers/xen/grant-table.c +++ b/drivers/xen/grant-table.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include @@ -827,6 +828,7 @@ int gnttab_map_refs(struct gnttab_map_grant_ref *map_ops, struct page **pages, unsigned int count) { int i, ret; + bool lazy = false; pte_t *pte; unsigned long mfn; @@ -837,6 +839,11 @@ int gnttab_map_refs(struct gnttab_map_grant_ref *map_ops, if (xen_feature(XENFEAT_auto_translated_physmap)) return ret; + if (!in_interrupt() && paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE) { + arch_enter_lazy_mmu_mode(); + lazy = true; + } + for (i = 0; i < count; i++) { /* Do not add to override if the map failed. */ if (map_ops[i].status) @@ -855,6 +862,9 @@ int gnttab_map_refs(struct gnttab_map_grant_ref *map_ops, return ret; } + if (lazy) + arch_leave_lazy_mmu_mode(); + return ret; } EXPORT_SYMBOL_GPL(gnttab_map_refs); @@ -863,6 +873,7 @@ int gnttab_unmap_refs(struct gnttab_unmap_grant_ref *unmap_ops, struct page **pages, unsigned int count, bool clear_pte) { int i, ret; + bool lazy = false; ret = HYPERVISOR_grant_table_op(GNTTABOP_unmap_grant_ref, unmap_ops, count); if (ret) @@ -871,12 +882,20 @@ int gnttab_unmap_refs(struct gnttab_unmap_grant_ref *unmap_ops, if (xen_feature(XENFEAT_auto_translated_physmap)) return ret; + if (!in_interrupt() && paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE) { + arch_enter_lazy_mmu_mode(); + lazy = true; + } + for (i = 0; i < count; i++) { ret = m2p_remove_override(pages[i], clear_pte); if (ret) return ret; } + if (lazy) + arch_leave_lazy_mmu_mode(); + return ret; } EXPORT_SYMBOL_GPL(gnttab_unmap_refs); -- cgit v1.2.2 From c0a120a4bc68f5dc5f5238e76013cc18bac0ffed Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Tue, 8 May 2012 13:59:38 +0100 Subject: mmc: mmci: Fix compiler error when CONFIG_OF is not set error: implicit declaration of function 'mmci_dt_populate_generic_pdata' This is due to the '#if CONFIG_OF' guards placed around mmci_dt_populate_generic_pdata(), but not around the call to it. We repair this by inserting a stub which elegantly returns when CONFIG_OF is not set. Reported-by: Paul Gortmaker Signed-off-by: Lee Jones Signed-off-by: Chris Ball --- drivers/mmc/host/mmci.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 2303a16263ef..efc822df4b75 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1241,6 +1241,12 @@ static void mmci_dt_populate_generic_pdata(struct device_node *np, pr_warn("%s: Unsupported bus width\n", np->full_name); } } +#else +static void mmci_dt_populate_generic_pdata(struct device_node *np, + struct mmci_platform_data *pdata) +{ + return; +} #endif static int __devinit mmci_probe(struct amba_device *dev, -- cgit v1.2.2 From 23b5e15a2994fb0c1444f92b76f09a482f32843c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 29 Apr 2012 00:02:34 +0800 Subject: clk: mxs: add mxs specific clocks Add mxs specific clocks, pll, reference clock (PFD), integer divider and fractional divider. Signed-off-by: Shawn Guo --- drivers/clk/mxs/Makefile | 5 ++ drivers/clk/mxs/clk-div.c | 110 ++++++++++++++++++++++++++++++++ drivers/clk/mxs/clk-frac.c | 139 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/mxs/clk-pll.c | 116 ++++++++++++++++++++++++++++++++++ drivers/clk/mxs/clk-ref.c | 154 +++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/mxs/clk.c | 28 +++++++++ drivers/clk/mxs/clk.h | 66 +++++++++++++++++++ 7 files changed, 618 insertions(+) create mode 100644 drivers/clk/mxs/Makefile create mode 100644 drivers/clk/mxs/clk-div.c create mode 100644 drivers/clk/mxs/clk-frac.c create mode 100644 drivers/clk/mxs/clk-pll.c create mode 100644 drivers/clk/mxs/clk-ref.c create mode 100644 drivers/clk/mxs/clk.c create mode 100644 drivers/clk/mxs/clk.h (limited to 'drivers') diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile new file mode 100644 index 000000000000..d9472a809bba --- /dev/null +++ b/drivers/clk/mxs/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for mxs specific clk +# + +obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c new file mode 100644 index 000000000000..90e1da93877e --- /dev/null +++ b/drivers/clk/mxs/clk-div.c @@ -0,0 +1,110 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include "clk.h" + +/** + * struct clk_div - mxs integer divider clock + * @divider: the parent class + * @ops: pointer to clk_ops of parent class + * @reg: register address + * @busy: busy bit shift + * + * The mxs divider clock is a subclass of basic clk_divider with an + * addtional busy bit. + */ +struct clk_div { + struct clk_divider divider; + const struct clk_ops *ops; + void __iomem *reg; + u8 busy; +}; + +static inline struct clk_div *to_clk_div(struct clk_hw *hw) +{ + struct clk_divider *divider = container_of(hw, struct clk_divider, hw); + + return container_of(divider, struct clk_div, divider); +} + +static unsigned long clk_div_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_div *div = to_clk_div(hw); + + return div->ops->recalc_rate(&div->divider.hw, parent_rate); +} + +static long clk_div_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + struct clk_div *div = to_clk_div(hw); + + return div->ops->round_rate(&div->divider.hw, rate, prate); +} + +static int clk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_div *div = to_clk_div(hw); + int ret; + + ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); + if (!ret) + ret = mxs_clk_wait(div->reg, div->busy); + + return ret; +} + +static struct clk_ops clk_div_ops = { + .recalc_rate = clk_div_recalc_rate, + .round_rate = clk_div_round_rate, + .set_rate = clk_div_set_rate, +}; + +struct clk *mxs_clk_div(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy) +{ + struct clk_div *div; + struct clk *clk; + struct clk_init_data init; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &clk_div_ops; + init.flags = CLK_SET_RATE_PARENT; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + + div->reg = reg; + div->busy = busy; + + div->divider.reg = reg; + div->divider.shift = shift; + div->divider.width = width; + div->divider.flags = CLK_DIVIDER_ONE_BASED; + div->divider.lock = &mxs_lock; + div->divider.hw.init = &init; + div->ops = &clk_divider_ops; + + clk = clk_register(NULL, &div->divider.hw); + if (IS_ERR(clk)) + kfree(div); + + return clk; +} diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c new file mode 100644 index 000000000000..e6aa6b567d68 --- /dev/null +++ b/drivers/clk/mxs/clk-frac.c @@ -0,0 +1,139 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include "clk.h" + +/** + * struct clk_frac - mxs fractional divider clock + * @hw: clk_hw for the fractional divider clock + * @reg: register address + * @shift: the divider bit shift + * @width: the divider bit width + * @busy: busy bit shift + * + * The clock is an adjustable fractional divider with a busy bit to wait + * when the divider is adjusted. + */ +struct clk_frac { + struct clk_hw hw; + void __iomem *reg; + u8 shift; + u8 width; + u8 busy; +}; + +#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw) + +static unsigned long clk_frac_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_frac *frac = to_clk_frac(hw); + u32 div; + + div = readl_relaxed(frac->reg) >> frac->shift; + div &= (1 << frac->width) - 1; + + return (parent_rate >> frac->width) * div; +} + +static long clk_frac_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + struct clk_frac *frac = to_clk_frac(hw); + unsigned long parent_rate = *prate; + u32 div; + u64 tmp; + + if (rate > parent_rate) + return -EINVAL; + + tmp = rate; + tmp <<= frac->width; + do_div(tmp, parent_rate); + div = tmp; + + if (!div) + return -EINVAL; + + return (parent_rate >> frac->width) * div; +} + +static int clk_frac_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_frac *frac = to_clk_frac(hw); + unsigned long flags; + u32 div, val; + u64 tmp; + + if (rate > parent_rate) + return -EINVAL; + + tmp = rate; + tmp <<= frac->width; + do_div(tmp, parent_rate); + div = tmp; + + if (!div) + return -EINVAL; + + spin_lock_irqsave(&mxs_lock, flags); + + val = readl_relaxed(frac->reg); + val &= ~(((1 << frac->width) - 1) << frac->shift); + val |= div << frac->shift; + writel_relaxed(val, frac->reg); + + spin_unlock_irqrestore(&mxs_lock, flags); + + return mxs_clk_wait(frac->reg, frac->busy); +} + +static struct clk_ops clk_frac_ops = { + .recalc_rate = clk_frac_recalc_rate, + .round_rate = clk_frac_round_rate, + .set_rate = clk_frac_set_rate, +}; + +struct clk *mxs_clk_frac(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy) +{ + struct clk_frac *frac; + struct clk *clk; + struct clk_init_data init; + + frac = kzalloc(sizeof(*frac), GFP_KERNEL); + if (!frac) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &clk_frac_ops; + init.flags = CLK_SET_RATE_PARENT; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + + frac->reg = reg; + frac->shift = shift; + frac->width = width; + frac->busy = busy; + frac->hw.init = &init; + + clk = clk_register(NULL, &frac->hw); + if (IS_ERR(clk)) + kfree(frac); + + return clk; +} diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c new file mode 100644 index 000000000000..fadae41833ec --- /dev/null +++ b/drivers/clk/mxs/clk-pll.c @@ -0,0 +1,116 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "clk.h" + +/** + * struct clk_pll - mxs pll clock + * @hw: clk_hw for the pll + * @base: base address of the pll + * @power: the shift of power bit + * @rate: the clock rate of the pll + * + * The mxs pll is a fixed rate clock with power and gate control, + * and the shift of gate bit is always 31. + */ +struct clk_pll { + struct clk_hw hw; + void __iomem *base; + u8 power; + unsigned long rate; +}; + +#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) + +static int clk_pll_prepare(struct clk_hw *hw) +{ + struct clk_pll *pll = to_clk_pll(hw); + + writel_relaxed(1 << pll->power, pll->base + SET); + + udelay(10); + + return 0; +} + +static void clk_pll_unprepare(struct clk_hw *hw) +{ + struct clk_pll *pll = to_clk_pll(hw); + + writel_relaxed(1 << pll->power, pll->base + CLR); +} + +static int clk_pll_enable(struct clk_hw *hw) +{ + struct clk_pll *pll = to_clk_pll(hw); + + writel_relaxed(1 << 31, pll->base + CLR); + + return 0; +} + +static void clk_pll_disable(struct clk_hw *hw) +{ + struct clk_pll *pll = to_clk_pll(hw); + + writel_relaxed(1 << 31, pll->base + SET); +} + +static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_pll *pll = to_clk_pll(hw); + + return pll->rate; +} + +static const struct clk_ops clk_pll_ops = { + .prepare = clk_pll_prepare, + .unprepare = clk_pll_unprepare, + .enable = clk_pll_enable, + .disable = clk_pll_disable, + .recalc_rate = clk_pll_recalc_rate, +}; + +struct clk *mxs_clk_pll(const char *name, const char *parent_name, + void __iomem *base, u8 power, unsigned long rate) +{ + struct clk_pll *pll; + struct clk *clk; + struct clk_init_data init; + + pll = kzalloc(sizeof(*pll), GFP_KERNEL); + if (!pll) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &clk_pll_ops; + init.flags = 0; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + + pll->base = base; + pll->rate = rate; + pll->power = power; + pll->hw.init = &init; + + clk = clk_register(NULL, &pll->hw); + if (IS_ERR(clk)) + kfree(pll); + + return clk; +} diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c new file mode 100644 index 000000000000..4adeed6c2f94 --- /dev/null +++ b/drivers/clk/mxs/clk-ref.c @@ -0,0 +1,154 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include "clk.h" + +/** + * struct clk_ref - mxs reference clock + * @hw: clk_hw for the reference clock + * @reg: register address + * @idx: the index of the reference clock within the same register + * + * The mxs reference clock sources from pll. Every 4 reference clocks share + * one register space, and @idx is used to identify them. Each reference + * clock has a gate control and a fractional * divider. The rate is calculated + * as pll rate * (18 / FRAC), where FRAC = 18 ~ 35. + */ +struct clk_ref { + struct clk_hw hw; + void __iomem *reg; + u8 idx; +}; + +#define to_clk_ref(_hw) container_of(_hw, struct clk_ref, hw) + +static int clk_ref_enable(struct clk_hw *hw) +{ + struct clk_ref *ref = to_clk_ref(hw); + + writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR); + + return 0; +} + +static void clk_ref_disable(struct clk_hw *hw) +{ + struct clk_ref *ref = to_clk_ref(hw); + + writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + SET); +} + +static unsigned long clk_ref_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_ref *ref = to_clk_ref(hw); + u64 tmp = parent_rate; + u8 frac = (readl_relaxed(ref->reg) >> (ref->idx * 8)) & 0x3f; + + tmp *= 18; + do_div(tmp, frac); + + return tmp; +} + +static long clk_ref_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + unsigned long parent_rate = *prate; + u64 tmp = parent_rate; + u8 frac; + + tmp = tmp * 18 + rate / 2; + do_div(tmp, rate); + frac = tmp; + + if (frac < 18) + frac = 18; + else if (frac > 35) + frac = 35; + + tmp = parent_rate; + tmp *= 18; + do_div(tmp, frac); + + return tmp; +} + +static int clk_ref_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_ref *ref = to_clk_ref(hw); + unsigned long flags; + u64 tmp = parent_rate; + u32 val; + u8 frac, shift = ref->idx * 8; + + tmp = tmp * 18 + rate / 2; + do_div(tmp, rate); + frac = tmp; + + if (frac < 18) + frac = 18; + else if (frac > 35) + frac = 35; + + spin_lock_irqsave(&mxs_lock, flags); + + val = readl_relaxed(ref->reg); + val &= ~(0x3f << shift); + val |= frac << shift; + writel_relaxed(val, ref->reg); + + spin_unlock_irqrestore(&mxs_lock, flags); + + return 0; +} + +static const struct clk_ops clk_ref_ops = { + .enable = clk_ref_enable, + .disable = clk_ref_disable, + .recalc_rate = clk_ref_recalc_rate, + .round_rate = clk_ref_round_rate, + .set_rate = clk_ref_set_rate, +}; + +struct clk *mxs_clk_ref(const char *name, const char *parent_name, + void __iomem *reg, u8 idx) +{ + struct clk_ref *ref; + struct clk *clk; + struct clk_init_data init; + + ref = kzalloc(sizeof(*ref), GFP_KERNEL); + if (!ref) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &clk_ref_ops; + init.flags = 0; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); + + ref->reg = reg; + ref->idx = idx; + ref->hw.init = &init; + + clk = clk_register(NULL, &ref->hw); + if (IS_ERR(clk)) + kfree(ref); + + return clk; +} diff --git a/drivers/clk/mxs/clk.c b/drivers/clk/mxs/clk.c new file mode 100644 index 000000000000..b24d56067c80 --- /dev/null +++ b/drivers/clk/mxs/clk.c @@ -0,0 +1,28 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include + +DEFINE_SPINLOCK(mxs_lock); + +int mxs_clk_wait(void __iomem *reg, u8 shift) +{ + unsigned long timeout = jiffies + msecs_to_jiffies(10); + + while (readl_relaxed(reg) & (1 << shift)) + if (time_after(jiffies, timeout)) + return -ETIMEDOUT; + + return 0; +} diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h new file mode 100644 index 000000000000..81421e28e69c --- /dev/null +++ b/drivers/clk/mxs/clk.h @@ -0,0 +1,66 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MXS_CLK_H +#define __MXS_CLK_H + +#include +#include +#include + +#define SET 0x4 +#define CLR 0x8 + +extern spinlock_t mxs_lock; + +int mxs_clk_wait(void __iomem *reg, u8 shift); + +struct clk *mxs_clk_pll(const char *name, const char *parent_name, + void __iomem *base, u8 power, unsigned long rate); + +struct clk *mxs_clk_ref(const char *name, const char *parent_name, + void __iomem *reg, u8 idx); + +struct clk *mxs_clk_div(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy); + +struct clk *mxs_clk_frac(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy); + +static inline struct clk *mxs_clk_fixed(const char *name, int rate) +{ + return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); +} + +static inline struct clk *mxs_clk_gate(const char *name, + const char *parent_name, void __iomem *reg, u8 shift) +{ + return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT, + reg, shift, CLK_GATE_SET_TO_DISABLE, + &mxs_lock); +} + +static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, + u8 shift, u8 width, const char **parent_names, int num_parents) +{ + return clk_register_mux(NULL, name, parent_names, num_parents, + CLK_SET_RATE_PARENT, reg, shift, width, + 0, &mxs_lock); +} + +static inline struct clk *mxs_clk_fixed_factor(const char *name, + const char *parent_name, unsigned int mult, unsigned int div) +{ + return clk_register_fixed_factor(NULL, name, parent_name, + CLK_SET_RATE_PARENT, mult, div); +} + +#endif /* __MXS_CLK_H */ -- cgit v1.2.2 From ff261b7f641edc61ca05f0c93b5631c9c8622c08 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 29 Apr 2012 00:02:35 +0800 Subject: clk: mxs: add clock support for imx23 Add imx23 clock support based on common clk framework. Signed-off-by: Shawn Guo --- drivers/clk/mxs/Makefile | 2 + drivers/clk/mxs/clk-imx23.c | 204 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 206 insertions(+) create mode 100644 drivers/clk/mxs/clk-imx23.c (limited to 'drivers') diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile index d9472a809bba..7086ad3c56d1 100644 --- a/drivers/clk/mxs/Makefile +++ b/drivers/clk/mxs/Makefile @@ -3,3 +3,5 @@ # obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o + +obj-$(CONFIG_SOC_IMX23) += clk-imx23.o diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c new file mode 100644 index 000000000000..2ec76ff46971 --- /dev/null +++ b/drivers/clk/mxs/clk-imx23.c @@ -0,0 +1,204 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +#define DIGCTRL MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR) +#define CLKCTRL MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR) +#define PLLCTRL0 (CLKCTRL + 0x0000) +#define CPU (CLKCTRL + 0x0020) +#define HBUS (CLKCTRL + 0x0030) +#define XBUS (CLKCTRL + 0x0040) +#define XTAL (CLKCTRL + 0x0050) +#define PIX (CLKCTRL + 0x0060) +#define SSP (CLKCTRL + 0x0070) +#define GPMI (CLKCTRL + 0x0080) +#define SPDIF (CLKCTRL + 0x0090) +#define EMI (CLKCTRL + 0x00a0) +#define SAIF (CLKCTRL + 0x00c0) +#define TV (CLKCTRL + 0x00d0) +#define ETM (CLKCTRL + 0x00e0) +#define FRAC (CLKCTRL + 0x00f0) +#define CLKSEQ (CLKCTRL + 0x0110) + +#define BP_CPU_INTERRUPT_WAIT 12 +#define BP_CLKSEQ_BYPASS_SAIF 0 +#define BP_CLKSEQ_BYPASS_SSP 5 +#define BP_SAIF_DIV_FRAC_EN 16 +#define BP_FRAC_IOFRAC 24 + +static void __init clk_misc_init(void) +{ + u32 val; + + /* Gate off cpu clock in WFI for power saving */ + __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); + + /* Clear BYPASS for SAIF */ + __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ); + + /* SAIF has to use frac div for functional operation */ + val = readl_relaxed(SAIF); + val |= 1 << BP_SAIF_DIV_FRAC_EN; + writel_relaxed(val, SAIF); + + /* + * Source ssp clock from ref_io than ref_xtal, + * as ref_xtal only provides 24 MHz as maximum. + */ + __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ); + + /* + * 480 MHz seems too high to be ssp clock source directly, + * so set frac to get a 288 MHz ref_io. + */ + __mxs_clrl(0x3f << BP_FRAC_IOFRAC, FRAC); + __mxs_setl(30 << BP_FRAC_IOFRAC, FRAC); +} + +static struct clk_lookup uart_lookups[] __initdata = { + { .dev_id = "duart", }, + { .dev_id = "mxs-auart.0", }, + { .dev_id = "mxs-auart.1", }, + { .dev_id = "8006c000.serial", }, + { .dev_id = "8006e000.serial", }, + { .dev_id = "80070000.serial", }, +}; + +static struct clk_lookup hbus_lookups[] __initdata = { + { .dev_id = "mxs-dma-apbh", }, + { .dev_id = "80004000.dma-apbh", }, +}; + +static struct clk_lookup xbus_lookups[] __initdata = { + { .dev_id = "duart", .con_id = "apb_pclk"}, + { .dev_id = "mxs-dma-apbx", }, + { .dev_id = "80024000.dma-apbx", }, +}; + +static struct clk_lookup ssp_lookups[] __initdata = { + { .dev_id = "mxs-mmc.0", }, + { .dev_id = "mxs-mmc.1", }, + { .dev_id = "80010000.ssp", }, + { .dev_id = "80034000.ssp", }, +}; + +static struct clk_lookup lcdif_lookups[] __initdata = { + { .dev_id = "imx23-fb", }, + { .dev_id = "80030000.lcdif", }, +}; + +static struct clk_lookup gpmi_lookups[] __initdata = { + { .dev_id = "imx23-gpmi-nand", }, + { .dev_id = "8000c000.gpmi", }, +}; + +static const char *sel_pll[] __initconst = { "pll", "ref_xtal", }; +static const char *sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; +static const char *sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; +static const char *sel_io[] __initconst = { "ref_io", "ref_xtal", }; +static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; +static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; + +enum imx23_clk { + ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel, + lcdif_sel, gpmi_sel, ssp_sel, emi_sel, cpu, etm_sel, cpu_pll, + cpu_xtal, hbus, xbus, lcdif_div, ssp_div, gpmi_div, emi_pll, + emi_xtal, etm_div, saif_div, clk32k_div, rtc, adc, spdif_div, + clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, + lcdif, etm, usb, usb_pwr, + clk_max +}; + +static struct clk *clks[clk_max]; + +static enum imx23_clk clks_init_on[] __initdata = { + cpu, hbus, xbus, emi, uart, +}; + +int __init mx23_clocks_init(void) +{ + int i; + + clk_misc_init(); + + clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); + clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000); + clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0); + clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1); + clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2); + clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3); + clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll)); + clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix)); + clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io)); + clks[ssp_sel] = mxs_clk_mux("ssp_sel", CLKSEQ, 5, 1, sel_io, ARRAY_SIZE(sel_io)); + clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 6, 1, emi_sels, ARRAY_SIZE(emi_sels)); + clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 7, 1, cpu_sels, ARRAY_SIZE(cpu_sels)); + clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu)); + clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); + clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); + clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 29); + clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31); + clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29); + clks[ssp_div] = mxs_clk_div("ssp_div", "ssp_sel", SSP, 0, 9, 29); + clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29); + clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); + clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); + clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29); + clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29); + clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750); + clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768); + clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16); + clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4); + clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); + clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28); + clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); + clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30); + clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); + clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31); + clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31); + clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31); + clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); + clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31); + clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31); + clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); + clks[usb] = mxs_clk_gate("usb", "usb_pwr", DIGCTRL, 2); + clks[usb_pwr] = clk_register_gate(NULL, "usb_pwr", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock); + + for (i = 0; i < ARRAY_SIZE(clks); i++) + if (IS_ERR(clks[i])) { + pr_err("i.MX23 clk %d: register failed with %ld\n", + i, PTR_ERR(clks[i])); + return PTR_ERR(clks[i]); + } + + clk_register_clkdev(clks[clk32k], NULL, "timrot"); + clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups)); + clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups)); + clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups)); + clk_register_clkdevs(clks[ssp], ssp_lookups, ARRAY_SIZE(ssp_lookups)); + clk_register_clkdevs(clks[gpmi], gpmi_lookups, ARRAY_SIZE(gpmi_lookups)); + clk_register_clkdevs(clks[lcdif], lcdif_lookups, ARRAY_SIZE(lcdif_lookups)); + + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) + clk_prepare_enable(clks[clks_init_on[i]]); + + mxs_timer_init(NULL, MX23_INT_TIMER0); + + return 0; +} -- cgit v1.2.2 From 7d81397cd93da2850e0aec54c3ba4eb4908a675b Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 29 Apr 2012 00:02:36 +0800 Subject: clk: mxs: add clock support for imx28 Add imx28 clock support based on common clk framework. Signed-off-by: Shawn Guo --- drivers/clk/mxs/Makefile | 1 + drivers/clk/mxs/clk-imx28.c | 337 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 338 insertions(+) create mode 100644 drivers/clk/mxs/clk-imx28.c (limited to 'drivers') diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile index 7086ad3c56d1..7bedeec08524 100644 --- a/drivers/clk/mxs/Makefile +++ b/drivers/clk/mxs/Makefile @@ -5,3 +5,4 @@ obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o obj-$(CONFIG_SOC_IMX23) += clk-imx23.o +obj-$(CONFIG_SOC_IMX28) += clk-imx28.o diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c new file mode 100644 index 000000000000..4bfd1f4a8736 --- /dev/null +++ b/drivers/clk/mxs/clk-imx28.c @@ -0,0 +1,337 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +#define CLKCTRL MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR) +#define PLL0CTRL0 (CLKCTRL + 0x0000) +#define PLL1CTRL0 (CLKCTRL + 0x0020) +#define PLL2CTRL0 (CLKCTRL + 0x0040) +#define CPU (CLKCTRL + 0x0050) +#define HBUS (CLKCTRL + 0x0060) +#define XBUS (CLKCTRL + 0x0070) +#define XTAL (CLKCTRL + 0x0080) +#define SSP0 (CLKCTRL + 0x0090) +#define SSP1 (CLKCTRL + 0x00a0) +#define SSP2 (CLKCTRL + 0x00b0) +#define SSP3 (CLKCTRL + 0x00c0) +#define GPMI (CLKCTRL + 0x00d0) +#define SPDIF (CLKCTRL + 0x00e0) +#define EMI (CLKCTRL + 0x00f0) +#define SAIF0 (CLKCTRL + 0x0100) +#define SAIF1 (CLKCTRL + 0x0110) +#define LCDIF (CLKCTRL + 0x0120) +#define ETM (CLKCTRL + 0x0130) +#define ENET (CLKCTRL + 0x0140) +#define FLEXCAN (CLKCTRL + 0x0160) +#define FRAC0 (CLKCTRL + 0x01b0) +#define FRAC1 (CLKCTRL + 0x01c0) +#define CLKSEQ (CLKCTRL + 0x01d0) + +#define BP_CPU_INTERRUPT_WAIT 12 +#define BP_SAIF_DIV_FRAC_EN 16 +#define BP_ENET_DIV_TIME 21 +#define BP_ENET_SLEEP 31 +#define BP_CLKSEQ_BYPASS_SAIF0 0 +#define BP_CLKSEQ_BYPASS_SSP0 3 +#define BP_FRAC0_IO1FRAC 16 +#define BP_FRAC0_IO0FRAC 24 + +#define DIGCTRL MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR) +#define BP_SAIF_CLKMUX 10 + +/* + * HW_SAIF_CLKMUX_SEL: + * DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1 + * clock pins selected for SAIF1 input clocks. + * CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and + * SAIF0 clock inputs selected for SAIF1 input clocks. + * EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input + * clocks. + * EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input + * clocks. + */ +int mxs_saif_clkmux_select(unsigned int clkmux) +{ + if (clkmux > 0x3) + return -EINVAL; + + __mxs_clrl(0x3 << BP_SAIF_CLKMUX, DIGCTRL); + __mxs_setl(clkmux << BP_SAIF_CLKMUX, DIGCTRL); + + return 0; +} + +static void __init clk_misc_init(void) +{ + u32 val; + + /* Gate off cpu clock in WFI for power saving */ + __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); + + /* 0 is a bad default value for a divider */ + __mxs_setl(1 << BP_ENET_DIV_TIME, ENET); + + /* Clear BYPASS for SAIF */ + __mxs_clrl(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ); + + /* SAIF has to use frac div for functional operation */ + val = readl_relaxed(SAIF0); + val |= 1 << BP_SAIF_DIV_FRAC_EN; + writel_relaxed(val, SAIF0); + + val = readl_relaxed(SAIF1); + val |= 1 << BP_SAIF_DIV_FRAC_EN; + writel_relaxed(val, SAIF1); + + /* Extra fec clock setting */ + val = readl_relaxed(ENET); + val &= ~(1 << BP_ENET_SLEEP); + writel_relaxed(val, ENET); + + /* + * Source ssp clock from ref_io than ref_xtal, + * as ref_xtal only provides 24 MHz as maximum. + */ + __mxs_clrl(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ); + + /* + * 480 MHz seems too high to be ssp clock source directly, + * so set frac0 to get a 288 MHz ref_io0. + */ + val = readl_relaxed(FRAC0); + val &= ~(0x3f << BP_FRAC0_IO0FRAC); + val |= 30 << BP_FRAC0_IO0FRAC; + writel_relaxed(val, FRAC0); +} + +static struct clk_lookup uart_lookups[] __initdata = { + { .dev_id = "duart", }, + { .dev_id = "mxs-auart.0", }, + { .dev_id = "mxs-auart.1", }, + { .dev_id = "mxs-auart.2", }, + { .dev_id = "mxs-auart.3", }, + { .dev_id = "mxs-auart.4", }, + { .dev_id = "8006a000.serial", }, + { .dev_id = "8006c000.serial", }, + { .dev_id = "8006e000.serial", }, + { .dev_id = "80070000.serial", }, + { .dev_id = "80072000.serial", }, + { .dev_id = "80074000.serial", }, +}; + +static struct clk_lookup hbus_lookups[] __initdata = { + { .dev_id = "mxs-dma-apbh", }, + { .dev_id = "80004000.dma-apbh", }, +}; + +static struct clk_lookup xbus_lookups[] __initdata = { + { .dev_id = "duart", .con_id = "apb_pclk"}, + { .dev_id = "mxs-dma-apbx", }, + { .dev_id = "80024000.dma-apbx", }, +}; + +static struct clk_lookup ssp0_lookups[] __initdata = { + { .dev_id = "mxs-mmc.0", }, + { .dev_id = "80010000.ssp", }, +}; + +static struct clk_lookup ssp1_lookups[] __initdata = { + { .dev_id = "mxs-mmc.1", }, + { .dev_id = "80012000.ssp", }, +}; + +static struct clk_lookup ssp2_lookups[] __initdata = { + { .dev_id = "mxs-mmc.2", }, + { .dev_id = "80014000.ssp", }, +}; + +static struct clk_lookup ssp3_lookups[] __initdata = { + { .dev_id = "mxs-mmc.3", }, + { .dev_id = "80016000.ssp", }, +}; + +static struct clk_lookup lcdif_lookups[] __initdata = { + { .dev_id = "imx28-fb", }, + { .dev_id = "80030000.lcdif", }, +}; + +static struct clk_lookup gpmi_lookups[] __initdata = { + { .dev_id = "imx28-gpmi-nand", }, + { .dev_id = "8000c000.gpmi", }, +}; + +static struct clk_lookup fec_lookups[] __initdata = { + { .dev_id = "imx28-fec.0", }, + { .dev_id = "imx28-fec.1", }, + { .dev_id = "800f0000.ethernet", }, + { .dev_id = "800f4000.ethernet", }, +}; + +static struct clk_lookup can0_lookups[] __initdata = { + { .dev_id = "flexcan.0", }, + { .dev_id = "80032000.can", }, +}; + +static struct clk_lookup can1_lookups[] __initdata = { + { .dev_id = "flexcan.1", }, + { .dev_id = "80034000.can", }, +}; + +static struct clk_lookup saif0_lookups[] __initdata = { + { .dev_id = "mxs-saif.0", }, + { .dev_id = "80042000.saif", }, +}; + +static struct clk_lookup saif1_lookups[] __initdata = { + { .dev_id = "mxs-saif.1", }, + { .dev_id = "80046000.saif", }, +}; + +static const char *sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; +static const char *sel_io0[] __initconst = { "ref_io0", "ref_xtal", }; +static const char *sel_io1[] __initconst = { "ref_io1", "ref_xtal", }; +static const char *sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; +static const char *sel_gpmi[] __initconst = { "ref_gpmi", "ref_xtal", }; +static const char *sel_pll0[] __initconst = { "pll0", "ref_xtal", }; +static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; +static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; +static const char *ptp_sels[] __initconst = { "ref_xtal", "pll0", }; + +enum imx28_clk { + ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, + ref_pix, ref_hsadc, ref_gpmi, saif0_sel, saif1_sel, gpmi_sel, + ssp0_sel, ssp1_sel, ssp2_sel, ssp3_sel, emi_sel, etm_sel, + lcdif_sel, cpu, ptp_sel, cpu_pll, cpu_xtal, hbus, xbus, + ssp0_div, ssp1_div, ssp2_div, ssp3_div, gpmi_div, emi_pll, + emi_xtal, lcdif_div, etm_div, ptp, saif0_div, saif1_div, + clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, + ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, + fec, can0, can1, usb0, usb1, usb0_pwr, usb1_pwr, enet_out, + clk_max +}; + +static struct clk *clks[clk_max]; + +static enum imx28_clk clks_init_on[] __initdata = { + cpu, hbus, xbus, emi, uart, +}; + +int __init mx28_clocks_init(void) +{ + int i; + + clk_misc_init(); + + clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); + clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); + clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); + clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); + clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0); + clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1); + clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 2); + clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 3); + clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0); + clks[ref_hsadc] = mxs_clk_ref("ref_hsadc", "pll0", FRAC1, 1); + clks[ref_gpmi] = mxs_clk_ref("ref_gpmi", "pll0", FRAC1, 2); + clks[saif0_sel] = mxs_clk_mux("saif0_sel", CLKSEQ, 0, 1, sel_pll0, ARRAY_SIZE(sel_pll0)); + clks[saif1_sel] = mxs_clk_mux("saif1_sel", CLKSEQ, 1, 1, sel_pll0, ARRAY_SIZE(sel_pll0)); + clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 2, 1, sel_gpmi, ARRAY_SIZE(sel_gpmi)); + clks[ssp0_sel] = mxs_clk_mux("ssp0_sel", CLKSEQ, 3, 1, sel_io0, ARRAY_SIZE(sel_io0)); + clks[ssp1_sel] = mxs_clk_mux("ssp1_sel", CLKSEQ, 4, 1, sel_io0, ARRAY_SIZE(sel_io0)); + clks[ssp2_sel] = mxs_clk_mux("ssp2_sel", CLKSEQ, 5, 1, sel_io1, ARRAY_SIZE(sel_io1)); + clks[ssp3_sel] = mxs_clk_mux("ssp3_sel", CLKSEQ, 6, 1, sel_io1, ARRAY_SIZE(sel_io1)); + clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 7, 1, emi_sels, ARRAY_SIZE(emi_sels)); + clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu)); + clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 14, 1, sel_pix, ARRAY_SIZE(sel_pix)); + clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 18, 1, cpu_sels, ARRAY_SIZE(cpu_sels)); + clks[ptp_sel] = mxs_clk_mux("ptp_sel", ENET, 19, 1, ptp_sels, ARRAY_SIZE(ptp_sels)); + clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); + clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); + clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 31); + clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31); + clks[ssp0_div] = mxs_clk_div("ssp0_div", "ssp0_sel", SSP0, 0, 9, 29); + clks[ssp1_div] = mxs_clk_div("ssp1_div", "ssp1_sel", SSP1, 0, 9, 29); + clks[ssp2_div] = mxs_clk_div("ssp2_div", "ssp2_sel", SSP2, 0, 9, 29); + clks[ssp3_div] = mxs_clk_div("ssp3_div", "ssp3_sel", SSP3, 0, 9, 29); + clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29); + clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); + clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); + clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", LCDIF, 0, 13, 29); + clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 7, 29); + clks[ptp] = mxs_clk_div("ptp", "ptp_sel", ENET, 21, 6, 27); + clks[saif0_div] = mxs_clk_frac("saif0_div", "saif0_sel", SAIF0, 0, 16, 29); + clks[saif1_div] = mxs_clk_frac("saif1_div", "saif1_sel", SAIF1, 0, 16, 29); + clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750); + clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768); + clks[lradc] = mxs_clk_fixed_factor("lradc", "clk32k", 1, 16); + clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll0", 1, 4); + clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); + clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); + clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); + clks[ssp0] = mxs_clk_gate("ssp0", "ssp0_div", SSP0, 31); + clks[ssp1] = mxs_clk_gate("ssp1", "ssp1_div", SSP1, 31); + clks[ssp2] = mxs_clk_gate("ssp2", "ssp2_div", SSP2, 31); + clks[ssp3] = mxs_clk_gate("ssp3", "ssp3_div", SSP3, 31); + clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31); + clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31); + clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); + clks[saif0] = mxs_clk_gate("saif0", "saif0_div", SAIF0, 31); + clks[saif1] = mxs_clk_gate("saif1", "saif1_div", SAIF1, 31); + clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", LCDIF, 31); + clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); + clks[fec] = mxs_clk_gate("fec", "hbus", ENET, 30); + clks[can0] = mxs_clk_gate("can0", "ref_xtal", FLEXCAN, 30); + clks[can1] = mxs_clk_gate("can1", "ref_xtal", FLEXCAN, 28); + clks[usb0] = mxs_clk_gate("usb0", "usb0_pwr", DIGCTRL, 2); + clks[usb1] = mxs_clk_gate("usb1", "usb1_pwr", DIGCTRL, 16); + clks[usb0_pwr] = clk_register_gate(NULL, "usb0_pwr", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); + clks[usb1_pwr] = clk_register_gate(NULL, "usb1_pwr", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); + clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &mxs_lock); + + for (i = 0; i < ARRAY_SIZE(clks); i++) + if (IS_ERR(clks[i])) { + pr_err("i.MX28 clk %d: register failed with %ld\n", + i, PTR_ERR(clks[i])); + return PTR_ERR(clks[i]); + } + + clk_register_clkdev(clks[clk32k], NULL, "timrot"); + clk_register_clkdev(clks[enet_out], NULL, "enet_out"); + clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups)); + clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups)); + clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups)); + clk_register_clkdevs(clks[ssp0], ssp0_lookups, ARRAY_SIZE(ssp0_lookups)); + clk_register_clkdevs(clks[ssp1], ssp1_lookups, ARRAY_SIZE(ssp1_lookups)); + clk_register_clkdevs(clks[ssp2], ssp2_lookups, ARRAY_SIZE(ssp2_lookups)); + clk_register_clkdevs(clks[ssp3], ssp3_lookups, ARRAY_SIZE(ssp3_lookups)); + clk_register_clkdevs(clks[gpmi], gpmi_lookups, ARRAY_SIZE(gpmi_lookups)); + clk_register_clkdevs(clks[saif0], saif0_lookups, ARRAY_SIZE(saif0_lookups)); + clk_register_clkdevs(clks[saif1], saif1_lookups, ARRAY_SIZE(saif1_lookups)); + clk_register_clkdevs(clks[lcdif], lcdif_lookups, ARRAY_SIZE(lcdif_lookups)); + clk_register_clkdevs(clks[fec], fec_lookups, ARRAY_SIZE(fec_lookups)); + clk_register_clkdevs(clks[can0], can0_lookups, ARRAY_SIZE(can0_lookups)); + clk_register_clkdevs(clks[can1], can1_lookups, ARRAY_SIZE(can1_lookups)); + + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) + clk_prepare_enable(clks[clks_init_on[i]]); + + mxs_timer_init(NULL, MX28_INT_TIMER0); + + return 0; +} -- cgit v1.2.2 From 2664681fa4101aef2bceb81bbe26a81a88131393 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 29 Apr 2012 00:02:39 +0800 Subject: ARM: mxs: switch to common clk framework It switches mxs clock support to common clk framework based drivers. Signed-off-by: Shawn Guo --- drivers/clk/Makefile | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1f736bc11c4b..a576f5447d38 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -2,3 +2,5 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ clk-mux.o clk-divider.o + +obj-$(CONFIG_ARCH_MXS) += mxs/ -- cgit v1.2.2 From 50260924afd4b745bfb6e5f1caee381a1875fc31 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 29 Apr 2012 00:02:41 +0800 Subject: ARM: mxs: remove now unused timer_clk argument from mxs_timer_init With old mxs clock support removed, the timer_clk argument of mxs_timer_init is unused now, so remove it. Signed-off-by: Shawn Guo --- drivers/clk/mxs/clk-imx23.c | 2 +- drivers/clk/mxs/clk-imx28.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 2ec76ff46971..dcae11285716 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -198,7 +198,7 @@ int __init mx23_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - mxs_timer_init(NULL, MX23_INT_TIMER0); + mxs_timer_init(MX23_INT_TIMER0); return 0; } diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index 4bfd1f4a8736..b2a3257d4f66 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -331,7 +331,7 @@ int __init mx28_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - mxs_timer_init(NULL, MX28_INT_TIMER0); + mxs_timer_init(MX28_INT_TIMER0); return 0; } -- cgit v1.2.2 From c9b77ccb52a5c77233b0e557b7d4417b00ef4012 Mon Sep 17 00:00:00 2001 From: Jarkko Sakkinen Date: Tue, 8 May 2012 21:22:29 +0300 Subject: x86, realmode: Move ACPI wakeup to unified realmode code Migrated ACPI wakeup code to the real-mode blob. Code existing in .x86_trampoline can be completely removed. Static descriptor table in wakeup_asm.S is courtesy of H. Peter Anvin. Signed-off-by: Jarkko Sakkinen Link: http://lkml.kernel.org/r/1336501366-28617-7-git-send-email-jarkko.sakkinen@intel.com Cc: Rafael J. Wysocki Cc: Len Brown Signed-off-by: H. Peter Anvin --- drivers/acpi/sleep.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index eb6fd233764b..e77aa4a1c9f6 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c @@ -25,6 +25,8 @@ #include #include +#include + #include "internal.h" #include "sleep.h" @@ -91,13 +93,13 @@ static struct notifier_block tts_notifier = { static int acpi_sleep_prepare(u32 acpi_state) { #ifdef CONFIG_ACPI_SLEEP + unsigned long wakeup_pa = real_mode_header.wakeup_start; /* do we have a wakeup address for S2 and S3? */ if (acpi_state == ACPI_STATE_S3) { - if (!acpi_wakeup_address) { + if (!wakeup_pa) return -EFAULT; - } acpi_set_firmware_waking_vector( - (acpi_physical_address)acpi_wakeup_address); + (acpi_physical_address)wakeup_pa); } ACPI_FLUSH_CPU_CACHE(); -- cgit v1.2.2 From b429dbf6e866bd6dadb56fae66f61f611cde57ff Mon Sep 17 00:00:00 2001 From: Jarkko Sakkinen Date: Tue, 8 May 2012 21:22:41 +0300 Subject: x86, realmode: don't copy real_mode_header Replaced copying of real_mode_header with a pointer to beginning of RM memory. Signed-off-by: Jarkko Sakkinen Link: http://lkml.kernel.org/r/1336501366-28617-19-git-send-email-jarkko.sakkinen@intel.com Signed-off-by: H. Peter Anvin --- drivers/acpi/sleep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index e77aa4a1c9f6..06139005c4dd 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c @@ -93,7 +93,7 @@ static struct notifier_block tts_notifier = { static int acpi_sleep_prepare(u32 acpi_state) { #ifdef CONFIG_ACPI_SLEEP - unsigned long wakeup_pa = real_mode_header.wakeup_start; + unsigned long wakeup_pa = real_mode_header->wakeup_start; /* do we have a wakeup address for S2 and S3? */ if (acpi_state == ACPI_STATE_S3) { if (!wakeup_pa) -- cgit v1.2.2 From 87d0bab2cba3c31624b80cc68bcf5e29ef969458 Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Mon, 7 May 2012 12:24:48 +0200 Subject: ARM: tegra: Add Tegra AHB driver Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced High-performance Bus (AHB) architecture. The AHB Arbiter controls AHB bus master arbitration. This effectively forms a second level of arbitration for access to the memory controller through the AHB Slave Memory device. The AHB pre-fetch logic can be configured to enhance performance for devices doing sequential access. Each AHB master is assigned to either the high or low priority bin. Both Tegra20/30 have this AHB bus. Some of configuration params could be passed from DT too if needed. Signed-off-by: Hiroshi DOYU Acked-by: Arnd Bergmann Cc: Felipe Balbi Signed-off-by: Stephen Warren --- drivers/Makefile | 2 +- drivers/amba/Makefile | 4 +- drivers/amba/tegra-ahb.c | 261 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 264 insertions(+), 3 deletions(-) create mode 100644 drivers/amba/tegra-ahb.c (limited to 'drivers') diff --git a/drivers/Makefile b/drivers/Makefile index 95952c82bf16..fd7176390168 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -18,7 +18,7 @@ obj-$(CONFIG_SFI) += sfi/ # PnP must come after ACPI since it will eventually need to check if acpi # was used and do nothing if so obj-$(CONFIG_PNP) += pnp/ -obj-$(CONFIG_ARM_AMBA) += amba/ +obj-y += amba/ # Many drivers will want to use DMA so this has to be made available # really early. obj-$(CONFIG_DMA_ENGINE) += dma/ diff --git a/drivers/amba/Makefile b/drivers/amba/Makefile index 40fe74097be2..66e81c2f1e3c 100644 --- a/drivers/amba/Makefile +++ b/drivers/amba/Makefile @@ -1,2 +1,2 @@ -obj-y += bus.o - +obj-$(CONFIG_ARM_AMBA) += bus.o +obj-$(CONFIG_TEGRA_AHB) += tegra-ahb.o diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c new file mode 100644 index 000000000000..106a780d29a0 --- /dev/null +++ b/drivers/amba/tegra-ahb.c @@ -0,0 +1,261 @@ +/* + * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (C) 2011 Google, Inc. + * + * Author: + * Jay Cheng + * James Wylder + * Benoit Goby + * Colin Cross + * Hiroshi DOYU + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#define DRV_NAME "tegra-ahb" + +#define AHB_ARBITRATION_DISABLE 0x00 +#define AHB_ARBITRATION_PRIORITY_CTRL 0x04 +#define AHB_PRIORITY_WEIGHT(x) (((x) & 0x7) << 29) +#define PRIORITY_SELECT_USB BIT(6) +#define PRIORITY_SELECT_USB2 BIT(18) +#define PRIORITY_SELECT_USB3 BIT(17) + +#define AHB_GIZMO_AHB_MEM 0x0c +#define ENB_FAST_REARBITRATE BIT(2) +#define DONT_SPLIT_AHB_WR BIT(7) + +#define AHB_GIZMO_APB_DMA 0x10 +#define AHB_GIZMO_IDE 0x18 +#define AHB_GIZMO_USB 0x1c +#define AHB_GIZMO_AHB_XBAR_BRIDGE 0x20 +#define AHB_GIZMO_CPU_AHB_BRIDGE 0x24 +#define AHB_GIZMO_COP_AHB_BRIDGE 0x28 +#define AHB_GIZMO_XBAR_APB_CTLR 0x2c +#define AHB_GIZMO_VCP_AHB_BRIDGE 0x30 +#define AHB_GIZMO_NAND 0x3c +#define AHB_GIZMO_SDMMC4 0x44 +#define AHB_GIZMO_XIO 0x48 +#define AHB_GIZMO_BSEV 0x60 +#define AHB_GIZMO_BSEA 0x70 +#define AHB_GIZMO_NOR 0x74 +#define AHB_GIZMO_USB2 0x78 +#define AHB_GIZMO_USB3 0x7c +#define IMMEDIATE BIT(18) + +#define AHB_GIZMO_SDMMC1 0x80 +#define AHB_GIZMO_SDMMC2 0x84 +#define AHB_GIZMO_SDMMC3 0x88 +#define AHB_MEM_PREFETCH_CFG_X 0xd8 +#define AHB_ARBITRATION_XBAR_CTRL 0xdc +#define AHB_MEM_PREFETCH_CFG3 0xe0 +#define AHB_MEM_PREFETCH_CFG4 0xe4 +#define AHB_MEM_PREFETCH_CFG1 0xec +#define AHB_MEM_PREFETCH_CFG2 0xf0 +#define PREFETCH_ENB BIT(31) +#define MST_ID(x) (((x) & 0x1f) << 26) +#define AHBDMA_MST_ID MST_ID(5) +#define USB_MST_ID MST_ID(6) +#define USB2_MST_ID MST_ID(18) +#define USB3_MST_ID MST_ID(17) +#define ADDR_BNDRY(x) (((x) & 0xf) << 21) +#define INACTIVITY_TIMEOUT(x) (((x) & 0xffff) << 0) + +#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xf8 + +static const u32 tegra_ahb_gizmo[] = { + AHB_ARBITRATION_DISABLE, + AHB_ARBITRATION_PRIORITY_CTRL, + AHB_GIZMO_AHB_MEM, + AHB_GIZMO_APB_DMA, + AHB_GIZMO_IDE, + AHB_GIZMO_USB, + AHB_GIZMO_AHB_XBAR_BRIDGE, + AHB_GIZMO_CPU_AHB_BRIDGE, + AHB_GIZMO_COP_AHB_BRIDGE, + AHB_GIZMO_XBAR_APB_CTLR, + AHB_GIZMO_VCP_AHB_BRIDGE, + AHB_GIZMO_NAND, + AHB_GIZMO_SDMMC4, + AHB_GIZMO_XIO, + AHB_GIZMO_BSEV, + AHB_GIZMO_BSEA, + AHB_GIZMO_NOR, + AHB_GIZMO_USB2, + AHB_GIZMO_USB3, + AHB_GIZMO_SDMMC1, + AHB_GIZMO_SDMMC2, + AHB_GIZMO_SDMMC3, + AHB_MEM_PREFETCH_CFG_X, + AHB_ARBITRATION_XBAR_CTRL, + AHB_MEM_PREFETCH_CFG3, + AHB_MEM_PREFETCH_CFG4, + AHB_MEM_PREFETCH_CFG1, + AHB_MEM_PREFETCH_CFG2, + AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID, +}; + +struct tegra_ahb { + void __iomem *regs; + struct device *dev; + u32 ctx[0]; +}; + +static inline u32 gizmo_readl(struct tegra_ahb *ahb, u32 offset) +{ + return readl(ahb->regs + offset); +} + +static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) +{ + writel(value, ahb->regs + offset); +} + +static int tegra_ahb_suspend(struct device *dev) +{ + int i; + struct tegra_ahb *ahb = dev_get_drvdata(dev); + + for (i = 0; i < ARRAY_SIZE(tegra_ahb_gizmo); i++) + ahb->ctx[i] = gizmo_readl(ahb, tegra_ahb_gizmo[i]); + return 0; +} + +static int tegra_ahb_resume(struct device *dev) +{ + int i; + struct tegra_ahb *ahb = dev_get_drvdata(dev); + + for (i = 0; i < ARRAY_SIZE(tegra_ahb_gizmo); i++) + gizmo_writel(ahb, ahb->ctx[i], tegra_ahb_gizmo[i]); + return 0; +} + +static UNIVERSAL_DEV_PM_OPS(tegra_ahb_pm, + tegra_ahb_suspend, + tegra_ahb_resume, NULL); + +static void tegra_ahb_gizmo_init(struct tegra_ahb *ahb) +{ + u32 val; + + val = gizmo_readl(ahb, AHB_GIZMO_AHB_MEM); + val |= ENB_FAST_REARBITRATE | IMMEDIATE | DONT_SPLIT_AHB_WR; + gizmo_writel(ahb, val, AHB_GIZMO_AHB_MEM); + + val = gizmo_readl(ahb, AHB_GIZMO_USB); + val |= IMMEDIATE; + gizmo_writel(ahb, val, AHB_GIZMO_USB); + + val = gizmo_readl(ahb, AHB_GIZMO_USB2); + val |= IMMEDIATE; + gizmo_writel(ahb, val, AHB_GIZMO_USB2); + + val = gizmo_readl(ahb, AHB_GIZMO_USB3); + val |= IMMEDIATE; + gizmo_writel(ahb, val, AHB_GIZMO_USB3); + + val = gizmo_readl(ahb, AHB_ARBITRATION_PRIORITY_CTRL); + val |= PRIORITY_SELECT_USB | + PRIORITY_SELECT_USB2 | + PRIORITY_SELECT_USB3 | + AHB_PRIORITY_WEIGHT(7); + gizmo_writel(ahb, val, AHB_ARBITRATION_PRIORITY_CTRL); + + val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG1); + val &= ~MST_ID(~0); + val |= PREFETCH_ENB | + AHBDMA_MST_ID | + ADDR_BNDRY(0xc) | + INACTIVITY_TIMEOUT(0x1000); + gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG1); + + val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG2); + val &= ~MST_ID(~0); + val |= PREFETCH_ENB | + USB_MST_ID | + ADDR_BNDRY(0xc) | + INACTIVITY_TIMEOUT(0x1000); + gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG2); + + val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG3); + val &= ~MST_ID(~0); + val |= PREFETCH_ENB | + USB3_MST_ID | + ADDR_BNDRY(0xc) | + INACTIVITY_TIMEOUT(0x1000); + gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG3); + + val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG4); + val &= ~MST_ID(~0); + val |= PREFETCH_ENB | + USB2_MST_ID | + ADDR_BNDRY(0xc) | + INACTIVITY_TIMEOUT(0x1000); + gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG4); +} + +static int __devinit tegra_ahb_probe(struct platform_device *pdev) +{ + struct resource *res; + struct tegra_ahb *ahb; + size_t bytes; + + bytes = sizeof(*ahb) + sizeof(u32) * ARRAY_SIZE(tegra_ahb_gizmo); + ahb = devm_kzalloc(&pdev->dev, bytes, GFP_KERNEL); + if (!ahb) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + ahb->regs = devm_request_and_ioremap(&pdev->dev, res); + if (!ahb->regs) + return -EBUSY; + + ahb->dev = &pdev->dev; + platform_set_drvdata(pdev, ahb); + tegra_ahb_gizmo_init(ahb); + return 0; +} + +static int __devexit tegra_ahb_remove(struct platform_device *pdev) +{ + return 0; +} + +static const struct of_device_id tegra_ahb_of_match[] __devinitconst = { + { .compatible = "nvidia,tegra30-ahb", }, + { .compatible = "nvidia,tegra20-ahb", }, + {}, +}; + +static struct platform_driver tegra_ahb_driver = { + .probe = tegra_ahb_probe, + .remove = __devexit_p(tegra_ahb_remove), + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + .of_match_table = tegra_ahb_of_match, + .pm = &tegra_ahb_pm, + }, +}; +module_platform_driver(tegra_ahb_driver); + +MODULE_AUTHOR("Hiroshi DOYU "); +MODULE_DESCRIPTION("Tegra AHB driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" DRV_NAME); -- cgit v1.2.2 From 89c788bab1f0374ae05aef7560066442ceb55384 Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Mon, 7 May 2012 09:43:46 +0300 Subject: ARM: tegra: Add SMMU enabler in AHB Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is ready. Signed-off-by: Hiroshi DOYU Cc: Felipe Balbi Signed-off-by: Stephen Warren --- drivers/amba/tegra-ahb.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'drivers') diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index 106a780d29a0..aa0b1f160528 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -76,6 +76,10 @@ #define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xf8 +#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE BIT(17) + +static struct platform_driver tegra_ahb_driver; + static const u32 tegra_ahb_gizmo[] = { AHB_ARBITRATION_DISABLE, AHB_ARBITRATION_PRIORITY_CTRL, @@ -124,6 +128,34 @@ static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) writel(value, ahb->regs + offset); } +#ifdef CONFIG_ARCH_TEGRA_3x_SOC +static int tegra_ahb_match_by_smmu(struct device *dev, void *data) +{ + struct tegra_ahb *ahb = dev_get_drvdata(dev); + struct device_node *dn = data; + + return (ahb->dev->of_node == dn) ? 1 : 0; +} + +int tegra_ahb_enable_smmu(struct device_node *dn) +{ + struct device *dev; + u32 val; + struct tegra_ahb *ahb; + + dev = driver_find_device(&tegra_ahb_driver.driver, NULL, dn, + tegra_ahb_match_by_smmu); + if (!dev) + return -EPROBE_DEFER; + ahb = dev_get_drvdata(dev); + val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL); + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE; + gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL); + return 0; +} +EXPORT_SYMBOL(tegra_ahb_enable_smmu); +#endif + static int tegra_ahb_suspend(struct device *dev) { int i; -- cgit v1.2.2 From 63f5c3b2b18dcaca0fc8983b52a3f5d4d70a0590 Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Wed, 2 May 2012 16:23:43 -0700 Subject: clk: prevent spurious parent rate propagation Patch 'clk: always pass parent_rate into .round_rate' made a subtle change to the semantics of .round_rate. It is now expected for the parent's rate to always be passed in, simplifying the implemenation of various .round_rate callback definitions. However the patch also introduced a bug in clk_calc_new_rates whereby a clock without the CLK_SET_RATE_PARENT flag set could still propagate a rate change up to a parent clock if the the .round_rate callback modified the &best_parent_rate value in any way. This patch fixes the issue at the framework level (in clk_calc_new_rates) by specifically handling the case where the CLK_SET_RATE_PARENT flag is not set. Signed-off-by: Mike Turquette Acked-by: Sascha Hauer --- drivers/clk/clk.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 8149764f8438..7ceca0e8645a 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -774,12 +774,18 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) if (IS_ERR_OR_NULL(clk)) return NULL; + /* save parent rate, if it exists */ + if (clk->parent) + best_parent_rate = clk->parent->rate; + /* never propagate up to the parent */ if (!(clk->flags & CLK_SET_RATE_PARENT)) { if (!clk->ops->round_rate) { clk->new_rate = clk->rate; return NULL; } + new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate); + goto out; } /* need clk->parent from here on out */ @@ -795,7 +801,6 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) goto out; } - best_parent_rate = clk->parent->rate; new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate); if (best_parent_rate != clk->parent->rate) { -- cgit v1.2.2 From d269b974e32c5dcf043acd07f9ad96e715019ffd Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Wed, 2 May 2012 15:45:32 -0700 Subject: clk: remove COMMON_CLK_DISABLE_UNUSED Exposing this option generates confusion and incorrect behavior for single-image builds across platforms. Enable this behavior permanently. Signed-off-by: Mike Turquette Acked-by: Saravana Kannan --- drivers/clk/Kconfig | 11 ----------- drivers/clk/clk.c | 2 -- 2 files changed, 13 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index f05a60dc1a03..4864407e3fc4 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -23,17 +23,6 @@ config COMMON_CLK menu "Common Clock Framework" depends on COMMON_CLK -config COMMON_CLK_DISABLE_UNUSED - bool "Disabled unused clocks at boot" - depends on COMMON_CLK - ---help--- - Traverses the entire clock tree and disables any clocks that are - enabled in hardware but have not been enabled by any device drivers. - This saves power and keeps the software model of the clock in line - with reality. - - If in doubt, say "N". - config COMMON_CLK_DEBUG bool "DebugFS representation of clock tree" depends on COMMON_CLK diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 7ceca0e8645a..e5d5dc13bcfd 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -196,7 +196,6 @@ late_initcall(clk_debug_init); static inline int clk_debug_register(struct clk *clk) { return 0; } #endif -#ifdef CONFIG_COMMON_CLK_DISABLE_UNUSED /* caller must hold prepare_lock */ static void clk_disable_unused_subtree(struct clk *clk) { @@ -246,7 +245,6 @@ static int clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -#endif /*** helper functions ***/ -- cgit v1.2.2 From 31df9db99549cd29bbe5e32da4492970e6f97191 Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Sun, 6 May 2012 18:48:11 -0700 Subject: clk: mux: assign init data The original conversion to struct clk_hw_init failed to add the pointer assignment in clk_register_mux. Signed-off-by: Mike Turquette Reported-by: Sascha Hauer --- drivers/clk/clk-mux.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 8e97491902e7..fd36a8ea73d9 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -116,6 +116,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name, mux->width = width; mux->flags = clk_mux_flags; mux->lock = lock; + mux->hw.init = &init; clk = clk_register(dev, &mux->hw); -- cgit v1.2.2 From f0948f59dbc8e725a96ba16da666e8f5cdd43ba8 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 3 May 2012 15:36:14 +0530 Subject: clk: add a fixed factor clock Having fixed factors/dividers in hardware is a common pattern, so add a basic clock type doing this. It basically describes a fixed factor clock using a nominator and a denominator. Signed-off-by: Sascha Hauer Reviewed-by: Viresh Kumar Tested-by: Shawn Guo [mturquette@linaro.org: constify parent_names in static init macro] [mturquette@linaro.org: copy/paste bug from mux in static init macro] [mturquette@linaro.org: fix error handling in clk_register_fixed_factor] [mturquette@linaro.org: improve division accuracy; thanks to Saravana] Signed-off-by: Mike Turquette --- drivers/clk/Makefile | 2 +- drivers/clk/clk-fixed-factor.c | 95 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 96 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/clk-fixed-factor.c (limited to 'drivers') diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1f736bc11c4b..24aa7144811b 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ - clk-mux.o clk-divider.o + clk-mux.o clk-divider.o clk-fixed-factor.o diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c new file mode 100644 index 000000000000..c8c003e217ad --- /dev/null +++ b/drivers/clk/clk-fixed-factor.c @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2011 Sascha Hauer, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Standard functionality for the common clock API. + */ +#include +#include +#include +#include + +/* + * DOC: basic fixed multiplier and divider clock that cannot gate + * + * Traits of this clock: + * prepare - clk_prepare only ensures that parents are prepared + * enable - clk_enable only ensures that parents are enabled + * rate - rate is fixed. clk->rate = parent->rate / div * mult + * parent - fixed parent. No clk_set_parent support + */ + +#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw) + +static unsigned long clk_factor_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); + + return parent_rate * fix->mult / fix->div; +} + +static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); + + if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) { + unsigned long best_parent; + + best_parent = (rate / fix->mult) * fix->div; + *prate = __clk_round_rate(__clk_get_parent(hw->clk), + best_parent); + } + + return (*prate / fix->div) * fix->mult; +} + +static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return 0; +} + +struct clk_ops clk_fixed_factor_ops = { + .round_rate = clk_factor_round_rate, + .set_rate = clk_factor_set_rate, + .recalc_rate = clk_factor_recalc_rate, +}; +EXPORT_SYMBOL_GPL(clk_fixed_factor_ops); + +struct clk *clk_register_fixed_factor(struct device *dev, const char *name, + const char *parent_name, unsigned long flags, + unsigned int mult, unsigned int div) +{ + struct clk_fixed_factor *fix; + struct clk_init_data init; + struct clk *clk; + + fix = kmalloc(sizeof(*fix), GFP_KERNEL); + if (!fix) { + pr_err("%s: could not allocate fixed factor clk\n", __func__); + return ERR_PTR(-ENOMEM); + } + + /* struct clk_fixed_factor assignments */ + fix->mult = mult; + fix->div = div; + fix->hw.init = &init; + + init.name = name; + init.ops = &clk_fixed_factor_ops; + init.flags = flags; + init.parent_names = &parent_name; + init.num_parents = 1; + + clk = clk_register(dev, &fix->hw); + + if (IS_ERR(clk)) + kfree(fix); + + return clk; +} -- cgit v1.2.2 From 4574b886698dfad6209102fed6136622b5fe1c21 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Fri, 6 Apr 2012 17:17:26 +0200 Subject: ARM: Orion: SPI: Add clk/clkdev support. Remove now redundant tclk from SPI platform data. This makes the platform data empty, so remove it. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/spi/spi-orion.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index e496f799b7a9..dfd04e91fa6d 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -16,8 +16,8 @@ #include #include #include -#include #include +#include #include #define DRIVER_NAME "orion_spi" @@ -46,6 +46,7 @@ struct orion_spi { unsigned int max_speed; unsigned int min_speed; struct orion_spi_info *spi_info; + struct clk *clk; }; static struct workqueue_struct *orion_spi_wq; @@ -104,7 +105,7 @@ static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed) orion_spi = spi_master_get_devdata(spi->master); - tclk_hz = orion_spi->spi_info->tclk; + tclk_hz = clk_get_rate(orion_spi->clk); /* * the supported rates are: 4,6,8...30 @@ -450,6 +451,7 @@ static int __init orion_spi_probe(struct platform_device *pdev) struct orion_spi *spi; struct resource *r; struct orion_spi_info *spi_info; + unsigned long tclk_hz; int status = 0; spi_info = pdev->dev.platform_data; @@ -476,19 +478,28 @@ static int __init orion_spi_probe(struct platform_device *pdev) spi->master = master; spi->spi_info = spi_info; - spi->max_speed = DIV_ROUND_UP(spi_info->tclk, 4); - spi->min_speed = DIV_ROUND_UP(spi_info->tclk, 30); + spi->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(spi->clk)) { + status = PTR_ERR(spi->clk); + goto out; + } + + clk_prepare(spi->clk); + clk_enable(spi->clk); + tclk_hz = clk_get_rate(spi->clk); + spi->max_speed = DIV_ROUND_UP(tclk_hz, 4); + spi->min_speed = DIV_ROUND_UP(tclk_hz, 30); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (r == NULL) { status = -ENODEV; - goto out; + goto out_rel_clk; } if (!request_mem_region(r->start, resource_size(r), dev_name(&pdev->dev))) { status = -EBUSY; - goto out; + goto out_rel_clk; } spi->base = ioremap(r->start, SZ_1K); @@ -508,7 +519,9 @@ static int __init orion_spi_probe(struct platform_device *pdev) out_rel_mem: release_mem_region(r->start, resource_size(r)); - +out_rel_clk: + clk_disable_unprepare(spi->clk); + clk_put(spi->clk); out: spi_master_put(master); return status; @@ -526,6 +539,9 @@ static int __exit orion_spi_remove(struct platform_device *pdev) cancel_work_sync(&spi->work); + clk_disable_unprepare(spi->clk); + clk_put(spi->clk); + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, resource_size(r)); -- cgit v1.2.2 From 452503ebc7cc4cce5b9e52cf2f03255365a53234 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 24 Dec 2011 01:24:24 +0100 Subject: ARM: Orion: Eth: Add clk/clkdev support. The t_clk is moved from the shared part of the ethernet driver into the per port section. Each port can have its own gated clock, which it needs to enable/disable, as oppossed to there being one clock shared by all ports. In practice, only kirkwood supports this at the moment. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/net/ethernet/marvell/mv643xx_eth.c | 42 ++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c index 5e1ca0f05090..99cd233266ac 100644 --- a/drivers/net/ethernet/marvell/mv643xx_eth.c +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c @@ -57,6 +57,7 @@ #include #include #include +#include static char mv643xx_eth_driver_name[] = "mv643xx_eth"; static char mv643xx_eth_driver_version[] = "1.4"; @@ -289,10 +290,10 @@ struct mv643xx_eth_shared_private { /* * Hardware-specific parameters. */ - unsigned int t_clk; int extended_rx_coal_limit; int tx_bw_control; int tx_csum_limit; + }; #define TX_BW_CONTROL_ABSENT 0 @@ -431,6 +432,12 @@ struct mv643xx_eth_private { int tx_desc_sram_size; int txq_count; struct tx_queue txq[8]; + + /* + * Hardware-specific parameters. + */ + struct clk *clk; + unsigned int t_clk; }; @@ -1010,7 +1017,7 @@ static void tx_set_rate(struct mv643xx_eth_private *mp, int rate, int burst) int mtu; int bucket_size; - token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000); + token_rate = ((rate / 1000) * 64) / (mp->t_clk / 1000); if (token_rate > 1023) token_rate = 1023; @@ -1042,7 +1049,7 @@ static void txq_set_rate(struct tx_queue *txq, int rate, int burst) int token_rate; int bucket_size; - token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000); + token_rate = ((rate / 1000) * 64) / (mp->t_clk / 1000); if (token_rate > 1023) token_rate = 1023; @@ -1309,7 +1316,7 @@ static unsigned int get_rx_coal(struct mv643xx_eth_private *mp) temp = (val & 0x003fff00) >> 8; temp *= 64000000; - do_div(temp, mp->shared->t_clk); + do_div(temp, mp->t_clk); return (unsigned int)temp; } @@ -1319,7 +1326,7 @@ static void set_rx_coal(struct mv643xx_eth_private *mp, unsigned int usec) u64 temp; u32 val; - temp = (u64)usec * mp->shared->t_clk; + temp = (u64)usec * mp->t_clk; temp += 31999999; do_div(temp, 64000000); @@ -1345,7 +1352,7 @@ static unsigned int get_tx_coal(struct mv643xx_eth_private *mp) temp = (rdlp(mp, TX_FIFO_URGENT_THRESHOLD) & 0x3fff0) >> 4; temp *= 64000000; - do_div(temp, mp->shared->t_clk); + do_div(temp, mp->t_clk); return (unsigned int)temp; } @@ -1354,7 +1361,7 @@ static void set_tx_coal(struct mv643xx_eth_private *mp, unsigned int usec) { u64 temp; - temp = (u64)usec * mp->shared->t_clk; + temp = (u64)usec * mp->t_clk; temp += 31999999; do_div(temp, 64000000); @@ -2662,10 +2669,6 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) if (dram) mv643xx_eth_conf_mbus_windows(msp, dram); - /* - * Detect hardware parameters. - */ - msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000; msp->tx_csum_limit = (pd != NULL && pd->tx_csum_limit) ? pd->tx_csum_limit : 9 * 1024; infer_hw_params(msp); @@ -2890,6 +2893,18 @@ static int mv643xx_eth_probe(struct platform_device *pdev) mp->dev = dev; + /* + * Get the clk rate, if there is one, otherwise use the default. + */ + mp->clk = clk_get(&pdev->dev, (pdev->id ? "1" : "0")); + if (!IS_ERR(mp->clk)) { + clk_prepare_enable(mp->clk); + mp->t_clk = clk_get_rate(mp->clk); + } else { + mp->t_clk = 133000000; + printk(KERN_WARNING "Unable to get clock"); + } + set_params(mp, pd); netif_set_real_num_tx_queues(dev, mp->txq_count); netif_set_real_num_rx_queues(dev, mp->rxq_count); @@ -2978,6 +2993,11 @@ static int mv643xx_eth_remove(struct platform_device *pdev) if (mp->phy != NULL) phy_detach(mp->phy); cancel_work_sync(&mp->tx_timeout_task); + + if (!IS_ERR(mp->clk)) { + clk_disable_unprepare(mp->clk); + clk_put(mp->clk); + } free_netdev(mp->dev); platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From 4f04be62af95119d258b8035f498100e43c8c527 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 4 Mar 2012 16:57:31 +0100 Subject: ARM: Orion: WDT: Add clk/clkdev support Remove tclk from platform data. This makes the platform data structure empty, so remove it. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/watchdog/orion_wdt.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index 788aa158e78c..0f5736949c61 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -24,8 +24,8 @@ #include #include #include +#include #include -#include /* * Watchdog timer block registers. @@ -41,6 +41,7 @@ static bool nowayout = WATCHDOG_NOWAYOUT; static int heartbeat = -1; /* module parameter (seconds) */ static unsigned int wdt_max_duration; /* (seconds) */ +static struct clk *clk; static unsigned int wdt_tclk; static void __iomem *wdt_reg; static unsigned long wdt_status; @@ -237,16 +238,16 @@ static struct miscdevice orion_wdt_miscdev = { static int __devinit orion_wdt_probe(struct platform_device *pdev) { - struct orion_wdt_platform_data *pdata = pdev->dev.platform_data; struct resource *res; int ret; - if (pdata) { - wdt_tclk = pdata->tclk; - } else { - pr_err("misses platform data\n"); + clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(clk)) { + printk(KERN_ERR "Orion Watchdog missing clock\n"); return -ENODEV; } + clk_prepare_enable(clk); + wdt_tclk = clk_get_rate(clk); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -282,6 +283,9 @@ static int __devexit orion_wdt_remove(struct platform_device *pdev) if (!ret) orion_wdt_miscdev.parent = NULL; + clk_disable_unprepare(clk); + clk_put(clk); + return ret; } -- cgit v1.2.2 From eee989902aab45f0ca2739727ef615420802649c Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 18 Feb 2012 22:26:42 +0100 Subject: ARM: Orion: SATA: Add per channel clk/clkdev support. The Orion kirkwood chips have a gatable clock per SATA channel. Add code to get and enable this clk if it exists. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/ata/sata_mv.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 7336d4a7ab31..24712adf69df 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -553,6 +553,7 @@ struct mv_host_priv { #if defined(CONFIG_HAVE_CLK) struct clk *clk; + struct clk **port_clks; #endif /* * These consistent DMA memory pools give us guaranteed @@ -4027,6 +4028,9 @@ static int mv_platform_probe(struct platform_device *pdev) struct resource *res; int n_ports = 0; int rc; +#if defined(CONFIG_HAVE_CLK) + int port; +#endif ata_print_version_once(&pdev->dev, DRV_VERSION); @@ -4054,6 +4058,13 @@ static int mv_platform_probe(struct platform_device *pdev) if (!host || !hpriv) return -ENOMEM; +#if defined(CONFIG_HAVE_CLK) + hpriv->port_clks = devm_kzalloc(&pdev->dev, + sizeof(struct clk *) * n_ports, + GFP_KERNEL); + if (!hpriv->port_clks) + return -ENOMEM; +#endif host->private_data = hpriv; hpriv->n_ports = n_ports; hpriv->board_idx = chip_soc; @@ -4066,9 +4077,17 @@ static int mv_platform_probe(struct platform_device *pdev) #if defined(CONFIG_HAVE_CLK) hpriv->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(hpriv->clk)) - dev_notice(&pdev->dev, "cannot get clkdev\n"); + dev_notice(&pdev->dev, "cannot get optional clkdev\n"); else - clk_enable(hpriv->clk); + clk_prepare_enable(hpriv->clk); + + for (port = 0; port < n_ports; port++) { + char port_number[16]; + sprintf(port_number, "%d", port); + hpriv->port_clks[port] = clk_get(&pdev->dev, port_number); + if (!IS_ERR(hpriv->port_clks[port])) + clk_prepare_enable(hpriv->port_clks[port]); + } #endif /* @@ -4098,9 +4117,15 @@ static int mv_platform_probe(struct platform_device *pdev) err: #if defined(CONFIG_HAVE_CLK) if (!IS_ERR(hpriv->clk)) { - clk_disable(hpriv->clk); + clk_disable_unprepare(hpriv->clk); clk_put(hpriv->clk); } + for (port = 0; port < n_ports; port++) { + if (!IS_ERR(hpriv->port_clks[port])) { + clk_disable_unprepare(hpriv->port_clks[port]); + clk_put(hpriv->port_clks[port]); + } + } #endif return rc; @@ -4119,14 +4144,21 @@ static int __devexit mv_platform_remove(struct platform_device *pdev) struct ata_host *host = platform_get_drvdata(pdev); #if defined(CONFIG_HAVE_CLK) struct mv_host_priv *hpriv = host->private_data; + int port; #endif ata_host_detach(host); #if defined(CONFIG_HAVE_CLK) if (!IS_ERR(hpriv->clk)) { - clk_disable(hpriv->clk); + clk_disable_unprepare(hpriv->clk); clk_put(hpriv->clk); } + for (port = 0; port < host->n_ports; port++) { + if (!IS_ERR(hpriv->port_clks[port])) { + clk_disable_unprepare(hpriv->port_clks[port]); + clk_put(hpriv->port_clks[port]); + } + } #endif return 0; } -- cgit v1.2.2 From 8c869edaee07c623066266827371235fb9c12e01 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 15 Apr 2012 12:53:47 +0200 Subject: ARM: Orion: EHCI: Add support for enabling clocks Not all platforms support gating the clock, so it is not an error if the clock does not exist. However, if it does exist, we should enable/disable it as appropriate. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/usb/host/ehci-orion.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c index 6c6a5a3b4ea7..82de1073aa52 100644 --- a/drivers/usb/host/ehci-orion.c +++ b/drivers/usb/host/ehci-orion.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #define rdl(off) __raw_readl(hcd->regs + (off)) @@ -198,6 +199,7 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev) struct resource *res; struct usb_hcd *hcd; struct ehci_hcd *ehci; + struct clk *clk; void __iomem *regs; int irq, err; @@ -238,6 +240,14 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev) goto err2; } + /* Not all platforms can gate the clock, so it is not + an error if the clock does not exists. */ + clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(clk)) { + clk_prepare_enable(clk); + clk_put(clk); + } + hcd = usb_create_hcd(&ehci_orion_hc_driver, &pdev->dev, dev_name(&pdev->dev)); if (!hcd) { @@ -301,12 +311,18 @@ err1: static int __exit ehci_orion_drv_remove(struct platform_device *pdev) { struct usb_hcd *hcd = platform_get_drvdata(pdev); + struct clk *clk; usb_remove_hcd(hcd); iounmap(hcd->regs); release_mem_region(hcd->rsrc_start, hcd->rsrc_len); usb_put_hcd(hcd); + clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(clk)) { + clk_disable_unprepare(clk); + clk_put(clk); + } return 0; } -- cgit v1.2.2 From 9c2bd504b55ce3e680ae0d3768e78c15fef3448d Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 19 Feb 2012 11:01:22 +0100 Subject: ARM: Orion: NAND: Add support for clk, if there is one. Not all orion platforms can gate the clock, but if it does exist, enable/disable it as appropriate. v2: Fix the name of the clkdev entry. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/mtd/nand/orion_nand.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index 1d3bfb26080c..fdc4786ea3e5 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include #include #include @@ -77,6 +79,7 @@ static int __init orion_nand_probe(struct platform_device *pdev) struct nand_chip *nc; struct orion_nand_data *board; struct resource *res; + struct clk *clk; void __iomem *io_base; int ret = 0; @@ -123,6 +126,14 @@ static int __init orion_nand_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mtd); + /* Not all platforms can gate the clock, so it is not + an error if the clock does not exists. */ + clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(clk)) { + clk_prepare_enable(clk); + clk_put(clk); + } + if (nand_scan(mtd, 1)) { ret = -ENXIO; goto no_dev; @@ -151,6 +162,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev) { struct mtd_info *mtd = platform_get_drvdata(pdev); struct nand_chip *nc = mtd->priv; + struct clk *clk; nand_release(mtd); @@ -158,6 +170,12 @@ static int __devexit orion_nand_remove(struct platform_device *pdev) kfree(nc); + clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(clk)) { + clk_disable_unprepare(clk); + clk_put(clk); + } + return 0; } -- cgit v1.2.2 From f4f7561e032777cd7376800ac97352d5b1684d8f Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 19 Feb 2012 11:39:27 +0100 Subject: ARM: Orion: SDIO: Add support for clk. Some orion devices can gate the SDIO clock. If the clock exists, enable/disable it as appropriate. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/mmc/host/mvsdio.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c index eeb8cd125b0c..3b9136c1a475 100644 --- a/drivers/mmc/host/mvsdio.c +++ b/drivers/mmc/host/mvsdio.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -51,6 +52,7 @@ struct mvsd_host { struct device *dev; struct resource *res; int irq; + struct clk *clk; int gpio_card_detect; int gpio_write_protect; }; @@ -770,6 +772,13 @@ static int __init mvsd_probe(struct platform_device *pdev) } else host->irq = irq; + /* Not all platforms can gate the clock, so it is not + an error if the clock does not exists. */ + host->clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(host->clk)) { + clk_prepare_enable(host->clk); + } + if (mvsd_data->gpio_card_detect) { ret = gpio_request(mvsd_data->gpio_card_detect, DRIVER_NAME " cd"); @@ -854,6 +863,11 @@ static int __exit mvsd_remove(struct platform_device *pdev) mvsd_power_down(host); iounmap(host->base); release_resource(host->res); + + if (!IS_ERR(host->clk)) { + clk_disable_unprepare(host->clk); + clk_put(host->clk); + } mmc_free_host(mmc); } platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From 1f80b126d06cf5c88b7f03a80c79ffd85053688a Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 19 Feb 2012 11:56:19 +0100 Subject: ARM: Orion: CESA: Add support for clk Some orion platforms support gating of the clock. If the clock exists enable/disbale it as appropriate. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/crypto/mv_cesa.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers') diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c index e6ecc5f23943..1cc6b3f3e262 100644 --- a/drivers/crypto/mv_cesa.c +++ b/drivers/crypto/mv_cesa.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -79,6 +80,7 @@ struct crypto_priv { void __iomem *reg; void __iomem *sram; int irq; + struct clk *clk; struct task_struct *queue_th; /* the lock protects queue and eng_st */ @@ -1053,6 +1055,12 @@ static int mv_probe(struct platform_device *pdev) if (ret) goto err_thread; + /* Not all platforms can gate the clock, so it is not + an error if the clock does not exists. */ + cp->clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(cp->clk)) + clk_prepare_enable(cp->clk); + writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK); writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG); writel(SRAM_CONFIG, cpg->reg + SEC_ACCEL_DESC_P0); @@ -1118,6 +1126,12 @@ static int mv_remove(struct platform_device *pdev) memset(cp->sram, 0, cp->sram_size); iounmap(cp->sram); iounmap(cp->reg); + + if (!IS_ERR(cp->clk)) { + clk_disable_unprepare(cp->clk); + clk_put(cp->clk); + } + kfree(cp); cpg = NULL; return 0; -- cgit v1.2.2 From c510182b1c68e2f2bf61e69f6c65bcf61a188809 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 19 Feb 2012 13:30:26 +0100 Subject: ARM: Orion: XOR: Add support for clk Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: Andrew Lunn Tested-by: Jamie Lentin Signed-off-by: Mike Turquette --- drivers/dma/mv_xor.c | 15 +++++++++++++++ drivers/dma/mv_xor.h | 1 + 2 files changed, 16 insertions(+) (limited to 'drivers') diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index fa5d55fea46c..0b12e68bf79c 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "dmaengine.h" @@ -1307,11 +1308,25 @@ static int mv_xor_shared_probe(struct platform_device *pdev) if (dram) mv_xor_conf_mbus_windows(msp, dram); + /* Not all platforms can gate the clock, so it is not + * an error if the clock does not exists. + */ + msp->clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(msp->clk)) + clk_prepare_enable(msp->clk); + return 0; } static int mv_xor_shared_remove(struct platform_device *pdev) { + struct mv_xor_shared_private *msp = platform_get_drvdata(pdev); + + if (!IS_ERR(msp->clk)) { + clk_disable_unprepare(msp->clk); + clk_put(msp->clk); + } + return 0; } diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h index 654876b7ba1d..a5b422f5a8ab 100644 --- a/drivers/dma/mv_xor.h +++ b/drivers/dma/mv_xor.h @@ -55,6 +55,7 @@ struct mv_xor_shared_private { void __iomem *xor_base; void __iomem *xor_high_base; + struct clk *clk; }; -- cgit v1.2.2 From 35bdd29095ad614c5fb4a934bfd4f57a94dfd395 Mon Sep 17 00:00:00 2001 From: Alessandro Rubini Date: Thu, 12 Apr 2012 10:48:44 +0200 Subject: mfd: Add driver for STA2X11 MFD block This also introduces to export a function that is in the base sta2x11 support patches. The header will increase with other prototypes and constants over time. Signed-off-by: Alessandro Rubini Acked-by: Giancarlo Asnaghi Cc: Alan Cox Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 5 + drivers/mfd/Makefile | 1 + drivers/mfd/sta2x11-mfd.c | 467 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 473 insertions(+) create mode 100644 drivers/mfd/sta2x11-mfd.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ef86a741b7e2..48eed22c65a5 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -906,6 +906,11 @@ config MFD_RC5T583 Additional drivers must be enabled in order to use the different functionality of the device. +config MFD_STA2X11 + bool "STA2X11 multi function device support" + depends on STA2X11 + select MFD_CORE + config MFD_ANATOP bool "Support for Freescale i.MX on-chip ANATOP controller" depends on SOC_IMX6Q diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 5dd6be7aa350..0dc55cbefa09 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_MFD_DAVINCI_VOICECODEC) += davinci_voicecodec.o obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o obj-$(CONFIG_MFD_TI_SSP) += ti-ssp.o +obj-$(CONFIG_MFD_STA2X11) += sta2x11-mfd.o obj-$(CONFIG_MFD_STMPE) += stmpe.o obj-$(CONFIG_STMPE_I2C) += stmpe-i2c.o obj-$(CONFIG_STMPE_SPI) += stmpe-spi.o diff --git a/drivers/mfd/sta2x11-mfd.c b/drivers/mfd/sta2x11-mfd.c new file mode 100644 index 000000000000..d31fed07aefb --- /dev/null +++ b/drivers/mfd/sta2x11-mfd.c @@ -0,0 +1,467 @@ +/* + * Copyright (c) 2009-2011 Wind River Systems, Inc. + * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* This describes STA2X11 MFD chip for us, we may have several */ +struct sta2x11_mfd { + struct sta2x11_instance *instance; + spinlock_t lock; + struct list_head list; + void __iomem *sctl_regs; + void __iomem *apbreg_regs; +}; + +static LIST_HEAD(sta2x11_mfd_list); + +/* Three functions to act on the list */ +static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev) +{ + struct sta2x11_instance *instance; + struct sta2x11_mfd *mfd; + + if (!pdev && !list_empty(&sta2x11_mfd_list)) { + pr_warning("%s: Unspecified device, " + "using first instance\n", __func__); + return list_entry(sta2x11_mfd_list.next, + struct sta2x11_mfd, list); + } + + instance = sta2x11_get_instance(pdev); + if (!instance) + return NULL; + list_for_each_entry(mfd, &sta2x11_mfd_list, list) { + if (mfd->instance == instance) + return mfd; + } + return NULL; +} + +static int __devinit sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags) +{ + struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); + struct sta2x11_instance *instance; + + if (mfd) + return -EBUSY; + instance = sta2x11_get_instance(pdev); + if (!instance) + return -EINVAL; + mfd = kzalloc(sizeof(*mfd), flags); + if (!mfd) + return -ENOMEM; + INIT_LIST_HEAD(&mfd->list); + spin_lock_init(&mfd->lock); + mfd->instance = instance; + list_add(&mfd->list, &sta2x11_mfd_list); + return 0; +} + +static int __devexit mfd_remove(struct pci_dev *pdev) +{ + struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); + + if (!mfd) + return -ENODEV; + list_del(&mfd->list); + kfree(mfd); + return 0; +} + +/* These two functions are exported and are not expected to fail */ +u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val) +{ + struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); + u32 r; + unsigned long flags; + + if (!mfd) { + dev_warn(&pdev->dev, ": can't access sctl regs\n"); + return 0; + } + if (!mfd->sctl_regs) { + dev_warn(&pdev->dev, ": system ctl not initialized\n"); + return 0; + } + spin_lock_irqsave(&mfd->lock, flags); + r = readl(mfd->sctl_regs + reg); + r &= ~mask; + r |= val; + if (mask) + writel(r, mfd->sctl_regs + reg); + spin_unlock_irqrestore(&mfd->lock, flags); + return r; +} +EXPORT_SYMBOL(sta2x11_sctl_mask); + +u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val) +{ + struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); + u32 r; + unsigned long flags; + + if (!mfd) { + dev_warn(&pdev->dev, ": can't access apb regs\n"); + return 0; + } + if (!mfd->apbreg_regs) { + dev_warn(&pdev->dev, ": apb bridge not initialized\n"); + return 0; + } + spin_lock_irqsave(&mfd->lock, flags); + r = readl(mfd->apbreg_regs + reg); + r &= ~mask; + r |= val; + if (mask) + writel(r, mfd->apbreg_regs + reg); + spin_unlock_irqrestore(&mfd->lock, flags); + return r; +} +EXPORT_SYMBOL(sta2x11_apbreg_mask); + +/* Two debugfs files, for our registers (FIXME: one instance only) */ +#define REG(regname) {.name = #regname, .offset = SCTL_ ## regname} +static struct debugfs_reg32 sta2x11_sctl_regs[] = { + REG(SCCTL), REG(ARMCFG), REG(SCPLLCTL), REG(SCPLLFCTRL), + REG(SCRESFRACT), REG(SCRESCTRL1), REG(SCRESXTRL2), REG(SCPEREN0), + REG(SCPEREN1), REG(SCPEREN2), REG(SCGRST), REG(SCPCIPMCR1), + REG(SCPCIPMCR2), REG(SCPCIPMSR1), REG(SCPCIPMSR2), REG(SCPCIPMSR3), + REG(SCINTREN), REG(SCRISR), REG(SCCLKSTAT0), REG(SCCLKSTAT1), + REG(SCCLKSTAT2), REG(SCRSTSTA), +}; +#undef REG + +static struct debugfs_regset32 sctl_regset = { + .regs = sta2x11_sctl_regs, + .nregs = ARRAY_SIZE(sta2x11_sctl_regs), +}; + +#define REG(regname) {.name = #regname, .offset = regname} +static struct debugfs_reg32 sta2x11_apbreg_regs[] = { + REG(APBREG_BSR), REG(APBREG_PAER), REG(APBREG_PWAC), REG(APBREG_PRAC), + REG(APBREG_PCG), REG(APBREG_PUR), REG(APBREG_EMU_PCG), +}; +#undef REG + +static struct debugfs_regset32 apbreg_regset = { + .regs = sta2x11_apbreg_regs, + .nregs = ARRAY_SIZE(sta2x11_apbreg_regs), +}; + +static struct dentry *sta2x11_sctl_debugfs; +static struct dentry *sta2x11_apbreg_debugfs; + +/* Probe for the two platform devices */ +static int sta2x11_sctl_probe(struct platform_device *dev) +{ + struct pci_dev **pdev; + struct sta2x11_mfd *mfd; + struct resource *res; + + pdev = dev->dev.platform_data; + mfd = sta2x11_mfd_find(*pdev); + if (!mfd) + return -ENODEV; + + res = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (!res) + return -ENOMEM; + + if (!request_mem_region(res->start, resource_size(res), + "sta2x11-sctl")) + return -EBUSY; + + mfd->sctl_regs = ioremap(res->start, resource_size(res)); + if (!mfd->sctl_regs) { + release_mem_region(res->start, resource_size(res)); + return -ENOMEM; + } + sctl_regset.base = mfd->sctl_regs; + sta2x11_sctl_debugfs = debugfs_create_regset32("sta2x11-sctl", + S_IFREG | S_IRUGO, + NULL, &sctl_regset); + return 0; +} + +static int sta2x11_apbreg_probe(struct platform_device *dev) +{ + struct pci_dev **pdev; + struct sta2x11_mfd *mfd; + struct resource *res; + + pdev = dev->dev.platform_data; + dev_dbg(&dev->dev, "%s: pdata is %p\n", __func__, pdev); + dev_dbg(&dev->dev, "%s: *pdata is %p\n", __func__, *pdev); + + mfd = sta2x11_mfd_find(*pdev); + if (!mfd) + return -ENODEV; + + res = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (!res) + return -ENOMEM; + + if (!request_mem_region(res->start, resource_size(res), + "sta2x11-apbreg")) + return -EBUSY; + + mfd->apbreg_regs = ioremap(res->start, resource_size(res)); + if (!mfd->apbreg_regs) { + release_mem_region(res->start, resource_size(res)); + return -ENOMEM; + } + dev_dbg(&dev->dev, "%s: regbase %p\n", __func__, mfd->apbreg_regs); + + apbreg_regset.base = mfd->apbreg_regs; + sta2x11_apbreg_debugfs = debugfs_create_regset32("sta2x11-apbreg", + S_IFREG | S_IRUGO, + NULL, &apbreg_regset); + return 0; +} + +/* The two platform drivers */ +static struct platform_driver sta2x11_sctl_platform_driver = { + .driver = { + .name = "sta2x11-sctl", + .owner = THIS_MODULE, + }, + .probe = sta2x11_sctl_probe, +}; + +static int __init sta2x11_sctl_init(void) +{ + pr_info("%s\n", __func__); + return platform_driver_register(&sta2x11_sctl_platform_driver); +} + +static struct platform_driver sta2x11_platform_driver = { + .driver = { + .name = "sta2x11-apbreg", + .owner = THIS_MODULE, + }, + .probe = sta2x11_apbreg_probe, +}; + +static int __init sta2x11_apbreg_init(void) +{ + pr_info("%s\n", __func__); + return platform_driver_register(&sta2x11_platform_driver); +} + +/* + * What follows is the PCI device that hosts the above two pdevs. + * Each logic block is 4kB and they are all consecutive: we use this info. + */ + +/* Bar 0 */ +enum bar0_cells { + STA2X11_GPIO_0 = 0, + STA2X11_GPIO_1, + STA2X11_GPIO_2, + STA2X11_GPIO_3, + STA2X11_SCTL, + STA2X11_SCR, + STA2X11_TIME, +}; +/* Bar 1 */ +enum bar1_cells { + STA2X11_APBREG = 0, +}; +#define CELL_4K(_name, _cell) { \ + .name = _name, \ + .start = _cell * 4096, .end = _cell * 4096 + 4095, \ + .flags = IORESOURCE_MEM, \ + } + +static const __devinitconst struct resource gpio_resources[] = { + { + .name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */ + .start = 0, + .end = (4 * 4096) - 1, + .flags = IORESOURCE_MEM, + } +}; +static const __devinitconst struct resource sctl_resources[] = { + CELL_4K("sta2x11-sctl", STA2X11_SCTL), +}; +static const __devinitconst struct resource scr_resources[] = { + CELL_4K("sta2x11-scr", STA2X11_SCR), +}; +static const __devinitconst struct resource time_resources[] = { + CELL_4K("sta2x11-time", STA2X11_TIME), +}; + +static const __devinitconst struct resource apbreg_resources[] = { + CELL_4K("sta2x11-apbreg", STA2X11_APBREG), +}; + +#define DEV(_name, _r) \ + { .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, } + +static __devinitdata struct mfd_cell sta2x11_mfd_bar0[] = { + DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */ + DEV("sta2x11-sctl", sctl_resources), + DEV("sta2x11-scr", scr_resources), + DEV("sta2x11-time", time_resources), +}; + +static __devinitdata struct mfd_cell sta2x11_mfd_bar1[] = { + DEV("sta2x11-apbreg", apbreg_resources), +}; + +static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state) +{ + pci_save_state(pdev); + pci_disable_device(pdev); + pci_set_power_state(pdev, pci_choose_state(pdev, state)); + + return 0; +} + +static int sta2x11_mfd_resume(struct pci_dev *pdev) +{ + int err; + + pci_set_power_state(pdev, 0); + err = pci_enable_device(pdev); + if (err) + return err; + pci_restore_state(pdev); + + return 0; +} + +static int __devinit sta2x11_mfd_probe(struct pci_dev *pdev, + const struct pci_device_id *pci_id) +{ + int err, i; + struct sta2x11_gpio_pdata *gpio_data; + + dev_info(&pdev->dev, "%s\n", __func__); + + err = pci_enable_device(pdev); + if (err) { + dev_err(&pdev->dev, "Can't enable device.\n"); + return err; + } + + err = pci_enable_msi(pdev); + if (err) + dev_info(&pdev->dev, "Enable msi failed\n"); + + /* Read gpio config data as pci device's platform data */ + gpio_data = dev_get_platdata(&pdev->dev); + if (!gpio_data) + dev_warn(&pdev->dev, "no gpio configuration\n"); + + dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__, + gpio_data, &gpio_data); + dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__, + pdev, &pdev); + + /* platform data is the pci device for all of them */ + for (i = 0; i < ARRAY_SIZE(sta2x11_mfd_bar0); i++) { + sta2x11_mfd_bar0[i].pdata_size = sizeof(pdev); + sta2x11_mfd_bar0[i].platform_data = &pdev; + } + sta2x11_mfd_bar1[0].pdata_size = sizeof(pdev); + sta2x11_mfd_bar1[0].platform_data = &pdev; + + /* Record this pdev before mfd_add_devices: their probe looks for it */ + sta2x11_mfd_add(pdev, GFP_ATOMIC); + + + err = mfd_add_devices(&pdev->dev, -1, + sta2x11_mfd_bar0, + ARRAY_SIZE(sta2x11_mfd_bar0), + &pdev->resource[0], + 0); + if (err) { + dev_err(&pdev->dev, "mfd_add_devices[0] failed: %d\n", err); + goto err_disable; + } + + err = mfd_add_devices(&pdev->dev, -1, + sta2x11_mfd_bar1, + ARRAY_SIZE(sta2x11_mfd_bar1), + &pdev->resource[1], + 0); + if (err) { + dev_err(&pdev->dev, "mfd_add_devices[1] failed: %d\n", err); + goto err_disable; + } + + return 0; + +err_disable: + mfd_remove_devices(&pdev->dev); + pci_disable_device(pdev); + pci_disable_msi(pdev); + return err; +} + +static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = { + {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)}, + {0,}, +}; + +static struct pci_driver sta2x11_mfd_driver = { + .name = "sta2x11-mfd", + .id_table = sta2x11_mfd_tbl, + .probe = sta2x11_mfd_probe, + .suspend = sta2x11_mfd_suspend, + .resume = sta2x11_mfd_resume, +}; + +static int __init sta2x11_mfd_init(void) +{ + pr_info("%s\n", __func__); + return pci_register_driver(&sta2x11_mfd_driver); +} + +/* + * All of this must be ready before "normal" devices like MMCI appear. + * But MFD (the pci device) can't be too early. The following choice + * prepares platform drivers very early and probe the PCI device later, + * but before other PCI devices. + */ +subsys_initcall(sta2x11_apbreg_init); +subsys_initcall(sta2x11_sctl_init); +rootfs_initcall(sta2x11_mfd_init); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Wind River"); +MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG"); +MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl); -- cgit v1.2.2 From 7b0d44f3b7cec0ae6f5e81d18df4a4077bbabb7c Mon Sep 17 00:00:00 2001 From: Alessandro Rubini Date: Thu, 12 Apr 2012 10:48:55 +0200 Subject: gpio: Add STA2X11 GPIO block This introduces 128 gpio bits (for each PCI device installed) with working interrupt support. Signed-off-by: Alessandro Rubini Acked-by: Giancarlo Asnaghi Cc: Alan Cox Signed-off-by: Samuel Ortiz --- drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sta2x11.c | 435 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 444 insertions(+) create mode 100644 drivers/gpio/gpio-sta2x11.c (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a0d57964d31c..09ac540daade 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -149,6 +149,14 @@ config GPIO_PXA help Say yes here to support the PXA GPIO device +config GPIO_STA2X11 + bool "STA2x11/ConneXt GPIO support" + depends on MFD_STA2X11 + select GENERIC_IRQ_CHIP + help + Say yes here to support the STA2x11/ConneXt GPIO device. + The GPIO module has 128 GPIO pins with alternate functions. + config GPIO_XILINX bool "Xilinx GPIO support" depends on PPC_OF || MICROBLAZE diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 183c42b61cef..2e69c5822315 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o +obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c new file mode 100644 index 000000000000..38416be8ba11 --- /dev/null +++ b/drivers/gpio/gpio-sta2x11.c @@ -0,0 +1,435 @@ +/* + * STMicroelectronics ConneXt (STA2X11) GPIO driver + * + * Copyright 2012 ST Microelectronics (Alessandro Rubini) + * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd. + * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct gsta_regs { + u32 dat; /* 0x00 */ + u32 dats; + u32 datc; + u32 pdis; + u32 dir; /* 0x10 */ + u32 dirs; + u32 dirc; + u32 unused_1c; + u32 afsela; /* 0x20 */ + u32 unused_24[7]; + u32 rimsc; /* 0x40 */ + u32 fimsc; + u32 is; + u32 ic; +}; + +struct gsta_gpio { + spinlock_t lock; + struct device *dev; + void __iomem *reg_base; + struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS]; + struct gpio_chip gpio; + int irq_base; + /* FIXME: save the whole config here (AF, ...) */ + unsigned irq_type[GSTA_NR_GPIO]; +}; + +static inline struct gsta_regs __iomem *__regs(struct gsta_gpio *chip, int nr) +{ + return chip->regs[nr / GSTA_GPIO_PER_BLOCK]; +} + +static inline u32 __bit(int nr) +{ + return 1U << (nr % GSTA_GPIO_PER_BLOCK); +} + +/* + * gpio methods + */ + +static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) +{ + struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + + if (val) + writel(bit, ®s->dats); + else + writel(bit, ®s->datc); +} + +static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr) +{ + struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + + return readl(®s->dat) & bit; +} + +static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, + int val) +{ + struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + + writel(bit, ®s->dirs); + /* Data register after direction, otherwise pullup/down is selected */ + if (val) + writel(bit, ®s->dats); + else + writel(bit, ®s->datc); + return 0; +} + +static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) +{ + struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + + writel(bit, ®s->dirc); + return 0; +} + +static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) +{ + struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); + return chip->irq_base + offset; +} + +static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */ +{ + struct gpio_chip *gpio = &chip->gpio; + + /* + * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts + * from the end. However, for compatibility, we need the first + * ConneXt device to start from gpio 0: it's the main chipset + * on most boards so documents and drivers assume gpio0..gpio127 + */ + static int gpio_base; + + gpio->label = dev_name(chip->dev); + gpio->owner = THIS_MODULE; + gpio->direction_input = gsta_gpio_direction_input; + gpio->get = gsta_gpio_get; + gpio->direction_output = gsta_gpio_direction_output; + gpio->set = gsta_gpio_set; + gpio->dbg_show = NULL; + gpio->base = gpio_base; + gpio->ngpio = GSTA_NR_GPIO; + gpio->can_sleep = 0; + gpio->to_irq = gsta_gpio_to_irq; + + /* + * After the first device, turn to dynamic gpio numbers. + * For example, with ARCH_NR_GPIOS = 256 we can fit two cards + */ + if (!gpio_base) + gpio_base = -1; +} + +/* + * Special method: alternate functions and pullup/pulldown. This is only + * invoked on startup to configure gpio's according to platform data. + * FIXME : this functionality shall be managed (and exported to other drivers) + * via the pin control subsystem. + */ +static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg) +{ + struct gsta_regs __iomem *regs = __regs(chip, nr); + unsigned long flags; + u32 bit = __bit(nr); + u32 val; + int err = 0; + + pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg); + + if (cfg == PINMUX_TYPE_NONE) + return; + + /* Alternate function or not? */ + spin_lock_irqsave(&chip->lock, flags); + val = readl(®s->afsela); + if (cfg == PINMUX_TYPE_FUNCTION) + val |= bit; + else + val &= ~bit; + writel(val | bit, ®s->afsela); + if (cfg == PINMUX_TYPE_FUNCTION) { + spin_unlock_irqrestore(&chip->lock, flags); + return; + } + + /* not alternate function: set details */ + switch (cfg) { + case PINMUX_TYPE_OUTPUT_LOW: + writel(bit, ®s->dirs); + writel(bit, ®s->datc); + break; + case PINMUX_TYPE_OUTPUT_HIGH: + writel(bit, ®s->dirs); + writel(bit, ®s->dats); + break; + case PINMUX_TYPE_INPUT: + writel(bit, ®s->dirc); + val = readl(®s->pdis) | bit; + writel(val, ®s->pdis); + break; + case PINMUX_TYPE_INPUT_PULLUP: + writel(bit, ®s->dirc); + val = readl(®s->pdis) & ~bit; + writel(val, ®s->pdis); + writel(bit, ®s->dats); + break; + case PINMUX_TYPE_INPUT_PULLDOWN: + writel(bit, ®s->dirc); + val = readl(®s->pdis) & ~bit; + writel(val, ®s->pdis); + writel(bit, ®s->datc); + break; + default: + err = 1; + } + spin_unlock_irqrestore(&chip->lock, flags); + if (err) + pr_err("%s: chip %p, pin %i, cfg %i is invalid\n", + __func__, chip, nr, cfg); +} + +/* + * Irq methods + */ + +static void gsta_irq_disable(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + struct gsta_gpio *chip = gc->private; + int nr = data->irq - chip->irq_base; + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + u32 val; + unsigned long flags; + + spin_lock_irqsave(&chip->lock, flags); + if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) { + val = readl(®s->rimsc) & ~bit; + writel(val, ®s->rimsc); + } + if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) { + val = readl(®s->fimsc) & ~bit; + writel(val, ®s->fimsc); + } + spin_unlock_irqrestore(&chip->lock, flags); + return; +} + +static void gsta_irq_enable(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + struct gsta_gpio *chip = gc->private; + int nr = data->irq - chip->irq_base; + struct gsta_regs __iomem *regs = __regs(chip, nr); + u32 bit = __bit(nr); + u32 val; + int type; + unsigned long flags; + + type = chip->irq_type[nr]; + + spin_lock_irqsave(&chip->lock, flags); + val = readl(®s->rimsc); + if (type & IRQ_TYPE_EDGE_RISING) + writel(val | bit, ®s->rimsc); + else + writel(val & ~bit, ®s->rimsc); + val = readl(®s->rimsc); + if (type & IRQ_TYPE_EDGE_FALLING) + writel(val | bit, ®s->fimsc); + else + writel(val & ~bit, ®s->fimsc); + spin_unlock_irqrestore(&chip->lock, flags); + return; +} + +static int gsta_irq_type(struct irq_data *d, unsigned int type) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct gsta_gpio *chip = gc->private; + int nr = d->irq - chip->irq_base; + + /* We only support edge interrupts */ + if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) { + pr_debug("%s: unsupported type 0x%x\n", __func__, type); + return -EINVAL; + } + + chip->irq_type[nr] = type; /* used for enable/disable */ + + gsta_irq_enable(d); + return 0; +} + +static irqreturn_t gsta_gpio_handler(int irq, void *dev_id) +{ + struct gsta_gpio *chip = dev_id; + struct gsta_regs __iomem *regs; + u32 is; + int i, nr, base; + irqreturn_t ret = IRQ_NONE; + + for (i = 0; i < GSTA_NR_BLOCKS; i++) { + regs = chip->regs[i]; + base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK; + while ((is = readl(®s->is))) { + nr = __ffs(is); + irq = base + nr; + generic_handle_irq(irq); + writel(1 << nr, ®s->ic); + ret = IRQ_HANDLED; + } + } + return ret; +} + +static __devinit void gsta_alloc_irq_chip(struct gsta_gpio *chip) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip(KBUILD_MODNAME, 1, chip->irq_base, + chip->reg_base, handle_simple_irq); + gc->private = chip; + ct = gc->chip_types; + + ct->chip.irq_set_type = gsta_irq_type; + ct->chip.irq_disable = gsta_irq_disable; + ct->chip.irq_enable = gsta_irq_enable; + + /* FIXME: this makes at most 32 interrupts. Request 0 by now */ + irq_setup_generic_chip(gc, 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */, 0, + IRQ_NOREQUEST | IRQ_NOPROBE, 0); + + /* Set up all all 128 interrupts: code from setup_generic_chip */ + { + struct irq_chip_type *ct = gc->chip_types; + int i, j; + for (j = 0; j < GSTA_NR_GPIO; j++) { + i = chip->irq_base + j; + irq_set_chip_and_handler(i, &ct->chip, ct->handler); + irq_set_chip_data(i, gc); + irq_modify_status(i, IRQ_NOREQUEST | IRQ_NOPROBE, 0); + } + gc->irq_cnt = i - gc->irq_base; + } +} + +/* The platform device used here is instantiated by the MFD device */ +static int __devinit gsta_probe(struct platform_device *dev) +{ + int i, err; + struct pci_dev *pdev; + struct sta2x11_gpio_pdata *gpio_pdata; + struct gsta_gpio *chip; + struct resource *res; + + pdev = *(struct pci_dev **)(dev->dev.platform_data); + gpio_pdata = dev_get_platdata(&pdev->dev); + + if (gpio_pdata == NULL) + dev_err(&dev->dev, "no gpio config\n"); + pr_debug("gpio config: %p\n", gpio_pdata); + + res = platform_get_resource(dev, IORESOURCE_MEM, 0); + + chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL); + chip->dev = &dev->dev; + chip->reg_base = devm_request_and_ioremap(&dev->dev, res); + + for (i = 0; i < GSTA_NR_BLOCKS; i++) { + chip->regs[i] = chip->reg_base + i * 4096; + /* disable all irqs */ + writel(0, &chip->regs[i]->rimsc); + writel(0, &chip->regs[i]->fimsc); + writel(~0, &chip->regs[i]->ic); + } + spin_lock_init(&chip->lock); + gsta_gpio_setup(chip); + for (i = 0; i < GSTA_NR_GPIO; i++) + gsta_set_config(chip, i, gpio_pdata->pinconfig[i]); + + /* 384 was used in previous code: be compatible for other drivers */ + err = irq_alloc_descs(-1, 384, GSTA_NR_GPIO, NUMA_NO_NODE); + if (err < 0) { + dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n", + -err); + return err; + } + chip->irq_base = err; + gsta_alloc_irq_chip(chip); + + err = request_irq(pdev->irq, gsta_gpio_handler, + IRQF_SHARED, KBUILD_MODNAME, chip); + if (err < 0) { + dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n", + -err); + goto err_free_descs; + } + + err = gpiochip_add(&chip->gpio); + if (err < 0) { + dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n", + -err); + goto err_free_irq; + } + + platform_set_drvdata(dev, chip); + return 0; + +err_free_irq: + free_irq(pdev->irq, chip); +err_free_descs: + irq_free_descs(chip->irq_base, GSTA_NR_GPIO); + return err; +} + +static struct platform_driver sta2x11_gpio_platform_driver = { + .driver = { + .name = "sta2x11-gpio", + .owner = THIS_MODULE, + }, + .probe = gsta_probe, +}; + +module_platform_driver(sta2x11_gpio_platform_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("sta2x11_gpio GPIO driver"); -- cgit v1.2.2 From 8ee3c2a79fe1df10bccd110d5b8cc13c5b9da709 Mon Sep 17 00:00:00 2001 From: Seth Heasley Date: Tue, 17 Apr 2012 14:09:22 -0700 Subject: lpc_sch: Add Intel Centerton Multifunction Device support This patch adds the Intel Centerton processor DeviceID for the Integrated Legacy Block (ILB). The ILB provides GPIO, SMBus, and Watchdog functionality. Signed-off-by: Seth Heasley Signed-off-by: Samuel Ortiz --- drivers/mfd/lpc_sch.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c index 27026eb924cd..9bf08393d747 100644 --- a/drivers/mfd/lpc_sch.c +++ b/drivers/mfd/lpc_sch.c @@ -36,6 +36,7 @@ #define GPIOBASE 0x44 #define GPIO_IO_SIZE 64 +#define GPIO_IO_SIZE_CENTERTON 128 #define WDTBASE 0x84 #define WDT_IO_SIZE 64 @@ -77,6 +78,7 @@ static struct mfd_cell tunnelcreek_cells[] = { static DEFINE_PCI_DEVICE_TABLE(lpc_sch_ids) = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) }, { 0, } }; MODULE_DEVICE_TABLE(pci, lpc_sch_ids); @@ -115,7 +117,11 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev, } gpio_sch_resource.start = base_addr; - gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1; + + if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) + gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1; + else + gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1; for (i=0; i < ARRAY_SIZE(lpc_sch_cells); i++) lpc_sch_cells[i].id = id->device; @@ -125,7 +131,8 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev, if (ret) goto out_dev; - if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC) { + if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC + || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) { pci_read_config_dword(dev, WDTBASE, &base_addr_cfg); if (!(base_addr_cfg & (1 << 31))) { dev_err(&dev->dev, "Decode of the WDT I/O range disabled\n"); -- cgit v1.2.2 From 96cf5f02aee8bbeff38824b18b9ec583d687f846 Mon Sep 17 00:00:00 2001 From: Seungwon Jeon Date: Wed, 25 Apr 2012 16:17:37 +0900 Subject: mmc: core: fix the decision of HS200/DDR card-type Current implementation decides the card type exclusively. Even though eMMC device can support both HS200 and DDR mode, card type will be set only for HS200. If the host doesn't support HS200 but has DDR capability, then DDR mode can't be selected. Signed-off-by: Seungwon Jeon Reviewed-by: Subhash Jadavani Signed-off-by: Chris Ball --- drivers/mmc/core/mmc.c | 81 ++++++++++++++++++++------------------------------ 1 file changed, 32 insertions(+), 49 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 54df5adc0413..0477769a8841 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -235,6 +235,36 @@ static int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd) return err; } +static void mmc_select_card_type(struct mmc_card *card) +{ + struct mmc_host *host = card->host; + u8 card_type = card->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_MASK; + unsigned int caps = host->caps, caps2 = host->caps2; + unsigned int hs_max_dtr = 0; + + if (card_type & EXT_CSD_CARD_TYPE_26) + hs_max_dtr = MMC_HIGH_26_MAX_DTR; + + if (caps & MMC_CAP_MMC_HIGHSPEED && + card_type & EXT_CSD_CARD_TYPE_52) + hs_max_dtr = MMC_HIGH_52_MAX_DTR; + + if ((caps & MMC_CAP_1_8V_DDR && + card_type & EXT_CSD_CARD_TYPE_DDR_1_8V) || + (caps & MMC_CAP_1_2V_DDR && + card_type & EXT_CSD_CARD_TYPE_DDR_1_2V)) + hs_max_dtr = MMC_HIGH_DDR_MAX_DTR; + + if ((caps2 & MMC_CAP2_HS200_1_8V_SDR && + card_type & EXT_CSD_CARD_TYPE_SDR_1_8V) || + (caps2 & MMC_CAP2_HS200_1_2V_SDR && + card_type & EXT_CSD_CARD_TYPE_SDR_1_2V)) + hs_max_dtr = MMC_HS200_MAX_DTR; + + card->ext_csd.hs_max_dtr = hs_max_dtr; + card->ext_csd.card_type = card_type; +} + /* * Decode extended CSD. */ @@ -284,56 +314,9 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) if (card->ext_csd.sectors > (2u * 1024 * 1024 * 1024) / 512) mmc_card_set_blockaddr(card); } + card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE]; - switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) { - case EXT_CSD_CARD_TYPE_SDR_ALL: - case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V: - case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V: - case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52: - card->ext_csd.hs_max_dtr = 200000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200; - break; - case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL: - case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V: - case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V: - case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52: - card->ext_csd.hs_max_dtr = 200000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V; - break; - case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL: - case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V: - case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V: - case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52: - card->ext_csd.hs_max_dtr = 200000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V; - break; - case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 | - EXT_CSD_CARD_TYPE_26: - card->ext_csd.hs_max_dtr = 52000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_52; - break; - case EXT_CSD_CARD_TYPE_DDR_1_2V | EXT_CSD_CARD_TYPE_52 | - EXT_CSD_CARD_TYPE_26: - card->ext_csd.hs_max_dtr = 52000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_2V; - break; - case EXT_CSD_CARD_TYPE_DDR_1_8V | EXT_CSD_CARD_TYPE_52 | - EXT_CSD_CARD_TYPE_26: - card->ext_csd.hs_max_dtr = 52000000; - card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_8V; - break; - case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26: - card->ext_csd.hs_max_dtr = 52000000; - break; - case EXT_CSD_CARD_TYPE_26: - card->ext_csd.hs_max_dtr = 26000000; - break; - default: - /* MMC v4 spec says this cannot happen */ - pr_warning("%s: card is mmc v4 but doesn't " - "support any high-speed modes.\n", - mmc_hostname(card->host)); - } + mmc_select_card_type(card); card->ext_csd.raw_s_a_timeout = ext_csd[EXT_CSD_S_A_TIMEOUT]; card->ext_csd.raw_erase_timeout_mult = -- cgit v1.2.2 From 10942aa40a595d7ff8b4e90f8a762e816367cac3 Mon Sep 17 00:00:00 2001 From: Seungwon Jeon Date: Wed, 25 Apr 2012 16:18:01 +0900 Subject: mmc: core: fix the signaling 1.8V for HS200 Currently only 1.2V is treated for HS200 mode. If the host has only 1.8V I/O capability not 1.2V, mmc_set_signal_voltage can't be called for 1.8V HS200. EXT_CSD_CARD_TYPE_SDR_1_8V needs to be considered. Signed-off-by: Seungwon Jeon Reviewed-by: Subhash Jadavani Signed-off-by: Chris Ball --- drivers/mmc/core/mmc.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 0477769a8841..2a9b7b1a4801 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -728,7 +728,7 @@ static int mmc_select_powerclass(struct mmc_card *card, */ static int mmc_select_hs200(struct mmc_card *card) { - int idx, err = 0; + int idx, err = -EINVAL; struct mmc_host *host; static unsigned ext_csd_bits[] = { EXT_CSD_BUS_WIDTH_4, @@ -744,10 +744,12 @@ static int mmc_select_hs200(struct mmc_card *card) host = card->host; if (card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_2V && - host->caps2 & MMC_CAP2_HS200_1_2V_SDR) - if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0)) - err = mmc_set_signal_voltage(host, - MMC_SIGNAL_VOLTAGE_180, 0); + host->caps2 & MMC_CAP2_HS200_1_2V_SDR) + err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0); + + if (err && card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_8V && + host->caps2 & MMC_CAP2_HS200_1_8V_SDR) + err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180, 0); /* If fails try again during next card power cycle */ if (err) -- cgit v1.2.2 From 3d93576e3442a2becb91290d62f1c105fec1150c Mon Sep 17 00:00:00 2001 From: Subhash Jadavani Date: Thu, 12 Apr 2012 19:36:07 +0530 Subject: mmc: core: skip card initialization if power class selection fails With current implementation of power class selection, mmc_select_powerclass() should never fail. So treat any error returned by this function as serious enough to skip the card initialization. Signed-off-by: Subhash Jadavani Reviewed-by: Namjae Jeon Signed-off-by: Chris Ball --- drivers/mmc/core/mmc.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 2a9b7b1a4801..163046030773 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -719,6 +719,10 @@ static int mmc_select_powerclass(struct mmc_card *card, card->ext_csd.generic_cmd6_time); } + if (err) + pr_err("%s: power class selection for ext_csd_bus_width %d" + " failed\n", mmc_hostname(card->host), bus_width); + return err; } @@ -1102,9 +1106,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4; err = mmc_select_powerclass(card, ext_csd_bits, ext_csd); if (err) - pr_warning("%s: power class selection to bus width %d" - " failed\n", mmc_hostname(card->host), - 1 << bus_width); + goto err; } /* @@ -1136,10 +1138,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, err = mmc_select_powerclass(card, ext_csd_bits[idx][0], ext_csd); if (err) - pr_warning("%s: power class selection to " - "bus width %d failed\n", - mmc_hostname(card->host), - 1 << bus_width); + goto err; err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, @@ -1167,10 +1166,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, err = mmc_select_powerclass(card, ext_csd_bits[idx][1], ext_csd); if (err) - pr_warning("%s: power class selection to " - "bus width %d ddr %d failed\n", - mmc_hostname(card->host), - 1 << bus_width, ddr); + goto err; err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, -- cgit v1.2.2 From 1b50f5f392e31ab41a272ed3b438f603c09be3f0 Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Fri, 13 Apr 2012 17:54:11 +0530 Subject: mmc: queue: rename mmc_request function The name mmc_request is used for both the issue function and a data structure, which creates conflicts in symbol lookups in editors. Rename the function to mmc_request_fn. Signed-off-by: Venkatraman S Reviewed-by: Namjae Jeon Signed-off-by: Chris Ball --- drivers/mmc/card/queue.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c index 996f8e36e23d..49af43c97323 100644 --- a/drivers/mmc/card/queue.c +++ b/drivers/mmc/card/queue.c @@ -96,7 +96,7 @@ static int mmc_queue_thread(void *d) * on any queue on this host, and attempt to issue it. This may * not be the queue we were asked to process. */ -static void mmc_request(struct request_queue *q) +static void mmc_request_fn(struct request_queue *q) { struct mmc_queue *mq = q->queuedata; struct request *req; @@ -171,7 +171,7 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, limit = *mmc_dev(host)->dma_mask; mq->card = card; - mq->queue = blk_init_queue(mmc_request, lock); + mq->queue = blk_init_queue(mmc_request_fn, lock); if (!mq->queue) return -ENOMEM; -- cgit v1.2.2 From 9e69ab4116668be1e327d164d6a27c8605b0aabb Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Sat, 5 May 2012 16:02:48 -0700 Subject: mfd: Fix of_match_node() da9052 arguments The driver calls of_match_node() with the arguments swapped. Signed-off-by: Olof Johansson Tested-by: Ying-Chun Liu Signed-off-by: Samuel Ortiz --- drivers/mfd/da9052-i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index d8abdb35161e..8410065f135f 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -104,7 +104,7 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, struct device_node *np = client->dev.of_node; const struct of_device_id *deviceid; - deviceid = of_match_node(np, dialog_dt_ids); + deviceid = of_match_node(dialog_dt_ids, np); id = (const struct i2c_device_id *)deviceid->data; } #endif -- cgit v1.2.2 From b41b6f1d1cb6a16c737c4699d2815112ec21faa6 Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Fri, 13 Apr 2012 17:54:13 +0530 Subject: mmc: queue: remove redundant memsets Not needed to memset, as they are pointers and are assigned to proper values in the next line anyway. Signed-off-by: Venkatraman S Reviewed-by: Namjae Jeon Signed-off-by: Chris Ball --- drivers/mmc/card/queue.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c index 49af43c97323..e360a979857d 100644 --- a/drivers/mmc/card/queue.c +++ b/drivers/mmc/card/queue.c @@ -175,8 +175,6 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, if (!mq->queue) return -ENOMEM; - memset(&mq->mqrq_cur, 0, sizeof(mq->mqrq_cur)); - memset(&mq->mqrq_prev, 0, sizeof(mq->mqrq_prev)); mq->mqrq_cur = mqrq_cur; mq->mqrq_prev = mqrq_prev; mq->queue->queuedata = mq; -- cgit v1.2.2 From 95dcc2cb6c9c84555c29187f8b7cf39e83991a29 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 1 May 2012 14:57:36 -0700 Subject: mmc: dw_mmc: make multiple instances of dw_mci_card_workqueue The variable 'dw_mci_card_workqueue' is a global variable shared between multiple instances of the dw_mmc host controller. Due to this, data corruption has been noticed when multiple instances of dw_mmc controllers are actively reading/writing the media. Fix this by adding a instance of 'struct workqueue_struct' for each host instance and removing the global 'dw_mci_card_workqueue' instance. Signed-off-by: Thomas Abraham Acked-by: Jaehoon Chung Acked-by: Will Newton Signed-off-by: Chris Ball --- drivers/mmc/host/dw_mmc.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index ab3fc4617107..1532357787cb 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -100,8 +100,6 @@ struct dw_mci_slot { int last_detect_state; }; -static struct workqueue_struct *dw_mci_card_workqueue; - #if defined(CONFIG_DEBUG_FS) static int dw_mci_req_show(struct seq_file *s, void *v) { @@ -1605,7 +1603,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) if (pending & SDMMC_INT_CD) { mci_writel(host, RINTSTS, SDMMC_INT_CD); - queue_work(dw_mci_card_workqueue, &host->card_work); + queue_work(host->card_workqueue, &host->card_work); } /* Handle SDIO Interrupts */ @@ -1844,7 +1842,7 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) * Card may have been plugged in prior to boot so we * need to run the detect tasklet */ - queue_work(dw_mci_card_workqueue, &host->card_work); + queue_work(host->card_workqueue, &host->card_work); return 0; } @@ -2021,9 +2019,9 @@ int dw_mci_probe(struct dw_mci *host) mci_writel(host, CLKSRC, 0); tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); - dw_mci_card_workqueue = alloc_workqueue("dw-mci-card", + host->card_workqueue = alloc_workqueue("dw-mci-card", WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); - if (!dw_mci_card_workqueue) + if (!host->card_workqueue) goto err_dmaunmap; INIT_WORK(&host->card_work, dw_mci_work_routine_card); ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); @@ -2085,7 +2083,7 @@ err_init_slot: free_irq(host->irq, host); err_workqueue: - destroy_workqueue(dw_mci_card_workqueue); + destroy_workqueue(host->card_workqueue); err_dmaunmap: if (host->use_dma && host->dma_ops->exit) @@ -2119,7 +2117,7 @@ void dw_mci_remove(struct dw_mci *host) mci_writel(host, CLKSRC, 0); free_irq(host->irq, host); - destroy_workqueue(dw_mci_card_workqueue); + destroy_workqueue(host->card_workqueue); dma_free_coherent(&host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); if (host->use_dma && host->dma_ops->exit) -- cgit v1.2.2 From 9fc63f670f53cf9dcdca5e523289dda35da47e63 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 19 Apr 2012 21:36:41 +0100 Subject: mfd: Register db8500-prcmu as a platform driver instead of only probing Pass the probe function as part of the platform_driver struct and register using the more common platform_driver_register call. In subsequent patches we'll also add DT support into the struct. Signed-off-by: Lee Jones Acked-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/db8500-prcmu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 5be32489714f..79a79ae6fc25 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2958,7 +2958,7 @@ static struct mfd_cell db8500_prcmu_devs[] = { * prcmu_fw_init - arch init call for the Linux PRCMU fw init logic * */ -static int __init db8500_prcmu_probe(struct platform_device *pdev) +static int __devinit db8500_prcmu_probe(struct platform_device *pdev) { int err = 0; @@ -2999,11 +2999,12 @@ static struct platform_driver db8500_prcmu_driver = { .name = "db8500-prcmu", .owner = THIS_MODULE, }, + .probe = db8500_prcmu_probe, }; static int __init db8500_prcmu_init(void) { - return platform_driver_probe(&db8500_prcmu_driver, db8500_prcmu_probe); + return platform_driver_register(&db8500_prcmu_driver); } arch_initcall(db8500_prcmu_init); -- cgit v1.2.2 From ca7edd16ae488fe0eff5d4f8eb17c5caa8dcc5fa Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 9 May 2012 17:19:25 +0200 Subject: mfd: Enable Device Tree support for the db8500-prcmu This patch will enable probing to occur during a Device Tree enabled boot. The IRQ base is expected to be located in and will be fetched from the DT itself. We also prevent any of the db8500 regulators from being registered here, as they will be enabled via DT instead. Signed-off-by: Lee Jones Acked-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/db8500-prcmu.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 79a79ae6fc25..e6f8d261eeba 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2960,7 +2960,8 @@ static struct mfd_cell db8500_prcmu_devs[] = { */ static int __devinit db8500_prcmu_probe(struct platform_device *pdev) { - int err = 0; + struct device_node *np = pdev->dev.of_node; + int irq = 0, err = 0; if (ux500_is_svp()) return -ENODEV; @@ -2970,8 +2971,14 @@ static int __devinit db8500_prcmu_probe(struct platform_device *pdev) /* Clean up the mailbox interrupts after pre-kernel code. */ writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR); - err = request_threaded_irq(IRQ_DB8500_PRCMU1, prcmu_irq_handler, - prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL); + if (np) + irq = platform_get_irq(pdev, 0); + + if (!np || irq <= 0) + irq = IRQ_DB8500_PRCMU1; + + err = request_threaded_irq(irq, prcmu_irq_handler, + prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL); if (err < 0) { pr_err("prcmu: Failed to allocate IRQ_DB8500_PRCMU1.\n"); err = -EBUSY; @@ -2981,14 +2988,16 @@ static int __devinit db8500_prcmu_probe(struct platform_device *pdev) if (cpu_is_u8500v20_or_later()) prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); - err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs, - ARRAY_SIZE(db8500_prcmu_devs), NULL, - 0); + if (!np) { + err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs, + ARRAY_SIZE(db8500_prcmu_devs), NULL, 0); + if (err) { + pr_err("prcmu: Failed to add subdevices\n"); + return err; + } + } - if (err) - pr_err("prcmu: Failed to add subdevices\n"); - else - pr_info("DB8500 PRCMU initialized\n"); + pr_info("DB8500 PRCMU initialized\n"); no_irq_return: return err; -- cgit v1.2.2 From ae8406357eca7fde4ff047e858d285faee836804 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 4 May 2012 19:23:20 +0100 Subject: mfd: Add support for db8500-prcmu regulator supply for nmk-i2c.4 This applies a supply alias for the db8500's fifth Nomadik i2c port. Signed-off-by: Lee Jones Acked-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/db8500-prcmu.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index e6f8d261eeba..671c8bc14bbc 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2720,6 +2720,7 @@ static struct regulator_consumer_supply db8500_vape_consumers[] = { REGULATOR_SUPPLY("v-i2c", "nmk-i2c.1"), REGULATOR_SUPPLY("v-i2c", "nmk-i2c.2"), REGULATOR_SUPPLY("v-i2c", "nmk-i2c.3"), + REGULATOR_SUPPLY("v-i2c", "nmk-i2c.4"), /* "v-mmc" changed to "vcore" in the mainline kernel */ REGULATOR_SUPPLY("vcore", "sdi0"), REGULATOR_SUPPLY("vcore", "sdi1"), -- cgit v1.2.2 From 16c5c023aac86228e3e94c4bf6d19708ea861a05 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Thu, 3 May 2012 12:26:36 +0200 Subject: mfd: Add LM3533 lighting-power core driver Add support for National Semiconductor / TI LM3533 lighting power chips. This is the core driver which provides register access over I2C and registers the ambient-light-sensor, LED and backlight sub-drivers. Signed-off-by: Johan Hovold Reviewed-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 13 + drivers/mfd/Makefile | 1 + drivers/mfd/lm3533-core.c | 717 ++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/lm3533-ctrlbank.c | 134 ++++++++ 4 files changed, 865 insertions(+) create mode 100644 drivers/mfd/lm3533-core.c create mode 100644 drivers/mfd/lm3533-ctrlbank.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 48eed22c65a5..211f5dee9b68 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -106,6 +106,19 @@ config UCB1400_CORE To compile this driver as a module, choose M here: the module will be called ucb1400_core. +config MFD_LM3533 + tristate "LM3533 Lighting Power chip" + depends on I2C + select MFD_CORE + select REGMAP_I2C + help + Say yes here to enable support for National Semiconductor / TI + LM3533 Lighting Power chips. + + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the LED, + backlight or ambient-light-sensor functionality of the device. + config TPS6105X tristate "TPS61050/61052 Boost Converters" depends on I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 0dc55cbefa09..d3dae9567800 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -120,3 +120,4 @@ obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o obj-$(CONFIG_MFD_S5M_CORE) += s5m-core.o s5m-irq.o obj-$(CONFIG_MFD_ANATOP) += anatop-mfd.o +obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c new file mode 100644 index 000000000000..75f4b7f5a4fd --- /dev/null +++ b/drivers/mfd/lm3533-core.c @@ -0,0 +1,717 @@ +/* + * lm3533-core.c -- LM3533 Core + * + * Copyright (C) 2011-2012 Texas Instruments + * + * Author: Johan Hovold + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + + +#define LM3533_BOOST_OVP_MAX 0x03 +#define LM3533_BOOST_OVP_MASK 0x06 +#define LM3533_BOOST_OVP_SHIFT 1 + +#define LM3533_BOOST_FREQ_MAX 0x01 +#define LM3533_BOOST_FREQ_MASK 0x01 +#define LM3533_BOOST_FREQ_SHIFT 0 + +#define LM3533_BL_ID_MASK 1 +#define LM3533_LED_ID_MASK 3 +#define LM3533_BL_ID_MAX 1 +#define LM3533_LED_ID_MAX 3 + +#define LM3533_HVLED_ID_MAX 2 +#define LM3533_LVLED_ID_MAX 5 + +#define LM3533_REG_OUTPUT_CONF1 0x10 +#define LM3533_REG_OUTPUT_CONF2 0x11 +#define LM3533_REG_BOOST_PWM 0x2c + +#define LM3533_REG_MAX 0xb2 + + +static struct mfd_cell lm3533_als_devs[] = { + { + .name = "lm3533-als", + .id = -1, + }, +}; + +static struct mfd_cell lm3533_bl_devs[] = { + { + .name = "lm3533-backlight", + .id = 0, + }, + { + .name = "lm3533-backlight", + .id = 1, + }, +}; + +static struct mfd_cell lm3533_led_devs[] = { + { + .name = "lm3533-leds", + .id = 0, + }, + { + .name = "lm3533-leds", + .id = 1, + }, + { + .name = "lm3533-leds", + .id = 2, + }, + { + .name = "lm3533-leds", + .id = 3, + }, +}; + +int lm3533_read(struct lm3533 *lm3533, u8 reg, u8 *val) +{ + int tmp; + int ret; + + ret = regmap_read(lm3533->regmap, reg, &tmp); + if (ret < 0) { + dev_err(lm3533->dev, "failed to read register %02x: %d\n", + reg, ret); + return ret; + } + + *val = tmp; + + dev_dbg(lm3533->dev, "read [%02x]: %02x\n", reg, *val); + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_read); + +int lm3533_write(struct lm3533 *lm3533, u8 reg, u8 val) +{ + int ret; + + dev_dbg(lm3533->dev, "write [%02x]: %02x\n", reg, val); + + ret = regmap_write(lm3533->regmap, reg, val); + if (ret < 0) { + dev_err(lm3533->dev, "failed to write register %02x: %d\n", + reg, ret); + } + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_write); + +int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask) +{ + int ret; + + dev_dbg(lm3533->dev, "update [%02x]: %02x/%02x\n", reg, val, mask); + + ret = regmap_update_bits(lm3533->regmap, reg, val, mask); + if (ret < 0) { + dev_err(lm3533->dev, "failed to update register %02x: %d\n", + reg, ret); + } + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_update); + +/* + * HVLED output config -- output hvled controlled by backlight bl + */ +static int lm3533_set_hvled_config(struct lm3533 *lm3533, u8 hvled, u8 bl) +{ + u8 val; + u8 mask; + int shift; + int ret; + + if (hvled == 0 || hvled > LM3533_HVLED_ID_MAX) + return -EINVAL; + + if (bl > LM3533_BL_ID_MAX) + return -EINVAL; + + shift = hvled - 1; + mask = LM3533_BL_ID_MASK << shift; + val = bl << shift; + + ret = lm3533_update(lm3533, LM3533_REG_OUTPUT_CONF1, val, mask); + if (ret) + dev_err(lm3533->dev, "failed to set hvled config\n"); + + return ret; +} + +/* + * LVLED output config -- output lvled controlled by LED led + */ +static int lm3533_set_lvled_config(struct lm3533 *lm3533, u8 lvled, u8 led) +{ + u8 reg; + u8 val; + u8 mask; + int shift; + int ret; + + if (lvled == 0 || lvled > LM3533_LVLED_ID_MAX) + return -EINVAL; + + if (led > LM3533_LED_ID_MAX) + return -EINVAL; + + if (lvled < 4) { + reg = LM3533_REG_OUTPUT_CONF1; + shift = 2 * lvled; + } else { + reg = LM3533_REG_OUTPUT_CONF2; + shift = 2 * (lvled - 4); + } + + mask = LM3533_LED_ID_MASK << shift; + val = led << shift; + + ret = lm3533_update(lm3533, reg, val, mask); + if (ret) + dev_err(lm3533->dev, "failed to set lvled config\n"); + + return ret; +} + +static void lm3533_enable(struct lm3533 *lm3533) +{ + if (gpio_is_valid(lm3533->gpio_hwen)) + gpio_set_value(lm3533->gpio_hwen, 1); +} + +static void lm3533_disable(struct lm3533 *lm3533) +{ + if (gpio_is_valid(lm3533->gpio_hwen)) + gpio_set_value(lm3533->gpio_hwen, 0); +} + +enum lm3533_attribute_type { + LM3533_ATTR_TYPE_BACKLIGHT, + LM3533_ATTR_TYPE_LED, +}; + +struct lm3533_device_attribute { + struct device_attribute dev_attr; + enum lm3533_attribute_type type; + union { + struct { + u8 id; + } output; + struct { + u8 reg; + u8 shift; + u8 mask; + u8 max; + } generic; + } u; +}; + +#define to_lm3533_dev_attr(_attr) \ + container_of(_attr, struct lm3533_device_attribute, dev_attr) + +static ssize_t show_lm3533_reg(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533 *lm3533 = dev_get_drvdata(dev); + struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); + u8 val; + int ret; + + ret = lm3533_read(lm3533, lattr->u.generic.reg, &val); + if (ret) + return ret; + + val = (val & lattr->u.generic.mask) >> lattr->u.generic.shift; + + return scnprintf(buf, PAGE_SIZE, "%u\n", val); +} + +static ssize_t store_lm3533_reg(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct lm3533 *lm3533 = dev_get_drvdata(dev); + struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); + u8 val; + int ret; + + if (kstrtou8(buf, 0, &val) || val > lattr->u.generic.max) + return -EINVAL; + + val = val << lattr->u.generic.shift; + ret = lm3533_update(lm3533, lattr->u.generic.reg, val, + lattr->u.generic.mask); + if (ret) + return ret; + + return len; +} + +#define GENERIC_ATTR(_reg, _max, _mask, _shift) \ + { .reg = _reg, \ + .max = _max, \ + .mask = _mask, \ + .shift = _shift } + +#define LM3533_GENERIC_ATTR(_name, _mode, _show, _store, _type, \ + _reg, _max, _mask, _shift) \ + struct lm3533_device_attribute lm3533_dev_attr_##_name = { \ + .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type, \ + .u.generic = GENERIC_ATTR(_reg, _max, _mask, _shift) } + +#define LM3533_GENERIC_ATTR_RW(_name, _type, _reg, _max, _mask, _shift) \ + LM3533_GENERIC_ATTR(_name, S_IRUGO | S_IWUSR, \ + show_lm3533_reg, store_lm3533_reg, \ + _type, _reg, _max, _mask, _shift) + +#define LM3533_BOOST_ATTR_RW(_name, _NAME) \ + LM3533_GENERIC_ATTR_RW(_name, LM3533_ATTR_TYPE_BACKLIGHT, \ + LM3533_REG_BOOST_PWM, LM3533_##_NAME##_MAX, \ + LM3533_##_NAME##_MASK, LM3533_##_NAME##_SHIFT) +/* + * Boost Over Voltage Protection Select + * + * 0 - 16 V (default) + * 1 - 24 V + * 2 - 32 V + * 3 - 40 V + */ +static LM3533_BOOST_ATTR_RW(boost_ovp, BOOST_OVP); + +/* + * Boost Frequency Select + * + * 0 - 500 kHz (default) + * 1 - 1 MHz + */ +static LM3533_BOOST_ATTR_RW(boost_freq, BOOST_FREQ); + +static ssize_t show_output(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533 *lm3533 = dev_get_drvdata(dev); + struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); + int id = lattr->u.output.id; + u8 reg; + u8 val; + u8 mask; + int shift; + int ret; + + if (lattr->type == LM3533_ATTR_TYPE_BACKLIGHT) { + reg = LM3533_REG_OUTPUT_CONF1; + shift = id - 1; + mask = LM3533_BL_ID_MASK << shift; + } else { + if (id < 4) { + reg = LM3533_REG_OUTPUT_CONF1; + shift = 2 * id; + } else { + reg = LM3533_REG_OUTPUT_CONF2; + shift = 2 * (id - 4); + } + mask = LM3533_LED_ID_MASK << shift; + } + + ret = lm3533_read(lm3533, reg, &val); + if (ret) + return ret; + + val = (val & mask) >> shift; + + return scnprintf(buf, PAGE_SIZE, "%u\n", val); +} + +static ssize_t store_output(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct lm3533 *lm3533 = dev_get_drvdata(dev); + struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); + int id = lattr->u.output.id; + u8 val; + int ret; + + if (kstrtou8(buf, 0, &val)) + return -EINVAL; + + if (lattr->type == LM3533_ATTR_TYPE_BACKLIGHT) + ret = lm3533_set_hvled_config(lm3533, id, val); + else + ret = lm3533_set_lvled_config(lm3533, id, val); + + if (ret) + return ret; + + return len; +} + +#define LM3533_OUTPUT_ATTR(_name, _mode, _show, _store, _type, _id) \ + struct lm3533_device_attribute lm3533_dev_attr_##_name = \ + { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type, \ + .u.output = { .id = _id }, } + +#define LM3533_OUTPUT_ATTR_RW(_name, _type, _id) \ + LM3533_OUTPUT_ATTR(output_##_name, S_IRUGO | S_IWUSR, \ + show_output, store_output, _type, _id) + +#define LM3533_OUTPUT_HVLED_ATTR_RW(_nr) \ + LM3533_OUTPUT_ATTR_RW(hvled##_nr, LM3533_ATTR_TYPE_BACKLIGHT, _nr) +#define LM3533_OUTPUT_LVLED_ATTR_RW(_nr) \ + LM3533_OUTPUT_ATTR_RW(lvled##_nr, LM3533_ATTR_TYPE_LED, _nr) +/* + * Output config: + * + * output_hvled 0-1 + * output_lvled 0-3 + */ +static LM3533_OUTPUT_HVLED_ATTR_RW(1); +static LM3533_OUTPUT_HVLED_ATTR_RW(2); +static LM3533_OUTPUT_LVLED_ATTR_RW(1); +static LM3533_OUTPUT_LVLED_ATTR_RW(2); +static LM3533_OUTPUT_LVLED_ATTR_RW(3); +static LM3533_OUTPUT_LVLED_ATTR_RW(4); +static LM3533_OUTPUT_LVLED_ATTR_RW(5); + +static struct attribute *lm3533_attributes[] = { + &lm3533_dev_attr_boost_freq.dev_attr.attr, + &lm3533_dev_attr_boost_ovp.dev_attr.attr, + &lm3533_dev_attr_output_hvled1.dev_attr.attr, + &lm3533_dev_attr_output_hvled2.dev_attr.attr, + &lm3533_dev_attr_output_lvled1.dev_attr.attr, + &lm3533_dev_attr_output_lvled2.dev_attr.attr, + &lm3533_dev_attr_output_lvled3.dev_attr.attr, + &lm3533_dev_attr_output_lvled4.dev_attr.attr, + &lm3533_dev_attr_output_lvled5.dev_attr.attr, + NULL, +}; + +#define to_dev_attr(_attr) \ + container_of(_attr, struct device_attribute, attr) + +static mode_t lm3533_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct lm3533 *lm3533 = dev_get_drvdata(dev); + struct device_attribute *dattr = to_dev_attr(attr); + struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(dattr); + enum lm3533_attribute_type type = lattr->type; + mode_t mode = attr->mode; + + if (!lm3533->have_backlights && type == LM3533_ATTR_TYPE_BACKLIGHT) + mode = 0; + else if (!lm3533->have_leds && type == LM3533_ATTR_TYPE_LED) + mode = 0; + + return mode; +}; + +static struct attribute_group lm3533_attribute_group = { + .is_visible = lm3533_attr_is_visible, + .attrs = lm3533_attributes +}; + +static int __devinit lm3533_device_als_init(struct lm3533 *lm3533) +{ + struct lm3533_platform_data *pdata = lm3533->dev->platform_data; + int ret; + + if (!pdata->als) + return 0; + + lm3533_als_devs[0].platform_data = pdata->als; + lm3533_als_devs[0].pdata_size = sizeof(*pdata->als); + + ret = mfd_add_devices(lm3533->dev, 0, lm3533_als_devs, 1, NULL, 0); + if (ret) { + dev_err(lm3533->dev, "failed to add ALS device\n"); + return ret; + } + + lm3533->have_als = 1; + + return 0; +} + +static int __devinit lm3533_device_bl_init(struct lm3533 *lm3533) +{ + struct lm3533_platform_data *pdata = lm3533->dev->platform_data; + int i; + int ret; + + if (!pdata->backlights || pdata->num_backlights == 0) + return 0; + + if (pdata->num_backlights > ARRAY_SIZE(lm3533_bl_devs)) + pdata->num_backlights = ARRAY_SIZE(lm3533_bl_devs); + + for (i = 0; i < pdata->num_backlights; ++i) { + lm3533_bl_devs[i].platform_data = &pdata->backlights[i]; + lm3533_bl_devs[i].pdata_size = sizeof(pdata->backlights[i]); + } + + ret = mfd_add_devices(lm3533->dev, 0, lm3533_bl_devs, + pdata->num_backlights, NULL, 0); + if (ret) { + dev_err(lm3533->dev, "failed to add backlight devices\n"); + return ret; + } + + lm3533->have_backlights = 1; + + return 0; +} + +static int __devinit lm3533_device_led_init(struct lm3533 *lm3533) +{ + struct lm3533_platform_data *pdata = lm3533->dev->platform_data; + int i; + int ret; + + if (!pdata->leds || pdata->num_leds == 0) + return 0; + + if (pdata->num_leds > ARRAY_SIZE(lm3533_led_devs)) + pdata->num_leds = ARRAY_SIZE(lm3533_led_devs); + + for (i = 0; i < pdata->num_leds; ++i) { + lm3533_led_devs[i].platform_data = &pdata->leds[i]; + lm3533_led_devs[i].pdata_size = sizeof(pdata->leds[i]); + } + + ret = mfd_add_devices(lm3533->dev, 0, lm3533_led_devs, + pdata->num_leds, NULL, 0); + if (ret) { + dev_err(lm3533->dev, "failed to add LED devices\n"); + return ret; + } + + lm3533->have_leds = 1; + + return 0; +} + +static int __devinit lm3533_device_init(struct lm3533 *lm3533) +{ + struct lm3533_platform_data *pdata = lm3533->dev->platform_data; + int ret; + + dev_dbg(lm3533->dev, "%s\n", __func__); + + if (!pdata) { + dev_err(lm3533->dev, "no platform data\n"); + return -EINVAL; + } + + lm3533->gpio_hwen = pdata->gpio_hwen; + + dev_set_drvdata(lm3533->dev, lm3533); + + if (gpio_is_valid(lm3533->gpio_hwen)) { + ret = gpio_request_one(lm3533->gpio_hwen, GPIOF_OUT_INIT_LOW, + "lm3533-hwen"); + if (ret < 0) { + dev_err(lm3533->dev, + "failed to request HWEN GPIO %d\n", + lm3533->gpio_hwen); + return ret; + } + } + + lm3533_enable(lm3533); + + lm3533_device_als_init(lm3533); + lm3533_device_bl_init(lm3533); + lm3533_device_led_init(lm3533); + + ret = sysfs_create_group(&lm3533->dev->kobj, &lm3533_attribute_group); + if (ret < 0) { + dev_err(lm3533->dev, "failed to create sysfs attributes\n"); + goto err_unregister; + } + + return 0; + +err_unregister: + mfd_remove_devices(lm3533->dev); + lm3533_disable(lm3533); + if (gpio_is_valid(lm3533->gpio_hwen)) + gpio_free(lm3533->gpio_hwen); + + return ret; +} + +static void __devexit lm3533_device_exit(struct lm3533 *lm3533) +{ + dev_dbg(lm3533->dev, "%s\n", __func__); + + sysfs_remove_group(&lm3533->dev->kobj, &lm3533_attribute_group); + + mfd_remove_devices(lm3533->dev); + lm3533_disable(lm3533); + if (gpio_is_valid(lm3533->gpio_hwen)) + gpio_free(lm3533->gpio_hwen); +} + +static bool lm3533_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x10 ... 0x2c: + case 0x30 ... 0x38: + case 0x40 ... 0x45: + case 0x50 ... 0x57: + case 0x60 ... 0x6e: + case 0x70 ... 0x75: + case 0x80 ... 0x85: + case 0x90 ... 0x95: + case 0xa0 ... 0xa5: + case 0xb0 ... 0xb2: + return true; + default: + return false; + } +} + +static bool lm3533_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x34: /* zone */ + case 0x37 ... 0x38: /* adc */ + case 0xb0 ... 0xb1: /* fault */ + return true; + default: + return false; + } +} + +static bool lm3533_precious_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x34: /* zone */ + return true; + default: + return false; + } +} + +static struct regmap_config regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = LM3533_REG_MAX, + .readable_reg = lm3533_readable_register, + .volatile_reg = lm3533_volatile_register, + .precious_reg = lm3533_precious_register, +}; + +static int __devinit lm3533_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct lm3533 *lm3533; + int ret; + + dev_dbg(&i2c->dev, "%s\n", __func__); + + lm3533 = kzalloc(sizeof(*lm3533), GFP_KERNEL); + if (!lm3533) + return -ENOMEM; + + i2c_set_clientdata(i2c, lm3533); + + lm3533->regmap = regmap_init_i2c(i2c, ®map_config); + if (IS_ERR(lm3533->regmap)) { + ret = PTR_ERR(lm3533->regmap); + goto err_regmap; + } + + lm3533->dev = &i2c->dev; + lm3533->irq = i2c->irq; + + ret = lm3533_device_init(lm3533); + if (ret) + goto err_dev; + + return 0; + +err_dev: + regmap_exit(lm3533->regmap); +err_regmap: + kfree(lm3533); + + return ret; +} + +static int __devexit lm3533_i2c_remove(struct i2c_client *i2c) +{ + struct lm3533 *lm3533 = i2c_get_clientdata(i2c); + + dev_dbg(&i2c->dev, "%s\n", __func__); + + lm3533_device_exit(lm3533); + regmap_exit(lm3533->regmap); + + kfree(lm3533); + + return 0; +} + +static const struct i2c_device_id lm3533_i2c_ids[] = { + { "lm3533", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, lm3533_i2c_ids); + +static struct i2c_driver lm3533_i2c_driver = { + .driver = { + .name = "lm3533", + .owner = THIS_MODULE, + }, + .id_table = lm3533_i2c_ids, + .probe = lm3533_i2c_probe, + .remove = __devexit_p(lm3533_i2c_remove), +}; + +static int __init lm3533_i2c_init(void) +{ + return i2c_add_driver(&lm3533_i2c_driver); +} +subsys_initcall(lm3533_i2c_init); + +static void __exit lm3533_i2c_exit(void) +{ + i2c_del_driver(&lm3533_i2c_driver); +} +module_exit(lm3533_i2c_exit); + +MODULE_AUTHOR("Johan Hovold "); +MODULE_DESCRIPTION("LM3533 Core"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/lm3533-ctrlbank.c b/drivers/mfd/lm3533-ctrlbank.c new file mode 100644 index 000000000000..c2732a37c65a --- /dev/null +++ b/drivers/mfd/lm3533-ctrlbank.c @@ -0,0 +1,134 @@ +/* + * lm3533-ctrlbank.c -- LM3533 Generic Control Bank interface + * + * Copyright (C) 2011-2012 Texas Instruments + * + * Author: Johan Hovold + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include + +#include + + +#define LM3533_BRIGHTNESS_MAX 255 +#define LM3533_MAX_CURRENT_MAX 31 +#define LM3533_PWM_MAX 0x3f + +#define LM3533_REG_PWM_BASE 0x14 +#define LM3533_REG_MAX_CURRENT_BASE 0x1f +#define LM3533_REG_CTRLBANK_ENABLE 0x27 +#define LM3533_REG_BRIGHTNESS_BASE 0x40 + + +static inline u8 lm3533_ctrlbank_get_reg(struct lm3533_ctrlbank *cb, u8 base) +{ + return base + cb->id; +} + +int lm3533_ctrlbank_enable(struct lm3533_ctrlbank *cb) +{ + u8 mask; + int ret; + + dev_dbg(cb->dev, "%s - %d\n", __func__, cb->id); + + mask = 1 << cb->id; + ret = lm3533_update(cb->lm3533, LM3533_REG_CTRLBANK_ENABLE, + mask, mask); + if (ret) + dev_err(cb->dev, "failed to enable ctrlbank %d\n", cb->id); + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_ctrlbank_enable); + +int lm3533_ctrlbank_disable(struct lm3533_ctrlbank *cb) +{ + u8 mask; + int ret; + + dev_dbg(cb->dev, "%s - %d\n", __func__, cb->id); + + mask = 1 << cb->id; + ret = lm3533_update(cb->lm3533, LM3533_REG_CTRLBANK_ENABLE, 0, mask); + if (ret) + dev_err(cb->dev, "failed to disable ctrlbank %d\n", cb->id); + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_ctrlbank_disable); + +#define lm3533_ctrlbank_set(_name, _NAME) \ +int lm3533_ctrlbank_set_##_name(struct lm3533_ctrlbank *cb, u8 val) \ +{ \ + u8 reg; \ + int ret; \ + \ + if (val > LM3533_##_NAME##_MAX) \ + return -EINVAL; \ + \ + reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_##_NAME##_BASE); \ + ret = lm3533_write(cb->lm3533, reg, val); \ + if (ret) \ + dev_err(cb->dev, "failed to set " #_name "\n"); \ + \ + return ret; \ +} \ +EXPORT_SYMBOL_GPL(lm3533_ctrlbank_set_##_name); + +#define lm3533_ctrlbank_get(_name, _NAME) \ +int lm3533_ctrlbank_get_##_name(struct lm3533_ctrlbank *cb, u8 *val) \ +{ \ + u8 reg; \ + int ret; \ + \ + reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_##_NAME##_BASE); \ + ret = lm3533_read(cb->lm3533, reg, val); \ + if (ret) \ + dev_err(cb->dev, "failed to get " #_name "\n"); \ + \ + return ret; \ +} \ +EXPORT_SYMBOL_GPL(lm3533_ctrlbank_get_##_name); + +lm3533_ctrlbank_set(brightness, BRIGHTNESS); +lm3533_ctrlbank_get(brightness, BRIGHTNESS); + +/* + * Full scale current. + * + * Imax = 5 + val * 0.8 mA, e.g.: + * + * 0 - 5 mA + * ... + * 19 - 20.2 mA (default) + * ... + * 31 - 29.8 mA + */ +lm3533_ctrlbank_set(max_current, MAX_CURRENT); +lm3533_ctrlbank_get(max_current, MAX_CURRENT); + +/* + * PWM-input control mask: + * + * bit 5 - PWM-input enabled in Zone 4 + * bit 4 - PWM-input enabled in Zone 3 + * bit 3 - PWM-input enabled in Zone 2 + * bit 2 - PWM-input enabled in Zone 1 + * bit 1 - PWM-input enabled in Zone 0 + * bit 0 - PWM-input enabled + */ +lm3533_ctrlbank_set(pwm, PWM); +lm3533_ctrlbank_get(pwm, PWM); + + +MODULE_AUTHOR("Johan Hovold "); +MODULE_DESCRIPTION("LM3533 Control Bank interface"); +MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 887c8ec7219fc8eba78bb8f44a74c660934e9b98 Mon Sep 17 00:00:00 2001 From: Aaron Sierra Date: Fri, 20 Apr 2012 14:14:11 -0500 Subject: watchdog: Convert iTCO_wdt driver to mfd model This patch converts the iTCO_wdt driver to use the multi-function device driver model. It uses resources discovered by the lpc_ich driver, so that it no longer does its own PCI scanning. Signed-off-by: Aaron Sierra Signed-off-by: Guenter Roeck Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 3 +- drivers/mfd/lpc_ich.c | 171 ++++++++++- drivers/watchdog/Kconfig | 1 + drivers/watchdog/iTCO_vendor.h | 6 +- drivers/watchdog/iTCO_vendor_support.c | 43 ++- drivers/watchdog/iTCO_wdt.c | 529 +++++++-------------------------- 6 files changed, 306 insertions(+), 447 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 211f5dee9b68..1e9a7d5ec919 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -785,7 +785,8 @@ config LPC_ICH help The LPC bridge function of the Intel ICH provides support for many functional units. This driver provides needed support for - other drivers to control these functions, currently GPIO. + other drivers to control these functions, currently GPIO and + watchdog. config MFD_RDC321X tristate "Support for RDC-R321x southbridge" diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index 7e3a7b6ab022..027cc8f86132 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c @@ -65,14 +65,42 @@ #define ACPIBASE 0x40 #define ACPIBASE_GPE_OFF 0x28 #define ACPIBASE_GPE_END 0x2f +#define ACPIBASE_SMI_OFF 0x30 +#define ACPIBASE_SMI_END 0x33 +#define ACPIBASE_TCO_OFF 0x60 +#define ACPIBASE_TCO_END 0x7f #define ACPICTRL 0x44 +#define ACPIBASE_GCS_OFF 0x3410 +#define ACPIBASE_GCS_END 0x3414 + #define GPIOBASE 0x48 #define GPIOCTRL 0x4C +#define RCBABASE 0xf0 + +#define wdt_io_res(i) wdt_res(0, i) +#define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i) +#define wdt_res(b, i) (&wdt_ich_res[(b) + (i)]) + static int lpc_ich_acpi_save = -1; static int lpc_ich_gpio_save = -1; +static struct resource wdt_ich_res[] = { + /* ACPI - TCO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - SMI */ + { + .flags = IORESOURCE_IO, + }, + /* GCS */ + { + .flags = IORESOURCE_MEM, + }, +}; + static struct resource gpio_ich_res[] = { /* GPIO */ { @@ -85,10 +113,17 @@ static struct resource gpio_ich_res[] = { }; enum lpc_cells { - LPC_GPIO = 0, + LPC_WDT = 0, + LPC_GPIO, }; static struct mfd_cell lpc_ich_cells[] = { + [LPC_WDT] = { + .name = "iTCO_wdt", + .num_resources = ARRAY_SIZE(wdt_ich_res), + .resources = wdt_ich_res, + .ignore_resource_conflicts = true, + }, [LPC_GPIO] = { .name = "gpio_ich", .num_resources = ARRAY_SIZE(gpio_ich_res), @@ -162,218 +197,276 @@ enum lpc_chipsets { struct lpc_ich_info lpc_chipset_info[] __devinitdata = { [LPC_ICH] = { .name = "ICH", + .iTCO_version = 1, }, [LPC_ICH0] = { .name = "ICH0", + .iTCO_version = 1, }, [LPC_ICH2] = { .name = "ICH2", + .iTCO_version = 1, }, [LPC_ICH2M] = { .name = "ICH2-M", + .iTCO_version = 1, }, [LPC_ICH3] = { .name = "ICH3-S", + .iTCO_version = 1, }, [LPC_ICH3M] = { .name = "ICH3-M", + .iTCO_version = 1, }, [LPC_ICH4] = { .name = "ICH4", + .iTCO_version = 1, }, [LPC_ICH4M] = { .name = "ICH4-M", + .iTCO_version = 1, }, [LPC_CICH] = { .name = "C-ICH", + .iTCO_version = 1, }, [LPC_ICH5] = { .name = "ICH5 or ICH5R", + .iTCO_version = 1, }, [LPC_6300ESB] = { .name = "6300ESB", + .iTCO_version = 1, }, [LPC_ICH6] = { .name = "ICH6 or ICH6R", + .iTCO_version = 2, .gpio_version = ICH_V6_GPIO, }, [LPC_ICH6M] = { .name = "ICH6-M", + .iTCO_version = 2, .gpio_version = ICH_V6_GPIO, }, [LPC_ICH6W] = { .name = "ICH6W or ICH6RW", + .iTCO_version = 2, .gpio_version = ICH_V6_GPIO, }, [LPC_631XESB] = { .name = "631xESB/632xESB", + .iTCO_version = 2, .gpio_version = ICH_V6_GPIO, }, [LPC_ICH7] = { .name = "ICH7 or ICH7R", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH7DH] = { .name = "ICH7DH", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH7M] = { .name = "ICH7-M or ICH7-U", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH7MDH] = { .name = "ICH7-M DH", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_NM10] = { .name = "NM10", + .iTCO_version = 2, }, [LPC_ICH8] = { .name = "ICH8 or ICH8R", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH8DH] = { .name = "ICH8DH", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH8DO] = { .name = "ICH8DO", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH8M] = { .name = "ICH8M", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH8ME] = { .name = "ICH8M-E", + .iTCO_version = 2, .gpio_version = ICH_V7_GPIO, }, [LPC_ICH9] = { .name = "ICH9", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH9R] = { .name = "ICH9R", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH9DH] = { .name = "ICH9DH", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH9DO] = { .name = "ICH9DO", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH9M] = { .name = "ICH9M", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH9ME] = { .name = "ICH9M-E", + .iTCO_version = 2, .gpio_version = ICH_V9_GPIO, }, [LPC_ICH10] = { .name = "ICH10", + .iTCO_version = 2, .gpio_version = ICH_V10CONS_GPIO, }, [LPC_ICH10R] = { .name = "ICH10R", + .iTCO_version = 2, .gpio_version = ICH_V10CONS_GPIO, }, [LPC_ICH10D] = { .name = "ICH10D", + .iTCO_version = 2, .gpio_version = ICH_V10CORP_GPIO, }, [LPC_ICH10DO] = { .name = "ICH10DO", + .iTCO_version = 2, .gpio_version = ICH_V10CORP_GPIO, }, [LPC_PCH] = { .name = "PCH Desktop Full Featured", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_PCHM] = { .name = "PCH Mobile Full Featured", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_P55] = { .name = "P55", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_PM55] = { .name = "PM55", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_H55] = { .name = "H55", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_QM57] = { .name = "QM57", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_H57] = { .name = "H57", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_HM55] = { .name = "HM55", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_Q57] = { .name = "Q57", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_HM57] = { .name = "HM57", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_PCHMSFF] = { .name = "PCH Mobile SFF Full Featured", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_QS57] = { .name = "QS57", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_3400] = { .name = "3400", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_3420] = { .name = "3420", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_3450] = { .name = "3450", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_EP80579] = { .name = "EP80579", + .iTCO_version = 2, }, [LPC_CPT] = { .name = "Cougar Point", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_CPTD] = { .name = "Cougar Point Desktop", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_CPTM] = { .name = "Cougar Point Mobile", + .iTCO_version = 2, .gpio_version = ICH_V5_GPIO, }, [LPC_PBG] = { .name = "Patsburg", + .iTCO_version = 2, }, [LPC_DH89XXCC] = { .name = "DH89xxCC", + .iTCO_version = 2, }, [LPC_PPT] = { .name = "Panther Point", + .iTCO_version = 2, }, [LPC_LPT] = { .name = "Lynx Point", + .iTCO_version = 2, }, }; @@ -666,12 +759,88 @@ gpio_done: return ret; } +static int __devinit lpc_ich_init_wdt(struct pci_dev *dev, + const struct pci_device_id *id) +{ + u32 base_addr_cfg; + u32 base_addr; + int ret; + bool acpi_conflict = false; + struct resource *res; + + /* Setup power management base register */ + pci_read_config_dword(dev, ACPIBASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_err(&dev->dev, "I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto wdt_done; + } + + res = wdt_io_res(ICH_RES_IO_TCO); + res->start = base_addr + ACPIBASE_TCO_OFF; + res->end = base_addr + ACPIBASE_TCO_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + acpi_conflict = true; + goto wdt_done; + } + + res = wdt_io_res(ICH_RES_IO_SMI); + res->start = base_addr + ACPIBASE_SMI_OFF; + res->end = base_addr + ACPIBASE_SMI_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + acpi_conflict = true; + goto wdt_done; + } + lpc_ich_enable_acpi_space(dev); + + /* + * Get the Memory-Mapped GCS register. To get access to it + * we have to read RCBA from PCI Config space 0xf0 and use + * it as base. GCS = RCBA + ICH6_GCS(0x3410). + */ + if (lpc_chipset_info[id->driver_data].iTCO_version == 2) { + pci_read_config_dword(dev, RCBABASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0xffffc000; + if (!(base_addr_cfg & 1)) { + pr_err("RCBA is disabled by hardware/BIOS, " + "device disabled\n"); + ret = -ENODEV; + goto wdt_done; + } + res = wdt_mem_res(ICH_RES_MEM_GCS); + res->start = base_addr + ACPIBASE_GCS_OFF; + res->end = base_addr + ACPIBASE_GCS_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + acpi_conflict = true; + goto wdt_done; + } + } + + lpc_ich_finalize_cell(&lpc_ich_cells[LPC_WDT], id); + ret = mfd_add_devices(&dev->dev, -1, &lpc_ich_cells[LPC_WDT], + 1, NULL, 0); + +wdt_done: + if (acpi_conflict) + pr_warn("Resource conflict(s) found affecting %s\n", + lpc_ich_cells[LPC_WDT].name); + return ret; +} + static int __devinit lpc_ich_probe(struct pci_dev *dev, const struct pci_device_id *id) { int ret; bool cell_added = false; + ret = lpc_ich_init_wdt(dev, id); + if (!ret) + cell_added = true; + ret = lpc_ich_init_gpio(dev, id); if (!ret) cell_added = true; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 37096246c937..a9ed0878abfc 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -563,6 +563,7 @@ config INTEL_SCU_WATCHDOG config ITCO_WDT tristate "Intel TCO Timer/Watchdog" depends on (X86 || IA64) && PCI + select LPC_ICH ---help--- Hardware driver for the intel TCO timer based watchdog devices. These drivers are included in the Intel 82801 I/O Controller diff --git a/drivers/watchdog/iTCO_vendor.h b/drivers/watchdog/iTCO_vendor.h index 9e27e6422f66..3c57b45537a2 100644 --- a/drivers/watchdog/iTCO_vendor.h +++ b/drivers/watchdog/iTCO_vendor.h @@ -1,8 +1,8 @@ /* iTCO Vendor Specific Support hooks */ #ifdef CONFIG_ITCO_VENDOR_SUPPORT -extern void iTCO_vendor_pre_start(unsigned long, unsigned int); -extern void iTCO_vendor_pre_stop(unsigned long); -extern void iTCO_vendor_pre_keepalive(unsigned long, unsigned int); +extern void iTCO_vendor_pre_start(struct resource *, unsigned int); +extern void iTCO_vendor_pre_stop(struct resource *); +extern void iTCO_vendor_pre_keepalive(struct resource *, unsigned int); extern void iTCO_vendor_pre_set_heartbeat(unsigned int); extern int iTCO_vendor_check_noreboot_on(void); #else diff --git a/drivers/watchdog/iTCO_vendor_support.c b/drivers/watchdog/iTCO_vendor_support.c index 2721d29ce243..b6b2f90b5d44 100644 --- a/drivers/watchdog/iTCO_vendor_support.c +++ b/drivers/watchdog/iTCO_vendor_support.c @@ -35,11 +35,6 @@ #include "iTCO_vendor.h" -/* iTCO defines */ -#define SMI_EN (acpibase + 0x30) /* SMI Control and Enable Register */ -#define TCOBASE (acpibase + 0x60) /* TCO base address */ -#define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */ - /* List of vendor support modes */ /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */ #define SUPERMICRO_OLD_BOARD 1 @@ -82,24 +77,24 @@ MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=" * 20.6 seconds. */ -static void supermicro_old_pre_start(unsigned long acpibase) +static void supermicro_old_pre_start(struct resource *smires) { unsigned long val32; /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ - val32 = inl(SMI_EN); + val32 = inl(smires->start); val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ - outl(val32, SMI_EN); /* Needed to activate watchdog */ + outl(val32, smires->start); /* Needed to activate watchdog */ } -static void supermicro_old_pre_stop(unsigned long acpibase) +static void supermicro_old_pre_stop(struct resource *smires) { unsigned long val32; /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */ - val32 = inl(SMI_EN); + val32 = inl(smires->start); val32 |= 0x00002000; /* Turn on SMI clearing watchdog */ - outl(val32, SMI_EN); /* Needed to deactivate watchdog */ + outl(val32, smires->start); /* Needed to deactivate watchdog */ } /* @@ -270,66 +265,66 @@ static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat) * Don't use this fix if you don't need to!!! */ -static void broken_bios_start(unsigned long acpibase) +static void broken_bios_start(struct resource *smires) { unsigned long val32; - val32 = inl(SMI_EN); + val32 = inl(smires->start); /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# Bit 0: GBL_SMI_EN -> 0 = No SMI# will be generated by ICH. */ val32 &= 0xffffdffe; - outl(val32, SMI_EN); + outl(val32, smires->start); } -static void broken_bios_stop(unsigned long acpibase) +static void broken_bios_stop(struct resource *smires) { unsigned long val32; - val32 = inl(SMI_EN); + val32 = inl(smires->start); /* Bit 13: TCO_EN -> 1 = Enables TCO logic generating an SMI# Bit 0: GBL_SMI_EN -> 1 = Turn global SMI on again. */ val32 |= 0x00002001; - outl(val32, SMI_EN); + outl(val32, smires->start); } /* * Generic Support Functions */ -void iTCO_vendor_pre_start(unsigned long acpibase, +void iTCO_vendor_pre_start(struct resource *smires, unsigned int heartbeat) { switch (vendorsupport) { case SUPERMICRO_OLD_BOARD: - supermicro_old_pre_start(acpibase); + supermicro_old_pre_start(smires); break; case SUPERMICRO_NEW_BOARD: supermicro_new_pre_start(heartbeat); break; case BROKEN_BIOS: - broken_bios_start(acpibase); + broken_bios_start(smires); break; } } EXPORT_SYMBOL(iTCO_vendor_pre_start); -void iTCO_vendor_pre_stop(unsigned long acpibase) +void iTCO_vendor_pre_stop(struct resource *smires) { switch (vendorsupport) { case SUPERMICRO_OLD_BOARD: - supermicro_old_pre_stop(acpibase); + supermicro_old_pre_stop(smires); break; case SUPERMICRO_NEW_BOARD: supermicro_new_pre_stop(); break; case BROKEN_BIOS: - broken_bios_stop(acpibase); + broken_bios_stop(smires); break; } } EXPORT_SYMBOL(iTCO_vendor_pre_stop); -void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat) +void iTCO_vendor_pre_keepalive(struct resource *smires, unsigned int heartbeat) { if (vendorsupport == SUPERMICRO_NEW_BOARD) supermicro_new_pre_set_heartbeat(heartbeat); diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index 9fecb95645a3..741528b032e2 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c @@ -66,316 +66,16 @@ #include /* For spin_lock/spin_unlock/... */ #include /* For copy_to_user/put_user/... */ #include /* For inb/outb/... */ +#include +#include #include "iTCO_vendor.h" -/* TCO related info */ -enum iTCO_chipsets { - TCO_ICH = 0, /* ICH */ - TCO_ICH0, /* ICH0 */ - TCO_ICH2, /* ICH2 */ - TCO_ICH2M, /* ICH2-M */ - TCO_ICH3, /* ICH3-S */ - TCO_ICH3M, /* ICH3-M */ - TCO_ICH4, /* ICH4 */ - TCO_ICH4M, /* ICH4-M */ - TCO_CICH, /* C-ICH */ - TCO_ICH5, /* ICH5 & ICH5R */ - TCO_6300ESB, /* 6300ESB */ - TCO_ICH6, /* ICH6 & ICH6R */ - TCO_ICH6M, /* ICH6-M */ - TCO_ICH6W, /* ICH6W & ICH6RW */ - TCO_631XESB, /* 631xESB/632xESB */ - TCO_ICH7, /* ICH7 & ICH7R */ - TCO_ICH7DH, /* ICH7DH */ - TCO_ICH7M, /* ICH7-M & ICH7-U */ - TCO_ICH7MDH, /* ICH7-M DH */ - TCO_NM10, /* NM10 */ - TCO_ICH8, /* ICH8 & ICH8R */ - TCO_ICH8DH, /* ICH8DH */ - TCO_ICH8DO, /* ICH8DO */ - TCO_ICH8M, /* ICH8M */ - TCO_ICH8ME, /* ICH8M-E */ - TCO_ICH9, /* ICH9 */ - TCO_ICH9R, /* ICH9R */ - TCO_ICH9DH, /* ICH9DH */ - TCO_ICH9DO, /* ICH9DO */ - TCO_ICH9M, /* ICH9M */ - TCO_ICH9ME, /* ICH9M-E */ - TCO_ICH10, /* ICH10 */ - TCO_ICH10R, /* ICH10R */ - TCO_ICH10D, /* ICH10D */ - TCO_ICH10DO, /* ICH10DO */ - TCO_PCH, /* PCH Desktop Full Featured */ - TCO_PCHM, /* PCH Mobile Full Featured */ - TCO_P55, /* P55 */ - TCO_PM55, /* PM55 */ - TCO_H55, /* H55 */ - TCO_QM57, /* QM57 */ - TCO_H57, /* H57 */ - TCO_HM55, /* HM55 */ - TCO_Q57, /* Q57 */ - TCO_HM57, /* HM57 */ - TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */ - TCO_QS57, /* QS57 */ - TCO_3400, /* 3400 */ - TCO_3420, /* 3420 */ - TCO_3450, /* 3450 */ - TCO_EP80579, /* EP80579 */ - TCO_CPT, /* Cougar Point */ - TCO_CPTD, /* Cougar Point Desktop */ - TCO_CPTM, /* Cougar Point Mobile */ - TCO_PBG, /* Patsburg */ - TCO_DH89XXCC, /* DH89xxCC */ - TCO_PPT, /* Panther Point */ - TCO_LPT, /* Lynx Point */ -}; - -static struct { - char *name; - unsigned int iTCO_version; -} iTCO_chipset_info[] __devinitdata = { - {"ICH", 1}, - {"ICH0", 1}, - {"ICH2", 1}, - {"ICH2-M", 1}, - {"ICH3-S", 1}, - {"ICH3-M", 1}, - {"ICH4", 1}, - {"ICH4-M", 1}, - {"C-ICH", 1}, - {"ICH5 or ICH5R", 1}, - {"6300ESB", 1}, - {"ICH6 or ICH6R", 2}, - {"ICH6-M", 2}, - {"ICH6W or ICH6RW", 2}, - {"631xESB/632xESB", 2}, - {"ICH7 or ICH7R", 2}, - {"ICH7DH", 2}, - {"ICH7-M or ICH7-U", 2}, - {"ICH7-M DH", 2}, - {"NM10", 2}, - {"ICH8 or ICH8R", 2}, - {"ICH8DH", 2}, - {"ICH8DO", 2}, - {"ICH8M", 2}, - {"ICH8M-E", 2}, - {"ICH9", 2}, - {"ICH9R", 2}, - {"ICH9DH", 2}, - {"ICH9DO", 2}, - {"ICH9M", 2}, - {"ICH9M-E", 2}, - {"ICH10", 2}, - {"ICH10R", 2}, - {"ICH10D", 2}, - {"ICH10DO", 2}, - {"PCH Desktop Full Featured", 2}, - {"PCH Mobile Full Featured", 2}, - {"P55", 2}, - {"PM55", 2}, - {"H55", 2}, - {"QM57", 2}, - {"H57", 2}, - {"HM55", 2}, - {"Q57", 2}, - {"HM57", 2}, - {"PCH Mobile SFF Full Featured", 2}, - {"QS57", 2}, - {"3400", 2}, - {"3420", 2}, - {"3450", 2}, - {"EP80579", 2}, - {"Cougar Point", 2}, - {"Cougar Point Desktop", 2}, - {"Cougar Point Mobile", 2}, - {"Patsburg", 2}, - {"DH89xxCC", 2}, - {"Panther Point", 2}, - {"Lynx Point", 2}, - {NULL, 0} -}; - -/* - * This data only exists for exporting the supported PCI ids - * via MODULE_DEVICE_TABLE. We do not actually register a - * pci_driver, because the I/O Controller Hub has also other - * functions that probably will be registered by other drivers. - */ -static DEFINE_PCI_DEVICE_TABLE(iTCO_wdt_pci_tbl) = { - { PCI_VDEVICE(INTEL, 0x2410), TCO_ICH}, - { PCI_VDEVICE(INTEL, 0x2420), TCO_ICH0}, - { PCI_VDEVICE(INTEL, 0x2440), TCO_ICH2}, - { PCI_VDEVICE(INTEL, 0x244c), TCO_ICH2M}, - { PCI_VDEVICE(INTEL, 0x2480), TCO_ICH3}, - { PCI_VDEVICE(INTEL, 0x248c), TCO_ICH3M}, - { PCI_VDEVICE(INTEL, 0x24c0), TCO_ICH4}, - { PCI_VDEVICE(INTEL, 0x24cc), TCO_ICH4M}, - { PCI_VDEVICE(INTEL, 0x2450), TCO_CICH}, - { PCI_VDEVICE(INTEL, 0x24d0), TCO_ICH5}, - { PCI_VDEVICE(INTEL, 0x25a1), TCO_6300ESB}, - { PCI_VDEVICE(INTEL, 0x2640), TCO_ICH6}, - { PCI_VDEVICE(INTEL, 0x2641), TCO_ICH6M}, - { PCI_VDEVICE(INTEL, 0x2642), TCO_ICH6W}, - { PCI_VDEVICE(INTEL, 0x2670), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2671), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2672), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2673), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2674), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2675), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2676), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2677), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2678), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x2679), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267a), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267b), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267c), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267d), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267e), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x267f), TCO_631XESB}, - { PCI_VDEVICE(INTEL, 0x27b8), TCO_ICH7}, - { PCI_VDEVICE(INTEL, 0x27b0), TCO_ICH7DH}, - { PCI_VDEVICE(INTEL, 0x27b9), TCO_ICH7M}, - { PCI_VDEVICE(INTEL, 0x27bd), TCO_ICH7MDH}, - { PCI_VDEVICE(INTEL, 0x27bc), TCO_NM10}, - { PCI_VDEVICE(INTEL, 0x2810), TCO_ICH8}, - { PCI_VDEVICE(INTEL, 0x2812), TCO_ICH8DH}, - { PCI_VDEVICE(INTEL, 0x2814), TCO_ICH8DO}, - { PCI_VDEVICE(INTEL, 0x2815), TCO_ICH8M}, - { PCI_VDEVICE(INTEL, 0x2811), TCO_ICH8ME}, - { PCI_VDEVICE(INTEL, 0x2918), TCO_ICH9}, - { PCI_VDEVICE(INTEL, 0x2916), TCO_ICH9R}, - { PCI_VDEVICE(INTEL, 0x2912), TCO_ICH9DH}, - { PCI_VDEVICE(INTEL, 0x2914), TCO_ICH9DO}, - { PCI_VDEVICE(INTEL, 0x2919), TCO_ICH9M}, - { PCI_VDEVICE(INTEL, 0x2917), TCO_ICH9ME}, - { PCI_VDEVICE(INTEL, 0x3a18), TCO_ICH10}, - { PCI_VDEVICE(INTEL, 0x3a16), TCO_ICH10R}, - { PCI_VDEVICE(INTEL, 0x3a1a), TCO_ICH10D}, - { PCI_VDEVICE(INTEL, 0x3a14), TCO_ICH10DO}, - { PCI_VDEVICE(INTEL, 0x3b00), TCO_PCH}, - { PCI_VDEVICE(INTEL, 0x3b01), TCO_PCHM}, - { PCI_VDEVICE(INTEL, 0x3b02), TCO_P55}, - { PCI_VDEVICE(INTEL, 0x3b03), TCO_PM55}, - { PCI_VDEVICE(INTEL, 0x3b06), TCO_H55}, - { PCI_VDEVICE(INTEL, 0x3b07), TCO_QM57}, - { PCI_VDEVICE(INTEL, 0x3b08), TCO_H57}, - { PCI_VDEVICE(INTEL, 0x3b09), TCO_HM55}, - { PCI_VDEVICE(INTEL, 0x3b0a), TCO_Q57}, - { PCI_VDEVICE(INTEL, 0x3b0b), TCO_HM57}, - { PCI_VDEVICE(INTEL, 0x3b0d), TCO_PCHMSFF}, - { PCI_VDEVICE(INTEL, 0x3b0f), TCO_QS57}, - { PCI_VDEVICE(INTEL, 0x3b12), TCO_3400}, - { PCI_VDEVICE(INTEL, 0x3b14), TCO_3420}, - { PCI_VDEVICE(INTEL, 0x3b16), TCO_3450}, - { PCI_VDEVICE(INTEL, 0x5031), TCO_EP80579}, - { PCI_VDEVICE(INTEL, 0x1c41), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c42), TCO_CPTD}, - { PCI_VDEVICE(INTEL, 0x1c43), TCO_CPTM}, - { PCI_VDEVICE(INTEL, 0x1c44), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c45), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c46), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c47), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c48), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c49), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4a), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4b), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4c), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4d), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4e), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c4f), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c50), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c51), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c52), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c53), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c54), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c55), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c56), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c57), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c58), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c59), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5a), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5b), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5c), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5d), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5e), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1c5f), TCO_CPT}, - { PCI_VDEVICE(INTEL, 0x1d40), TCO_PBG}, - { PCI_VDEVICE(INTEL, 0x1d41), TCO_PBG}, - { PCI_VDEVICE(INTEL, 0x2310), TCO_DH89XXCC}, - { PCI_VDEVICE(INTEL, 0x1e40), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e41), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e42), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e43), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e44), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e45), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e46), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e47), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e48), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e49), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4a), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4b), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4c), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4d), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4e), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e4f), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e50), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e51), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e52), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e53), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e54), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e55), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e56), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e57), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e58), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e59), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5a), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5b), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5c), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5d), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5e), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x1e5f), TCO_PPT}, - { PCI_VDEVICE(INTEL, 0x8c40), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c41), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c42), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c43), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c44), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c45), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c46), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c47), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c48), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c49), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4a), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4b), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4c), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4d), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4e), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c4f), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c50), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c51), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c52), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c53), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c54), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c55), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c56), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c57), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c58), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c59), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5a), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5b), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5c), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5d), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5e), TCO_LPT}, - { PCI_VDEVICE(INTEL, 0x8c5f), TCO_LPT}, - { 0, }, /* End of list */ -}; -MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); - /* Address definitions for the TCO */ /* TCO base address */ -#define TCOBASE (iTCO_wdt_private.ACPIBASE + 0x60) +#define TCOBASE (iTCO_wdt_private.tco_res->start) /* SMI Control and Enable Register */ -#define SMI_EN (iTCO_wdt_private.ACPIBASE + 0x30) +#define SMI_EN (iTCO_wdt_private.smi_res->start) #define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */ #define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */ @@ -393,19 +93,18 @@ static char expect_release; static struct { /* this is private data for the iTCO_wdt device */ /* TCO version/generation */ unsigned int iTCO_version; - /* The device's ACPIBASE address (TCOBASE = ACPIBASE+0x60) */ - unsigned long ACPIBASE; + struct resource *tco_res; + struct resource *smi_res; + struct resource *gcs_res; /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/ unsigned long __iomem *gcs; /* the lock for io operations */ spinlock_t io_lock; + struct platform_device *dev; /* the PCI-device */ struct pci_dev *pdev; } iTCO_wdt_private; -/* the watchdog platform device */ -static struct platform_device *iTCO_wdt_platform_device; - /* module parameters */ #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */ static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ @@ -485,7 +184,7 @@ static int iTCO_wdt_start(void) spin_lock(&iTCO_wdt_private.io_lock); - iTCO_vendor_pre_start(iTCO_wdt_private.ACPIBASE, heartbeat); + iTCO_vendor_pre_start(iTCO_wdt_private.smi_res, heartbeat); /* disable chipset's NO_REBOOT bit */ if (iTCO_wdt_unset_NO_REBOOT_bit()) { @@ -519,7 +218,7 @@ static int iTCO_wdt_stop(void) spin_lock(&iTCO_wdt_private.io_lock); - iTCO_vendor_pre_stop(iTCO_wdt_private.ACPIBASE); + iTCO_vendor_pre_stop(iTCO_wdt_private.smi_res); /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */ val = inw(TCO1_CNT); @@ -541,7 +240,7 @@ static int iTCO_wdt_keepalive(void) { spin_lock(&iTCO_wdt_private.io_lock); - iTCO_vendor_pre_keepalive(iTCO_wdt_private.ACPIBASE, heartbeat); + iTCO_vendor_pre_keepalive(iTCO_wdt_private.smi_res, heartbeat); /* Reload the timer by writing to the TCO Timer Counter register */ if (iTCO_wdt_private.iTCO_version == 2) @@ -786,83 +485,120 @@ static struct miscdevice iTCO_wdt_miscdev = { * Init & exit routines */ -static int __devinit iTCO_wdt_init(struct pci_dev *pdev, - const struct pci_device_id *ent, struct platform_device *dev) +static void __devexit iTCO_wdt_cleanup(void) +{ + /* Stop the timer before we leave */ + if (!nowayout) + iTCO_wdt_stop(); + + /* Deregister */ + misc_deregister(&iTCO_wdt_miscdev); + + /* release resources */ + release_region(iTCO_wdt_private.tco_res->start, + resource_size(iTCO_wdt_private.tco_res)); + release_region(iTCO_wdt_private.smi_res->start, + resource_size(iTCO_wdt_private.smi_res)); + if (iTCO_wdt_private.iTCO_version == 2) { + iounmap(iTCO_wdt_private.gcs); + release_mem_region(iTCO_wdt_private.gcs_res->start, + resource_size(iTCO_wdt_private.gcs_res)); + } + + iTCO_wdt_private.tco_res = NULL; + iTCO_wdt_private.smi_res = NULL; + iTCO_wdt_private.gcs_res = NULL; + iTCO_wdt_private.gcs = NULL; +} + +static int __devinit iTCO_wdt_probe(struct platform_device *dev) { - int ret; - u32 base_address; - unsigned long RCBA; + int ret = -ENODEV; unsigned long val32; + struct lpc_ich_info *ich_info = dev->dev.platform_data; + + if (!ich_info) + goto out; + + spin_lock_init(&iTCO_wdt_private.io_lock); + + iTCO_wdt_private.tco_res = + platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_TCO); + if (!iTCO_wdt_private.tco_res) + goto out; + + iTCO_wdt_private.smi_res = + platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_SMI); + if (!iTCO_wdt_private.smi_res) + goto out; + + iTCO_wdt_private.iTCO_version = ich_info->iTCO_version; + iTCO_wdt_private.dev = dev; + iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent); /* - * Find the ACPI/PM base I/O address which is the base - * for the TCO registers (TCOBASE=ACPIBASE + 0x60) - * ACPIBASE is bits [15:7] from 0x40-0x43 + * Get the Memory-Mapped GCS register, we need it for the + * NO_REBOOT flag (TCO v2). */ - pci_read_config_dword(pdev, 0x40, &base_address); - base_address &= 0x0000ff80; - if (base_address == 0x00000000) { - /* Something's wrong here, ACPIBASE has to be set */ - pr_err("failed to get TCOBASE address, device disabled by hardware/BIOS\n"); - return -ENODEV; - } - iTCO_wdt_private.iTCO_version = - iTCO_chipset_info[ent->driver_data].iTCO_version; - iTCO_wdt_private.ACPIBASE = base_address; - iTCO_wdt_private.pdev = pdev; - - /* Get the Memory-Mapped GCS register, we need it for the - NO_REBOOT flag (TCO v2). To get access to it you have to - read RCBA from PCI Config space 0xf0 and use it as base. - GCS = RCBA + ICH6_GCS(0x3410). */ if (iTCO_wdt_private.iTCO_version == 2) { - pci_read_config_dword(pdev, 0xf0, &base_address); - if ((base_address & 1) == 0) { - pr_err("RCBA is disabled by hardware/BIOS, device disabled\n"); - ret = -ENODEV; + iTCO_wdt_private.gcs_res = platform_get_resource(dev, + IORESOURCE_MEM, + ICH_RES_MEM_GCS); + + if (!iTCO_wdt_private.gcs_res) + goto out; + + if (!request_mem_region(iTCO_wdt_private.gcs_res->start, + resource_size(iTCO_wdt_private.gcs_res), dev->name)) { + ret = -EBUSY; goto out; } - RCBA = base_address & 0xffffc000; - iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410), 4); + iTCO_wdt_private.gcs = ioremap(iTCO_wdt_private.gcs_res->start, + resource_size(iTCO_wdt_private.gcs_res)); + if (!iTCO_wdt_private.gcs) { + ret = -EIO; + goto unreg_gcs; + } } /* Check chipset's NO_REBOOT bit */ if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) { pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n"); ret = -ENODEV; /* Cannot reset NO_REBOOT bit */ - goto out_unmap; + goto unmap_gcs; } /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ iTCO_wdt_set_NO_REBOOT_bit(); /* The TCO logic uses the TCO_EN bit in the SMI_EN register */ - if (!request_region(SMI_EN, 4, "iTCO_wdt")) { - pr_err("I/O address 0x%04lx already in use, device disabled\n", + if (!request_region(iTCO_wdt_private.smi_res->start, + resource_size(iTCO_wdt_private.smi_res), dev->name)) { + pr_err("I/O address 0x%04llx already in use, device disabled\n", SMI_EN); - ret = -EIO; - goto out_unmap; + ret = -EBUSY; + goto unmap_gcs; } if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) { - /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ + /* + * Bit 13: TCO_EN -> 0 + * Disables TCO logic generating an SMI# + */ val32 = inl(SMI_EN); val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ outl(val32, SMI_EN); } - /* The TCO I/O registers reside in a 32-byte range pointed to - by the TCOBASE value */ - if (!request_region(TCOBASE, 0x20, "iTCO_wdt")) { - pr_err("I/O address 0x%04lx already in use, device disabled\n", + if (!request_region(iTCO_wdt_private.tco_res->start, + resource_size(iTCO_wdt_private.tco_res), dev->name)) { + pr_err("I/O address 0x%04llx already in use, device disabled\n", TCOBASE); - ret = -EIO; - goto unreg_smi_en; + ret = -EBUSY; + goto unreg_smi; } - pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n", - iTCO_chipset_info[ent->driver_data].name, - iTCO_chipset_info[ent->driver_data].iTCO_version, - TCOBASE); + pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n", + ich_info->name, ich_info->iTCO_version, TCOBASE); /* Clear out the (probably old) status */ outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ @@ -883,7 +619,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, if (ret != 0) { pr_err("cannot register miscdev on minor=%d (err=%d)\n", WATCHDOG_MINOR, ret); - goto unreg_region; + goto unreg_tco; } pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n", @@ -891,62 +627,31 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, return 0; -unreg_region: - release_region(TCOBASE, 0x20); -unreg_smi_en: - release_region(SMI_EN, 4); -out_unmap: +unreg_tco: + release_region(iTCO_wdt_private.tco_res->start, + resource_size(iTCO_wdt_private.tco_res)); +unreg_smi: + release_region(iTCO_wdt_private.smi_res->start, + resource_size(iTCO_wdt_private.smi_res)); +unmap_gcs: if (iTCO_wdt_private.iTCO_version == 2) iounmap(iTCO_wdt_private.gcs); -out: - iTCO_wdt_private.ACPIBASE = 0; - return ret; -} - -static void __devexit iTCO_wdt_cleanup(void) -{ - /* Stop the timer before we leave */ - if (!nowayout) - iTCO_wdt_stop(); - - /* Deregister */ - misc_deregister(&iTCO_wdt_miscdev); - release_region(TCOBASE, 0x20); - release_region(SMI_EN, 4); +unreg_gcs: if (iTCO_wdt_private.iTCO_version == 2) - iounmap(iTCO_wdt_private.gcs); - pci_dev_put(iTCO_wdt_private.pdev); - iTCO_wdt_private.ACPIBASE = 0; -} - -static int __devinit iTCO_wdt_probe(struct platform_device *dev) -{ - int ret = -ENODEV; - int found = 0; - struct pci_dev *pdev = NULL; - const struct pci_device_id *ent; - - spin_lock_init(&iTCO_wdt_private.io_lock); - - for_each_pci_dev(pdev) { - ent = pci_match_id(iTCO_wdt_pci_tbl, pdev); - if (ent) { - found++; - ret = iTCO_wdt_init(pdev, ent, dev); - if (!ret) - break; - } - } - - if (!found) - pr_info("No device detected\n"); + release_mem_region(iTCO_wdt_private.gcs_res->start, + resource_size(iTCO_wdt_private.gcs_res)); +out: + iTCO_wdt_private.tco_res = NULL; + iTCO_wdt_private.smi_res = NULL; + iTCO_wdt_private.gcs_res = NULL; + iTCO_wdt_private.gcs = NULL; return ret; } static int __devexit iTCO_wdt_remove(struct platform_device *dev) { - if (iTCO_wdt_private.ACPIBASE) + if (iTCO_wdt_private.tco_res || iTCO_wdt_private.smi_res) iTCO_wdt_cleanup(); return 0; @@ -977,23 +682,11 @@ static int __init iTCO_wdt_init_module(void) if (err) return err; - iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, - -1, NULL, 0); - if (IS_ERR(iTCO_wdt_platform_device)) { - err = PTR_ERR(iTCO_wdt_platform_device); - goto unreg_platform_driver; - } - return 0; - -unreg_platform_driver: - platform_driver_unregister(&iTCO_wdt_driver); - return err; } static void __exit iTCO_wdt_cleanup_module(void) { - platform_device_unregister(iTCO_wdt_platform_device); platform_driver_unregister(&iTCO_wdt_driver); pr_info("Watchdog Module Unloaded\n"); } -- cgit v1.2.2 From b683a0a675560307ebc458cf9044d98d27820b7c Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 09:30:36 +0800 Subject: mfd: Return proper error if tps65090 regmap_init_i2c fails Return proper error instead of 0 if regmap_init_i2c fails. Signed-off-by: Axel Lin Acked-by: Venu Byravarasu Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65090.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index 6dc4c345ea68..d9940870a688 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -297,10 +297,10 @@ static int __devinit tps65090_i2c_probe(struct i2c_client *client, tps65090->rmap = regmap_init_i2c(tps65090->client, &tps65090_regmap_config); if (IS_ERR(tps65090->rmap)) { - dev_err(&client->dev, "regmap_init failed with err: %ld\n", - PTR_ERR(tps65090->rmap)); + ret = PTR_ERR(tps65090->rmap); + dev_err(&client->dev, "regmap_init failed with err: %d\n", ret); goto err_irq_exit; - }; + } ret = mfd_add_devices(tps65090->dev, -1, tps65090s, ARRAY_SIZE(tps65090s), NULL, 0); -- cgit v1.2.2 From f8dddc0cfe9f56ed74fd5efde8d0754f5fb73a3f Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 10:01:55 +0800 Subject: mfd: Convert rc5t583 to devm_regmap_init_i2c() Signed-off-by: Axel Lin Acked-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/rc5t583.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c index 1cb4c356afd5..cdc1df7fa0e9 100644 --- a/drivers/mfd/rc5t583.c +++ b/drivers/mfd/rc5t583.c @@ -268,7 +268,7 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c, rc5t583->dev = &i2c->dev; i2c_set_clientdata(i2c, rc5t583); - rc5t583->regmap = regmap_init_i2c(i2c, &rc5t583_regmap_config); + rc5t583->regmap = devm_regmap_init_i2c(i2c, &rc5t583_regmap_config); if (IS_ERR(rc5t583->regmap)) { ret = PTR_ERR(rc5t583->regmap); dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret); @@ -277,7 +277,7 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c, ret = rc5t583_clear_ext_power_req(rc5t583, pdata); if (ret < 0) - goto err_irq_init; + return ret; if (i2c->irq) { ret = rc5t583_irq_init(rc5t583, i2c->irq, pdata->irq_base); @@ -300,8 +300,6 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c, err_add_devs: if (irq_init_success) rc5t583_irq_exit(rc5t583); -err_irq_init: - regmap_exit(rc5t583->regmap); return ret; } @@ -311,7 +309,6 @@ static int __devexit rc5t583_i2c_remove(struct i2c_client *i2c) mfd_remove_devices(rc5t583->dev); rc5t583_irq_exit(rc5t583); - regmap_exit(rc5t583->regmap); return 0; } -- cgit v1.2.2 From 1092e1c761dd0dc92a431085e322956d91d057a6 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 10:03:44 +0800 Subject: mfd: Convert s5m-core to devm_regmap_init_i2c() Signed-off-by: Axel Lin Signed-off-by: Samuel Ortiz --- drivers/mfd/s5m-core.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/s5m-core.c b/drivers/mfd/s5m-core.c index 48949d998d10..dd170307e60e 100644 --- a/drivers/mfd/s5m-core.c +++ b/drivers/mfd/s5m-core.c @@ -114,12 +114,12 @@ static int s5m87xx_i2c_probe(struct i2c_client *i2c, s5m87xx->wakeup = pdata->wakeup; } - s5m87xx->regmap = regmap_init_i2c(i2c, &s5m_regmap_config); + s5m87xx->regmap = devm_regmap_init_i2c(i2c, &s5m_regmap_config); if (IS_ERR(s5m87xx->regmap)) { ret = PTR_ERR(s5m87xx->regmap); dev_err(&i2c->dev, "Failed to allocate register map: %d\n", ret); - goto err; + return ret; } s5m87xx->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR); @@ -159,7 +159,6 @@ err: mfd_remove_devices(s5m87xx->dev); s5m_irq_exit(s5m87xx); i2c_unregister_device(s5m87xx->rtc); - regmap_exit(s5m87xx->regmap); return ret; } @@ -170,7 +169,6 @@ static int s5m87xx_i2c_remove(struct i2c_client *i2c) mfd_remove_devices(s5m87xx->dev); s5m_irq_exit(s5m87xx); i2c_unregister_device(s5m87xx->rtc); - regmap_exit(s5m87xx->regmap); return 0; } -- cgit v1.2.2 From 1d88f7a01d9588b3298cfd6a2ec30538e96d166e Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 10:04:58 +0800 Subject: mfd: Convert tps65090 to devm_regmap_init_i2c() Signed-off-by: Axel Lin Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65090.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index d9940870a688..9ca4c44dfc62 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -294,8 +294,8 @@ static int __devinit tps65090_i2c_probe(struct i2c_client *client, } } - tps65090->rmap = regmap_init_i2c(tps65090->client, - &tps65090_regmap_config); + tps65090->rmap = devm_regmap_init_i2c(tps65090->client, + &tps65090_regmap_config); if (IS_ERR(tps65090->rmap)) { ret = PTR_ERR(tps65090->rmap); dev_err(&client->dev, "regmap_init failed with err: %d\n", ret); @@ -307,14 +307,11 @@ static int __devinit tps65090_i2c_probe(struct i2c_client *client, if (ret) { dev_err(&client->dev, "add mfd devices failed with err: %d\n", ret); - goto err_regmap_exit; + goto err_irq_exit; } return 0; -err_regmap_exit: - regmap_exit(tps65090->rmap); - err_irq_exit: if (client->irq) free_irq(client->irq, tps65090); @@ -327,7 +324,6 @@ static int __devexit tps65090_i2c_remove(struct i2c_client *client) struct tps65090 *tps65090 = i2c_get_clientdata(client); mfd_remove_devices(tps65090->dev); - regmap_exit(tps65090->rmap); if (client->irq) free_irq(client->irq, tps65090); -- cgit v1.2.2 From 0ef4619c74ef1e24e9ee340f95ee922f970cde54 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 10:06:40 +0800 Subject: mfd: Convert tps65217 to devm_regmap_init_i2c() Signed-off-by: Axel Lin Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65217.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c index f7d854e4cc62..c064c0a05649 100644 --- a/drivers/mfd/tps65217.c +++ b/drivers/mfd/tps65217.c @@ -150,7 +150,7 @@ static int __devinit tps65217_probe(struct i2c_client *client, return -ENOMEM; tps->pdata = pdata; - tps->regmap = regmap_init_i2c(client, &tps65217_regmap_config); + tps->regmap = devm_regmap_init_i2c(client, &tps65217_regmap_config); if (IS_ERR(tps->regmap)) { ret = PTR_ERR(tps->regmap); dev_err(tps->dev, "Failed to allocate register map: %d\n", @@ -163,9 +163,9 @@ static int __devinit tps65217_probe(struct i2c_client *client, ret = tps65217_reg_read(tps, TPS65217_REG_CHIPID, &version); if (ret < 0) { - dev_err(tps->dev, "Failed to read revision" - " register: %d\n", ret); - goto err_regmap; + dev_err(tps->dev, "Failed to read revision register: %d\n", + ret); + return ret; } dev_info(tps->dev, "TPS65217 ID %#x version 1.%d\n", @@ -190,11 +190,6 @@ static int __devinit tps65217_probe(struct i2c_client *client, } return 0; - -err_regmap: - regmap_exit(tps->regmap); - - return ret; } static int __devexit tps65217_remove(struct i2c_client *client) @@ -205,8 +200,6 @@ static int __devexit tps65217_remove(struct i2c_client *client) for (i = 0; i < TPS65217_NUM_REGULATOR; i++) platform_device_unregister(tps->regulator_pdev[i]); - regmap_exit(tps->regmap); - return 0; } -- cgit v1.2.2 From bbf6adc10cb2d5a1345cc66e61b3891d42a9afbe Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 25 Apr 2012 10:09:46 +0800 Subject: mfd: Convert twl6040-core to devm_regmap_init_i2c() Signed-off-by: Axel Lin Acked-by: Peter Ujfalusi Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 2d6bedadca09..493f4a692747 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -524,7 +524,7 @@ static int __devinit twl6040_probe(struct i2c_client *client, goto err; } - twl6040->regmap = regmap_init_i2c(client, &twl6040_regmap_config); + twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config); if (IS_ERR(twl6040->regmap)) { ret = PTR_ERR(twl6040->regmap); goto err; @@ -623,7 +623,6 @@ gpio2_err: gpio_free(twl6040->audpwron); gpio1_err: i2c_set_clientdata(client, NULL); - regmap_exit(twl6040->regmap); err: return ret; } @@ -643,7 +642,6 @@ static int __devexit twl6040_remove(struct i2c_client *client) mfd_remove_devices(&client->dev); i2c_set_clientdata(client, NULL); - regmap_exit(twl6040->regmap); return 0; } -- cgit v1.2.2 From 5a2f1b5fae593dbdf4f3656ee5a5d111df3e9acb Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Wed, 25 Apr 2012 13:05:24 +1000 Subject: mfd: enable wakeup on twl4030 IRQ. Most of the interrupts that come through this line should trigger wakeups: power button RTC alarm power available usb plug/unplug so mark the interrupt as a wakeup interrupt. This is particularly important for when the interrupt arrives during the late suspend phase. Without this setting it will be ignored. Signed-off-by: NeilBrown Acked-by: Kevin Hilman Signed-off-by: Samuel Ortiz --- drivers/mfd/twl4030-irq.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c index 5d656e814358..ad733d76207a 100644 --- a/drivers/mfd/twl4030-irq.c +++ b/drivers/mfd/twl4030-irq.c @@ -757,6 +757,7 @@ int twl4030_init_irq(struct device *dev, int irq_num) dev_err(dev, "could not claim irq%d: %d\n", irq_num, status); goto fail_rqirq; } + enable_irq_wake(irq_num); return irq_base; fail_rqirq: -- cgit v1.2.2 From fa5501890d8974301042e0202d342a6cbe8609f4 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Wed, 9 May 2012 16:15:26 +0200 Subject: mmc: core: Prevent eMMC VCC supply to be cut from late init For eMMC cards that has been initialized from a bootloader, the VCC voltage supply must not be cut in an uncontrolled manner, without first sending SLEEP or POWEROFF_NOTIFY. The regulator_init_complete late initcall, may cut the VCC regulator if it's reference counter is zero. To be able to prevent the regulator from being cut, mmc_start_host, which should execute at device init and thus before late init, calls mmc_power_up. Then the host driver is able to increase the reference to the regulator. Signed-off-by: Ulf Hansson Reviewed-by: Mark Brown Signed-off-by: Chris Ball --- drivers/mmc/core/core.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index ba821fe70bca..0b6141d29dbd 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -42,6 +42,7 @@ #include "sdio_ops.h" static struct workqueue_struct *workqueue; +static const unsigned freqs[] = { 400000, 300000, 200000, 100000 }; /* * Enabling software CRCs on the data blocks can be a significant (30%) @@ -1157,6 +1158,9 @@ static void mmc_power_up(struct mmc_host *host) { int bit; + if (host->ios.power_mode == MMC_POWER_ON) + return; + mmc_host_clk_hold(host); /* If ocr is set, we use it */ @@ -1199,6 +1203,10 @@ static void mmc_power_up(struct mmc_host *host) void mmc_power_off(struct mmc_host *host) { int err = 0; + + if (host->ios.power_mode == MMC_POWER_OFF) + return; + mmc_host_clk_hold(host); host->ios.clock = 0; @@ -2005,7 +2013,6 @@ EXPORT_SYMBOL(mmc_detect_card_removed); void mmc_rescan(struct work_struct *work) { - static const unsigned freqs[] = { 400000, 300000, 200000, 100000 }; struct mmc_host *host = container_of(work, struct mmc_host, detect.work); int i; @@ -2044,8 +2051,12 @@ void mmc_rescan(struct work_struct *work) */ mmc_bus_put(host); - if (host->ops->get_cd && host->ops->get_cd(host) == 0) + if (host->ops->get_cd && host->ops->get_cd(host) == 0) { + mmc_claim_host(host); + mmc_power_off(host); + mmc_release_host(host); goto out; + } mmc_claim_host(host); for (i = 0; i < ARRAY_SIZE(freqs); i++) { @@ -2063,7 +2074,8 @@ void mmc_rescan(struct work_struct *work) void mmc_start_host(struct mmc_host *host) { - mmc_power_off(host); + host->f_init = max(freqs[0], host->f_min); + mmc_power_up(host); mmc_detect_change(host, 0); } -- cgit v1.2.2 From 5af7df6b831ef9fd5fbde9d4bbd596f742cb2ad8 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 2 May 2012 16:54:42 +0300 Subject: mfd: Add regulator support for twl6040 VIO, V2V1 supplies twl6040 has three power supply source: VBAT needs to be connected to VBAT, VIO, and V2V1. Add regulator support for the VIO, V2V1 supplies. Initially handle the two supply together with bulk commands. Signed-off-by: Peter Ujfalusi Reviewed-by: Mark Brown Signed-off-by: Tero Kristo Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 493f4a692747..7a92d95bfb60 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -35,8 +36,10 @@ #include #include #include +#include #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) +#define TWL6040_NUM_SUPPLIES (2) int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) { @@ -532,6 +535,21 @@ static int __devinit twl6040_probe(struct i2c_client *client, i2c_set_clientdata(client, twl6040); + twl6040->supplies[0].supply = "vio"; + twl6040->supplies[1].supply = "v2v1"; + ret = regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES, + twl6040->supplies); + if (ret != 0) { + dev_err(&client->dev, "Failed to get supplies: %d\n", ret); + goto regulator_get_err; + } + + ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies); + if (ret != 0) { + dev_err(&client->dev, "Failed to enable supplies: %d\n", ret); + goto power_err; + } + twl6040->dev = &client->dev; twl6040->irq = client->irq; twl6040->irq_base = pdata->irq_base; @@ -552,13 +570,13 @@ static int __devinit twl6040_probe(struct i2c_client *client, ret = gpio_request_one(twl6040->audpwron, GPIOF_OUT_INIT_LOW, "audpwron"); if (ret) - goto gpio1_err; + goto gpio_err; } /* codec interrupt */ ret = twl6040_irq_init(twl6040); if (ret) - goto gpio2_err; + goto irq_init_err; ret = request_threaded_irq(twl6040->irq_base + TWL6040_IRQ_READY, NULL, twl6040_naudint_handler, 0, @@ -618,10 +636,14 @@ mfd_err: free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040); irq_err: twl6040_irq_exit(twl6040); -gpio2_err: +irq_init_err: if (gpio_is_valid(twl6040->audpwron)) gpio_free(twl6040->audpwron); -gpio1_err: +gpio_err: + regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); +power_err: + regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040->supplies); +regulator_get_err: i2c_set_clientdata(client, NULL); err: return ret; @@ -643,6 +665,9 @@ static int __devexit twl6040_remove(struct i2c_client *client) mfd_remove_devices(&client->dev); i2c_set_clientdata(client, NULL); + regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); + regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040->supplies); + return 0; } -- cgit v1.2.2 From 1c02f000e78347aa51822feb189fcb0d90273958 Mon Sep 17 00:00:00 2001 From: Philippe De Swert Date: Wed, 11 Apr 2012 23:31:45 +0300 Subject: mmc: card: Avoid null pointer dereference After the null check on md the code jumped to cmd_done, which then will dereference md in mmc_blk_put. This patch avoids the possible null pointer dereference in that case. Signed-off-by: Philippe De Swert Reviewed-by: Namjae Jeon Signed-off-by: Chris Ball --- drivers/mmc/card/block.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index dabec556ebb8..91cda7551a60 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c @@ -384,7 +384,7 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev, md = mmc_blk_get(bdev->bd_disk); if (!md) { err = -EINVAL; - goto cmd_done; + goto cmd_err; } card = md->queue.card; @@ -483,6 +483,7 @@ cmd_rel_host: cmd_done: mmc_blk_put(md); +cmd_err: kfree(idata->buf); kfree(idata); return err; -- cgit v1.2.2 From f6f44590f231cdf914ce740f3a53a6b815bf4767 Mon Sep 17 00:00:00 2001 From: Philippe De Swert Date: Wed, 11 Apr 2012 23:32:05 +0300 Subject: mmc: core: Remove dead code bus_width is passed to the function and when 0 (MMC_BUS_WIDTH_1) will cause the function to return. So in in the second test it definitely is different from 0, and the third test is redundant. Signed-off-by: Philippe De Swert Reviewed-by: Namjae Jeon Acked-by: Philip Rakity Signed-off-by: Chris Ball --- drivers/mmc/core/mmc.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 163046030773..2f0e11c9fd67 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -539,14 +539,10 @@ static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width) err = mmc_get_ext_csd(card, &bw_ext_csd); if (err || bw_ext_csd == NULL) { - if (bus_width != MMC_BUS_WIDTH_1) - err = -EINVAL; + err = -EINVAL; goto out; } - if (bus_width == MMC_BUS_WIDTH_1) - goto out; - /* only compare read only fields */ err = !((card->ext_csd.raw_partition_support == bw_ext_csd[EXT_CSD_PARTITION_SUPPORT]) && -- cgit v1.2.2 From bb6abcf440c4c861a2131c0651b683dbd2edba84 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 10 May 2012 11:10:07 -0700 Subject: ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX No need to have an OMAP prefix on these SoCs that are in the family but arent' really called OMAP. Simple rename: CONFIG_SOC_OMAPAM33XX --> CONFIG_SOC_AM33XX No functional change. Signed-off-by: Kevin Hilman Acked-by: Vaibhav Hiremath [tony@atomide.com: updated for the driver config change also] Signed-off-by: Tony Lindgren --- drivers/net/ethernet/ti/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/ethernet/ti/Kconfig b/drivers/net/ethernet/ti/Kconfig index b42252c4bec8..1b173a6145d6 100644 --- a/drivers/net/ethernet/ti/Kconfig +++ b/drivers/net/ethernet/ti/Kconfig @@ -51,7 +51,7 @@ config TI_DAVINCI_CPDMA config TI_CPSW tristate "TI CPSW Switch Support" - depends on ARM && (ARCH_DAVINCI || SOC_OMAPAM33XX) + depends on ARM && (ARCH_DAVINCI || SOC_AM33XX) select TI_DAVINCI_CPDMA select TI_DAVINCI_MDIO ---help--- -- cgit v1.2.2 From 3075528d3dd1ac8b729fccf2cbc3119057088223 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 17 Apr 2012 17:10:07 +0530 Subject: dmaengine: dw_dmac: Add clk_{un}prepare() support clk_{un}prepare is mandatory for platforms using common clock framework. Since this driver is used by SPEAr platform, which supports common clock framework, add clk_{un}prepare() support for it. Signed-off-by: Viresh Kumar Signed-off-by: Vinod Koul --- drivers/dma/dw_dmac.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index 7439079f5eed..300d976b6661 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c @@ -1429,7 +1429,7 @@ static int __init dw_probe(struct platform_device *pdev) err = PTR_ERR(dw->clk); goto err_clk; } - clk_enable(dw->clk); + clk_prepare_enable(dw->clk); /* force dma off, just in case */ dw_dma_off(dw); @@ -1510,7 +1510,7 @@ static int __init dw_probe(struct platform_device *pdev) return 0; err_irq: - clk_disable(dw->clk); + clk_disable_unprepare(dw->clk); clk_put(dw->clk); err_clk: iounmap(dw->regs); @@ -1540,7 +1540,7 @@ static int __exit dw_remove(struct platform_device *pdev) channel_clear_bit(dw, CH_EN, dwc->mask); } - clk_disable(dw->clk); + clk_disable_unprepare(dw->clk); clk_put(dw->clk); iounmap(dw->regs); @@ -1559,7 +1559,7 @@ static void dw_shutdown(struct platform_device *pdev) struct dw_dma *dw = platform_get_drvdata(pdev); dw_dma_off(platform_get_drvdata(pdev)); - clk_disable(dw->clk); + clk_disable_unprepare(dw->clk); } static int dw_suspend_noirq(struct device *dev) @@ -1568,7 +1568,7 @@ static int dw_suspend_noirq(struct device *dev) struct dw_dma *dw = platform_get_drvdata(pdev); dw_dma_off(platform_get_drvdata(pdev)); - clk_disable(dw->clk); + clk_disable_unprepare(dw->clk); return 0; } @@ -1578,7 +1578,7 @@ static int dw_resume_noirq(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct dw_dma *dw = platform_get_drvdata(pdev); - clk_enable(dw->clk); + clk_prepare_enable(dw->clk); dma_writel(dw, CFG, DW_CFG_DMA_EN); return 0; } -- cgit v1.2.2 From d3f797d93e593aa891f5b04a404b4ab45fd0e66a Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 20 Apr 2012 20:15:34 +0530 Subject: dmaengine: dw_dma: add Device Tree probing capability SPEAr platforms now support DT and so must convert all drivers to support DT. This patch adds DT probing support for Synopsys DMA controller and updates its documentation too. Signed-off-by: Viresh Kumar Signed-off-by: Vinod Koul --- drivers/dma/dw_dmac.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index 300d976b6661..13b92983b241 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -1592,12 +1593,21 @@ static const struct dev_pm_ops dw_dev_pm_ops = { .poweroff_noirq = dw_suspend_noirq, }; +#ifdef CONFIG_OF +static const struct of_device_id dw_dma_id_table[] = { + { .compatible = "snps,dma-spear1340" }, + {} +}; +MODULE_DEVICE_TABLE(of, dw_dma_id_table); +#endif + static struct platform_driver dw_driver = { .remove = __exit_p(dw_remove), .shutdown = dw_shutdown, .driver = { .name = "dw_dmac", .pm = &dw_dev_pm_ops, + .of_match_table = of_match_ptr(dw_dma_id_table), }, }; -- cgit v1.2.2 From abd9ccc84c35cf1e296335a7b655bba40c92386c Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Sat, 28 Apr 2012 18:15:42 +0800 Subject: dma: imx-sdma: keep the callbacks invoked in the tasklet The current code keeps the callbacks invoked from interrupt context, this does not conform to the Documentation/dmaengine.txt. So add tasklet support to fix this issue. Signed-off-by: Huang Shijie Signed-off-by: Vinod Koul --- drivers/dma/imx-sdma.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index d3e38e28bb6b..5a457777f5c0 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -271,6 +271,7 @@ struct sdma_channel { enum dma_status status; unsigned int chn_count; unsigned int chn_real_count; + struct tasklet_struct tasklet; }; #define IMX_DMA_SG_LOOP BIT(0) @@ -534,8 +535,10 @@ static void mxc_sdma_handle_channel_normal(struct sdma_channel *sdmac) sdmac->desc.callback(sdmac->desc.callback_param); } -static void mxc_sdma_handle_channel(struct sdma_channel *sdmac) +static void sdma_tasklet(unsigned long data) { + struct sdma_channel *sdmac = (struct sdma_channel *) data; + complete(&sdmac->done); /* not interested in channel 0 interrupts */ @@ -560,7 +563,7 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id) int channel = fls(stat) - 1; struct sdma_channel *sdmac = &sdma->channel[channel]; - mxc_sdma_handle_channel(sdmac); + tasklet_schedule(&sdmac->tasklet); __clear_bit(channel, &stat); } @@ -1359,6 +1362,8 @@ static int __init sdma_probe(struct platform_device *pdev) dma_cookie_init(&sdmac->chan); sdmac->channel = i; + tasklet_init(&sdmac->tasklet, sdma_tasklet, + (unsigned long) sdmac); /* * Add the channel to the DMAC list. Do not add channel 0 though * because we need it internally in the SDMA driver. This also means -- cgit v1.2.2 From 12366ad91adb41a193f93b3b0f2829ea06df1773 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Thu, 3 May 2012 15:02:28 +0530 Subject: DMA: PL330: Remove duplicate header file inclusion Removes file which was included twice. Signed-off-by: Sachin Kamat Acked-by: Jassi Brar Signed-off-by: Vinod Koul --- drivers/dma/pl330.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index fa3fb21e60be..cbcc28e79be6 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.2 From cbb796ccd8c33c50249b876d9773dfa8e67d39cb Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 25 Apr 2012 20:50:51 +0200 Subject: dmaengine: Use sg_dma_address instead of sg_phys dmaengine drivers should always use sg_dma_address instead of sg_phys to get the addresses for the transfer from a sg element. To quote Russel King: sg_phys(sg) of course has nothing to do with DMA addresses. It's the physical address _to the CPU_ of the memory associated with the scatterlist entry. That may, or may not have the same value for the DMA engine, particularly if IOMMUs are involved. And if these drivers are used on ARM, they must be fixed, sooner rather than later. There's patches in the works which will mean we will end up with IOMMU support in the DMA mapping later, which means everything I've said above will become reality. The patch has been generated using the following coccinelle patch: @@ struct scatterlist *sg; @@ -sg_phys(sg) +sg_dma_address(sg) Signed-off-by: Lars-Peter Clausen Acked-by: Linus Walleij Signed-off-by: Vinod Koul --- drivers/dma/amba-pl08x.c | 4 ++-- drivers/dma/coh901318_lli.c | 4 ++-- drivers/dma/dw_dmac.c | 4 ++-- drivers/dma/intel_mid_dma.c | 2 +- drivers/dma/pch_dma.c | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index e7d5550266e0..003220a60bcb 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1382,11 +1382,11 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( dsg->len = sg_dma_len(sg); if (direction == DMA_MEM_TO_DEV) { - dsg->src_addr = sg_phys(sg); + dsg->src_addr = sg_dma_address(sg); dsg->dst_addr = slave_addr; } else { dsg->src_addr = slave_addr; - dsg->dst_addr = sg_phys(sg); + dsg->dst_addr = sg_dma_address(sg); } } diff --git a/drivers/dma/coh901318_lli.c b/drivers/dma/coh901318_lli.c index 6c0e2d4c6682..780e0429b38c 100644 --- a/drivers/dma/coh901318_lli.c +++ b/drivers/dma/coh901318_lli.c @@ -270,10 +270,10 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool, if (dir == DMA_MEM_TO_DEV) /* increment source address */ - src = sg_phys(sg); + src = sg_dma_address(sg); else /* increment destination address */ - dst = sg_phys(sg); + dst = sg_dma_address(sg); bytes_to_transfer = sg_dma_len(sg); diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index 13b92983b241..e23dc82d43ac 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c @@ -743,7 +743,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, struct dw_desc *desc; u32 len, dlen, mem; - mem = sg_phys(sg); + mem = sg_dma_address(sg); len = sg_dma_len(sg); if (!((mem | len) & 7)) @@ -810,7 +810,7 @@ slave_sg_todev_fill_desc: struct dw_desc *desc; u32 len, dlen, mem; - mem = sg_phys(sg); + mem = sg_dma_address(sg); len = sg_dma_len(sg); if (!((mem | len) & 7)) diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c index c900ca7aaec4..d0ef5937fbf6 100644 --- a/drivers/dma/intel_mid_dma.c +++ b/drivers/dma/intel_mid_dma.c @@ -398,7 +398,7 @@ static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc, desc->width, midc->dma->block_size); /*Populate SAR and DAR values*/ - sg_phy_addr = sg_phys(sg); + sg_phy_addr = sg_dma_address(sg); if (desc->dirn == DMA_MEM_TO_DEV) { lli_bloc_desc->sar = sg_phy_addr; lli_bloc_desc->dar = mids->dma_slave.dst_addr; diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c index 65c0495a6d40..987ab5cd2617 100644 --- a/drivers/dma/pch_dma.c +++ b/drivers/dma/pch_dma.c @@ -621,7 +621,7 @@ static struct dma_async_tx_descriptor *pd_prep_slave_sg(struct dma_chan *chan, goto err_desc_get; desc->regs.dev_addr = reg; - desc->regs.mem_addr = sg_phys(sg); + desc->regs.mem_addr = sg_dma_address(sg); desc->regs.size = sg_dma_len(sg); desc->regs.next = DMA_DESC_FOLLOW_WITHOUT_IRQ; -- cgit v1.2.2 From fdaf9c4b22247a6cc6cda9459be3e52764c14d95 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 25 Apr 2012 20:50:52 +0200 Subject: dmaengine: Use dma_sg_len(sg) instead of sg->length sg->length may or may not contain the length of the dma region to transfer, depending on the architecture - dma_sg_len(sg) always will though. For the architectures which use the drivers modified by this patch it probably is the case that sg->length contains the dma transfer length. But to be consistent and future proof change them to use dma_sg_len. To quote Russel King: sg->length is meaningless to something performing DMA. In cases where sg_dma_len(sg) and sg->length are the same storage, then there's no problem. But scatterlists _can_ (and one some architectures) do split them - especially when you have an IOMMU which can allow you to combine a scatterlist into fewer entries. So, anything using sg->length for the size of a scatterlist's DMA transfer _after_ a call to dma_map_sg() is almost certainly buggy. The patch has been generated using the following coccinelle patch: @@ struct scatterlist *sg; expression X; @@ -sg[X].length +sg_dma_len(&sg[X]) @@ struct scatterlist *sg; @@ -sg->length +sg_dma_len(sg) Signed-off-by: Lars-Peter Clausen Acked-by: Linus Walleij Signed-off-by: Vinod Koul --- drivers/dma/amba-pl08x.c | 2 +- drivers/dma/coh901318.c | 2 +- drivers/dma/imx-dma.c | 12 ++++++------ drivers/dma/imx-sdma.c | 2 +- drivers/dma/intel_mid_dma.c | 6 +++--- drivers/dma/mxs-dma.c | 6 +++--- drivers/dma/ste_dma40.c | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 003220a60bcb..49ecbbb8932d 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1328,7 +1328,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( int ret, tmp; dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", - __func__, sgl->length, plchan->name); + __func__, sg_dma_len(sgl), plchan->name); txd = pl08x_get_txd(plchan, flags); if (!txd) { diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c index dc89455f5550..c0b650c70bbd 100644 --- a/drivers/dma/coh901318.c +++ b/drivers/dma/coh901318.c @@ -1040,7 +1040,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, if (!sgl) goto out; - if (sgl->length == 0) + if (sg_dma_len(sgl) == 0) goto out; spin_lock_irqsave(&cohc->lock, flg); diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index bb787d8e1529..fcfeb3cd8d31 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c @@ -227,7 +227,7 @@ static inline int imxdma_sg_next(struct imxdma_desc *d) struct scatterlist *sg = d->sg; unsigned long now; - now = min(d->len, sg->length); + now = min(d->len, sg_dma_len(sg)); if (d->len != IMX_DMA_LENGTH_LOOP) d->len -= now; @@ -763,16 +763,16 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg( desc = list_first_entry(&imxdmac->ld_free, struct imxdma_desc, node); for_each_sg(sgl, sg, sg_len, i) { - dma_length += sg->length; + dma_length += sg_dma_len(sg); } switch (imxdmac->word_size) { case DMA_SLAVE_BUSWIDTH_4_BYTES: - if (sgl->length & 3 || sgl->dma_address & 3) + if (sg_dma_len(sgl) & 3 || sgl->dma_address & 3) return NULL; break; case DMA_SLAVE_BUSWIDTH_2_BYTES: - if (sgl->length & 1 || sgl->dma_address & 1) + if (sg_dma_len(sgl) & 1 || sgl->dma_address & 1) return NULL; break; case DMA_SLAVE_BUSWIDTH_1_BYTE: @@ -831,13 +831,13 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic( imxdmac->sg_list[i].page_link = 0; imxdmac->sg_list[i].offset = 0; imxdmac->sg_list[i].dma_address = dma_addr; - imxdmac->sg_list[i].length = period_len; + sg_dma_len(&imxdmac->sg_list[i]) = period_len; dma_addr += period_len; } /* close the loop */ imxdmac->sg_list[periods].offset = 0; - imxdmac->sg_list[periods].length = 0; + sg_dma_len(&imxdmac->sg_list[periods]) = 0; imxdmac->sg_list[periods].page_link = ((unsigned long)imxdmac->sg_list | 0x01) & ~0x02; diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 5a457777f5c0..cd0619a897ff 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -941,7 +941,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg( bd->buffer_addr = sg->dma_address; - count = sg->length; + count = sg_dma_len(sg); if (count > 0xffff) { dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n", diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c index d0ef5937fbf6..222e907bfaaa 100644 --- a/drivers/dma/intel_mid_dma.c +++ b/drivers/dma/intel_mid_dma.c @@ -394,7 +394,7 @@ static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc, } } /*Populate CTL_HI values*/ - ctl_hi.ctlx.block_ts = get_block_ts(sg->length, + ctl_hi.ctlx.block_ts = get_block_ts(sg_dma_len(sg), desc->width, midc->dma->block_size); /*Populate SAR and DAR values*/ @@ -747,7 +747,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg( txd = intel_mid_dma_prep_memcpy(chan, mids->dma_slave.dst_addr, mids->dma_slave.src_addr, - sgl->length, + sg_dma_len(sgl), flags); return txd; } else { @@ -759,7 +759,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg( pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n", sg_len, direction, flags); - txd = intel_mid_dma_prep_memcpy(chan, 0, 0, sgl->length, flags); + txd = intel_mid_dma_prep_memcpy(chan, 0, 0, sg_dma_len(sgl), flags); if (NULL == txd) { pr_err("MDMA: Prep memcpy failed\n"); return NULL; diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 655d4ce6ed0d..3db3a48d3f01 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -415,9 +415,9 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->bits |= BF_CCW(MXS_DMA_CMD_NO_XFER, COMMAND); } else { for_each_sg(sgl, sg, sg_len, i) { - if (sg->length > MAX_XFER_BYTES) { + if (sg_dma_len(sg) > MAX_XFER_BYTES) { dev_err(mxs_dma->dma_device.dev, "maximum bytes for sg entry exceeded: %d > %d\n", - sg->length, MAX_XFER_BYTES); + sg_dma_len(sg), MAX_XFER_BYTES); goto err_out; } @@ -425,7 +425,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->next = mxs_chan->ccw_phys + sizeof(*ccw) * idx; ccw->bufaddr = sg->dma_address; - ccw->xfer_bytes = sg->length; + ccw->xfer_bytes = sg_dma_len(sg); ccw->bits = 0; ccw->bits |= CCW_CHAIN; diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 2ed1ac3513f3..000d309602b2 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2362,7 +2362,7 @@ dma40_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr, } sg[periods].offset = 0; - sg[periods].length = 0; + sg_dma_len(&sg[periods]) = 0; sg[periods].page_link = ((unsigned long)sg | 0x01) & ~0x02; -- cgit v1.2.2 From 2ccaef0520d18d0072153f090d4110b4075c332c Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Fri, 11 May 2012 15:14:27 +0800 Subject: dma: imx-sdma: make channel0 operations atomic device_prep_dma_cyclic may be call in audio trigger function which is atomic context, so we make it atomic too. - change channel0 lock to spinlock. - Use polling to wait for channel0 finish running. Signed-off-by: Richard Zhao Acked-by: Shawn Guo Signed-off-by: Vinod Koul --- drivers/dma/imx-sdma.c | 57 +++++++++++++++++++++++++++----------------------- 1 file changed, 31 insertions(+), 26 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index cd0619a897ff..a472a29d8497 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -324,7 +324,7 @@ struct sdma_engine { dma_addr_t context_phys; struct dma_device dma_device; struct clk *clk; - struct mutex channel_0_lock; + spinlock_t channel_0_lock; struct sdma_script_start_addrs *script_addrs; }; @@ -402,19 +402,27 @@ static void sdma_enable_channel(struct sdma_engine *sdma, int channel) } /* - * sdma_run_channel - run a channel and wait till it's done + * sdma_run_channel0 - run a channel and wait till it's done */ -static int sdma_run_channel(struct sdma_channel *sdmac) +static int sdma_run_channel0(struct sdma_engine *sdma) { - struct sdma_engine *sdma = sdmac->sdma; - int channel = sdmac->channel; int ret; + unsigned long timeout = 500; - init_completion(&sdmac->done); + sdma_enable_channel(sdma, 0); - sdma_enable_channel(sdma, channel); + while (!(ret = readl_relaxed(sdma->regs + SDMA_H_INTR) & 1)) { + if (timeout-- <= 0) + break; + udelay(1); + } - ret = wait_for_completion_timeout(&sdmac->done, HZ); + if (ret) { + /* Clear the interrupt status */ + writel_relaxed(ret, sdma->regs + SDMA_H_INTR); + } else { + dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); + } return ret ? 0 : -ETIMEDOUT; } @@ -426,17 +434,17 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, void *buf_virt; dma_addr_t buf_phys; int ret; - - mutex_lock(&sdma->channel_0_lock); + unsigned long flags; buf_virt = dma_alloc_coherent(NULL, size, &buf_phys, GFP_KERNEL); if (!buf_virt) { - ret = -ENOMEM; - goto err_out; + return -ENOMEM; } + spin_lock_irqsave(&sdma->channel_0_lock, flags); + bd0->mode.command = C0_SETPM; bd0->mode.status = BD_DONE | BD_INTR | BD_WRAP | BD_EXTD; bd0->mode.count = size / 2; @@ -445,12 +453,11 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, memcpy(buf_virt, buf, size); - ret = sdma_run_channel(&sdma->channel[0]); + ret = sdma_run_channel0(sdma); - dma_free_coherent(NULL, size, buf_virt, buf_phys); + spin_unlock_irqrestore(&sdma->channel_0_lock, flags); -err_out: - mutex_unlock(&sdma->channel_0_lock); + dma_free_coherent(NULL, size, buf_virt, buf_phys); return ret; } @@ -541,10 +548,6 @@ static void sdma_tasklet(unsigned long data) complete(&sdmac->done); - /* not interested in channel 0 interrupts */ - if (sdmac->channel == 0) - return; - if (sdmac->flags & IMX_DMA_SG_LOOP) sdma_handle_channel_loop(sdmac); else @@ -557,6 +560,8 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id) unsigned long stat; stat = readl_relaxed(sdma->regs + SDMA_H_INTR); + /* not interested in channel 0 interrupts */ + stat &= ~1; writel_relaxed(stat, sdma->regs + SDMA_H_INTR); while (stat) { @@ -662,6 +667,7 @@ static int sdma_load_context(struct sdma_channel *sdmac) struct sdma_context_data *context = sdma->context; struct sdma_buffer_descriptor *bd0 = sdma->channel[0].bd; int ret; + unsigned long flags; if (sdmac->direction == DMA_DEV_TO_MEM) { load_address = sdmac->pc_from_device; @@ -679,7 +685,7 @@ static int sdma_load_context(struct sdma_channel *sdmac) dev_dbg(sdma->dev, "event_mask0 = 0x%08x\n", (u32)sdmac->event_mask[0]); dev_dbg(sdma->dev, "event_mask1 = 0x%08x\n", (u32)sdmac->event_mask[1]); - mutex_lock(&sdma->channel_0_lock); + spin_lock_irqsave(&sdma->channel_0_lock, flags); memset(context, 0, sizeof(*context)); context->channel_state.pc = load_address; @@ -698,10 +704,9 @@ static int sdma_load_context(struct sdma_channel *sdmac) bd0->mode.count = sizeof(*context) / 4; bd0->buffer_addr = sdma->context_phys; bd0->ext_buffer_addr = 2048 + (sizeof(*context) / 4) * channel; + ret = sdma_run_channel0(sdma); - ret = sdma_run_channel(&sdma->channel[0]); - - mutex_unlock(&sdma->channel_0_lock); + spin_unlock_irqrestore(&sdma->channel_0_lock, flags); return ret; } @@ -1300,7 +1305,7 @@ static int __init sdma_probe(struct platform_device *pdev) if (!sdma) return -ENOMEM; - mutex_init(&sdma->channel_0_lock); + spin_lock_init(&sdma->channel_0_lock); sdma->dev = &pdev->dev; -- cgit v1.2.2 From 7ccfe9b1d58ef5cf8fdbd50b6ee2ae0e9aa9cb36 Mon Sep 17 00:00:00 2001 From: Michel JAOUEN Date: Mon, 7 May 2012 15:02:03 +0200 Subject: mfd: Support of hierachical interrupt for ab8500 Hierarchical interrupt is supported since ab8500 V2. However, it is not implemented in the ab8500-core driver. With the current implementation, when an ab9540 interrupt occurs, 17 Latch registers are read through i2c. With hierarchical interrupt implementation, there are only 4 i2c accesses. Signed-off-by: Maxime Coquelin Reviewed-by: Michel Jaouen Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-core.c | 108 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 105 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 08850f0d1523..6a59919fc331 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -91,6 +91,15 @@ #define AB8500_IT_MASK23_REG 0x56 #define AB8500_IT_MASK24_REG 0x57 +/* + * latch hierarchy registers + */ +#define AB8500_IT_LATCHHIER1_REG 0x60 +#define AB8500_IT_LATCHHIER2_REG 0x61 +#define AB8500_IT_LATCHHIER3_REG 0x62 + +#define AB8500_IT_LATCHHIER_NUM 3 + #define AB8500_REV_REG 0x80 #define AB8500_IC_NAME_REG 0x82 #define AB8500_SWITCH_OFF_STATUS 0x00 @@ -340,6 +349,90 @@ static struct irq_chip ab8500_irq_chip = { .irq_unmask = ab8500_irq_unmask, }; +static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, + int latch_offset, u8 latch_val) +{ + int int_bit = __ffs(latch_val); + int line, i; + + do { + int_bit = __ffs(latch_val); + + for (i = 0; i < ab8500->mask_size; i++) + if (ab8500->irq_reg_offset[i] == latch_offset) + break; + + if (i >= ab8500->mask_size) { + dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", + latch_offset); + return -ENXIO; + } + + line = (i << 3) + int_bit; + latch_val &= ~(1 << int_bit); + + handle_nested_irq(ab8500->irq_base + line); + } while (latch_val); + + return 0; +} + +static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, + int hier_offset, u8 hier_val) +{ + int latch_bit, status; + u8 latch_offset, latch_val; + + do { + latch_bit = __ffs(hier_val); + latch_offset = (hier_offset << 3) + latch_bit; + + /* Fix inconsistent ITFromLatch25 bit mapping... */ + if (unlikely(latch_offset == 17)) + latch_offset = 24; + + status = get_register_interruptible(ab8500, + AB8500_INTERRUPT, + AB8500_IT_LATCH1_REG + latch_offset, + &latch_val); + if (status < 0 || latch_val == 0) + goto discard; + + status = ab8500_handle_hierarchical_line(ab8500, + latch_offset, latch_val); + if (status < 0) + return status; +discard: + hier_val &= ~(1 << latch_bit); + } while (hier_val); + + return 0; +} + +static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) +{ + struct ab8500 *ab8500 = dev; + u8 i; + + dev_vdbg(ab8500->dev, "interrupt\n"); + + /* Hierarchical interrupt version */ + for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) { + int status; + u8 hier_val; + + status = get_register_interruptible(ab8500, AB8500_INTERRUPT, + AB8500_IT_LATCHHIER1_REG + i, &hier_val); + if (status < 0 || hier_val == 0) + continue; + + status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); + if (status < 0) + break; + } + return IRQ_HANDLED; +} + static irqreturn_t ab8500_irq(int irq, void *dev) { struct ab8500 *ab8500 = dev; @@ -1179,9 +1272,18 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) if (ret) goto out_freeoldmask; - ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, - IRQF_ONESHOT | IRQF_NO_SUSPEND, - "ab8500", ab8500); + /* Activate this feature only in ab9540 */ + /* till tests are done on ab8500 1p2 or later*/ + if (is_ab9540(ab8500)) + ret = request_threaded_irq(ab8500->irq, NULL, + ab8500_hierarchical_irq, + IRQF_ONESHOT | IRQF_NO_SUSPEND, + "ab8500", ab8500); + else + ret = request_threaded_irq(ab8500->irq, NULL, + ab8500_irq, + IRQF_ONESHOT | IRQF_NO_SUSPEND, + "ab8500", ab8500); if (ret) goto out_removeirq; } -- cgit v1.2.2 From 2a96536e77b43cf1e70ab3ad8b46b98ab52b56c1 Mon Sep 17 00:00:00 2001 From: KyongHo Cho Date: Sat, 12 May 2012 05:56:09 +0900 Subject: iommu/exynos: Add iommu driver for EXYNOS Platforms This is the System MMU driver and IOMMU API implementation for EXYNOS SoC platforms. EXYNOS platforms has more than 10 System MMUs dedicated for each multimedia accelerators. The System MMU driver is already in arc/arm/plat-s5p but it is moved to drivers/iommu due to Ohad Ben-Cohen gathered IOMMU drivers there. Any device driver in EXYNOS platforms that needs to control its System MMU must call platform_set_sysmmu() to inform System MMU driver who will control it. platform_set_sysmmu() is defined in Signed-off-by: KyongHo Cho Acked-by: Joerg Roedel Signed-off-by: Kukjin Kim --- drivers/iommu/Kconfig | 21 + drivers/iommu/Makefile | 1 + drivers/iommu/exynos-iommu.c | 1076 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1098 insertions(+) create mode 100644 drivers/iommu/exynos-iommu.c (limited to 'drivers') diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 3bd9fff5c589..23db79205fd7 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -162,4 +162,25 @@ config TEGRA_IOMMU_SMMU space through the SMMU (System Memory Management Unit) hardware included on Tegra SoCs. +config EXYNOS_IOMMU + bool "Exynos IOMMU Support" + depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU + select IOMMU_API + help + Support for the IOMMU(System MMU) of Samsung Exynos application + processor family. This enables H/W multimedia accellerators to see + non-linear physical memory chunks as a linear memory in their + address spaces + + If unsure, say N here. + +config EXYNOS_IOMMU_DEBUG + bool "Debugging log for Exynos IOMMU" + depends on EXYNOS_IOMMU + help + Select this to see the detailed log message that shows what + happens in the IOMMU driver + + Say N unless you need kernel log message for IOMMU debugging + endif # IOMMU_SUPPORT diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index 7ad7a3bc1242..d06dec6a84b4 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o +obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c new file mode 100644 index 000000000000..9a114b9ff170 --- /dev/null +++ b/drivers/iommu/exynos-iommu.c @@ -0,0 +1,1076 @@ +/* linux/drivers/iommu/exynos_iommu.c + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifdef CONFIG_EXYNOS_IOMMU_DEBUG +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +/* We does not consider super section mapping (16MB) */ +#define SECT_ORDER 20 +#define LPAGE_ORDER 16 +#define SPAGE_ORDER 12 + +#define SECT_SIZE (1 << SECT_ORDER) +#define LPAGE_SIZE (1 << LPAGE_ORDER) +#define SPAGE_SIZE (1 << SPAGE_ORDER) + +#define SECT_MASK (~(SECT_SIZE - 1)) +#define LPAGE_MASK (~(LPAGE_SIZE - 1)) +#define SPAGE_MASK (~(SPAGE_SIZE - 1)) + +#define lv1ent_fault(sent) (((*(sent) & 3) == 0) || ((*(sent) & 3) == 3)) +#define lv1ent_page(sent) ((*(sent) & 3) == 1) +#define lv1ent_section(sent) ((*(sent) & 3) == 2) + +#define lv2ent_fault(pent) ((*(pent) & 3) == 0) +#define lv2ent_small(pent) ((*(pent) & 2) == 2) +#define lv2ent_large(pent) ((*(pent) & 3) == 1) + +#define section_phys(sent) (*(sent) & SECT_MASK) +#define section_offs(iova) ((iova) & 0xFFFFF) +#define lpage_phys(pent) (*(pent) & LPAGE_MASK) +#define lpage_offs(iova) ((iova) & 0xFFFF) +#define spage_phys(pent) (*(pent) & SPAGE_MASK) +#define spage_offs(iova) ((iova) & 0xFFF) + +#define lv1ent_offset(iova) ((iova) >> SECT_ORDER) +#define lv2ent_offset(iova) (((iova) & 0xFF000) >> SPAGE_ORDER) + +#define NUM_LV1ENTRIES 4096 +#define NUM_LV2ENTRIES 256 + +#define LV2TABLE_SIZE (NUM_LV2ENTRIES * sizeof(long)) + +#define SPAGES_PER_LPAGE (LPAGE_SIZE / SPAGE_SIZE) + +#define lv2table_base(sent) (*(sent) & 0xFFFFFC00) + +#define mk_lv1ent_sect(pa) ((pa) | 2) +#define mk_lv1ent_page(pa) ((pa) | 1) +#define mk_lv2ent_lpage(pa) ((pa) | 1) +#define mk_lv2ent_spage(pa) ((pa) | 2) + +#define CTRL_ENABLE 0x5 +#define CTRL_BLOCK 0x7 +#define CTRL_DISABLE 0x0 + +#define REG_MMU_CTRL 0x000 +#define REG_MMU_CFG 0x004 +#define REG_MMU_STATUS 0x008 +#define REG_MMU_FLUSH 0x00C +#define REG_MMU_FLUSH_ENTRY 0x010 +#define REG_PT_BASE_ADDR 0x014 +#define REG_INT_STATUS 0x018 +#define REG_INT_CLEAR 0x01C + +#define REG_PAGE_FAULT_ADDR 0x024 +#define REG_AW_FAULT_ADDR 0x028 +#define REG_AR_FAULT_ADDR 0x02C +#define REG_DEFAULT_SLAVE_ADDR 0x030 + +#define REG_MMU_VERSION 0x034 + +#define REG_PB0_SADDR 0x04C +#define REG_PB0_EADDR 0x050 +#define REG_PB1_SADDR 0x054 +#define REG_PB1_EADDR 0x058 + +static unsigned long *section_entry(unsigned long *pgtable, unsigned long iova) +{ + return pgtable + lv1ent_offset(iova); +} + +static unsigned long *page_entry(unsigned long *sent, unsigned long iova) +{ + return (unsigned long *)__va(lv2table_base(sent)) + lv2ent_offset(iova); +} + +enum exynos_sysmmu_inttype { + SYSMMU_PAGEFAULT, + SYSMMU_AR_MULTIHIT, + SYSMMU_AW_MULTIHIT, + SYSMMU_BUSERROR, + SYSMMU_AR_SECURITY, + SYSMMU_AR_ACCESS, + SYSMMU_AW_SECURITY, + SYSMMU_AW_PROTECTION, /* 7 */ + SYSMMU_FAULT_UNKNOWN, + SYSMMU_FAULTS_NUM +}; + +/* + * @itype: type of fault. + * @pgtable_base: the physical address of page table base. This is 0 if @itype + * is SYSMMU_BUSERROR. + * @fault_addr: the device (virtual) address that the System MMU tried to + * translated. This is 0 if @itype is SYSMMU_BUSERROR. + */ +typedef int (*sysmmu_fault_handler_t)(enum exynos_sysmmu_inttype itype, + unsigned long pgtable_base, unsigned long fault_addr); + +static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = { + REG_PAGE_FAULT_ADDR, + REG_AR_FAULT_ADDR, + REG_AW_FAULT_ADDR, + REG_DEFAULT_SLAVE_ADDR, + REG_AR_FAULT_ADDR, + REG_AR_FAULT_ADDR, + REG_AW_FAULT_ADDR, + REG_AW_FAULT_ADDR +}; + +static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = { + "PAGE FAULT", + "AR MULTI-HIT FAULT", + "AW MULTI-HIT FAULT", + "BUS ERROR", + "AR SECURITY PROTECTION FAULT", + "AR ACCESS PROTECTION FAULT", + "AW SECURITY PROTECTION FAULT", + "AW ACCESS PROTECTION FAULT", + "UNKNOWN FAULT" +}; + +struct exynos_iommu_domain { + struct list_head clients; /* list of sysmmu_drvdata.node */ + unsigned long *pgtable; /* lv1 page table, 16KB */ + short *lv2entcnt; /* free lv2 entry counter for each section */ + spinlock_t lock; /* lock for this structure */ + spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */ +}; + +struct sysmmu_drvdata { + struct list_head node; /* entry of exynos_iommu_domain.clients */ + struct device *sysmmu; /* System MMU's device descriptor */ + struct device *dev; /* Owner of system MMU */ + char *dbgname; + int nsfrs; + void __iomem **sfrbases; + struct clk *clk[2]; + int activations; + rwlock_t lock; + struct iommu_domain *domain; + sysmmu_fault_handler_t fault_handler; + unsigned long pgtable; +}; + +static bool set_sysmmu_active(struct sysmmu_drvdata *data) +{ + /* return true if the System MMU was not active previously + and it needs to be initialized */ + return ++data->activations == 1; +} + +static bool set_sysmmu_inactive(struct sysmmu_drvdata *data) +{ + /* return true if the System MMU is needed to be disabled */ + BUG_ON(data->activations < 1); + return --data->activations == 0; +} + +static bool is_sysmmu_active(struct sysmmu_drvdata *data) +{ + return data->activations > 0; +} + +static void sysmmu_unblock(void __iomem *sfrbase) +{ + __raw_writel(CTRL_ENABLE, sfrbase + REG_MMU_CTRL); +} + +static bool sysmmu_block(void __iomem *sfrbase) +{ + int i = 120; + + __raw_writel(CTRL_BLOCK, sfrbase + REG_MMU_CTRL); + while ((i > 0) && !(__raw_readl(sfrbase + REG_MMU_STATUS) & 1)) + --i; + + if (!(__raw_readl(sfrbase + REG_MMU_STATUS) & 1)) { + sysmmu_unblock(sfrbase); + return false; + } + + return true; +} + +static void __sysmmu_tlb_invalidate(void __iomem *sfrbase) +{ + __raw_writel(0x1, sfrbase + REG_MMU_FLUSH); +} + +static void __sysmmu_tlb_invalidate_entry(void __iomem *sfrbase, + unsigned long iova) +{ + __raw_writel((iova & SPAGE_MASK) | 1, sfrbase + REG_MMU_FLUSH_ENTRY); +} + +static void __sysmmu_set_ptbase(void __iomem *sfrbase, + unsigned long pgd) +{ + __raw_writel(0x1, sfrbase + REG_MMU_CFG); /* 16KB LV1, LRU */ + __raw_writel(pgd, sfrbase + REG_PT_BASE_ADDR); + + __sysmmu_tlb_invalidate(sfrbase); +} + +static void __sysmmu_set_prefbuf(void __iomem *sfrbase, unsigned long base, + unsigned long size, int idx) +{ + __raw_writel(base, sfrbase + REG_PB0_SADDR + idx * 8); + __raw_writel(size - 1 + base, sfrbase + REG_PB0_EADDR + idx * 8); +} + +void exynos_sysmmu_set_prefbuf(struct device *dev, + unsigned long base0, unsigned long size0, + unsigned long base1, unsigned long size1) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + unsigned long flags; + int i; + + BUG_ON((base0 + size0) <= base0); + BUG_ON((size1 > 0) && ((base1 + size1) <= base1)); + + read_lock_irqsave(&data->lock, flags); + if (!is_sysmmu_active(data)) + goto finish; + + for (i = 0; i < data->nsfrs; i++) { + if ((readl(data->sfrbases[i] + REG_MMU_VERSION) >> 28) == 3) { + if (!sysmmu_block(data->sfrbases[i])) + continue; + + if (size1 == 0) { + if (size0 <= SZ_128K) { + base1 = base0; + size1 = size0; + } else { + size1 = size0 - + ALIGN(size0 / 2, SZ_64K); + size0 = size0 - size1; + base1 = base0 + size0; + } + } + + __sysmmu_set_prefbuf( + data->sfrbases[i], base0, size0, 0); + __sysmmu_set_prefbuf( + data->sfrbases[i], base1, size1, 1); + + sysmmu_unblock(data->sfrbases[i]); + } + } +finish: + read_unlock_irqrestore(&data->lock, flags); +} + +static void __set_fault_handler(struct sysmmu_drvdata *data, + sysmmu_fault_handler_t handler) +{ + unsigned long flags; + + write_lock_irqsave(&data->lock, flags); + data->fault_handler = handler; + write_unlock_irqrestore(&data->lock, flags); +} + +void exynos_sysmmu_set_fault_handler(struct device *dev, + sysmmu_fault_handler_t handler) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + + __set_fault_handler(data, handler); +} + +static int default_fault_handler(enum exynos_sysmmu_inttype itype, + unsigned long pgtable_base, unsigned long fault_addr) +{ + unsigned long *ent; + + if ((itype >= SYSMMU_FAULTS_NUM) || (itype < SYSMMU_PAGEFAULT)) + itype = SYSMMU_FAULT_UNKNOWN; + + pr_err("%s occured at 0x%lx(Page table base: 0x%lx)\n", + sysmmu_fault_name[itype], fault_addr, pgtable_base); + + ent = section_entry(__va(pgtable_base), fault_addr); + pr_err("\tLv1 entry: 0x%lx\n", *ent); + + if (lv1ent_page(ent)) { + ent = page_entry(ent, fault_addr); + pr_err("\t Lv2 entry: 0x%lx\n", *ent); + } + + pr_err("Generating Kernel OOPS... because it is unrecoverable.\n"); + + BUG(); + + return 0; +} + +static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id) +{ + /* SYSMMU is in blocked when interrupt occurred. */ + struct sysmmu_drvdata *data = dev_id; + struct resource *irqres; + struct platform_device *pdev; + enum exynos_sysmmu_inttype itype; + unsigned long addr = -1; + + int i, ret = -ENOSYS; + + read_lock(&data->lock); + + WARN_ON(!is_sysmmu_active(data)); + + pdev = to_platform_device(data->sysmmu); + for (i = 0; i < (pdev->num_resources / 2); i++) { + irqres = platform_get_resource(pdev, IORESOURCE_IRQ, i); + if (irqres && ((int)irqres->start == irq)) + break; + } + + if (i == pdev->num_resources) { + itype = SYSMMU_FAULT_UNKNOWN; + } else { + itype = (enum exynos_sysmmu_inttype) + __ffs(__raw_readl(data->sfrbases[i] + REG_INT_STATUS)); + if (WARN_ON(!((itype >= 0) && (itype < SYSMMU_FAULT_UNKNOWN)))) + itype = SYSMMU_FAULT_UNKNOWN; + else + addr = __raw_readl( + data->sfrbases[i] + fault_reg_offset[itype]); + } + + if (data->domain) + ret = report_iommu_fault(data->domain, data->dev, + addr, itype); + + if ((ret == -ENOSYS) && data->fault_handler) { + unsigned long base = data->pgtable; + if (itype != SYSMMU_FAULT_UNKNOWN) + base = __raw_readl( + data->sfrbases[i] + REG_PT_BASE_ADDR); + ret = data->fault_handler(itype, base, addr); + } + + if (!ret && (itype != SYSMMU_FAULT_UNKNOWN)) + __raw_writel(1 << itype, data->sfrbases[i] + REG_INT_CLEAR); + else + dev_dbg(data->sysmmu, "(%s) %s is not handled.\n", + data->dbgname, sysmmu_fault_name[itype]); + + if (itype != SYSMMU_FAULT_UNKNOWN) + sysmmu_unblock(data->sfrbases[i]); + + read_unlock(&data->lock); + + return IRQ_HANDLED; +} + +static bool __exynos_sysmmu_disable(struct sysmmu_drvdata *data) +{ + unsigned long flags; + bool disabled = false; + int i; + + write_lock_irqsave(&data->lock, flags); + + if (!set_sysmmu_inactive(data)) + goto finish; + + for (i = 0; i < data->nsfrs; i++) + __raw_writel(CTRL_DISABLE, data->sfrbases[i] + REG_MMU_CTRL); + + if (data->clk[1]) + clk_disable(data->clk[1]); + if (data->clk[0]) + clk_disable(data->clk[0]); + + disabled = true; + data->pgtable = 0; + data->domain = NULL; +finish: + write_unlock_irqrestore(&data->lock, flags); + + if (disabled) + dev_dbg(data->sysmmu, "(%s) Disabled\n", data->dbgname); + else + dev_dbg(data->sysmmu, "(%s) %d times left to be disabled\n", + data->dbgname, data->activations); + + return disabled; +} + +/* __exynos_sysmmu_enable: Enables System MMU + * + * returns -error if an error occurred and System MMU is not enabled, + * 0 if the System MMU has been just enabled and 1 if System MMU was already + * enabled before. + */ +static int __exynos_sysmmu_enable(struct sysmmu_drvdata *data, + unsigned long pgtable, struct iommu_domain *domain) +{ + int i, ret = 0; + unsigned long flags; + + write_lock_irqsave(&data->lock, flags); + + if (!set_sysmmu_active(data)) { + if (WARN_ON(pgtable != data->pgtable)) { + ret = -EBUSY; + set_sysmmu_inactive(data); + } else { + ret = 1; + } + + dev_dbg(data->sysmmu, "(%s) Already enabled\n", data->dbgname); + goto finish; + } + + if (data->clk[0]) + clk_enable(data->clk[0]); + if (data->clk[1]) + clk_enable(data->clk[1]); + + data->pgtable = pgtable; + + for (i = 0; i < data->nsfrs; i++) { + __sysmmu_set_ptbase(data->sfrbases[i], pgtable); + + if ((readl(data->sfrbases[i] + REG_MMU_VERSION) >> 28) == 3) { + /* System MMU version is 3.x */ + __raw_writel((1 << 12) | (2 << 28), + data->sfrbases[i] + REG_MMU_CFG); + __sysmmu_set_prefbuf(data->sfrbases[i], 0, -1, 0); + __sysmmu_set_prefbuf(data->sfrbases[i], 0, -1, 1); + } + + __raw_writel(CTRL_ENABLE, data->sfrbases[i] + REG_MMU_CTRL); + } + + data->domain = domain; + + dev_dbg(data->sysmmu, "(%s) Enabled\n", data->dbgname); +finish: + write_unlock_irqrestore(&data->lock, flags); + + return ret; +} + +int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + int ret; + + BUG_ON(!memblock_is_memory(pgtable)); + + ret = pm_runtime_get_sync(data->sysmmu); + if (ret < 0) { + dev_dbg(data->sysmmu, "(%s) Failed to enable\n", data->dbgname); + return ret; + } + + ret = __exynos_sysmmu_enable(data, pgtable, NULL); + if (WARN_ON(ret < 0)) { + pm_runtime_put(data->sysmmu); + dev_err(data->sysmmu, + "(%s) Already enabled with page table %#lx\n", + data->dbgname, data->pgtable); + } else { + data->dev = dev; + } + + return ret; +} + +bool exynos_sysmmu_disable(struct device *dev) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + bool disabled; + + disabled = __exynos_sysmmu_disable(data); + pm_runtime_put(data->sysmmu); + + return disabled; +} + +static void sysmmu_tlb_invalidate_entry(struct device *dev, unsigned long iova) +{ + unsigned long flags; + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + + read_lock_irqsave(&data->lock, flags); + + if (is_sysmmu_active(data)) { + int i; + for (i = 0; i < data->nsfrs; i++) { + if (sysmmu_block(data->sfrbases[i])) { + __sysmmu_tlb_invalidate_entry( + data->sfrbases[i], iova); + sysmmu_unblock(data->sfrbases[i]); + } + } + } else { + dev_dbg(data->sysmmu, + "(%s) Disabled. Skipping invalidating TLB.\n", + data->dbgname); + } + + read_unlock_irqrestore(&data->lock, flags); +} + +void exynos_sysmmu_tlb_invalidate(struct device *dev) +{ + unsigned long flags; + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + + read_lock_irqsave(&data->lock, flags); + + if (is_sysmmu_active(data)) { + int i; + for (i = 0; i < data->nsfrs; i++) { + if (sysmmu_block(data->sfrbases[i])) { + __sysmmu_tlb_invalidate(data->sfrbases[i]); + sysmmu_unblock(data->sfrbases[i]); + } + } + } else { + dev_dbg(data->sysmmu, + "(%s) Disabled. Skipping invalidating TLB.\n", + data->dbgname); + } + + read_unlock_irqrestore(&data->lock, flags); +} + +static int exynos_sysmmu_probe(struct platform_device *pdev) +{ + int i, ret; + struct device *dev; + struct sysmmu_drvdata *data; + + dev = &pdev->dev; + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + dev_dbg(dev, "Not enough memory\n"); + ret = -ENOMEM; + goto err_alloc; + } + + ret = dev_set_drvdata(dev, data); + if (ret) { + dev_dbg(dev, "Unabled to initialize driver data\n"); + goto err_init; + } + + data->nsfrs = pdev->num_resources / 2; + data->sfrbases = kmalloc(sizeof(*data->sfrbases) * data->nsfrs, + GFP_KERNEL); + if (data->sfrbases == NULL) { + dev_dbg(dev, "Not enough memory\n"); + ret = -ENOMEM; + goto err_init; + } + + for (i = 0; i < data->nsfrs; i++) { + struct resource *res; + res = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!res) { + dev_dbg(dev, "Unable to find IOMEM region\n"); + ret = -ENOENT; + goto err_res; + } + + data->sfrbases[i] = ioremap(res->start, resource_size(res)); + if (!data->sfrbases[i]) { + dev_dbg(dev, "Unable to map IOMEM @ PA:%#x\n", + res->start); + ret = -ENOENT; + goto err_res; + } + } + + for (i = 0; i < data->nsfrs; i++) { + ret = platform_get_irq(pdev, i); + if (ret <= 0) { + dev_dbg(dev, "Unable to find IRQ resource\n"); + goto err_irq; + } + + ret = request_irq(ret, exynos_sysmmu_irq, 0, + dev_name(dev), data); + if (ret) { + dev_dbg(dev, "Unabled to register interrupt handler\n"); + goto err_irq; + } + } + + if (dev_get_platdata(dev)) { + char *deli, *beg; + struct sysmmu_platform_data *platdata = dev_get_platdata(dev); + + beg = platdata->clockname; + + for (deli = beg; (*deli != '\0') && (*deli != ','); deli++) + /* NOTHING */; + + if (*deli == '\0') + deli = NULL; + else + *deli = '\0'; + + data->clk[0] = clk_get(dev, beg); + if (IS_ERR(data->clk[0])) { + data->clk[0] = NULL; + dev_dbg(dev, "No clock descriptor registered\n"); + } + + if (data->clk[0] && deli) { + *deli = ','; + data->clk[1] = clk_get(dev, deli + 1); + if (IS_ERR(data->clk[1])) + data->clk[1] = NULL; + } + + data->dbgname = platdata->dbgname; + } + + data->sysmmu = dev; + rwlock_init(&data->lock); + INIT_LIST_HEAD(&data->node); + + __set_fault_handler(data, &default_fault_handler); + + if (dev->parent) + pm_runtime_enable(dev); + + dev_dbg(dev, "(%s) Initialized\n", data->dbgname); + return 0; +err_irq: + while (i-- > 0) { + int irq; + + irq = platform_get_irq(pdev, i); + free_irq(irq, data); + } +err_res: + while (data->nsfrs-- > 0) + iounmap(data->sfrbases[data->nsfrs]); + kfree(data->sfrbases); +err_init: + kfree(data); +err_alloc: + dev_err(dev, "Failed to initialize\n"); + return ret; +} + +static struct platform_driver exynos_sysmmu_driver = { + .probe = exynos_sysmmu_probe, + .driver = { + .owner = THIS_MODULE, + .name = "exynos-sysmmu", + } +}; + +static inline void pgtable_flush(void *vastart, void *vaend) +{ + dmac_flush_range(vastart, vaend); + outer_flush_range(virt_to_phys(vastart), + virt_to_phys(vaend)); +} + +static int exynos_iommu_domain_init(struct iommu_domain *domain) +{ + struct exynos_iommu_domain *priv; + + priv = kzalloc(sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->pgtable = (unsigned long *)__get_free_pages( + GFP_KERNEL | __GFP_ZERO, 2); + if (!priv->pgtable) + goto err_pgtable; + + priv->lv2entcnt = (short *)__get_free_pages( + GFP_KERNEL | __GFP_ZERO, 1); + if (!priv->lv2entcnt) + goto err_counter; + + pgtable_flush(priv->pgtable, priv->pgtable + NUM_LV1ENTRIES); + + spin_lock_init(&priv->lock); + spin_lock_init(&priv->pgtablelock); + INIT_LIST_HEAD(&priv->clients); + + domain->priv = priv; + return 0; + +err_counter: + free_pages((unsigned long)priv->pgtable, 2); +err_pgtable: + kfree(priv); + return -ENOMEM; +} + +static void exynos_iommu_domain_destroy(struct iommu_domain *domain) +{ + struct exynos_iommu_domain *priv = domain->priv; + struct sysmmu_drvdata *data; + unsigned long flags; + int i; + + WARN_ON(!list_empty(&priv->clients)); + + spin_lock_irqsave(&priv->lock, flags); + + list_for_each_entry(data, &priv->clients, node) { + while (!exynos_sysmmu_disable(data->dev)) + ; /* until System MMU is actually disabled */ + } + + spin_unlock_irqrestore(&priv->lock, flags); + + for (i = 0; i < NUM_LV1ENTRIES; i++) + if (lv1ent_page(priv->pgtable + i)) + kfree(__va(lv2table_base(priv->pgtable + i))); + + free_pages((unsigned long)priv->pgtable, 2); + free_pages((unsigned long)priv->lv2entcnt, 1); + kfree(domain->priv); + domain->priv = NULL; +} + +static int exynos_iommu_attach_device(struct iommu_domain *domain, + struct device *dev) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + struct exynos_iommu_domain *priv = domain->priv; + unsigned long flags; + int ret; + + ret = pm_runtime_get_sync(data->sysmmu); + if (ret < 0) + return ret; + + ret = 0; + + spin_lock_irqsave(&priv->lock, flags); + + ret = __exynos_sysmmu_enable(data, __pa(priv->pgtable), domain); + + if (ret == 0) { + /* 'data->node' must not be appeared in priv->clients */ + BUG_ON(!list_empty(&data->node)); + data->dev = dev; + list_add_tail(&data->node, &priv->clients); + } + + spin_unlock_irqrestore(&priv->lock, flags); + + if (ret < 0) { + dev_err(dev, "%s: Failed to attach IOMMU with pgtable %#lx\n", + __func__, __pa(priv->pgtable)); + pm_runtime_put(data->sysmmu); + } else if (ret > 0) { + dev_dbg(dev, "%s: IOMMU with pgtable 0x%lx already attached\n", + __func__, __pa(priv->pgtable)); + } else { + dev_dbg(dev, "%s: Attached new IOMMU with pgtable 0x%lx\n", + __func__, __pa(priv->pgtable)); + } + + return ret; +} + +static void exynos_iommu_detach_device(struct iommu_domain *domain, + struct device *dev) +{ + struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); + struct exynos_iommu_domain *priv = domain->priv; + struct list_head *pos; + unsigned long flags; + bool found = false; + + spin_lock_irqsave(&priv->lock, flags); + + list_for_each(pos, &priv->clients) { + if (list_entry(pos, struct sysmmu_drvdata, node) == data) { + found = true; + break; + } + } + + if (!found) + goto finish; + + if (__exynos_sysmmu_disable(data)) { + dev_dbg(dev, "%s: Detached IOMMU with pgtable %#lx\n", + __func__, __pa(priv->pgtable)); + list_del(&data->node); + INIT_LIST_HEAD(&data->node); + + } else { + dev_dbg(dev, "%s: Detaching IOMMU with pgtable %#lx delayed", + __func__, __pa(priv->pgtable)); + } + +finish: + spin_unlock_irqrestore(&priv->lock, flags); + + if (found) + pm_runtime_put(data->sysmmu); +} + +static unsigned long *alloc_lv2entry(unsigned long *sent, unsigned long iova, + short *pgcounter) +{ + if (lv1ent_fault(sent)) { + unsigned long *pent; + + pent = kzalloc(LV2TABLE_SIZE, GFP_ATOMIC); + BUG_ON((unsigned long)pent & (LV2TABLE_SIZE - 1)); + if (!pent) + return NULL; + + *sent = mk_lv1ent_page(__pa(pent)); + *pgcounter = NUM_LV2ENTRIES; + pgtable_flush(pent, pent + NUM_LV2ENTRIES); + pgtable_flush(sent, sent + 1); + } + + return page_entry(sent, iova); +} + +static int lv1set_section(unsigned long *sent, phys_addr_t paddr, short *pgcnt) +{ + if (lv1ent_section(sent)) + return -EADDRINUSE; + + if (lv1ent_page(sent)) { + if (*pgcnt != NUM_LV2ENTRIES) + return -EADDRINUSE; + + kfree(page_entry(sent, 0)); + + *pgcnt = 0; + } + + *sent = mk_lv1ent_sect(paddr); + + pgtable_flush(sent, sent + 1); + + return 0; +} + +static int lv2set_page(unsigned long *pent, phys_addr_t paddr, size_t size, + short *pgcnt) +{ + if (size == SPAGE_SIZE) { + if (!lv2ent_fault(pent)) + return -EADDRINUSE; + + *pent = mk_lv2ent_spage(paddr); + pgtable_flush(pent, pent + 1); + *pgcnt -= 1; + } else { /* size == LPAGE_SIZE */ + int i; + for (i = 0; i < SPAGES_PER_LPAGE; i++, pent++) { + if (!lv2ent_fault(pent)) { + memset(pent, 0, sizeof(*pent) * i); + return -EADDRINUSE; + } + + *pent = mk_lv2ent_lpage(paddr); + } + pgtable_flush(pent - SPAGES_PER_LPAGE, pent); + *pgcnt -= SPAGES_PER_LPAGE; + } + + return 0; +} + +static int exynos_iommu_map(struct iommu_domain *domain, unsigned long iova, + phys_addr_t paddr, size_t size, int prot) +{ + struct exynos_iommu_domain *priv = domain->priv; + unsigned long *entry; + unsigned long flags; + int ret = -ENOMEM; + + BUG_ON(priv->pgtable == NULL); + + spin_lock_irqsave(&priv->pgtablelock, flags); + + entry = section_entry(priv->pgtable, iova); + + if (size == SECT_SIZE) { + ret = lv1set_section(entry, paddr, + &priv->lv2entcnt[lv1ent_offset(iova)]); + } else { + unsigned long *pent; + + pent = alloc_lv2entry(entry, iova, + &priv->lv2entcnt[lv1ent_offset(iova)]); + + if (!pent) + ret = -ENOMEM; + else + ret = lv2set_page(pent, paddr, size, + &priv->lv2entcnt[lv1ent_offset(iova)]); + } + + if (ret) { + pr_debug("%s: Failed to map iova 0x%lx/0x%x bytes\n", + __func__, iova, size); + } + + spin_unlock_irqrestore(&priv->pgtablelock, flags); + + return ret; +} + +static size_t exynos_iommu_unmap(struct iommu_domain *domain, + unsigned long iova, size_t size) +{ + struct exynos_iommu_domain *priv = domain->priv; + struct sysmmu_drvdata *data; + unsigned long flags; + unsigned long *ent; + + BUG_ON(priv->pgtable == NULL); + + spin_lock_irqsave(&priv->pgtablelock, flags); + + ent = section_entry(priv->pgtable, iova); + + if (lv1ent_section(ent)) { + BUG_ON(size < SECT_SIZE); + + *ent = 0; + pgtable_flush(ent, ent + 1); + size = SECT_SIZE; + goto done; + } + + if (unlikely(lv1ent_fault(ent))) { + if (size > SECT_SIZE) + size = SECT_SIZE; + goto done; + } + + /* lv1ent_page(sent) == true here */ + + ent = page_entry(ent, iova); + + if (unlikely(lv2ent_fault(ent))) { + size = SPAGE_SIZE; + goto done; + } + + if (lv2ent_small(ent)) { + *ent = 0; + size = SPAGE_SIZE; + priv->lv2entcnt[lv1ent_offset(iova)] += 1; + goto done; + } + + /* lv1ent_large(ent) == true here */ + BUG_ON(size < LPAGE_SIZE); + + memset(ent, 0, sizeof(*ent) * SPAGES_PER_LPAGE); + + size = LPAGE_SIZE; + priv->lv2entcnt[lv1ent_offset(iova)] += SPAGES_PER_LPAGE; +done: + spin_unlock_irqrestore(&priv->pgtablelock, flags); + + spin_lock_irqsave(&priv->lock, flags); + list_for_each_entry(data, &priv->clients, node) + sysmmu_tlb_invalidate_entry(data->dev, iova); + spin_unlock_irqrestore(&priv->lock, flags); + + + return size; +} + +static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain, + unsigned long iova) +{ + struct exynos_iommu_domain *priv = domain->priv; + unsigned long *entry; + unsigned long flags; + phys_addr_t phys = 0; + + spin_lock_irqsave(&priv->pgtablelock, flags); + + entry = section_entry(priv->pgtable, iova); + + if (lv1ent_section(entry)) { + phys = section_phys(entry) + section_offs(iova); + } else if (lv1ent_page(entry)) { + entry = page_entry(entry, iova); + + if (lv2ent_large(entry)) + phys = lpage_phys(entry) + lpage_offs(iova); + else if (lv2ent_small(entry)) + phys = spage_phys(entry) + spage_offs(iova); + } + + spin_unlock_irqrestore(&priv->pgtablelock, flags); + + return phys; +} + +static struct iommu_ops exynos_iommu_ops = { + .domain_init = &exynos_iommu_domain_init, + .domain_destroy = &exynos_iommu_domain_destroy, + .attach_dev = &exynos_iommu_attach_device, + .detach_dev = &exynos_iommu_detach_device, + .map = &exynos_iommu_map, + .unmap = &exynos_iommu_unmap, + .iova_to_phys = &exynos_iommu_iova_to_phys, + .pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE, +}; + +static int __init exynos_iommu_init(void) +{ + int ret; + + ret = platform_driver_register(&exynos_sysmmu_driver); + + if (ret == 0) + bus_set_iommu(&platform_bus_type, &exynos_iommu_ops); + + return ret; +} +subsys_initcall(exynos_iommu_init); -- cgit v1.2.2 From bc3a59c1b7b1c367fec615b872bdb89ac232f62e Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Sat, 31 Mar 2012 21:26:57 +0800 Subject: ARM: mxs: add initial device tree support for imx28-evk board This patch includes basic dt support which can boot via nfs rootfs. Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut --- drivers/clk/mxs/clk-imx28.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index b2a3257d4f66..5be4636c45a6 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -142,6 +142,7 @@ static struct clk_lookup hbus_lookups[] __initdata = { static struct clk_lookup xbus_lookups[] __initdata = { { .dev_id = "duart", .con_id = "apb_pclk"}, + { .dev_id = "80074000.serial", .con_id = "apb_pclk"}, { .dev_id = "mxs-dma-apbx", }, { .dev_id = "80024000.dma-apbx", }, }; -- cgit v1.2.2 From 2954ff395bcf69cb31dbe500bec20ce0944ea19e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 21:33:42 +0800 Subject: ARM: mxs: add initial device tree support for imx23-evk board It adds initial device tree support for imx23-evk board, and only serial console is enabled. Signed-off-by: Shawn Guo Acked-by: Marek Vasut --- drivers/clk/mxs/clk-imx23.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index dcae11285716..07fe1f1b4b70 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -87,6 +87,7 @@ static struct clk_lookup hbus_lookups[] __initdata = { static struct clk_lookup xbus_lookups[] __initdata = { { .dev_id = "duart", .con_id = "apb_pclk"}, + { .dev_id = "80070000.serial", .con_id = "apb_pclk"}, { .dev_id = "mxs-dma-apbx", }, { .dev_id = "80024000.dma-apbx", }, }; -- cgit v1.2.2 From f5b7efccdb057a2cc8ee32c83d2f034e494a1f4a Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 4 May 2012 20:12:15 +0800 Subject: dma: mxs-dma: use global stmp_device functionality This can get rid of the mach-dependency. Cc: Dan Williams Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Wolfram Sang Acked-by: Marek Vasut Acked-by: Vinod Koul --- drivers/dma/Kconfig | 1 + drivers/dma/mxs-dma.c | 26 +++++++++++++------------- 2 files changed, 14 insertions(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index ef378b5b17e4..aadeb5be9dba 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -238,6 +238,7 @@ config IMX_DMA config MXS_DMA bool "MXS DMA support" depends on SOC_IMX23 || SOC_IMX28 + select STMP_DEVICE select DMA_ENGINE help Support the MXS DMA engine. This engine including APBH-DMA diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 655d4ce6ed0d..bd278187fd81 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -23,10 +23,10 @@ #include #include #include +#include #include #include -#include #include "dmaengine.h" @@ -138,10 +138,10 @@ static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan) if (dma_is_apbh() && apbh_is_old()) writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL), - mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); else writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL), - mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET); } static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) @@ -170,10 +170,10 @@ static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan) /* freeze the channel */ if (dma_is_apbh() && apbh_is_old()) writel(1 << chan_id, - mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); else writel(1 << chan_id, - mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET); mxs_chan->status = DMA_PAUSED; } @@ -186,10 +186,10 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan) /* unfreeze the channel */ if (dma_is_apbh() && apbh_is_old()) writel(1 << chan_id, - mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); + mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR); else writel(1 << chan_id, - mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR); + mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_CLR); mxs_chan->status = DMA_IN_PROGRESS; } @@ -220,11 +220,11 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id) /* completion status */ stat1 = readl(mxs_dma->base + HW_APBHX_CTRL1); stat1 &= MXS_DMA_CHANNELS_MASK; - writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + MXS_CLR_ADDR); + writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR); /* error status */ stat2 = readl(mxs_dma->base + HW_APBHX_CTRL2); - writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + MXS_CLR_ADDR); + writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR); /* * When both completion and error of termination bits set at the @@ -567,7 +567,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) if (ret) return ret; - ret = mxs_reset_block(mxs_dma->base); + ret = stmp_reset_block(mxs_dma->base); if (ret) goto err_out; @@ -580,14 +580,14 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) /* enable apbh burst */ if (dma_is_apbh()) { writel(BM_APBH_CTRL0_APB_BURST_EN, - mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); writel(BM_APBH_CTRL0_APB_BURST8_EN, - mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); } /* enable irq for all the channels */ writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS, - mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); + mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET); err_out: clk_disable_unprepare(mxs_dma->clk); -- cgit v1.2.2 From bb11fb63fc2e5d1092f17d91790bb4aede6d3ef2 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 7 May 2012 14:14:08 +0800 Subject: dma: mxs-dma: let dma_is_apbh and apbh_is_old take parameter Let macros dma_is_apbh and apbh_is_old take mxs_dma as parameter to make the code easy to read. Signed-off-by: Shawn Guo --- drivers/dma/mxs-dma.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index bd278187fd81..c93f9fa08caf 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -38,10 +38,10 @@ #define MXS_DMA_APBH 0 #define MXS_DMA_APBX 1 -#define dma_is_apbh() (mxs_dma->dev_id == MXS_DMA_APBH) +#define dma_is_apbh(mxs_dma) ((mxs_dma)->dev_id == MXS_DMA_APBH) #define APBH_VERSION_LATEST 3 -#define apbh_is_old() (mxs_dma->version < APBH_VERSION_LATEST) +#define apbh_is_old(mxs_dma) ((mxs_dma)->version < APBH_VERSION_LATEST) #define HW_APBHX_CTRL0 0x000 #define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) @@ -54,10 +54,14 @@ #define HW_APBH_VERSION (cpu_is_mx23() ? 0x3f0 : 0x800) #define HW_APBX_VERSION 0x800 #define BP_APBHX_VERSION_MAJOR 24 -#define HW_APBHX_CHn_NXTCMDAR(n) \ - (((dma_is_apbh() && apbh_is_old()) ? 0x050 : 0x110) + (n) * 0x70) -#define HW_APBHX_CHn_SEMA(n) \ - (((dma_is_apbh() && apbh_is_old()) ? 0x080 : 0x140) + (n) * 0x70) +/* + * The offset of NXTCMDAR register is different per both dma type and version, + * while stride for each channel is all the same 0x70. + */ +#define HW_APBHX_CHn_NXTCMDAR(d, n) \ + (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70) +#define HW_APBHX_CHn_SEMA(d, n) \ + (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70) /* * ccw bits definitions @@ -136,7 +140,7 @@ static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan) struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; int chan_id = mxs_chan->chan.chan_id; - if (dma_is_apbh() && apbh_is_old()) + if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma)) writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL), mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); else @@ -151,10 +155,10 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) /* set cmd_addr up */ writel(mxs_chan->ccw_phys, - mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(chan_id)); + mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id)); /* write 1 to SEMA to kick off the channel */ - writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(chan_id)); + writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id)); } static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan) @@ -168,7 +172,7 @@ static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan) int chan_id = mxs_chan->chan.chan_id; /* freeze the channel */ - if (dma_is_apbh() && apbh_is_old()) + if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma)) writel(1 << chan_id, mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); else @@ -184,7 +188,7 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan) int chan_id = mxs_chan->chan.chan_id; /* unfreeze the channel */ - if (dma_is_apbh() && apbh_is_old()) + if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma)) writel(1 << chan_id, mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR); else @@ -578,7 +582,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) BP_APBHX_VERSION_MAJOR; /* enable apbh burst */ - if (dma_is_apbh()) { + if (dma_is_apbh(mxs_dma)) { writel(BM_APBH_CTRL0_APB_BURST_EN, mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); writel(BM_APBH_CTRL0_APB_BURST8_EN, -- cgit v1.2.2 From 8c92013643f5c40633d61ae331cef49c1069af10 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 10 May 2012 06:23:26 +0800 Subject: dma: mxs-dma: make platform_device_id more generic Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support other SoCs like imx6q and reform the platform_device_id for the better further dt support. Cc: Dan Williams Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- drivers/clk/mxs/clk-imx23.c | 4 +- drivers/clk/mxs/clk-imx28.c | 4 +- drivers/dma/mxs-dma.c | 115 ++++++++++++++++++++++++++++++-------------- 3 files changed, 83 insertions(+), 40 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 07fe1f1b4b70..96562f5f92f7 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -81,14 +81,14 @@ static struct clk_lookup uart_lookups[] __initdata = { }; static struct clk_lookup hbus_lookups[] __initdata = { - { .dev_id = "mxs-dma-apbh", }, + { .dev_id = "imx23-dma-apbh", }, { .dev_id = "80004000.dma-apbh", }, }; static struct clk_lookup xbus_lookups[] __initdata = { { .dev_id = "duart", .con_id = "apb_pclk"}, { .dev_id = "80070000.serial", .con_id = "apb_pclk"}, - { .dev_id = "mxs-dma-apbx", }, + { .dev_id = "imx23-dma-apbx", }, { .dev_id = "80024000.dma-apbx", }, }; diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index 5be4636c45a6..a7ff4f106ce2 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -136,14 +136,14 @@ static struct clk_lookup uart_lookups[] __initdata = { }; static struct clk_lookup hbus_lookups[] __initdata = { - { .dev_id = "mxs-dma-apbh", }, + { .dev_id = "imx28-dma-apbh", }, { .dev_id = "80004000.dma-apbh", }, }; static struct clk_lookup xbus_lookups[] __initdata = { { .dev_id = "duart", .con_id = "apb_pclk"}, { .dev_id = "80074000.serial", .con_id = "apb_pclk"}, - { .dev_id = "mxs-dma-apbx", }, + { .dev_id = "imx28-dma-apbx", }, { .dev_id = "80024000.dma-apbx", }, }; diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index c93f9fa08caf..b1cab087cd04 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -36,12 +36,8 @@ * dma can program the controller registers of peripheral devices. */ -#define MXS_DMA_APBH 0 -#define MXS_DMA_APBX 1 -#define dma_is_apbh(mxs_dma) ((mxs_dma)->dev_id == MXS_DMA_APBH) - -#define APBH_VERSION_LATEST 3 -#define apbh_is_old(mxs_dma) ((mxs_dma)->version < APBH_VERSION_LATEST) +#define dma_is_apbh(mxs_dma) ((mxs_dma)->type == MXS_DMA_APBH) +#define apbh_is_old(mxs_dma) ((mxs_dma)->dev_id == IMX23_DMA) #define HW_APBHX_CTRL0 0x000 #define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) @@ -51,9 +47,6 @@ #define HW_APBHX_CTRL2 0x020 #define HW_APBHX_CHANNEL_CTRL 0x030 #define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL 16 -#define HW_APBH_VERSION (cpu_is_mx23() ? 0x3f0 : 0x800) -#define HW_APBX_VERSION 0x800 -#define BP_APBHX_VERSION_MAJOR 24 /* * The offset of NXTCMDAR register is different per both dma type and version, * while stride for each channel is all the same 0x70. @@ -125,9 +118,19 @@ struct mxs_dma_chan { #define MXS_DMA_CHANNELS 16 #define MXS_DMA_CHANNELS_MASK 0xffff +enum mxs_dma_devtype { + MXS_DMA_APBH, + MXS_DMA_APBX, +}; + +enum mxs_dma_id { + IMX23_DMA, + IMX28_DMA, +}; + struct mxs_dma_engine { - int dev_id; - unsigned int version; + enum mxs_dma_id dev_id; + enum mxs_dma_devtype type; void __iomem *base; struct clk *clk; struct dma_device dma_device; @@ -135,6 +138,66 @@ struct mxs_dma_engine { struct mxs_dma_chan mxs_chans[MXS_DMA_CHANNELS]; }; +struct mxs_dma_type { + enum mxs_dma_id id; + enum mxs_dma_devtype type; +}; + +static struct mxs_dma_type mxs_dma_types[] = { + { + .id = IMX23_DMA, + .type = MXS_DMA_APBH, + }, { + .id = IMX23_DMA, + .type = MXS_DMA_APBX, + }, { + .id = IMX28_DMA, + .type = MXS_DMA_APBH, + }, { + .id = IMX28_DMA, + .type = MXS_DMA_APBX, + } +}; + +static struct platform_device_id mxs_dma_ids[] = { + { + .name = "imx23-dma-apbh", + .driver_data = (kernel_ulong_t) &mxs_dma_types[0], + }, { + .name = "imx23-dma-apbx", + .driver_data = (kernel_ulong_t) &mxs_dma_types[1], + }, { + .name = "imx28-dma-apbh", + .driver_data = (kernel_ulong_t) &mxs_dma_types[2], + }, { + .name = "imx28-dma-apbx", + .driver_data = (kernel_ulong_t) &mxs_dma_types[3], + }, { + /* end of list */ + } +}; + +static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan) +{ + return container_of(chan, struct mxs_dma_chan, chan); +} + +int mxs_dma_is_apbh(struct dma_chan *chan) +{ + struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); + struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; + + return dma_is_apbh(mxs_dma); +} + +int mxs_dma_is_apbx(struct dma_chan *chan) +{ + struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); + struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; + + return !dma_is_apbh(mxs_dma); +} + static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan) { struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; @@ -198,11 +261,6 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan) mxs_chan->status = DMA_IN_PROGRESS; } -static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan) -{ - return container_of(chan, struct mxs_dma_chan, chan); -} - static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx) { return dma_cookie_assign(tx); @@ -575,12 +633,6 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) if (ret) goto err_out; - /* only major version matters */ - mxs_dma->version = readl(mxs_dma->base + - ((mxs_dma->dev_id == MXS_DMA_APBX) ? - HW_APBX_VERSION : HW_APBH_VERSION)) >> - BP_APBHX_VERSION_MAJOR; - /* enable apbh burst */ if (dma_is_apbh(mxs_dma)) { writel(BM_APBH_CTRL0_APB_BURST_EN, @@ -602,6 +654,8 @@ static int __init mxs_dma_probe(struct platform_device *pdev) { const struct platform_device_id *id_entry = platform_get_device_id(pdev); + const struct mxs_dma_type *dma_type = + (struct mxs_dma_type *)id_entry->driver_data; struct mxs_dma_engine *mxs_dma; struct resource *iores; int ret, i; @@ -610,7 +664,8 @@ static int __init mxs_dma_probe(struct platform_device *pdev) if (!mxs_dma) return -ENOMEM; - mxs_dma->dev_id = id_entry->driver_data; + mxs_dma->dev_id = dma_type->id; + mxs_dma->type = dma_type->type; iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -693,23 +748,11 @@ err_request_region: return ret; } -static struct platform_device_id mxs_dma_type[] = { - { - .name = "mxs-dma-apbh", - .driver_data = MXS_DMA_APBH, - }, { - .name = "mxs-dma-apbx", - .driver_data = MXS_DMA_APBX, - }, { - /* end of list */ - } -}; - static struct platform_driver mxs_dma_driver = { .driver = { .name = "mxs-dma", }, - .id_table = mxs_dma_type, + .id_table = mxs_dma_ids, }; static int __init mxs_dma_module_init(void) -- cgit v1.2.2 From 90c9abc5b74d7f7d8226b5dd0d8b6da3a03fe860 Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 4 May 2012 20:12:17 +0800 Subject: dma: mxs-dma: add device tree probe support Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Dan Williams Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- drivers/dma/mxs-dma.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index b1cab087cd04..1cb9b974493f 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -22,8 +22,11 @@ #include #include #include +#include #include #include +#include +#include #include #include @@ -177,6 +180,15 @@ static struct platform_device_id mxs_dma_ids[] = { } }; +static const struct of_device_id mxs_dma_dt_ids[] = { + { .compatible = "fsl,imx23-dma-apbh", .data = &mxs_dma_ids[0], }, + { .compatible = "fsl,imx23-dma-apbx", .data = &mxs_dma_ids[1], }, + { .compatible = "fsl,imx28-dma-apbh", .data = &mxs_dma_ids[2], }, + { .compatible = "fsl,imx28-dma-apbx", .data = &mxs_dma_ids[3], }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids); + static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan) { return container_of(chan, struct mxs_dma_chan, chan); @@ -652,10 +664,9 @@ err_out: static int __init mxs_dma_probe(struct platform_device *pdev) { - const struct platform_device_id *id_entry = - platform_get_device_id(pdev); - const struct mxs_dma_type *dma_type = - (struct mxs_dma_type *)id_entry->driver_data; + const struct platform_device_id *id_entry; + const struct of_device_id *of_id; + const struct mxs_dma_type *dma_type; struct mxs_dma_engine *mxs_dma; struct resource *iores; int ret, i; @@ -664,8 +675,15 @@ static int __init mxs_dma_probe(struct platform_device *pdev) if (!mxs_dma) return -ENOMEM; - mxs_dma->dev_id = dma_type->id; + of_id = of_match_device(mxs_dma_dt_ids, &pdev->dev); + if (of_id) + id_entry = of_id->data; + else + id_entry = platform_get_device_id(pdev); + + dma_type = (struct mxs_dma_type *)id_entry->driver_data; mxs_dma->type = dma_type->type; + mxs_dma->dev_id = dma_type->id; iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -751,6 +769,7 @@ err_request_region: static struct platform_driver mxs_dma_driver = { .driver = { .name = "mxs-dma", + .of_match_table = mxs_dma_dt_ids, }, .id_table = mxs_dma_ids, }; -- cgit v1.2.2 From 940a4f7b51f7ad600821e389e80d216baf9e1df8 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 10:30:14 +0800 Subject: gpio/mxs: use devm_* helpers to make error handling simple It uses devm_* helpers to make the error handling of probe clean and simple. Signed-off-by: Shawn Guo Acked-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 52 +++++++++++++------------------------------------ 1 file changed, 13 insertions(+), 39 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 385c58e8405b..95a11dba285c 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -186,44 +186,29 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) struct resource *iores = NULL; int err; - port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL); + port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); if (!port) return -ENOMEM; port->id = pdev->id; port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; + port->irq = platform_get_irq(pdev, 0); + if (port->irq < 0) + return port->irq; + /* * map memory region only once, as all the gpio ports * share the same one */ if (!base) { iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!iores) { - err = -ENODEV; - goto out_kfree; - } - - if (!request_mem_region(iores->start, resource_size(iores), - pdev->name)) { - err = -EBUSY; - goto out_kfree; - } - - base = ioremap(iores->start, resource_size(iores)); - if (!base) { - err = -ENOMEM; - goto out_release_mem; - } + base = devm_request_and_ioremap(&pdev->dev, iores); + if (!base) + return -EADDRNOTAVAIL; } port->base = base; - port->irq = platform_get_irq(pdev, 0); - if (port->irq < 0) { - err = -EINVAL; - goto out_iounmap; - } - /* * select the pin interrupt functionality but initially * disable the interrupts @@ -246,29 +231,18 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) port->base + PINCTRL_DOUT(port->id), NULL, port->base + PINCTRL_DOE(port->id), NULL, false); if (err) - goto out_iounmap; + return err; port->bgc.gc.to_irq = mxs_gpio_to_irq; port->bgc.gc.base = port->id * 32; err = gpiochip_add(&port->bgc.gc); - if (err) - goto out_bgpio_remove; + if (err) { + bgpio_remove(&port->bgc); + return err; + } return 0; - -out_bgpio_remove: - bgpio_remove(&port->bgc); -out_iounmap: - if (iores) - iounmap(port->base); -out_release_mem: - if (iores) - release_mem_region(iores->start, resource_size(iores)); -out_kfree: - kfree(port); - dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); - return err; } static struct platform_driver mxs_gpio_driver = { -- cgit v1.2.2 From 164387d2b4ae206f6275f5f6857aee74654918c4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 3 May 2012 23:32:52 +0800 Subject: gpio/mxs: get rid of the use of cpu_is_xxx It removes the use of cpu_is_xxx from gpio-mxs driver and instead use platform_device_id to identify the device. Accordingly, mxs platform code is changed to register gpio device with different names, and the registeration are done in soc specific initialization functions now, so postcore_initcall(mxs_add_mxs_gpio) gets removed. Signed-off-by: Shawn Guo Acked-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 74 ++++++++++++++++++++++++++++++++++--------------- 1 file changed, 52 insertions(+), 22 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 95a11dba285c..38ae56f17916 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -29,19 +29,18 @@ #include #include #include -#include #define MXS_SET 0x4 #define MXS_CLR 0x8 -#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) -#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) -#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10) -#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10) -#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10) -#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10) -#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10) -#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10) +#define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10) +#define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10) +#define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10) +#define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10) +#define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10) +#define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10) +#define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10) +#define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10) #define GPIO_INT_FALL_EDGE 0x0 #define GPIO_INT_LOW_LEV 0x1 @@ -52,14 +51,30 @@ #define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START) +enum mxs_gpio_id { + IMX23_GPIO, + IMX28_GPIO, +}; + struct mxs_gpio_port { void __iomem *base; int id; int irq; int virtual_irq_start; struct bgpio_chip bgc; + enum mxs_gpio_id devid; }; +static inline int is_imx23_gpio(struct mxs_gpio_port *port) +{ + return port->devid == IMX23_GPIO; +} + +static inline int is_imx28_gpio(struct mxs_gpio_port *port) +{ + return port->devid == IMX28_GPIO; +} + /* Note: This driver assumes 32 GPIOs are handled in one register */ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) @@ -89,21 +104,21 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) } /* set level or edge */ - pin_addr = port->base + PINCTRL_IRQLEV(port->id); + pin_addr = port->base + PINCTRL_IRQLEV(port); if (edge & GPIO_INT_LEV_MASK) writel(pin_mask, pin_addr + MXS_SET); else writel(pin_mask, pin_addr + MXS_CLR); /* set polarity */ - pin_addr = port->base + PINCTRL_IRQPOL(port->id); + pin_addr = port->base + PINCTRL_IRQPOL(port); if (edge & GPIO_INT_POL_MASK) writel(pin_mask, pin_addr + MXS_SET); else writel(pin_mask, pin_addr + MXS_CLR); writel(1 << (gpio & 0x1f), - port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); + port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); return 0; } @@ -117,8 +132,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); - irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) & - readl(port->base + PINCTRL_IRQEN(port->id)); + irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) & + readl(port->base + PINCTRL_IRQEN(port)); while (irq_stat != 0) { int irqoffset = fls(irq_stat) - 1; @@ -164,8 +179,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port) ct->chip.irq_unmask = irq_gc_mask_set_bit; ct->chip.irq_set_type = mxs_gpio_set_irq_type; ct->chip.irq_set_wake = mxs_gpio_set_wake_irq; - ct->regs.ack = PINCTRL_IRQSTAT(port->id) + MXS_CLR; - ct->regs.mask = PINCTRL_IRQEN(port->id); + ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR; + ct->regs.mask = PINCTRL_IRQEN(port); irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); } @@ -179,6 +194,19 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) return port->virtual_irq_start + offset; } +static struct platform_device_id mxs_gpio_ids[] = { + { + .name = "imx23-gpio", + .driver_data = IMX23_GPIO, + }, { + .name = "imx28-gpio", + .driver_data = IMX28_GPIO, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mxs_gpio_ids); + static int __devinit mxs_gpio_probe(struct platform_device *pdev) { static void __iomem *base; @@ -191,6 +219,7 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) return -ENOMEM; port->id = pdev->id; + port->devid = pdev->id_entry->driver_data; port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; port->irq = platform_get_irq(pdev, 0); @@ -213,11 +242,11 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) * select the pin interrupt functionality but initially * disable the interrupts */ - writel(~0U, port->base + PINCTRL_PIN2IRQ(port->id)); - writel(0, port->base + PINCTRL_IRQEN(port->id)); + writel(~0U, port->base + PINCTRL_PIN2IRQ(port)); + writel(0, port->base + PINCTRL_IRQEN(port)); /* clear address has to be used to clear IRQSTAT bits */ - writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); + writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); /* gpio-mxs can be a generic irq chip */ mxs_gpio_init_gc(port); @@ -227,9 +256,9 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) irq_set_handler_data(port->irq, port); err = bgpio_init(&port->bgc, &pdev->dev, 4, - port->base + PINCTRL_DIN(port->id), - port->base + PINCTRL_DOUT(port->id), NULL, - port->base + PINCTRL_DOE(port->id), NULL, false); + port->base + PINCTRL_DIN(port), + port->base + PINCTRL_DOUT(port), NULL, + port->base + PINCTRL_DOE(port), NULL, false); if (err) return err; @@ -251,6 +280,7 @@ static struct platform_driver mxs_gpio_driver = { .owner = THIS_MODULE, }, .probe = mxs_gpio_probe, + .id_table = mxs_gpio_ids, }; static int __init mxs_gpio_init(void) -- cgit v1.2.2 From 4052d45e800ce33e1993fb70604941547ed73d26 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 14:29:22 +0800 Subject: gpio/mxs: add device tree probe It adds device tree probe for gpio-mxs driver. Signed-off-by: Shawn Guo Acked-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 36 ++++++++++++++++++++++++++++++++---- 1 file changed, 32 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 38ae56f17916..429228b52acd 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -25,6 +25,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -207,8 +210,19 @@ static struct platform_device_id mxs_gpio_ids[] = { }; MODULE_DEVICE_TABLE(platform, mxs_gpio_ids); +static const struct of_device_id mxs_gpio_dt_ids[] = { + { .compatible = "fsl,imx23-gpio", .data = (void *) IMX23_GPIO, }, + { .compatible = "fsl,imx28-gpio", .data = (void *) IMX28_GPIO, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids); + static int __devinit mxs_gpio_probe(struct platform_device *pdev) { + const struct of_device_id *of_id = + of_match_device(mxs_gpio_dt_ids, &pdev->dev); + struct device_node *np = pdev->dev.of_node; + struct device_node *parent; static void __iomem *base; struct mxs_gpio_port *port; struct resource *iores = NULL; @@ -218,8 +232,15 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) if (!port) return -ENOMEM; - port->id = pdev->id; - port->devid = pdev->id_entry->driver_data; + if (np) { + port->id = of_alias_get_id(np, "gpio"); + if (port->id < 0) + return port->id; + port->devid = (enum mxs_gpio_id) of_id->data; + } else { + port->id = pdev->id; + port->devid = pdev->id_entry->driver_data; + } port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; port->irq = platform_get_irq(pdev, 0); @@ -231,8 +252,14 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev) * share the same one */ if (!base) { - iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_request_and_ioremap(&pdev->dev, iores); + if (np) { + parent = of_get_parent(np); + base = of_iomap(parent, 0); + of_node_put(parent); + } else { + iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_request_and_ioremap(&pdev->dev, iores); + } if (!base) return -EADDRNOTAVAIL; } @@ -278,6 +305,7 @@ static struct platform_driver mxs_gpio_driver = { .driver = { .name = "gpio-mxs", .owner = THIS_MODULE, + .of_match_table = mxs_gpio_dt_ids, }, .probe = mxs_gpio_probe, .id_table = mxs_gpio_ids, -- cgit v1.2.2 From 9df7eadf80caea58b9854a8433cba543dbe3b161 Mon Sep 17 00:00:00 2001 From: Karol Lewandowski Date: Wed, 21 Mar 2012 20:11:51 +0100 Subject: i2c-s3c2410: Drop unused define Use standard of_match_ptr() to avoid defining variable unused in non device tree builds. Signed-off-by: Karol Lewandowski Signed-off-by: Kyungmin Park Acked-by: Grant Likely Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-s3c2410.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 737f7218a32c..85e3664f411e 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -1128,8 +1128,6 @@ static const struct of_device_id s3c24xx_i2c_match[] = { {}, }; MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); -#else -#define s3c24xx_i2c_match NULL #endif static struct platform_driver s3c24xx_i2c_driver = { @@ -1140,7 +1138,7 @@ static struct platform_driver s3c24xx_i2c_driver = { .owner = THIS_MODULE, .name = "s3c-i2c", .pm = S3C24XX_DEV_PM_OPS, - .of_match_table = s3c24xx_i2c_match, + .of_match_table = of_match_ptr(s3c24xx_i2c_match), }, }; -- cgit v1.2.2 From bc414b7b9bbccbdeac80757c03a966578d04a9a2 Mon Sep 17 00:00:00 2001 From: Karol Lewandowski Date: Tue, 27 Mar 2012 11:10:27 +0200 Subject: i2c-pxa: Drop leftover comment Commit 488bf314b ("i2c: Allow i2c_add_numbered_adapter() to assign a bus id") reworked i2c-pxa driver leaving obsolete comment. This commit simply drops it. Signed-off-by: Karol Lewandowski Signed-off-by: Kyungmin Park Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pxa.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index f6733267fa9c..a997c7d3f95d 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -1131,11 +1131,6 @@ static int i2c_pxa_probe(struct platform_device *dev) spin_lock_init(&i2c->lock); init_waitqueue_head(&i2c->wait); - /* - * If "dev->id" is negative we consider it as zero. - * The reason to do so is to avoid sysfs names that only make - * sense when there are multiple adapters. - */ i2c->adap.nr = dev->id; snprintf(i2c->adap.name, sizeof(i2c->adap.name), "pxa_i2c-i2c.%u", i2c->adap.nr); -- cgit v1.2.2 From 44454baa7ca7bb57c47a5564ed2528ba211fe8db Mon Sep 17 00:00:00 2001 From: Karol Lewandowski Date: Tue, 27 Mar 2012 11:10:28 +0200 Subject: i2c: Dynamically assign adapter id if it wasn't explictly specified Commit 488bf314b ("i2c: Allow i2c_add_numbered_adapter() to assign a bus id") reworked i2c_add_numbered_adapter() to call i2c_add_adapter() if requested bus was -1. This allows to simplify driver's initialization procedure by using just one function for static and dynamic adapter id registration. This patch updates few more drivers (missed out in original patch) to use this functionality. Signed-off-by: Karol Lewandowski Signed-off-by: Kyungmin Park Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-gpio.c | 7 +------ drivers/i2c/busses/i2c-pca-platform.c | 2 +- drivers/i2c/busses/i2c-versatile.c | 9 ++------- 3 files changed, 4 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c index c0330a41db03..e62d2d938628 100644 --- a/drivers/i2c/busses/i2c-gpio.c +++ b/drivers/i2c/busses/i2c-gpio.c @@ -190,12 +190,7 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev) adap->dev.parent = &pdev->dev; adap->dev.of_node = pdev->dev.of_node; - /* - * If "dev->id" is negative we consider it as zero. - * The reason to do so is to avoid sysfs names that only make - * sense when there are multiple adapters. - */ - adap->nr = (pdev->id != -1) ? pdev->id : 0; + adap->nr = pdev->id; ret = i2c_bit_add_numbered_bus(adap); if (ret) goto err_add_bus; diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c index 2adbf1a8fdea..675878f49f76 100644 --- a/drivers/i2c/busses/i2c-pca-platform.c +++ b/drivers/i2c/busses/i2c-pca-platform.c @@ -171,7 +171,7 @@ static int __devinit i2c_pca_pf_probe(struct platform_device *pdev) i2c->io_size = resource_size(res); i2c->irq = irq; - i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0; + i2c->adap.nr = pdev->id; i2c->adap.owner = THIS_MODULE; snprintf(i2c->adap.name, sizeof(i2c->adap.name), "PCA9564/PCA9665 at 0x%08lx", diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c index f585aead50cc..eec20db6246f 100644 --- a/drivers/i2c/busses/i2c-versatile.c +++ b/drivers/i2c/busses/i2c-versatile.c @@ -104,13 +104,8 @@ static int i2c_versatile_probe(struct platform_device *dev) i2c->algo = i2c_versatile_algo; i2c->algo.data = i2c; - if (dev->id >= 0) { - /* static bus numbering */ - i2c->adap.nr = dev->id; - ret = i2c_bit_add_numbered_bus(&i2c->adap); - } else - /* dynamic bus numbering */ - ret = i2c_bit_add_bus(&i2c->adap); + i2c->adap.nr = dev->id; + ret = i2c_bit_add_numbered_bus(&i2c->adap); if (ret >= 0) { platform_set_drvdata(dev, i2c); of_i2c_register_devices(&i2c->adap); -- cgit v1.2.2 From a8a9f3fef1aa5226818af91b7a241de6d74d369c Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 18 Apr 2012 15:01:41 +0200 Subject: i2c: designware: Add support for 16bit register access The STM SPEAr platform can only access the i2c controller register via 16bit read/write functions. This patch adds support to automatically detect this 16bit access mode. Signed-off-by: Stefan Roese Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-core.c | 31 +++++++++++++++++++++---------- drivers/i2c/busses/i2c-designware-core.h | 5 ++++- 2 files changed, 25 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index df8799241009..1e48bec80edf 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -164,9 +164,15 @@ static char *abort_sources[] = { u32 dw_readl(struct dw_i2c_dev *dev, int offset) { - u32 value = readl(dev->base + offset); + u32 value; - if (dev->swab) + if (dev->accessor_flags & ACCESS_16BIT) + value = readw(dev->base + offset) | + (readw(dev->base + offset + 2) << 16); + else + value = readl(dev->base + offset); + + if (dev->accessor_flags & ACCESS_SWAP) return swab32(value); else return value; @@ -174,10 +180,15 @@ u32 dw_readl(struct dw_i2c_dev *dev, int offset) void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) { - if (dev->swab) + if (dev->accessor_flags & ACCESS_SWAP) b = swab32(b); - writel(b, dev->base + offset); + if (dev->accessor_flags & ACCESS_16BIT) { + writew((u16)b, dev->base + offset); + writew((u16)(b >> 16), dev->base + offset + 2); + } else { + writel(b, dev->base + offset); + } } static u32 @@ -251,14 +262,14 @@ int i2c_dw_init(struct dw_i2c_dev *dev) input_clock_khz = dev->get_clk_rate_khz(dev); - /* Configure register endianess access */ reg = dw_readl(dev, DW_IC_COMP_TYPE); if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { - dev->swab = 1; - reg = DW_IC_COMP_TYPE_VALUE; - } - - if (reg != DW_IC_COMP_TYPE_VALUE) { + /* Configure register endianess access */ + dev->accessor_flags |= ACCESS_SWAP; + } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) { + /* Configure register access mode 16bit */ + dev->accessor_flags |= ACCESS_16BIT; + } else if (reg != DW_IC_COMP_TYPE_VALUE) { dev_err(dev->dev, "Unknown Synopsys component type: " "0x%08x\n", reg); return -ENODEV; diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 02d1a2ddd853..9c1840ee09c7 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -82,7 +82,7 @@ struct dw_i2c_dev { unsigned int status; u32 abort_source; int irq; - int swab; + u32 accessor_flags; struct i2c_adapter adapter; u32 functionality; u32 master_cfg; @@ -90,6 +90,9 @@ struct dw_i2c_dev { unsigned int rx_fifo_depth; }; +#define ACCESS_SWAP 0x00000001 +#define ACCESS_16BIT 0x00000002 + extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); extern int i2c_dw_init(struct dw_i2c_dev *dev); -- cgit v1.2.2 From 77701a8bab89fb0f87271674e57b2ecf636fbc5f Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Wed, 4 Apr 2012 10:34:38 +0200 Subject: i2c-pnx.c: Use resources in platforms As a precondition for device tree conversion, the platforms using i2c-pnx.c are converted to using mem and irq resources instead of platform data. Signed-off-by: Roland Stigge Reviewed-by: Arnd Bergmann Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pnx.c | 47 +++++++++++++++++++++++--------------------- 1 file changed, 25 insertions(+), 22 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index eb8ad538c79f..6fb97aef0465 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c @@ -568,14 +568,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) int ret = 0; struct i2c_pnx_algo_data *alg_data; unsigned long freq; - struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data; - - if (!i2c_pnx || !i2c_pnx->name) { - dev_err(&pdev->dev, "%s: no platform data supplied\n", - __func__); - ret = -EINVAL; - goto out; - } + struct resource *res; alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL); if (!alg_data) { @@ -585,13 +578,10 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) platform_set_drvdata(pdev, alg_data); - strlcpy(alg_data->adapter.name, i2c_pnx->name, - sizeof(alg_data->adapter.name)); alg_data->adapter.dev.parent = &pdev->dev; alg_data->adapter.algo = &pnx_algorithm; alg_data->adapter.algo_data = alg_data; alg_data->adapter.nr = pdev->id; - alg_data->i2c_pnx = i2c_pnx; alg_data->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(alg_data->clk)) { @@ -603,17 +593,27 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) alg_data->mif.timer.function = i2c_pnx_timeout; alg_data->mif.timer.data = (unsigned long)alg_data; + snprintf(alg_data->adapter.name, sizeof(alg_data->adapter.name), + "%s", pdev->name); + /* Register I/O resource */ - if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE, + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "Unable to get mem resource.\n"); + ret = -EBUSY; + goto out_clkget; + } + if (!request_mem_region(res->start, I2C_PNX_REGION_SIZE, pdev->name)) { dev_err(&pdev->dev, "I/O region 0x%08x for I2C already in use.\n", - i2c_pnx->base); + res->start); ret = -ENODEV; goto out_clkget; } - alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE); + alg_data->base = res->start; + alg_data->ioaddr = ioremap(res->start, I2C_PNX_REGION_SIZE); if (!alg_data->ioaddr) { dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n"); ret = -ENOMEM; @@ -650,7 +650,12 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) } init_completion(&alg_data->mif.complete); - ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt, + alg_data->irq = platform_get_irq(pdev, 0); + if (alg_data->irq < 0) { + dev_err(&pdev->dev, "Failed to get IRQ from platform resource\n"); + goto out_irq; + } + ret = request_irq(alg_data->irq, i2c_pnx_interrupt, 0, pdev->name, alg_data); if (ret) goto out_clock; @@ -663,38 +668,36 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) } dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n", - alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq); + alg_data->adapter.name, res->start, alg_data->irq); return 0; out_irq: - free_irq(i2c_pnx->irq, alg_data); + free_irq(alg_data->irq, alg_data); out_clock: clk_disable(alg_data->clk); out_unmap: iounmap(alg_data->ioaddr); out_release: - release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE); + release_mem_region(res->start, I2C_PNX_REGION_SIZE); out_clkget: clk_put(alg_data->clk); out_drvdata: kfree(alg_data); err_kzalloc: platform_set_drvdata(pdev, NULL); -out: return ret; } static int __devexit i2c_pnx_remove(struct platform_device *pdev) { struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev); - struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx; - free_irq(i2c_pnx->irq, alg_data); + free_irq(alg_data->irq, alg_data); i2c_del_adapter(&alg_data->adapter); clk_disable(alg_data->clk); iounmap(alg_data->ioaddr); - release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE); + release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE); clk_put(alg_data->clk); kfree(alg_data); platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From 26f8d43df75c79332f3b7b60cc1c748e2cad5753 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Wed, 4 Apr 2012 10:34:39 +0200 Subject: i2c-pnx.c: Remove duplicated i2c.h The platforms using i2c-pnx.c both defined a duplicated i2c.h (used nowhere else). This patch removes those and integrates the contents into the driver itself. Signed-off-by: Roland Stigge Reviewed-by: Arnd Bergmann Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pnx.c | 49 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 46 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index 6fb97aef0465..f69d80b8d736 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c @@ -24,13 +24,56 @@ #include #include -#include -#include - #define I2C_PNX_TIMEOUT 10 /* msec */ #define I2C_PNX_SPEED_KHZ 100 #define I2C_PNX_REGION_SIZE 0x100 +enum { + mstatus_tdi = 0x00000001, + mstatus_afi = 0x00000002, + mstatus_nai = 0x00000004, + mstatus_drmi = 0x00000008, + mstatus_active = 0x00000020, + mstatus_scl = 0x00000040, + mstatus_sda = 0x00000080, + mstatus_rff = 0x00000100, + mstatus_rfe = 0x00000200, + mstatus_tff = 0x00000400, + mstatus_tfe = 0x00000800, +}; + +enum { + mcntrl_tdie = 0x00000001, + mcntrl_afie = 0x00000002, + mcntrl_naie = 0x00000004, + mcntrl_drmie = 0x00000008, + mcntrl_daie = 0x00000020, + mcntrl_rffie = 0x00000040, + mcntrl_tffie = 0x00000080, + mcntrl_reset = 0x00000100, + mcntrl_cdbmode = 0x00000400, +}; + +enum { + rw_bit = 1 << 0, + start_bit = 1 << 8, + stop_bit = 1 << 9, +}; + +#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ +#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ +#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ +#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ +#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ +#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ +#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ +#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ +#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ +#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ +#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */ +#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */ +#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */ + static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data) { while (timeout > 0 && -- cgit v1.2.2 From ad33707417e4fa3dd4b12f9ed912e2349a984026 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 30 Mar 2012 17:44:02 +0900 Subject: i2c: sh_mobile: add device tree support This patch enables DT support for the IIC driver used on SH-based SoCs such as sh7722 and sh7724 among others as well as SH-Mobile SoCs such as sh7367, sh7377, sh7372, sh73a0 and r8a7740. Tested with out-of-tree DT support code on the sh7372 Mackerel board. Signed-off-by: Magnus Damm Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-sh_mobile.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index 675c9692d148..8110ca45f342 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -653,6 +654,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) adap->dev.parent = &dev->dev; adap->retries = 5; adap->nr = dev->id; + adap->dev.of_node = dev->dev.of_node; strlcpy(adap->name, dev->name, sizeof(adap->name)); @@ -667,6 +669,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) dev_info(&dev->dev, "I2C adapter %d with bus speed %lu Hz\n", adap->nr, pd->bus_speed); + + of_i2c_register_devices(adap); return 0; err_all: @@ -710,11 +714,18 @@ static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = { .runtime_resume = sh_mobile_i2c_runtime_nop, }; +static const struct of_device_id sh_mobile_i2c_dt_ids[] __devinitconst = { + { .compatible = "renesas,rmobile-iic", }, + {}, +}; +MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids); + static struct platform_driver sh_mobile_i2c_driver = { .driver = { .name = "i2c-sh_mobile", .owner = THIS_MODULE, .pm = &sh_mobile_i2c_dev_pm_ops, + .of_match_table = sh_mobile_i2c_dt_ids, }, .probe = sh_mobile_i2c_probe, .remove = sh_mobile_i2c_remove, -- cgit v1.2.2 From 531183e5d27312d68fab40352cd13426aa761473 Mon Sep 17 00:00:00 2001 From: Zhao Chenhui Date: Thu, 19 Apr 2012 17:51:34 +0800 Subject: i2c-mpc: avoid I2C abnormal after resuming from deep sleep When entering deep sleep, the value in the registers I2CFDR and I2CDFSRR are lost. This causes I2C access to fail after resuming. Add suspend/resume routines to save/restore the registers I2CFDR and I2CDFSRR. Signed-off-by: Zhao Chenhui Signed-off-by: Li Yang Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-mpc.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index 206caacd30d7..b76731edbf10 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c @@ -64,6 +64,9 @@ struct mpc_i2c { struct i2c_adapter adap; int irq; u32 real_clk; +#ifdef CONFIG_PM + u8 fdr, dfsrr; +#endif }; struct mpc_i2c_divider { @@ -703,6 +706,30 @@ static int __devexit fsl_i2c_remove(struct platform_device *op) return 0; }; +#ifdef CONFIG_PM +static int mpc_i2c_suspend(struct device *dev) +{ + struct mpc_i2c *i2c = dev_get_drvdata(dev); + + i2c->fdr = readb(i2c->base + MPC_I2C_FDR); + i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR); + + return 0; +} + +static int mpc_i2c_resume(struct device *dev) +{ + struct mpc_i2c *i2c = dev_get_drvdata(dev); + + writeb(i2c->fdr, i2c->base + MPC_I2C_FDR); + writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR); + + return 0; +} + +SIMPLE_DEV_PM_OPS(mpc_i2c_pm_ops, mpc_i2c_suspend, mpc_i2c_resume); +#endif + static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = { .setup = mpc_i2c_setup_512x, }; @@ -747,6 +774,9 @@ static struct platform_driver mpc_i2c_driver = { .owner = THIS_MODULE, .name = DRV_NAME, .of_match_table = mpc_i2c_of_match, +#ifdef CONFIG_PM + .pm = &mpc_i2c_pm_ops, +#endif }, }; -- cgit v1.2.2 From 2761a81cee6874f73ebaa81f1a9e45147907c38b Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Mon, 26 Mar 2012 15:34:10 +0900 Subject: i2c-eg20t: Call init() when wait-event timeout occurs Signed-off-by: Tomoya MORINAGA Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-eg20t.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index c811289b61e2..d6309e618cdc 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -445,7 +445,10 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } } else { @@ -469,7 +472,10 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } @@ -490,7 +496,10 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } } @@ -598,7 +607,10 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } pch_i2c_restart(adap); @@ -621,7 +633,10 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } } else { @@ -648,7 +663,10 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } @@ -677,7 +695,10 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, return -EIO; } } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } @@ -698,7 +719,10 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, return -EIO; } } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); pch_i2c_stop(adap); + pch_i2c_init(adap); return -ETIME; } -- cgit v1.2.2 From 5cc056327ae3a3fac7411691c27ac61be2c55957 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Thu, 19 Apr 2012 15:38:04 +0900 Subject: i2c-eg20t: add helper function for xfer check Currently, there are the same code for xfer complete check processing. So, I add helper function pch_i2c_wait_for_check_xfer. Reported-by: Wolfram Sang Signed-off-by: Tomoya MORINAGA Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-eg20t.c | 226 ++++++++++++----------------------------- 1 file changed, 66 insertions(+), 160 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index d6309e618cdc..943084a3b690 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -373,6 +373,34 @@ static void pch_i2c_stop(struct i2c_algo_pch_data *adap) pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START); } +static int pch_i2c_wait_for_check_xfer(struct i2c_algo_pch_data *adap) +{ + int rtn; + + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); + pch_i2c_init(adap); + return -EAGAIN; + } else { /* wait-event timeout */ + pch_err(adap, "%s(L.%d):wait-event timeout\n", + __func__, __LINE__); + pch_i2c_stop(adap); + pch_i2c_init(adap); + return -ETIME; + } + + return 0; +} + /** * pch_i2c_repstart() - generate repeated start condition in normal mode * @adap: Pointer to struct i2c_algo_pch_data. @@ -427,30 +455,12 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, if (first) pch_i2c_start(adap); - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - addr_8_lsb = (addr & I2C_ADDR_MSK); - iowrite32(addr_8_lsb, p + PCH_I2CDR); - } else if (rtn == -EIO) { /* Arbitration Lost */ - pch_err(adap, "Lost Arbitration\n"); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMAL_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMIF_BIT); - pch_i2c_init(adap); - return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; + + addr_8_lsb = (addr & I2C_ADDR_MSK); + iowrite32(addr_8_lsb, p + PCH_I2CDR); } else { /* set 7 bit slave address and R/W bit as 0 */ iowrite32(addr << 1, p + PCH_I2CDR); @@ -458,50 +468,21 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_i2c_start(adap); } - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - } else if (rtn == -EIO) { /* Arbitration Lost */ - pch_err(adap, "Lost Arbitration\n"); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); - pch_i2c_init(adap); - return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; for (wrcount = 0; wrcount < length; ++wrcount) { /* write buffer value to I2C data register */ iowrite32(buf[wrcount], p + PCH_I2CDR); pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]); - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMCF_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMIF_BIT); - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; + + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMCF_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); } /* check if this is the last message */ @@ -589,56 +570,21 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (first) pch_i2c_start(adap); - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - addr_8_lsb = (addr & I2C_ADDR_MSK); - iowrite32(addr_8_lsb, p + PCH_I2CDR); - } else if (rtn == -EIO) { /* Arbitration Lost */ - pch_err(adap, "Lost Arbitration\n"); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMAL_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMIF_BIT); - pch_i2c_init(adap); - return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; + + addr_8_lsb = (addr & I2C_ADDR_MSK); + iowrite32(addr_8_lsb, p + PCH_I2CDR); + pch_i2c_restart(adap); - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - addr_2_msb |= I2C_RD; - iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, - p + PCH_I2CDR); - } else if (rtn == -EIO) { /* Arbitration Lost */ - pch_err(adap, "Lost Arbitration\n"); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMAL_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, - I2CMIF_BIT); - pch_i2c_init(adap); - return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; + + addr_2_msb |= I2C_RD; + iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); } else { /* 7 address bits + R/W bit */ addr = (((addr) << 1) | (I2C_RD)); @@ -649,26 +595,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (first) pch_i2c_start(adap); - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - } else if (rtn == -EIO) { /* Arbitration Lost */ - pch_err(adap, "Lost Arbitration\n"); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); - pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); - pch_i2c_init(adap); - return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; if (length == 0) { pch_i2c_stop(adap); @@ -687,21 +616,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (loop != 1) read_index++; - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave" - "address setting\n"); - return -EIO; - } - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } - + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; } /* end for */ pch_i2c_sendnack(adap); @@ -711,20 +628,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (length != 1) read_index++; - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave" - "address setting\n"); - return -EIO; - } - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; - } + rtn = pch_i2c_wait_for_check_xfer(adap); + if (rtn) + return rtn; if (last) pch_i2c_stop(adap); -- cgit v1.2.2 From 199bca2a72a3a5cd71401b4f12171393742be84a Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Thu, 19 Apr 2012 15:38:05 +0900 Subject: i2c-eg20t: Merge two functions By previous patch, pch_i2c_wait_for_xfer_complete can be merged to pch_i2c_wait_for_check_xfer. Signed-off-by: Tomoya MORINAGA Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-eg20t.c | 65 ++++++++++++++---------------------------- 1 file changed, 22 insertions(+), 43 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 943084a3b690..9da12cecb3bb 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -316,33 +316,6 @@ static void pch_i2c_start(struct i2c_algo_pch_data *adap) pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START); } -/** - * pch_i2c_wait_for_xfer_complete() - initiates a wait for the tx complete event - * @adap: Pointer to struct i2c_algo_pch_data. - */ -static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap) -{ - long ret; - ret = wait_event_timeout(pch_event, - (adap->pch_event_flag != 0), msecs_to_jiffies(1000)); - - if (ret == 0) { - pch_err(adap, "timeout: %x\n", adap->pch_event_flag); - adap->pch_event_flag = 0; - return -ETIMEDOUT; - } - - if (adap->pch_event_flag & I2C_ERROR_MASK) { - pch_err(adap, "error bits set: %x\n", adap->pch_event_flag); - adap->pch_event_flag = 0; - return -EIO; - } - - adap->pch_event_flag = 0; - - return 0; -} - /** * pch_i2c_getack() - to confirm ACK/NACK * @adap: Pointer to struct i2c_algo_pch_data. @@ -375,27 +348,33 @@ static void pch_i2c_stop(struct i2c_algo_pch_data *adap) static int pch_i2c_wait_for_check_xfer(struct i2c_algo_pch_data *adap) { - int rtn; - - rtn = pch_i2c_wait_for_xfer_complete(adap); - if (rtn == 0) { - if (pch_i2c_getack(adap)) { - pch_dbg(adap, "Receive NACK for slave address" - "setting\n"); - return -EIO; - } - } else if (rtn == -EIO) { /* Arbitration Lost */ + long ret; + + ret = wait_event_timeout(pch_event, + (adap->pch_event_flag != 0), msecs_to_jiffies(1000)); + if (!ret) { + pch_err(adap, "%s:wait-event timeout\n", __func__); + adap->pch_event_flag = 0; + pch_i2c_stop(adap); + pch_i2c_init(adap); + return -ETIMEDOUT; + } + + if (adap->pch_event_flag & I2C_ERROR_MASK) { pch_err(adap, "Lost Arbitration\n"); + adap->pch_event_flag = 0; pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); pch_i2c_init(adap); return -EAGAIN; - } else { /* wait-event timeout */ - pch_err(adap, "%s(L.%d):wait-event timeout\n", - __func__, __LINE__); - pch_i2c_stop(adap); - pch_i2c_init(adap); - return -ETIME; + } + + adap->pch_event_flag = 0; + + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; } return 0; -- cgit v1.2.2 From 75fb1f25d48b64ff11081623c2104ad345882c9f Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Apr 2012 16:53:49 +0200 Subject: i2c: eg20t: use NULL instead of 0 sparse rightfully says: drivers/i2c/busses/i2c-eg20t.c:990:59: warning: Using plain integer as NULL pointer Signed-off-by: Wolfram Sang Cc: Tomoya MORINAGA --- drivers/i2c/busses/i2c-eg20t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 9da12cecb3bb..6e9e0759f7df 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -872,7 +872,7 @@ static void __devexit pch_i2c_remove(struct pci_dev *pdev) pci_iounmap(pdev, adap_info->pch_data[0].pch_base_address); for (i = 0; i < adap_info->ch_num; i++) - adap_info->pch_data[i].pch_base_address = 0; + adap_info->pch_data[i].pch_base_address = NULL; pci_set_drvdata(pdev, NULL); -- cgit v1.2.2 From 772ae99c5b414fc7f5e4cf76beae7003196b5526 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Apr 2012 17:01:59 +0200 Subject: i2c: eg20t: pass on return value in i2c_xfer smatch says: drivers/i2c/busses/i2c-eg20t.c:702 pch_i2c_xfer() info: why not propagate 'ret' from mutex_lock_interruptible() instead of -512? which is especially true since for -ENORESTARTSYS it is said in linux/errno.h "signal_pending() MUST be set" which is not done here. So just pass on the return value we got. Signed-off-by: Wolfram Sang Cc: Tomoya MORINAGA --- drivers/i2c/busses/i2c-eg20t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 6e9e0759f7df..93926a73f043 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -699,7 +699,7 @@ static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap, ret = mutex_lock_interruptible(&pch_mutex); if (ret) - return -ERESTARTSYS; + return ret; if (adap->p_adapter_info->pch_i2c_suspended) { mutex_unlock(&pch_mutex); -- cgit v1.2.2 From 4a5fe5cb5a3224d03618272f9ba92c626dc44cda Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Apr 2012 17:13:51 +0200 Subject: i2c: eg20t: remove unused function cppcheck rightfully says: drivers/i2c/busses/i2c-eg20t.c:266: style: The function 'ktime_lt' is never used Signed-off-by: Wolfram Sang Cc: Tomoya MORINAGA --- drivers/i2c/busses/i2c-eg20t.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 93926a73f043..5441e6929f12 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -263,11 +263,6 @@ static void pch_i2c_init(struct i2c_algo_pch_data *adap) init_waitqueue_head(&pch_event); } -static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2) -{ - return cmp1.tv64 < cmp2.tv64; -} - /** * pch_i2c_wait_for_bus_idle() - check the status of bus. * @adap: Pointer to struct i2c_algo_pch_data. -- cgit v1.2.2 From 6188a3768131334ceaaf38c7c2d9d3616d562901 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Apr 2012 17:31:01 +0200 Subject: i2c: eg20t: don't use strcpy but strlcpy Signed-off-by: Wolfram Sang Cc: Tomoya MORINAGA --- drivers/i2c/busses/i2c-eg20t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 5441e6929f12..2f74ae872e1e 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -813,7 +813,7 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev, pch_adap->owner = THIS_MODULE; pch_adap->class = I2C_CLASS_HWMON; - strcpy(pch_adap->name, KBUILD_MODNAME); + strlcpy(pch_adap->name, KBUILD_MODNAME, sizeof(pch_adap->name)); pch_adap->algo = &pch_algorithm; pch_adap->algo_data = &adap_info->pch_data[i]; -- cgit v1.2.2 From 973c5ed45dbdf8fd90e300826507b5e6814916af Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Apr 2012 17:31:01 +0200 Subject: i2c: imx: don't use strcpy but strlcpy Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index dfb84b7ee550..cdcf313098be 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -510,7 +510,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev) } /* Setup i2c_imx driver structure */ - strcpy(i2c_imx->adapter.name, pdev->name); + strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); i2c_imx->adapter.owner = THIS_MODULE; i2c_imx->adapter.algo = &i2c_imx_algo; i2c_imx->adapter.dev.parent = &pdev->dev; -- cgit v1.2.2 From a092de11bb4a96ac43ede0352e09bdf7e06280e8 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Fri, 20 Apr 2012 15:34:09 +0200 Subject: i2c: pnx: add device tree support This patch adds device tree support to the pnx-i2c driver by using platform resources for memory region and irq and removing dependency on mach includes. The following platforms are affected: * PNX * LPC31xx (WIP) * LPC32xx The patch is based on a patch by Jon Smirl, working on lpc31xx integration Signed-off-by: Roland Stigge Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pnx.c | 63 +++++++++++++++++++++++++++++++++----------- 1 file changed, 47 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index f69d80b8d736..99389d2eae51 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c @@ -23,10 +23,11 @@ #include #include #include +#include -#define I2C_PNX_TIMEOUT 10 /* msec */ -#define I2C_PNX_SPEED_KHZ 100 -#define I2C_PNX_REGION_SIZE 0x100 +#define I2C_PNX_TIMEOUT_DEFAULT 10 /* msec */ +#define I2C_PNX_SPEED_KHZ_DEFAULT 100 +#define I2C_PNX_REGION_SIZE 0x100 enum { mstatus_tdi = 0x00000001, @@ -74,8 +75,9 @@ enum { #define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */ #define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */ -static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data) +static inline int wait_timeout(struct i2c_pnx_algo_data *data) { + long timeout = data->timeout; while (timeout > 0 && (ioread32(I2C_REG_STS(data)) & mstatus_active)) { mdelay(1); @@ -84,8 +86,9 @@ static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data) return (timeout <= 0); } -static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data) +static inline int wait_reset(struct i2c_pnx_algo_data *data) { + long timeout = data->timeout; while (timeout > 0 && (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) { mdelay(1); @@ -97,7 +100,7 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data) static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data) { struct timer_list *timer = &alg_data->mif.timer; - unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT); + unsigned long expires = msecs_to_jiffies(alg_data->timeout); if (expires <= 1) expires = 2; @@ -135,7 +138,7 @@ static int i2c_pnx_start(unsigned char slave_addr, } /* First, make sure bus is idle */ - if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { + if (wait_timeout(alg_data)) { /* Somebody else is monopolizing the bus */ dev_err(&alg_data->adapter.dev, "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n", @@ -228,7 +231,7 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) if (alg_data->mif.len == 0) { if (alg_data->last) { /* Wait until the STOP is seen. */ - if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) + if (wait_timeout(alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still active after timeout\n"); } @@ -326,7 +329,7 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) if (alg_data->mif.len == 0) { if (alg_data->last) /* Wait until the STOP is seen. */ - if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) + if (wait_timeout(alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still active after timeout\n"); @@ -442,7 +445,7 @@ static void i2c_pnx_timeout(unsigned long data) ctl |= mcntrl_reset; iowrite32(ctl, I2C_REG_CTL(alg_data)); - wait_reset(I2C_PNX_TIMEOUT, alg_data); + wait_reset(alg_data); alg_data->mif.ret = -EIO; complete(&alg_data->mif.complete); } @@ -457,18 +460,18 @@ static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data) alg_data->adapter.name); iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, I2C_REG_CTL(alg_data)); - wait_reset(I2C_PNX_TIMEOUT, alg_data); + wait_reset(alg_data); } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) { /* If there is data in the fifo's after transfer, * flush fifo's by reset. */ iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, I2C_REG_CTL(alg_data)); - wait_reset(I2C_PNX_TIMEOUT, alg_data); + wait_reset(alg_data); } else if (stat & mstatus_nai) { iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, I2C_REG_CTL(alg_data)); - wait_reset(I2C_PNX_TIMEOUT, alg_data); + wait_reset(alg_data); } } @@ -612,6 +615,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) struct i2c_pnx_algo_data *alg_data; unsigned long freq; struct resource *res; + u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000; alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL); if (!alg_data) { @@ -626,6 +630,22 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) alg_data->adapter.algo_data = alg_data; alg_data->adapter.nr = pdev->id; + alg_data->timeout = I2C_PNX_TIMEOUT_DEFAULT; +#ifdef CONFIG_OF + alg_data->adapter.dev.of_node = of_node_get(pdev->dev.of_node); + if (pdev->dev.of_node) { + of_property_read_u32(pdev->dev.of_node, "clock-frequency", + &speed); + /* + * At this point, it is planned to add an OF timeout property. + * As soon as there is a consensus about how to call and handle + * this, sth. like the following can be put here: + * + * of_property_read_u32(pdev->dev.of_node, "timeout", + * &alg_data->timeout); + */ + } +#endif alg_data->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(alg_data->clk)) { ret = PTR_ERR(alg_data->clk); @@ -651,7 +671,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) dev_err(&pdev->dev, "I/O region 0x%08x for I2C already in use.\n", res->start); - ret = -ENODEV; + ret = -ENOMEM; goto out_clkget; } @@ -680,14 +700,14 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) * the deglitching filter length. */ - tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2; + tmp = (freq / speed) / 2 - 2; if (tmp > 0x3FF) tmp = 0x3FF; iowrite32(tmp, I2C_REG_CKH(alg_data)); iowrite32(tmp, I2C_REG_CKL(alg_data)); iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data)); - if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) { + if (wait_reset(alg_data)) { ret = -ENODEV; goto out_clock; } @@ -710,6 +730,8 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) goto out_irq; } + of_i2c_register_devices(&alg_data->adapter); + dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n", alg_data->adapter.name, res->start, alg_data->irq); @@ -748,10 +770,19 @@ static int __devexit i2c_pnx_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_OF +static const struct of_device_id i2c_pnx_of_match[] = { + { .compatible = "nxp,pnx-i2c" }, + { }, +}; +MODULE_DEVICE_TABLE(of, i2c_pnx_of_match); +#endif + static struct platform_driver i2c_pnx_driver = { .driver = { .name = "pnx-i2c", .owner = THIS_MODULE, + .of_match_table = of_match_ptr(i2c_pnx_of_match), }, .probe = i2c_pnx_probe, .remove = __devexit_p(i2c_pnx_remove), -- cgit v1.2.2 From 6923229380bc8ac112f4e6e76d05542c006feaad Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 3 Apr 2012 20:34:01 -0500 Subject: i2c: ixp2000: remove driver The platform is removed, so there are no users of this driver. Signed-off-by: Rob Herring Signed-off-by: Wolfram Sang --- drivers/i2c/busses/Kconfig | 14 ---- drivers/i2c/busses/Makefile | 1 - drivers/i2c/busses/i2c-ixp2000.c | 157 --------------------------------------- 3 files changed, 172 deletions(-) delete mode 100644 drivers/i2c/busses/i2c-ixp2000.c (limited to 'drivers') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index d2c5095deeac..188543d0e8b2 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -445,20 +445,6 @@ config I2C_IOP3XX This driver can also be built as a module. If so, the module will be called i2c-iop3xx. -config I2C_IXP2000 - tristate "IXP2000 GPIO-Based I2C Interface (DEPRECATED)" - depends on ARCH_IXP2000 - select I2C_ALGOBIT - help - Say Y here if you have an Intel IXP2000 (2400, 2800, 2850) based - system and are using GPIO lines for an I2C bus. - - This support is also available as a module. If so, the module - will be called i2c-ixp2000. - - This driver is deprecated and will be dropped soon. Use i2c-gpio - instead. - config I2C_MPC tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx" depends on PPC diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 569567b0d027..ce3c2be7fb40 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -44,7 +44,6 @@ obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o obj-$(CONFIG_I2C_IMX) += i2c-imx.o obj-$(CONFIG_I2C_INTEL_MID) += i2c-intel-mid.o obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o -obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o obj-$(CONFIG_I2C_MPC) += i2c-mpc.o obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o obj-$(CONFIG_I2C_MXS) += i2c-mxs.o diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c deleted file mode 100644 index 5d263f9014d6..000000000000 --- a/drivers/i2c/busses/i2c-ixp2000.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * drivers/i2c/busses/i2c-ixp2000.c - * - * I2C adapter for IXP2000 systems using GPIOs for I2C bus - * - * Author: Deepak Saxena - * Based on IXDP2400 code by: Naeem M. Afzal - * Made generic by: Jeff Daly - * - * Copyright (c) 2003-2004 MontaVista Software Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - * - * From Jeff Daly: - * - * I2C adapter driver for Intel IXDP2xxx platforms. This should work for any - * IXP2000 platform if it uses the HW GPIO in the same manner. Basically, - * SDA and SCL GPIOs have external pullups. Setting the respective GPIO to - * an input will make the signal a '1' via the pullup. Setting them to - * outputs will pull them down. - * - * The GPIOs are open drain signals and are used as configuration strap inputs - * during power-up so there's generally a buffer on the board that needs to be - * 'enabled' to drive the GPIOs. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include /* Pick up IXP2000-specific bits */ -#include - -static inline int ixp2000_scl_pin(void *data) -{ - return ((struct ixp2000_i2c_pins*)data)->scl_pin; -} - -static inline int ixp2000_sda_pin(void *data) -{ - return ((struct ixp2000_i2c_pins*)data)->sda_pin; -} - - -static void ixp2000_bit_setscl(void *data, int val) -{ - int i = 5000; - - if (val) { - gpio_line_config(ixp2000_scl_pin(data), GPIO_IN); - while(!gpio_line_get(ixp2000_scl_pin(data)) && i--); - } else { - gpio_line_config(ixp2000_scl_pin(data), GPIO_OUT); - } -} - -static void ixp2000_bit_setsda(void *data, int val) -{ - if (val) { - gpio_line_config(ixp2000_sda_pin(data), GPIO_IN); - } else { - gpio_line_config(ixp2000_sda_pin(data), GPIO_OUT); - } -} - -static int ixp2000_bit_getscl(void *data) -{ - return gpio_line_get(ixp2000_scl_pin(data)); -} - -static int ixp2000_bit_getsda(void *data) -{ - return gpio_line_get(ixp2000_sda_pin(data)); -} - -struct ixp2000_i2c_data { - struct ixp2000_i2c_pins *gpio_pins; - struct i2c_adapter adapter; - struct i2c_algo_bit_data algo_data; -}; - -static int ixp2000_i2c_remove(struct platform_device *plat_dev) -{ - struct ixp2000_i2c_data *drv_data = platform_get_drvdata(plat_dev); - - platform_set_drvdata(plat_dev, NULL); - - i2c_del_adapter(&drv_data->adapter); - - kfree(drv_data); - - return 0; -} - -static int ixp2000_i2c_probe(struct platform_device *plat_dev) -{ - int err; - struct ixp2000_i2c_pins *gpio = plat_dev->dev.platform_data; - struct ixp2000_i2c_data *drv_data = - kzalloc(sizeof(struct ixp2000_i2c_data), GFP_KERNEL); - - if (!drv_data) - return -ENOMEM; - drv_data->gpio_pins = gpio; - - drv_data->algo_data.data = gpio; - drv_data->algo_data.setsda = ixp2000_bit_setsda; - drv_data->algo_data.setscl = ixp2000_bit_setscl; - drv_data->algo_data.getsda = ixp2000_bit_getsda; - drv_data->algo_data.getscl = ixp2000_bit_getscl; - drv_data->algo_data.udelay = 6; - drv_data->algo_data.timeout = HZ; - - strlcpy(drv_data->adapter.name, plat_dev->dev.driver->name, - sizeof(drv_data->adapter.name)); - drv_data->adapter.algo_data = &drv_data->algo_data, - - drv_data->adapter.dev.parent = &plat_dev->dev; - - gpio_line_config(gpio->sda_pin, GPIO_IN); - gpio_line_config(gpio->scl_pin, GPIO_IN); - gpio_line_set(gpio->scl_pin, 0); - gpio_line_set(gpio->sda_pin, 0); - - if ((err = i2c_bit_add_bus(&drv_data->adapter)) != 0) { - dev_err(&plat_dev->dev, "Could not install, error %d\n", err); - kfree(drv_data); - return err; - } - - platform_set_drvdata(plat_dev, drv_data); - - return 0; -} - -static struct platform_driver ixp2000_i2c_driver = { - .probe = ixp2000_i2c_probe, - .remove = ixp2000_i2c_remove, - .driver = { - .name = "IXP2000-I2C", - .owner = THIS_MODULE, - }, -}; - -module_platform_driver(ixp2000_i2c_driver); - -MODULE_AUTHOR ("Deepak Saxena "); -MODULE_DESCRIPTION("IXP2000 GPIO-based I2C bus driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:IXP2000-I2C"); - -- cgit v1.2.2 From 3bf3b289c233c28aaef16546168a994070aa24a0 Mon Sep 17 00:00:00 2001 From: Deepak Sikri Date: Fri, 24 Feb 2012 17:01:15 +0530 Subject: i2c: designware: add PM support This patch adds in support for standby/S2R/hybernate for i2c-designware driver. Signed-off-by: Deepak Sikri Signed-off-by: Rajeev Kumar Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-platdrv.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 4ba589ab8614..f08d0248cf6b 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include #include "i2c-designware-core.h" @@ -198,6 +199,31 @@ static const struct of_device_id dw_i2c_of_match[] = { MODULE_DEVICE_TABLE(of, dw_i2c_of_match); #endif +#ifdef CONFIG_PM +static int dw_i2c_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); + + clk_disable(i_dev->clk); + + return 0; +} + +static int dw_i2c_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); + + clk_enable(i_dev->clk); + i2c_dw_init(i_dev); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend, dw_i2c_resume); + /* work with hotplug and coldplug */ MODULE_ALIAS("platform:i2c_designware"); @@ -207,6 +233,7 @@ static struct platform_driver dw_i2c_driver = { .name = "i2c_designware", .owner = THIS_MODULE, .of_match_table = of_match_ptr(dw_i2c_of_match), + .pm = &dw_i2c_dev_pm_ops, }, }; -- cgit v1.2.2 From e1fac69f3b2c0430f56f47bf98eebac8b2da395c Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 17 Apr 2012 17:04:31 +0530 Subject: i2c: designware: Add clk_{un}prepare() support clk_{un}prepare is mandatory for platforms using common clock framework. Since this driver is used by SPEAr platform, which supports common clock framework, add clk_{un}prepare() support for designware i2c. Signed-off-by: Viresh Kumar Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-platdrv.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index f08d0248cf6b..0506fef8dc00 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -96,7 +96,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) r = -ENODEV; goto err_free_mem; } - clk_enable(dev->clk); + clk_prepare_enable(dev->clk); dev->functionality = I2C_FUNC_I2C | @@ -156,7 +156,7 @@ err_free_irq: err_iounmap: iounmap(dev->base); err_unuse_clocks: - clk_disable(dev->clk); + clk_disable_unprepare(dev->clk); clk_put(dev->clk); dev->clk = NULL; err_free_mem: @@ -178,7 +178,7 @@ static int __devexit dw_i2c_remove(struct platform_device *pdev) i2c_del_adapter(&dev->adapter); put_device(&pdev->dev); - clk_disable(dev->clk); + clk_disable_unprepare(dev->clk); clk_put(dev->clk); dev->clk = NULL; @@ -205,7 +205,7 @@ static int dw_i2c_suspend(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); - clk_disable(i_dev->clk); + clk_disable_unprepare(i_dev->clk); return 0; } @@ -215,7 +215,7 @@ static int dw_i2c_resume(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); - clk_enable(i_dev->clk); + clk_prepare_enable(i_dev->clk); i2c_dw_init(i_dev); return 0; -- cgit v1.2.2 From d9afca37dea077d11ed67fc7f93b95c003e58819 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 17 Apr 2012 12:42:15 -0600 Subject: of/i2c: call i2c_verify_client from of_find_i2c_device_by_node i2c_bus_type may contain both I2C clients and I2C adapters. Fix of_find_i2c_device_by_node to call i2c_verify_client to ensure that it only returns non-NULL of I2C clients. Signed-off-by: Stephen Warren Acked-by: Rob Herring Signed-off-by: Wolfram Sang --- drivers/of/of_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c index f37fbeb66a44..068488717f69 100644 --- a/drivers/of/of_i2c.c +++ b/drivers/of/of_i2c.c @@ -90,7 +90,7 @@ struct i2c_client *of_find_i2c_device_by_node(struct device_node *node) if (!dev) return NULL; - return to_i2c_client(dev); + return i2c_verify_client(dev); } EXPORT_SYMBOL(of_find_i2c_device_by_node); -- cgit v1.2.2 From 5a3ecd5f9877b963a581ca5d4495a1a24dafc88c Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 12 Apr 2012 14:14:22 -0700 Subject: i2c: Add a struct device * parameter to i2c_add_mux_adapter() And adjust all callers. The new device parameter is used in the next patch to initialize the mux's of_node so that its children may be automatically populated. Signed-off-by: David Daney Tested-by: Lars-Peter Clausen Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-mux.c | 19 ++++++++++--------- drivers/i2c/muxes/gpio-i2cmux.c | 3 ++- drivers/i2c/muxes/pca9541.c | 3 ++- drivers/i2c/muxes/pca954x.c | 2 +- 4 files changed, 15 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c index d7a4833be416..26ab31dd742b 100644 --- a/drivers/i2c/i2c-mux.c +++ b/drivers/i2c/i2c-mux.c @@ -31,11 +31,11 @@ struct i2c_mux_priv { struct i2c_algorithm algo; struct i2c_adapter *parent; - void *mux_dev; /* the mux chip/device */ + void *mux_priv; /* the mux chip/device */ u32 chan_id; /* the channel id */ - int (*select)(struct i2c_adapter *, void *mux_dev, u32 chan_id); - int (*deselect)(struct i2c_adapter *, void *mux_dev, u32 chan_id); + int (*select)(struct i2c_adapter *, void *mux_priv, u32 chan_id); + int (*deselect)(struct i2c_adapter *, void *mux_priv, u32 chan_id); }; static int i2c_mux_master_xfer(struct i2c_adapter *adap, @@ -47,11 +47,11 @@ static int i2c_mux_master_xfer(struct i2c_adapter *adap, /* Switch to the right mux port and perform the transfer. */ - ret = priv->select(parent, priv->mux_dev, priv->chan_id); + ret = priv->select(parent, priv->mux_priv, priv->chan_id); if (ret >= 0) ret = parent->algo->master_xfer(parent, msgs, num); if (priv->deselect) - priv->deselect(parent, priv->mux_dev, priv->chan_id); + priv->deselect(parent, priv->mux_priv, priv->chan_id); return ret; } @@ -67,12 +67,12 @@ static int i2c_mux_smbus_xfer(struct i2c_adapter *adap, /* Select the right mux port and perform the transfer. */ - ret = priv->select(parent, priv->mux_dev, priv->chan_id); + ret = priv->select(parent, priv->mux_priv, priv->chan_id); if (ret >= 0) ret = parent->algo->smbus_xfer(parent, addr, flags, read_write, command, size, data); if (priv->deselect) - priv->deselect(parent, priv->mux_dev, priv->chan_id); + priv->deselect(parent, priv->mux_priv, priv->chan_id); return ret; } @@ -87,7 +87,8 @@ static u32 i2c_mux_functionality(struct i2c_adapter *adap) } struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, - void *mux_dev, u32 force_nr, u32 chan_id, + struct device *mux_dev, + void *mux_priv, u32 force_nr, u32 chan_id, int (*select) (struct i2c_adapter *, void *, u32), int (*deselect) (struct i2c_adapter *, @@ -102,7 +103,7 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, /* Set up private adapter data */ priv->parent = parent; - priv->mux_dev = mux_dev; + priv->mux_priv = mux_priv; priv->chan_id = chan_id; priv->select = select; priv->deselect = deselect; diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/gpio-i2cmux.c index e5fa695eb0fa..fc5c1ef9b6ec 100644 --- a/drivers/i2c/muxes/gpio-i2cmux.c +++ b/drivers/i2c/muxes/gpio-i2cmux.c @@ -105,7 +105,8 @@ static int __devinit gpiomux_probe(struct platform_device *pdev) for (i = 0; i < pdata->n_values; i++) { u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0; - mux->adap[i] = i2c_add_mux_adapter(parent, mux, nr, i, + mux->adap[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, + nr, i, gpiomux_select, deselect); if (!mux->adap[i]) { ret = -ENODEV; diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/pca9541.c index e0df9b6c66b3..8aacde1516ac 100644 --- a/drivers/i2c/muxes/pca9541.c +++ b/drivers/i2c/muxes/pca9541.c @@ -353,7 +353,8 @@ static int pca9541_probe(struct i2c_client *client, force = 0; if (pdata) force = pdata->modes[0].adap_id; - data->mux_adap = i2c_add_mux_adapter(adap, client, force, 0, + data->mux_adap = i2c_add_mux_adapter(adap, &client->dev, client, + force, 0, pca9541_select_chan, pca9541_release_chan); diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index 0e37ef27aa12..f2dfe0d8fcce 100644 --- a/drivers/i2c/muxes/pca954x.c +++ b/drivers/i2c/muxes/pca954x.c @@ -226,7 +226,7 @@ static int pca954x_probe(struct i2c_client *client, } data->virt_adaps[num] = - i2c_add_mux_adapter(adap, client, + i2c_add_mux_adapter(adap, &client->dev, client, force, num, pca954x_select_chan, (pdata && pdata->modes[num].deselect_on_exit) ? pca954x_deselect_mux : NULL); -- cgit v1.2.2 From bc45449b1444611d68466ae7f45f235420d79019 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 12 Apr 2012 14:14:23 -0700 Subject: i2c/of: Automatically populate i2c mux busses from device tree data. For 'normal' i2c bus drivers, we can call of_i2c_register_devices() and have the device tree framework automatically populate the bus with the devices specified in the device tree. This patch adds a common code to the i2c mux framework to have the mux sub-busses be populated by the of_i2c_register_devices() too. If the mux device has an of_node, we populate the sub-bus' of_node so that the subsequent call to of_i2c_register_devices() will find the corresponding devices. It seemed better to put this logic in i2c_add_mux_adapter() rather than the individual mux drivers, as they will all probably want to do the same thing. Signed-off-by: David Daney Acked-by: Stephen Warren Tested-by: Lars-Peter Clausen [wsa: removed superfluous ret-variable and fixed a typo in a comment] Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-mux.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c index 26ab31dd742b..1038c381aea5 100644 --- a/drivers/i2c/i2c-mux.c +++ b/drivers/i2c/i2c-mux.c @@ -24,6 +24,8 @@ #include #include #include +#include +#include /* multiplexer per channel data */ struct i2c_mux_priv { @@ -125,6 +127,25 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, priv->adap.algo_data = priv; priv->adap.dev.parent = &parent->dev; + /* + * Try to populate the mux adapter's of_node, expands to + * nothing if !CONFIG_OF. + */ + if (mux_dev->of_node) { + struct device_node *child; + u32 reg; + + for_each_child_of_node(mux_dev->of_node, child) { + ret = of_property_read_u32(child, "reg", ®); + if (ret) + continue; + if (chan_id == reg) { + priv->adap.dev.of_node = child; + break; + } + } + } + if (force_nr) { priv->adap.nr = force_nr; ret = i2c_add_numbered_adapter(&priv->adap); @@ -142,6 +163,8 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, dev_info(&parent->dev, "Added multiplexed i2c bus %d\n", i2c_adapter_id(&priv->adap)); + of_i2c_register_devices(&priv->adap); + return &priv->adap; } EXPORT_SYMBOL_GPL(i2c_add_mux_adapter); -- cgit v1.2.2 From 951eef3955117cfaf3eafea601bf06ba2090ca0f Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 23 Apr 2012 20:31:18 +0200 Subject: i2c: muxes are not EXPERIMENTAL anymore We got multiple patches to add mux support to device tree, so people are using it happily already and build up on it. I also used it in a project without encountering problems. 20 months of EXPERIMENTAL should do for this. Signed-off-by: Wolfram Sang Acked-by: Peter Korsgaard Acked-by: Guenter Roeck Acked-by: Jean Delvare Acked-by: Stephen Warren Acked-by: Michael Lawnick Cc: Lars-Peter Clausen Cc: David Daney --- drivers/i2c/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 5f13c62e64b4..5a3bb3d738d8 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -49,7 +49,6 @@ config I2C_CHARDEV config I2C_MUX tristate "I2C bus multiplexing support" - depends on EXPERIMENTAL help Say Y here if you want the I2C core to support the ability to handle multiplexed I2C bus topologies, by presenting each -- cgit v1.2.2 From 27452498a6ed507154616d59e6bd41a96ec291c8 Mon Sep 17 00:00:00 2001 From: Karol Lewandowski Date: Mon, 23 Apr 2012 18:24:00 +0200 Subject: i2c-s3c2410: Rework device type handling Reorganize driver a bit to better handle device tree-based systems: - move machine type to driver's private structure instead of quering platform device variants in runtime - replace s3c24xx_i2c_type enum with unsigned int that holds bitmask with revision-specific quirks Signed-off-by: Karol Lewandowski Signed-off-by: Kyungmin Park Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-s3c2410.c | 75 ++++++++++++++++++---------------------- 1 file changed, 34 insertions(+), 41 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 85e3664f411e..23736ffaaa2a 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -44,8 +44,10 @@ #include #include -/* i2c controller state */ +/* Treat S3C2410 as baseline hardware, anything else is supported via quirks */ +#define QUIRK_S3C2440 (1 << 0) +/* i2c controller state */ enum s3c24xx_i2c_state { STATE_IDLE, STATE_START, @@ -54,14 +56,10 @@ enum s3c24xx_i2c_state { STATE_STOP }; -enum s3c24xx_i2c_type { - TYPE_S3C2410, - TYPE_S3C2440, -}; - struct s3c24xx_i2c { spinlock_t lock; wait_queue_head_t wait; + unsigned int quirks; unsigned int suspended:1; struct i2c_msg *msg; @@ -88,26 +86,40 @@ struct s3c24xx_i2c { #endif }; -/* default platform data removed, dev should always carry data. */ +static struct platform_device_id s3c24xx_driver_ids[] = { + { + .name = "s3c2410-i2c", + .driver_data = 0, + }, { + .name = "s3c2440-i2c", + .driver_data = QUIRK_S3C2440, + }, { }, +}; +MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids); + +#ifdef CONFIG_OF +static const struct of_device_id s3c24xx_i2c_match[] = { + { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 }, + { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 }, + {}, +}; +MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); +#endif -/* s3c24xx_i2c_is2440() +/* s3c24xx_get_device_quirks * - * return true is this is an s3c2440 + * Get controller type either from device tree or platform device variant. */ -static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c) +static inline unsigned int s3c24xx_get_device_quirks(struct platform_device *pdev) { - struct platform_device *pdev = to_platform_device(i2c->dev); - enum s3c24xx_i2c_type type; - -#ifdef CONFIG_OF - if (i2c->dev->of_node) - return of_device_is_compatible(i2c->dev->of_node, - "samsung,s3c2440-i2c"); -#endif + if (pdev->dev.of_node) { + const struct of_device_id *match; + match = of_match_node(&s3c24xx_i2c_match, pdev->dev.of_node); + return (unsigned int)match->data; + } - type = platform_get_device_id(pdev)->driver_data; - return type == TYPE_S3C2440; + return platform_get_device_id(pdev)->driver_data; } /* s3c24xx_i2c_master_complete @@ -676,7 +688,7 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) writel(iiccon, i2c->regs + S3C2410_IICCON); - if (s3c24xx_i2c_is2440(i2c)) { + if (i2c->quirks & QUIRK_S3C2440) { unsigned long sda_delay; if (pdata->sda_delay) { @@ -906,6 +918,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) goto err_noclk; } + i2c->quirks = s3c24xx_get_device_quirks(pdev); if (pdata) memcpy(i2c->pdata, pdata, sizeof(*pdata)); else @@ -1110,26 +1123,6 @@ static const struct dev_pm_ops s3c24xx_i2c_dev_pm_ops = { /* device driver for platform bus bits */ -static struct platform_device_id s3c24xx_driver_ids[] = { - { - .name = "s3c2410-i2c", - .driver_data = TYPE_S3C2410, - }, { - .name = "s3c2440-i2c", - .driver_data = TYPE_S3C2440, - }, { }, -}; -MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids); - -#ifdef CONFIG_OF -static const struct of_device_id s3c24xx_i2c_match[] = { - { .compatible = "samsung,s3c2410-i2c" }, - { .compatible = "samsung,s3c2440-i2c" }, - {}, -}; -MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); -#endif - static struct platform_driver s3c24xx_i2c_driver = { .probe = s3c24xx_i2c_probe, .remove = s3c24xx_i2c_remove, -- cgit v1.2.2 From ec39ef83eb9b22cc732329e85fc4ec03e76d9dda Mon Sep 17 00:00:00 2001 From: Karol Lewandowski Date: Mon, 23 Apr 2012 18:24:01 +0200 Subject: i2c-s3c2410: Add HDMIPHY quirk for S3C2440 This patch adds support for s3c2440 I2C bus controller dedicated HDMIPHY device on Exynos4 platform. Some quirks are introduced due to differences between HDMIPHY and other I2C controllers on Exynos4. These differences are: - no GPIOs, HDMIPHY is inside the SoC and the controller is connected internally - due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a transfer fails to finish. The controller hangs after sending the last byte, the workaround for this bug is resetting the controller after each transfer Signed-off-by: Tomasz Stanislawski Signed-off-by: Karol Lewandowski Tested-by: Tomasz Stanislawski Signed-off-by: Kyungmin Park Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-s3c2410.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 23736ffaaa2a..fa0b13490873 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -46,6 +46,8 @@ /* Treat S3C2410 as baseline hardware, anything else is supported via quirks */ #define QUIRK_S3C2440 (1 << 0) +#define QUIRK_HDMIPHY (1 << 1) +#define QUIRK_NO_GPIO (1 << 2) /* i2c controller state */ enum s3c24xx_i2c_state { @@ -93,6 +95,9 @@ static struct platform_device_id s3c24xx_driver_ids[] = { }, { .name = "s3c2440-i2c", .driver_data = QUIRK_S3C2440, + }, { + .name = "s3c2440-hdmiphy-i2c", + .driver_data = QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO, }, { }, }; MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids); @@ -101,6 +106,8 @@ MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids); static const struct of_device_id s3c24xx_i2c_match[] = { { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 }, { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 }, + { .compatible = "samsung,s3c2440-hdmiphy-i2c", + .data = (void *)(QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO) }, {}, }; MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); @@ -483,6 +490,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) unsigned long iicstat; int timeout = 400; + /* the timeout for HDMIPHY is reduced to 10 ms because + * the hangup is expected to happen, so waiting 400 ms + * causes only unnecessary system hangup + */ + if (i2c->quirks & QUIRK_HDMIPHY) + timeout = 10; + while (timeout-- > 0) { iicstat = readl(i2c->regs + S3C2410_IICSTAT); @@ -492,6 +506,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) msleep(1); } + /* hang-up of bus dedicated for HDMIPHY occurred, resetting */ + if (i2c->quirks & QUIRK_HDMIPHY) { + writel(0, i2c->regs + S3C2410_IICCON); + writel(0, i2c->regs + S3C2410_IICSTAT); + writel(0, i2c->regs + S3C2410_IICDS); + + return 0; + } + return -ETIMEDOUT; } @@ -773,6 +796,9 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) { int idx, gpio, ret; + if (i2c->quirks & QUIRK_NO_GPIO) + return 0; + for (idx = 0; idx < 2; idx++) { gpio = of_get_gpio(i2c->dev->of_node, idx); if (!gpio_is_valid(gpio)) { @@ -797,6 +823,10 @@ free_gpio: static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) { unsigned int idx; + + if (i2c->quirks & QUIRK_NO_GPIO) + return; + for (idx = 0; idx < 2; idx++) gpio_free(i2c->gpios[idx]); } -- cgit v1.2.2 From 643dd09eb27b40ced671564edbe2640935fe37c2 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 17 Apr 2012 12:43:33 -0600 Subject: i2c: implement i2c_verify_adapter This converts a struct device * to a struct i2c_adapter * while verifying that the device really is an I2C adapter. Just like i2c_verify_client. Signed-off-by: Stephen Warren Acked-by: Jean Delvare Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index feb7dc359186..a6ad32bc0a96 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c @@ -772,6 +772,23 @@ struct device_type i2c_adapter_type = { }; EXPORT_SYMBOL_GPL(i2c_adapter_type); +/** + * i2c_verify_adapter - return parameter as i2c_adapter or NULL + * @dev: device, probably from some driver model iterator + * + * When traversing the driver model tree, perhaps using driver model + * iterators like @device_for_each_child(), you can't assume very much + * about the nodes you find. Use this function to avoid oopses caused + * by wrongly treating some non-I2C device as an i2c_adapter. + */ +struct i2c_adapter *i2c_verify_adapter(struct device *dev) +{ + return (dev->type == &i2c_adapter_type) + ? to_i2c_adapter(dev) + : NULL; +} +EXPORT_SYMBOL(i2c_verify_adapter); + #ifdef CONFIG_I2C_COMPAT static struct class_compat *i2c_adapter_compat_class; #endif -- cgit v1.2.2 From 0938643e533cc80ef0cdfdd2e260c4910d0f8bc7 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 17 Apr 2012 12:43:34 -0600 Subject: of/i2c: implement of_find_i2c_adapter_by_node This finds the struct i2c_adapter * for a given device tree node. Just like of_find_i2c_device_by_node. Signed-off-by: Stephen Warren Signed-off-by: Wolfram Sang --- drivers/of/of_i2c.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers') diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c index 068488717f69..1e173f357674 100644 --- a/drivers/of/of_i2c.c +++ b/drivers/of/of_i2c.c @@ -94,4 +94,18 @@ struct i2c_client *of_find_i2c_device_by_node(struct device_node *node) } EXPORT_SYMBOL(of_find_i2c_device_by_node); +/* must call put_device() when done with returned i2c_adapter device */ +struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node) +{ + struct device *dev; + + dev = bus_find_device(&i2c_bus_type, NULL, node, + of_dev_node_match); + if (!dev) + return NULL; + + return i2c_verify_adapter(dev); +} +EXPORT_SYMBOL(of_find_i2c_adapter_by_node); + MODULE_LICENSE("GPL"); -- cgit v1.2.2 From b4f0b74ea37789eeeabe57b7ccd5808df076c081 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 25 Apr 2012 22:29:43 +0200 Subject: i2c: muxes: rename first set of drivers to a standard pattern Apply a naming pattern like in the rest of the subsystem to a first set of mux drivers. Those drivers are the low-hanging fruit; we want to pick them to motivate upcoming drivers to follow the new pattern. The missing GPIO driver will be converted in a later patch. Signed-off-by: Wolfram Sang Acked-by: Guenter Roeck (pca9541) Acked-by: Jean Delvare --- drivers/i2c/muxes/Kconfig | 4 +- drivers/i2c/muxes/Makefile | 4 +- drivers/i2c/muxes/i2c-mux-pca9541.c | 401 ++++++++++++++++++++++++++++++++++++ drivers/i2c/muxes/i2c-mux-pca954x.c | 291 ++++++++++++++++++++++++++ drivers/i2c/muxes/pca9541.c | 401 ------------------------------------ drivers/i2c/muxes/pca954x.c | 291 -------------------------- 6 files changed, 696 insertions(+), 696 deletions(-) create mode 100644 drivers/i2c/muxes/i2c-mux-pca9541.c create mode 100644 drivers/i2c/muxes/i2c-mux-pca954x.c delete mode 100644 drivers/i2c/muxes/pca9541.c delete mode 100644 drivers/i2c/muxes/pca954x.c (limited to 'drivers') diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 90b7a0163899..e14a4205e5c6 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -25,7 +25,7 @@ config I2C_MUX_PCA9541 I2C Master Selector. This driver can also be built as a module. If so, the module - will be called pca9541. + will be called i2c-mux-pca9541. config I2C_MUX_PCA954x tristate "Philips PCA954x I2C Mux/switches" @@ -35,6 +35,6 @@ config I2C_MUX_PCA954x I2C mux/switch devices. This driver can also be built as a module. If so, the module - will be called pca954x. + will be called i2c-mux-pca954x. endmenu diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile index 4640436ea61f..0868335cff11 100644 --- a/drivers/i2c/muxes/Makefile +++ b/drivers/i2c/muxes/Makefile @@ -2,7 +2,7 @@ # Makefile for multiplexer I2C chip drivers. obj-$(CONFIG_I2C_MUX_GPIO) += gpio-i2cmux.o -obj-$(CONFIG_I2C_MUX_PCA9541) += pca9541.o -obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o +obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o +obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c new file mode 100644 index 000000000000..8aacde1516ac --- /dev/null +++ b/drivers/i2c/muxes/i2c-mux-pca9541.c @@ -0,0 +1,401 @@ +/* + * I2C multiplexer driver for PCA9541 bus master selector + * + * Copyright (c) 2010 Ericsson AB. + * + * Author: Guenter Roeck + * + * Derived from: + * pca954x.c + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * The PCA9541 is a bus master selector. It supports two I2C masters connected + * to a single slave bus. + * + * Before each bus transaction, a master has to acquire bus ownership. After the + * transaction is complete, bus ownership has to be released. This fits well + * into the I2C multiplexer framework, which provides select and release + * functions for this purpose. For this reason, this driver is modeled as + * single-channel I2C bus multiplexer. + * + * This driver assumes that the two bus masters are controlled by two different + * hosts. If a single host controls both masters, platform code has to ensure + * that only one of the masters is instantiated at any given time. + */ + +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 + +#define PCA9541_CTL_MYBUS (1 << 0) +#define PCA9541_CTL_NMYBUS (1 << 1) +#define PCA9541_CTL_BUSON (1 << 2) +#define PCA9541_CTL_NBUSON (1 << 3) +#define PCA9541_CTL_BUSINIT (1 << 4) +#define PCA9541_CTL_TESTON (1 << 6) +#define PCA9541_CTL_NTESTON (1 << 7) + +#define PCA9541_ISTAT_INTIN (1 << 0) +#define PCA9541_ISTAT_BUSINIT (1 << 1) +#define PCA9541_ISTAT_BUSOK (1 << 2) +#define PCA9541_ISTAT_BUSLOST (1 << 3) +#define PCA9541_ISTAT_MYTEST (1 << 6) +#define PCA9541_ISTAT_NMYTEST (1 << 7) + +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) +#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) +#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) + +/* arbitration timeouts, in jiffies */ +#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ + +/* arbitration retry delays, in us */ +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 + +struct pca9541 { + struct i2c_adapter *mux_adap; + unsigned long select_timeout; + unsigned long arb_timeout; +}; + +static const struct i2c_device_id pca9541_id[] = { + {"pca9541", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, pca9541_id); + +/* + * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock the adapter a second time. + */ +static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[2]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2; + buf[0] = command; + buf[1] = val; + msg.buf = buf; + ret = adap->algo->master_xfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + + data.byte = val; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_BYTE_DATA, &data); + } + + return ret; +} + +/* + * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock adapter a second time. + */ +static int pca9541_reg_read(struct i2c_client *client, u8 command) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + u8 val; + + if (adap->algo->master_xfer) { + struct i2c_msg msg[2] = { + { + .addr = client->addr, + .flags = 0, + .len = 1, + .buf = &command + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = &val + } + }; + ret = adap->algo->master_xfer(adap, msg, 2); + if (ret == 2) + ret = val; + else if (ret >= 0) + ret = -EIO; + } else { + union i2c_smbus_data data; + + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_BYTE_DATA, &data); + if (!ret) + ret = data.byte; + } + return ret; +} + +/* + * Arbitration management functions + */ + +/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ +static void pca9541_release_bus(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); +} + +/* + * Arbitration is defined as a two-step process. A bus master can only activate + * the slave bus if it owns it; otherwise it has to request ownership first. + * This multi-step process ensures that access contention is resolved + * gracefully. + * + * Bus Ownership Other master Action + * state requested access + * ---------------------------------------------------- + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus + * + * The main contention point occurs if the slave bus is off and both masters + * request ownership at the same time. In this case, one master will turn on + * the slave bus, believing that it owns it. The other master will request + * bus ownership. Result is that the bus is turned on, and master which did + * _not_ own the slave bus before ends up owning it. + */ + +/* Control commands per PCA9541 datasheet */ +static const u8 pca9541_control[16] = { + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 +}; + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9541_arbitrate(struct i2c_client *client) +{ + struct pca9541 *data = i2c_get_clientdata(client); + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg < 0) + return reg; + + if (busoff(reg)) { + int istat; + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) + || time_is_before_eq_jiffies(data->arb_timeout)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + data->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + return 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + if (time_is_before_eq_jiffies(data->arb_timeout)) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + return 0; +} + +static int pca9541_select_chan(struct i2c_adapter *adap, void *client, u32 chan) +{ + struct pca9541 *data = i2c_get_clientdata(client); + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9541_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9541_release_chan(struct i2c_adapter *adap, + void *client, u32 chan) +{ + pca9541_release_bus(client); + return 0; +} + +/* + * I2C init/probing/exit functions + */ +static int pca9541_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = client->dev.platform_data; + struct pca9541 *data; + int force; + int ret = -ENODEV; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + goto err; + + data = kzalloc(sizeof(struct pca9541), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto err; + } + + i2c_set_clientdata(client, data); + + /* + * I2C accesses are unprotected here. + * We have to lock the adapter before releasing the bus. + */ + i2c_lock_adapter(adap); + pca9541_release_bus(client); + i2c_unlock_adapter(adap); + + /* Create mux adapter */ + + force = 0; + if (pdata) + force = pdata->modes[0].adap_id; + data->mux_adap = i2c_add_mux_adapter(adap, &client->dev, client, + force, 0, + pca9541_select_chan, + pca9541_release_chan); + + if (data->mux_adap == NULL) { + dev_err(&client->dev, "failed to register master selector\n"); + goto exit_free; + } + + dev_info(&client->dev, "registered master selector for I2C %s\n", + client->name); + + return 0; + +exit_free: + kfree(data); +err: + return ret; +} + +static int pca9541_remove(struct i2c_client *client) +{ + struct pca9541 *data = i2c_get_clientdata(client); + + i2c_del_mux_adapter(data->mux_adap); + + kfree(data); + return 0; +} + +static struct i2c_driver pca9541_driver = { + .driver = { + .name = "pca9541", + .owner = THIS_MODULE, + }, + .probe = pca9541_probe, + .remove = pca9541_remove, + .id_table = pca9541_id, +}; + +module_i2c_driver(pca9541_driver); + +MODULE_AUTHOR("Guenter Roeck "); +MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c new file mode 100644 index 000000000000..f2dfe0d8fcce --- /dev/null +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -0,0 +1,291 @@ +/* + * I2C multiplexer + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This module supports the PCA954x series of I2C multiplexer/switch chips + * made by Philips Semiconductors. + * This includes the: + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 + * and PCA9548. + * + * These chips are all controlled via the I2C bus itself, and all have a + * single 8-bit register. The upstream "parent" bus fans out to two, + * four, or eight downstream busses or channels; which of these + * are selected is determined by the chip type and register contents. A + * mux can select only one sub-bus at a time; a switch can select any + * combination simultaneously. + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define PCA954X_MAX_NCHANS 8 + +enum pca_type { + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, +}; + +struct pca954x { + enum pca_type type; + struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS]; + + u8 last_chan; /* last register value */ +}; + +struct chip_desc { + u8 nchans; + u8 enable; /* used for muxes only */ + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9543] = { + .nchans = 2, + .muxtype = pca954x_isswi, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9545] = { + .nchans = 4, + .muxtype = pca954x_isswi, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + }, +}; + +static const struct i2c_device_id pca954x_id[] = { + { "pca9540", pca_9540 }, + { "pca9542", pca_9540 }, + { "pca9543", pca_9543 }, + { "pca9544", pca_9544 }, + { "pca9545", pca_9545 }, + { "pca9546", pca_9545 }, + { "pca9547", pca_9547 }, + { "pca9548", pca_9548 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pca954x_id); + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int pca954x_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + int ret = -ENODEV; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[1]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 1; + buf[0] = val; + msg.buf = buf; + ret = adap->algo->master_xfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + val, I2C_SMBUS_BYTE, &data); + } + + return ret; +} + +static int pca954x_select_chan(struct i2c_adapter *adap, + void *client, u32 chan) +{ + struct pca954x *data = i2c_get_clientdata(client); + const struct chip_desc *chip = &chips[data->type]; + u8 regval; + int ret = 0; + + /* we make switches look like muxes, not sure how to be smarter */ + if (chip->muxtype == pca954x_ismux) + regval = chan | chip->enable; + else + regval = 1 << chan; + + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(adap, client, regval); + data->last_chan = regval; + } + + return ret; +} + +static int pca954x_deselect_mux(struct i2c_adapter *adap, + void *client, u32 chan) +{ + struct pca954x *data = i2c_get_clientdata(client); + + /* Deselect active channel */ + data->last_chan = 0; + return pca954x_reg_write(adap, client, data->last_chan); +} + +/* + * I2C init/probing/exit functions + */ +static int pca954x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct pca954x_platform_data *pdata = client->dev.platform_data; + int num, force; + struct pca954x *data; + int ret = -ENODEV; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto err; + + data = kzalloc(sizeof(struct pca954x), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto err; + } + + i2c_set_clientdata(client, data); + + /* Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to disconnected state. + */ + if (i2c_smbus_write_byte(client, 0) < 0) { + dev_warn(&client->dev, "probe failed\n"); + goto exit_free; + } + + data->type = id->driver_data; + data->last_chan = 0; /* force the first selection */ + + /* Now create an adapter for each channel */ + for (num = 0; num < chips[data->type].nchans; num++) { + force = 0; /* dynamic adap number */ + if (pdata) { + if (num < pdata->num_modes) + /* force static number */ + force = pdata->modes[num].adap_id; + else + /* discard unconfigured channels */ + break; + } + + data->virt_adaps[num] = + i2c_add_mux_adapter(adap, &client->dev, client, + force, num, pca954x_select_chan, + (pdata && pdata->modes[num].deselect_on_exit) + ? pca954x_deselect_mux : NULL); + + if (data->virt_adaps[num] == NULL) { + ret = -ENODEV; + dev_err(&client->dev, + "failed to register multiplexed adapter" + " %d as bus %d\n", num, force); + goto virt_reg_failed; + } + } + + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s %s\n", + num, chips[data->type].muxtype == pca954x_ismux + ? "mux" : "switch", client->name); + + return 0; + +virt_reg_failed: + for (num--; num >= 0; num--) + i2c_del_mux_adapter(data->virt_adaps[num]); +exit_free: + kfree(data); +err: + return ret; +} + +static int pca954x_remove(struct i2c_client *client) +{ + struct pca954x *data = i2c_get_clientdata(client); + const struct chip_desc *chip = &chips[data->type]; + int i, err; + + for (i = 0; i < chip->nchans; ++i) + if (data->virt_adaps[i]) { + err = i2c_del_mux_adapter(data->virt_adaps[i]); + if (err) + return err; + data->virt_adaps[i] = NULL; + } + + kfree(data); + return 0; +} + +static struct i2c_driver pca954x_driver = { + .driver = { + .name = "pca954x", + .owner = THIS_MODULE, + }, + .probe = pca954x_probe, + .remove = pca954x_remove, + .id_table = pca954x_id, +}; + +module_i2c_driver(pca954x_driver); + +MODULE_AUTHOR("Rodolfo Giometti "); +MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/pca9541.c deleted file mode 100644 index 8aacde1516ac..000000000000 --- a/drivers/i2c/muxes/pca9541.c +++ /dev/null @@ -1,401 +0,0 @@ -/* - * I2C multiplexer driver for PCA9541 bus master selector - * - * Copyright (c) 2010 Ericsson AB. - * - * Author: Guenter Roeck - * - * Derived from: - * pca954x.c - * - * Copyright (c) 2008-2009 Rodolfo Giometti - * Copyright (c) 2008-2009 Eurotech S.p.A. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* - * The PCA9541 is a bus master selector. It supports two I2C masters connected - * to a single slave bus. - * - * Before each bus transaction, a master has to acquire bus ownership. After the - * transaction is complete, bus ownership has to be released. This fits well - * into the I2C multiplexer framework, which provides select and release - * functions for this purpose. For this reason, this driver is modeled as - * single-channel I2C bus multiplexer. - * - * This driver assumes that the two bus masters are controlled by two different - * hosts. If a single host controls both masters, platform code has to ensure - * that only one of the masters is instantiated at any given time. - */ - -#define PCA9541_CONTROL 0x01 -#define PCA9541_ISTAT 0x02 - -#define PCA9541_CTL_MYBUS (1 << 0) -#define PCA9541_CTL_NMYBUS (1 << 1) -#define PCA9541_CTL_BUSON (1 << 2) -#define PCA9541_CTL_NBUSON (1 << 3) -#define PCA9541_CTL_BUSINIT (1 << 4) -#define PCA9541_CTL_TESTON (1 << 6) -#define PCA9541_CTL_NTESTON (1 << 7) - -#define PCA9541_ISTAT_INTIN (1 << 0) -#define PCA9541_ISTAT_BUSINIT (1 << 1) -#define PCA9541_ISTAT_BUSOK (1 << 2) -#define PCA9541_ISTAT_BUSLOST (1 << 3) -#define PCA9541_ISTAT_MYTEST (1 << 6) -#define PCA9541_ISTAT_NMYTEST (1 << 7) - -#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) -#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) -#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) -#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) - -/* arbitration timeouts, in jiffies */ -#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ -#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ - -/* arbitration retry delays, in us */ -#define SELECT_DELAY_SHORT 50 -#define SELECT_DELAY_LONG 1000 - -struct pca9541 { - struct i2c_adapter *mux_adap; - unsigned long select_timeout; - unsigned long arb_timeout; -}; - -static const struct i2c_device_id pca9541_id[] = { - {"pca9541", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, pca9541_id); - -/* - * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() - * as they will try to lock the adapter a second time. - */ -static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) -{ - struct i2c_adapter *adap = client->adapter; - int ret; - - if (adap->algo->master_xfer) { - struct i2c_msg msg; - char buf[2]; - - msg.addr = client->addr; - msg.flags = 0; - msg.len = 2; - buf[0] = command; - buf[1] = val; - msg.buf = buf; - ret = adap->algo->master_xfer(adap, &msg, 1); - } else { - union i2c_smbus_data data; - - data.byte = val; - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_WRITE, - command, - I2C_SMBUS_BYTE_DATA, &data); - } - - return ret; -} - -/* - * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() - * as they will try to lock adapter a second time. - */ -static int pca9541_reg_read(struct i2c_client *client, u8 command) -{ - struct i2c_adapter *adap = client->adapter; - int ret; - u8 val; - - if (adap->algo->master_xfer) { - struct i2c_msg msg[2] = { - { - .addr = client->addr, - .flags = 0, - .len = 1, - .buf = &command - }, - { - .addr = client->addr, - .flags = I2C_M_RD, - .len = 1, - .buf = &val - } - }; - ret = adap->algo->master_xfer(adap, msg, 2); - if (ret == 2) - ret = val; - else if (ret >= 0) - ret = -EIO; - } else { - union i2c_smbus_data data; - - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_READ, - command, - I2C_SMBUS_BYTE_DATA, &data); - if (!ret) - ret = data.byte; - } - return ret; -} - -/* - * Arbitration management functions - */ - -/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ -static void pca9541_release_bus(struct i2c_client *client) -{ - int reg; - - reg = pca9541_reg_read(client, PCA9541_CONTROL); - if (reg >= 0 && !busoff(reg) && mybus(reg)) - pca9541_reg_write(client, PCA9541_CONTROL, - (reg & PCA9541_CTL_NBUSON) >> 1); -} - -/* - * Arbitration is defined as a two-step process. A bus master can only activate - * the slave bus if it owns it; otherwise it has to request ownership first. - * This multi-step process ensures that access contention is resolved - * gracefully. - * - * Bus Ownership Other master Action - * state requested access - * ---------------------------------------------------- - * off - yes wait for arbitration timeout or - * for other master to drop request - * off no no take ownership - * off yes no turn on bus - * on yes - done - * on no - wait for arbitration timeout or - * for other master to release bus - * - * The main contention point occurs if the slave bus is off and both masters - * request ownership at the same time. In this case, one master will turn on - * the slave bus, believing that it owns it. The other master will request - * bus ownership. Result is that the bus is turned on, and master which did - * _not_ own the slave bus before ends up owning it. - */ - -/* Control commands per PCA9541 datasheet */ -static const u8 pca9541_control[16] = { - 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 -}; - -/* - * Channel arbitration - * - * Return values: - * <0: error - * 0 : bus not acquired - * 1 : bus acquired - */ -static int pca9541_arbitrate(struct i2c_client *client) -{ - struct pca9541 *data = i2c_get_clientdata(client); - int reg; - - reg = pca9541_reg_read(client, PCA9541_CONTROL); - if (reg < 0) - return reg; - - if (busoff(reg)) { - int istat; - /* - * Bus is off. Request ownership or turn it on unless - * other master requested ownership. - */ - istat = pca9541_reg_read(client, PCA9541_ISTAT); - if (!(istat & PCA9541_ISTAT_NMYTEST) - || time_is_before_eq_jiffies(data->arb_timeout)) { - /* - * Other master did not request ownership, - * or arbitration timeout expired. Take the bus. - */ - pca9541_reg_write(client, - PCA9541_CONTROL, - pca9541_control[reg & 0x0f] - | PCA9541_CTL_NTESTON); - data->select_timeout = SELECT_DELAY_SHORT; - } else { - /* - * Other master requested ownership. - * Set extra long timeout to give it time to acquire it. - */ - data->select_timeout = SELECT_DELAY_LONG * 2; - } - } else if (mybus(reg)) { - /* - * Bus is on, and we own it. We are done with acquisition. - * Reset NTESTON and BUSINIT, then return success. - */ - if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) - pca9541_reg_write(client, - PCA9541_CONTROL, - reg & ~(PCA9541_CTL_NTESTON - | PCA9541_CTL_BUSINIT)); - return 1; - } else { - /* - * Other master owns the bus. - * If arbitration timeout has expired, force ownership. - * Otherwise request it. - */ - data->select_timeout = SELECT_DELAY_LONG; - if (time_is_before_eq_jiffies(data->arb_timeout)) { - /* Time is up, take the bus and reset it. */ - pca9541_reg_write(client, - PCA9541_CONTROL, - pca9541_control[reg & 0x0f] - | PCA9541_CTL_BUSINIT - | PCA9541_CTL_NTESTON); - } else { - /* Request bus ownership if needed */ - if (!(reg & PCA9541_CTL_NTESTON)) - pca9541_reg_write(client, - PCA9541_CONTROL, - reg | PCA9541_CTL_NTESTON); - } - } - return 0; -} - -static int pca9541_select_chan(struct i2c_adapter *adap, void *client, u32 chan) -{ - struct pca9541 *data = i2c_get_clientdata(client); - int ret; - unsigned long timeout = jiffies + ARB2_TIMEOUT; - /* give up after this time */ - - data->arb_timeout = jiffies + ARB_TIMEOUT; - /* force bus ownership after this time */ - - do { - ret = pca9541_arbitrate(client); - if (ret) - return ret < 0 ? ret : 0; - - if (data->select_timeout == SELECT_DELAY_SHORT) - udelay(data->select_timeout); - else - msleep(data->select_timeout / 1000); - } while (time_is_after_eq_jiffies(timeout)); - - return -ETIMEDOUT; -} - -static int pca9541_release_chan(struct i2c_adapter *adap, - void *client, u32 chan) -{ - pca9541_release_bus(client); - return 0; -} - -/* - * I2C init/probing/exit functions - */ -static int pca9541_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct i2c_adapter *adap = client->adapter; - struct pca954x_platform_data *pdata = client->dev.platform_data; - struct pca9541 *data; - int force; - int ret = -ENODEV; - - if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) - goto err; - - data = kzalloc(sizeof(struct pca9541), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; - goto err; - } - - i2c_set_clientdata(client, data); - - /* - * I2C accesses are unprotected here. - * We have to lock the adapter before releasing the bus. - */ - i2c_lock_adapter(adap); - pca9541_release_bus(client); - i2c_unlock_adapter(adap); - - /* Create mux adapter */ - - force = 0; - if (pdata) - force = pdata->modes[0].adap_id; - data->mux_adap = i2c_add_mux_adapter(adap, &client->dev, client, - force, 0, - pca9541_select_chan, - pca9541_release_chan); - - if (data->mux_adap == NULL) { - dev_err(&client->dev, "failed to register master selector\n"); - goto exit_free; - } - - dev_info(&client->dev, "registered master selector for I2C %s\n", - client->name); - - return 0; - -exit_free: - kfree(data); -err: - return ret; -} - -static int pca9541_remove(struct i2c_client *client) -{ - struct pca9541 *data = i2c_get_clientdata(client); - - i2c_del_mux_adapter(data->mux_adap); - - kfree(data); - return 0; -} - -static struct i2c_driver pca9541_driver = { - .driver = { - .name = "pca9541", - .owner = THIS_MODULE, - }, - .probe = pca9541_probe, - .remove = pca9541_remove, - .id_table = pca9541_id, -}; - -module_i2c_driver(pca9541_driver); - -MODULE_AUTHOR("Guenter Roeck "); -MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c deleted file mode 100644 index f2dfe0d8fcce..000000000000 --- a/drivers/i2c/muxes/pca954x.c +++ /dev/null @@ -1,291 +0,0 @@ -/* - * I2C multiplexer - * - * Copyright (c) 2008-2009 Rodolfo Giometti - * Copyright (c) 2008-2009 Eurotech S.p.A. - * - * This module supports the PCA954x series of I2C multiplexer/switch chips - * made by Philips Semiconductors. - * This includes the: - * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 - * and PCA9548. - * - * These chips are all controlled via the I2C bus itself, and all have a - * single 8-bit register. The upstream "parent" bus fans out to two, - * four, or eight downstream busses or channels; which of these - * are selected is determined by the chip type and register contents. A - * mux can select only one sub-bus at a time; a switch can select any - * combination simultaneously. - * - * Based on: - * pca954x.c from Kumar Gala - * Copyright (C) 2006 - * - * Based on: - * pca954x.c from Ken Harrenstien - * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) - * - * Based on: - * i2c-virtual_cb.c from Brian Kuschak - * and - * pca9540.c from Jean Delvare . - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#define PCA954X_MAX_NCHANS 8 - -enum pca_type { - pca_9540, - pca_9542, - pca_9543, - pca_9544, - pca_9545, - pca_9546, - pca_9547, - pca_9548, -}; - -struct pca954x { - enum pca_type type; - struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS]; - - u8 last_chan; /* last register value */ -}; - -struct chip_desc { - u8 nchans; - u8 enable; /* used for muxes only */ - enum muxtype { - pca954x_ismux = 0, - pca954x_isswi - } muxtype; -}; - -/* Provide specs for the PCA954x types we know about */ -static const struct chip_desc chips[] = { - [pca_9540] = { - .nchans = 2, - .enable = 0x4, - .muxtype = pca954x_ismux, - }, - [pca_9543] = { - .nchans = 2, - .muxtype = pca954x_isswi, - }, - [pca_9544] = { - .nchans = 4, - .enable = 0x4, - .muxtype = pca954x_ismux, - }, - [pca_9545] = { - .nchans = 4, - .muxtype = pca954x_isswi, - }, - [pca_9547] = { - .nchans = 8, - .enable = 0x8, - .muxtype = pca954x_ismux, - }, - [pca_9548] = { - .nchans = 8, - .muxtype = pca954x_isswi, - }, -}; - -static const struct i2c_device_id pca954x_id[] = { - { "pca9540", pca_9540 }, - { "pca9542", pca_9540 }, - { "pca9543", pca_9543 }, - { "pca9544", pca_9544 }, - { "pca9545", pca_9545 }, - { "pca9546", pca_9545 }, - { "pca9547", pca_9547 }, - { "pca9548", pca_9548 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, pca954x_id); - -/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() - for this as they will try to lock adapter a second time */ -static int pca954x_reg_write(struct i2c_adapter *adap, - struct i2c_client *client, u8 val) -{ - int ret = -ENODEV; - - if (adap->algo->master_xfer) { - struct i2c_msg msg; - char buf[1]; - - msg.addr = client->addr; - msg.flags = 0; - msg.len = 1; - buf[0] = val; - msg.buf = buf; - ret = adap->algo->master_xfer(adap, &msg, 1); - } else { - union i2c_smbus_data data; - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_WRITE, - val, I2C_SMBUS_BYTE, &data); - } - - return ret; -} - -static int pca954x_select_chan(struct i2c_adapter *adap, - void *client, u32 chan) -{ - struct pca954x *data = i2c_get_clientdata(client); - const struct chip_desc *chip = &chips[data->type]; - u8 regval; - int ret = 0; - - /* we make switches look like muxes, not sure how to be smarter */ - if (chip->muxtype == pca954x_ismux) - regval = chan | chip->enable; - else - regval = 1 << chan; - - /* Only select the channel if its different from the last channel */ - if (data->last_chan != regval) { - ret = pca954x_reg_write(adap, client, regval); - data->last_chan = regval; - } - - return ret; -} - -static int pca954x_deselect_mux(struct i2c_adapter *adap, - void *client, u32 chan) -{ - struct pca954x *data = i2c_get_clientdata(client); - - /* Deselect active channel */ - data->last_chan = 0; - return pca954x_reg_write(adap, client, data->last_chan); -} - -/* - * I2C init/probing/exit functions - */ -static int pca954x_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - struct pca954x_platform_data *pdata = client->dev.platform_data; - int num, force; - struct pca954x *data; - int ret = -ENODEV; - - if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) - goto err; - - data = kzalloc(sizeof(struct pca954x), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; - goto err; - } - - i2c_set_clientdata(client, data); - - /* Write the mux register at addr to verify - * that the mux is in fact present. This also - * initializes the mux to disconnected state. - */ - if (i2c_smbus_write_byte(client, 0) < 0) { - dev_warn(&client->dev, "probe failed\n"); - goto exit_free; - } - - data->type = id->driver_data; - data->last_chan = 0; /* force the first selection */ - - /* Now create an adapter for each channel */ - for (num = 0; num < chips[data->type].nchans; num++) { - force = 0; /* dynamic adap number */ - if (pdata) { - if (num < pdata->num_modes) - /* force static number */ - force = pdata->modes[num].adap_id; - else - /* discard unconfigured channels */ - break; - } - - data->virt_adaps[num] = - i2c_add_mux_adapter(adap, &client->dev, client, - force, num, pca954x_select_chan, - (pdata && pdata->modes[num].deselect_on_exit) - ? pca954x_deselect_mux : NULL); - - if (data->virt_adaps[num] == NULL) { - ret = -ENODEV; - dev_err(&client->dev, - "failed to register multiplexed adapter" - " %d as bus %d\n", num, force); - goto virt_reg_failed; - } - } - - dev_info(&client->dev, - "registered %d multiplexed busses for I2C %s %s\n", - num, chips[data->type].muxtype == pca954x_ismux - ? "mux" : "switch", client->name); - - return 0; - -virt_reg_failed: - for (num--; num >= 0; num--) - i2c_del_mux_adapter(data->virt_adaps[num]); -exit_free: - kfree(data); -err: - return ret; -} - -static int pca954x_remove(struct i2c_client *client) -{ - struct pca954x *data = i2c_get_clientdata(client); - const struct chip_desc *chip = &chips[data->type]; - int i, err; - - for (i = 0; i < chip->nchans; ++i) - if (data->virt_adaps[i]) { - err = i2c_del_mux_adapter(data->virt_adaps[i]); - if (err) - return err; - data->virt_adaps[i] = NULL; - } - - kfree(data); - return 0; -} - -static struct i2c_driver pca954x_driver = { - .driver = { - .name = "pca954x", - .owner = THIS_MODULE, - }, - .probe = pca954x_probe, - .remove = pca954x_remove, - .id_table = pca954x_id, -}; - -module_i2c_driver(pca954x_driver); - -MODULE_AUTHOR("Rodolfo Giometti "); -MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); -MODULE_LICENSE("GPL v2"); -- cgit v1.2.2 From 353f56b5f3093b6d75e81f523a8b10748a40f278 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 24 Apr 2012 12:49:35 +0530 Subject: i2c: tegra: fix 10bit address configuration The slave address of device to be configured in packet header as follows: 7 bit address: PacketHeader3[7:1] 10 bit address: PacketHeader3[9:0] Fixing the code to make packet header3 properly. Signed-off-by: Laxman Dewangan Acked-by: Jean Delvare Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-tegra.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 55e5ea62ccee..18067b3ee8c9 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -476,12 +476,15 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, packet_header = msg->len - 1; i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); - packet_header = msg->addr << I2C_HEADER_SLAVE_ADDR_SHIFT; - packet_header |= I2C_HEADER_IE_ENABLE; + packet_header = I2C_HEADER_IE_ENABLE; if (!stop) packet_header |= I2C_HEADER_REPEAT_START; - if (msg->flags & I2C_M_TEN) + if (msg->flags & I2C_M_TEN) { + packet_header |= msg->addr; packet_header |= I2C_HEADER_10BIT_ADDR; + } else { + packet_header |= msg->addr << I2C_HEADER_SLAVE_ADDR_SHIFT; + } if (msg->flags & I2C_M_IGNORE_NAK) packet_header |= I2C_HEADER_CONT_ON_NAK; if (msg->flags & I2C_M_RD) @@ -557,7 +560,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], static u32 tegra_i2c_func(struct i2c_adapter *adap) { - return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR; } static const struct i2c_algorithm tegra_i2c_algo = { -- cgit v1.2.2 From e7065e20d9a6a8ee4a8b31ebe71d6c00a0f45354 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sat, 28 Apr 2012 15:32:06 +0200 Subject: i2c: Rename last mux driver to standard pattern Update the MAINTAINERS entry and all other references accordingly. Based on an original patch by Wolfram Sang. Signed-off-by: Jean Delvare Acked-by: Peter Korsgaard [wsa: fixed merge conflict due to rework in i2c_add_mux_adapter()] Signed-off-by: Wolfram Sang --- drivers/i2c/muxes/Kconfig | 2 +- drivers/i2c/muxes/Makefile | 2 +- drivers/i2c/muxes/gpio-i2cmux.c | 174 --------------------------------------- drivers/i2c/muxes/i2c-mux-gpio.c | 173 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 175 insertions(+), 176 deletions(-) delete mode 100644 drivers/i2c/muxes/gpio-i2cmux.c create mode 100644 drivers/i2c/muxes/i2c-mux-gpio.c (limited to 'drivers') diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index e14a4205e5c6..beb2491db274 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -15,7 +15,7 @@ config I2C_MUX_GPIO through GPIO pins. This driver can also be built as a module. If so, the module - will be called gpio-i2cmux. + will be called i2c-mux-gpio. config I2C_MUX_PCA9541 tristate "NXP PCA9541 I2C Master Selector" diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile index 0868335cff11..5826249b29ca 100644 --- a/drivers/i2c/muxes/Makefile +++ b/drivers/i2c/muxes/Makefile @@ -1,7 +1,7 @@ # # Makefile for multiplexer I2C chip drivers. -obj-$(CONFIG_I2C_MUX_GPIO) += gpio-i2cmux.o +obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/gpio-i2cmux.c deleted file mode 100644 index fc5c1ef9b6ec..000000000000 --- a/drivers/i2c/muxes/gpio-i2cmux.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * I2C multiplexer using GPIO API - * - * Peter Korsgaard - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -struct gpiomux { - struct i2c_adapter *parent; - struct i2c_adapter **adap; /* child busses */ - struct gpio_i2cmux_platform_data data; -}; - -static void gpiomux_set(const struct gpiomux *mux, unsigned val) -{ - int i; - - for (i = 0; i < mux->data.n_gpios; i++) - gpio_set_value(mux->data.gpios[i], val & (1 << i)); -} - -static int gpiomux_select(struct i2c_adapter *adap, void *data, u32 chan) -{ - struct gpiomux *mux = data; - - gpiomux_set(mux, mux->data.values[chan]); - - return 0; -} - -static int gpiomux_deselect(struct i2c_adapter *adap, void *data, u32 chan) -{ - struct gpiomux *mux = data; - - gpiomux_set(mux, mux->data.idle); - - return 0; -} - -static int __devinit gpiomux_probe(struct platform_device *pdev) -{ - struct gpiomux *mux; - struct gpio_i2cmux_platform_data *pdata; - struct i2c_adapter *parent; - int (*deselect) (struct i2c_adapter *, void *, u32); - unsigned initial_state; - int i, ret; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "Missing platform data\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(pdata->parent); - if (!parent) { - dev_err(&pdev->dev, "Parent adapter (%d) not found\n", - pdata->parent); - return -ENODEV; - } - - mux = kzalloc(sizeof(*mux), GFP_KERNEL); - if (!mux) { - ret = -ENOMEM; - goto alloc_failed; - } - - mux->parent = parent; - mux->data = *pdata; - mux->adap = kzalloc(sizeof(struct i2c_adapter *) * pdata->n_values, - GFP_KERNEL); - if (!mux->adap) { - ret = -ENOMEM; - goto alloc_failed2; - } - - if (pdata->idle != GPIO_I2CMUX_NO_IDLE) { - initial_state = pdata->idle; - deselect = gpiomux_deselect; - } else { - initial_state = pdata->values[0]; - deselect = NULL; - } - - for (i = 0; i < pdata->n_gpios; i++) { - ret = gpio_request(pdata->gpios[i], "gpio-i2cmux"); - if (ret) - goto err_request_gpio; - gpio_direction_output(pdata->gpios[i], - initial_state & (1 << i)); - } - - for (i = 0; i < pdata->n_values; i++) { - u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0; - - mux->adap[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, - nr, i, - gpiomux_select, deselect); - if (!mux->adap[i]) { - ret = -ENODEV; - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); - goto add_adapter_failed; - } - } - - dev_info(&pdev->dev, "%d port mux on %s adapter\n", - pdata->n_values, parent->name); - - platform_set_drvdata(pdev, mux); - - return 0; - -add_adapter_failed: - for (; i > 0; i--) - i2c_del_mux_adapter(mux->adap[i - 1]); - i = pdata->n_gpios; -err_request_gpio: - for (; i > 0; i--) - gpio_free(pdata->gpios[i - 1]); - kfree(mux->adap); -alloc_failed2: - kfree(mux); -alloc_failed: - i2c_put_adapter(parent); - - return ret; -} - -static int __devexit gpiomux_remove(struct platform_device *pdev) -{ - struct gpiomux *mux = platform_get_drvdata(pdev); - int i; - - for (i = 0; i < mux->data.n_values; i++) - i2c_del_mux_adapter(mux->adap[i]); - - for (i = 0; i < mux->data.n_gpios; i++) - gpio_free(mux->data.gpios[i]); - - platform_set_drvdata(pdev, NULL); - i2c_put_adapter(mux->parent); - kfree(mux->adap); - kfree(mux); - - return 0; -} - -static struct platform_driver gpiomux_driver = { - .probe = gpiomux_probe, - .remove = __devexit_p(gpiomux_remove), - .driver = { - .owner = THIS_MODULE, - .name = "gpio-i2cmux", - }, -}; - -module_platform_driver(gpiomux_driver); - -MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver"); -MODULE_AUTHOR("Peter Korsgaard "); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:gpio-i2cmux"); diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c new file mode 100644 index 000000000000..68b1f8ec3436 --- /dev/null +++ b/drivers/i2c/muxes/i2c-mux-gpio.c @@ -0,0 +1,173 @@ +/* + * I2C multiplexer using GPIO API + * + * Peter Korsgaard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct gpiomux { + struct i2c_adapter *parent; + struct i2c_adapter **adap; /* child busses */ + struct i2c_mux_gpio_platform_data data; +}; + +static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val) +{ + int i; + + for (i = 0; i < mux->data.n_gpios; i++) + gpio_set_value(mux->data.gpios[i], val & (1 << i)); +} + +static int i2c_mux_gpio_select(struct i2c_adapter *adap, void *data, u32 chan) +{ + struct gpiomux *mux = data; + + i2c_mux_gpio_set(mux, mux->data.values[chan]); + + return 0; +} + +static int i2c_mux_gpio_deselect(struct i2c_adapter *adap, void *data, u32 chan) +{ + struct gpiomux *mux = data; + + i2c_mux_gpio_set(mux, mux->data.idle); + + return 0; +} + +static int __devinit i2c_mux_gpio_probe(struct platform_device *pdev) +{ + struct gpiomux *mux; + struct i2c_mux_gpio_platform_data *pdata; + struct i2c_adapter *parent; + int (*deselect) (struct i2c_adapter *, void *, u32); + unsigned initial_state; + int i, ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + ret = -ENOMEM; + goto alloc_failed; + } + + mux->parent = parent; + mux->data = *pdata; + mux->adap = kzalloc(sizeof(struct i2c_adapter *) * pdata->n_values, + GFP_KERNEL); + if (!mux->adap) { + ret = -ENOMEM; + goto alloc_failed2; + } + + if (pdata->idle != I2C_MUX_GPIO_NO_IDLE) { + initial_state = pdata->idle; + deselect = i2c_mux_gpio_deselect; + } else { + initial_state = pdata->values[0]; + deselect = NULL; + } + + for (i = 0; i < pdata->n_gpios; i++) { + ret = gpio_request(pdata->gpios[i], "i2c-mux-gpio"); + if (ret) + goto err_request_gpio; + gpio_direction_output(pdata->gpios[i], + initial_state & (1 << i)); + } + + for (i = 0; i < pdata->n_values; i++) { + u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0; + + mux->adap[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, nr, i, + i2c_mux_gpio_select, deselect); + if (!mux->adap[i]) { + ret = -ENODEV; + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + dev_info(&pdev->dev, "%d port mux on %s adapter\n", + pdata->n_values, parent->name); + + platform_set_drvdata(pdev, mux); + + return 0; + +add_adapter_failed: + for (; i > 0; i--) + i2c_del_mux_adapter(mux->adap[i - 1]); + i = pdata->n_gpios; +err_request_gpio: + for (; i > 0; i--) + gpio_free(pdata->gpios[i - 1]); + kfree(mux->adap); +alloc_failed2: + kfree(mux); +alloc_failed: + i2c_put_adapter(parent); + + return ret; +} + +static int __devexit i2c_mux_gpio_remove(struct platform_device *pdev) +{ + struct gpiomux *mux = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < mux->data.n_values; i++) + i2c_del_mux_adapter(mux->adap[i]); + + for (i = 0; i < mux->data.n_gpios; i++) + gpio_free(mux->data.gpios[i]); + + platform_set_drvdata(pdev, NULL); + i2c_put_adapter(mux->parent); + kfree(mux->adap); + kfree(mux); + + return 0; +} + +static struct platform_driver i2c_mux_gpio_driver = { + .probe = i2c_mux_gpio_probe, + .remove = __devexit_p(i2c_mux_gpio_remove), + .driver = { + .owner = THIS_MODULE, + .name = "i2c-mux-gpio", + }, +}; + +module_platform_driver(i2c_mux_gpio_driver); + +MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver"); +MODULE_AUTHOR("Peter Korsgaard "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:i2c-mux-gpio"); -- cgit v1.2.2 From 3ac0b3379307f9c9bd00beacbf02623ab127e334 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 25 Apr 2012 15:48:53 +0200 Subject: I2C: xiic: Add OF binding support Signed-off-by: Lars-Peter Clausen Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-xiic.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 2bded7647ef2..641d0e5e3303 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -40,6 +40,7 @@ #include #include #include +#include #define DRIVER_NAME "xiic-i2c" @@ -705,8 +706,6 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev) goto resource_missing; pdata = (struct xiic_i2c_platform_data *) pdev->dev.platform_data; - if (!pdata) - return -EINVAL; i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); if (!i2c) @@ -730,6 +729,7 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev) i2c->adap = xiic_adapter; i2c_set_adapdata(&i2c->adap, i2c); i2c->adap.dev.parent = &pdev->dev; + i2c->adap.dev.of_node = pdev->dev.of_node; xiic_reinit(i2c); @@ -748,9 +748,13 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev) goto add_adapter_failed; } - /* add in known devices to the bus */ - for (i = 0; i < pdata->num_devices; i++) - i2c_new_device(&i2c->adap, pdata->devices + i); + if (pdata) { + /* add in known devices to the bus */ + for (i = 0; i < pdata->num_devices; i++) + i2c_new_device(&i2c->adap, pdata->devices + i); + } + + of_i2c_register_devices(&i2c->adap); return 0; @@ -795,12 +799,21 @@ static int __devexit xiic_i2c_remove(struct platform_device* pdev) return 0; } +#if defined(CONFIG_OF) +static const struct of_device_id xiic_of_match[] __devinitconst = { + { .compatible = "xlnx,xps-iic-2.00.a", }, + {}, +}; +MODULE_DEVICE_TABLE(of, xiic_of_match); +#endif + static struct platform_driver xiic_i2c_driver = { .probe = xiic_i2c_probe, .remove = __devexit_p(xiic_i2c_remove), .driver = { .owner = THIS_MODULE, .name = DRIVER_NAME, + .of_match_table = of_match_ptr(xiic_of_match), }, }; -- cgit v1.2.2 From c889e91d2cc22123f20f40dde0c0a91856a20eea Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Mon, 7 May 2012 12:16:19 +0530 Subject: i2c: tegra: notify transfer-complete after clearing status. The notification of the transfer complete by calling complete() should be done after clearing all interrupt status. This avoids the race condition of misconfigure the i2c controller in multi-core environment. Signed-off-by: Laxman Dewangan Acked-by: Stephen Warren Signed-off-by: Wolfram Sang Cc: stable@kernel.org --- drivers/i2c/busses/i2c-tegra.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 18067b3ee8c9..8b2e555a9563 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -401,8 +401,6 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) disable_irq_nosync(i2c_dev->irq); i2c_dev->irq_disabled = 1; } - - complete(&i2c_dev->msg_complete); goto err; } @@ -411,7 +409,6 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) i2c_dev->msg_err |= I2C_ERR_NO_ACK; if (status & I2C_INT_ARBITRATION_LOST) i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; - complete(&i2c_dev->msg_complete); goto err; } @@ -429,14 +426,14 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); } + i2c_writel(i2c_dev, status, I2C_INT_STATUS); + if (i2c_dev->is_dvc) + dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); + if (status & I2C_INT_PACKET_XFER_COMPLETE) { BUG_ON(i2c_dev->msg_buf_remaining); complete(&i2c_dev->msg_complete); } - - i2c_writel(i2c_dev, status, I2C_INT_STATUS); - if (i2c_dev->is_dvc) - dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); return IRQ_HANDLED; err: /* An error occurred, mask all interrupts */ @@ -446,6 +443,8 @@ err: i2c_writel(i2c_dev, status, I2C_INT_STATUS); if (i2c_dev->is_dvc) dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); + + complete(&i2c_dev->msg_complete); return IRQ_HANDLED; } -- cgit v1.2.2 From a5063f16e2963c5d5b54692fb2da2e327162da78 Mon Sep 17 00:00:00 2001 From: Ganesan Ramalingam Date: Tue, 8 May 2012 18:55:28 +0530 Subject: i2c: ocores: register OF i2c devices Call of_i2c_register_devices() in probe function to register i2c devices specified in the device tree or OF. Signed-off-by: Ganesan Ramalingam Signed-off-by: Jayachandran C [wsa: add proper braces] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-ocores.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index 18068dee48f1..75194c579b6d 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -55,6 +55,7 @@ #include #include #include +#include struct ocores_i2c { void __iomem *base; @@ -343,6 +344,8 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev) if (pdata) { for (i = 0; i < pdata->num_devices; i++) i2c_new_device(&i2c->adap, pdata->devices + i); + } else { + of_i2c_register_devices(&i2c->adap); } return 0; -- cgit v1.2.2 From 9868a060ccf769c08ec378a9829137e272e9a92c Mon Sep 17 00:00:00 2001 From: Marcus Folkesson Date: Thu, 3 May 2012 15:56:36 +0200 Subject: i2c: davinci: Free requested IRQ in remove The freed IRQ is not necessary the one requested in probe. Even if it was, with two or more i2c-controllers it will fails anyway. Signed-off-by: Marcus Folkesson Signed-off-by: Wolfram Sang Cc: stable@kernel.org --- drivers/i2c/busses/i2c-davinci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index a76d85fa3ad7..79b4bcb3b85c 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -755,7 +755,7 @@ static int davinci_i2c_remove(struct platform_device *pdev) dev->clk = NULL; davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); - free_irq(IRQ_I2C, dev); + free_irq(dev->irq, dev); iounmap(dev->base); kfree(dev); -- cgit v1.2.2 From 55b8fd4f428501b0f35d62b8313311fd9863c188 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 10 Apr 2012 09:02:35 +0530 Subject: SPEAr: clk: Add VCO-PLL Synthesizer clock All SPEAr SoC's contain PLLs. Their Fout is derived based on following equations - In normal mode vco = (2 * M[15:8] * Fin)/N - In Dithered mode vco = (2 * M[15:0] * Fin)/(256 * N) pll_rate = vco/2^p vco and pll are very closely bound to each other, "vco needs to program: mode, m & n" and "pll needs to program p", both share common enable/disable logic and registers. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette --- drivers/clk/Makefile | 3 + drivers/clk/spear/Makefile | 5 + drivers/clk/spear/clk-vco-pll.c | 363 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/spear/clk.c | 36 ++++ drivers/clk/spear/clk.h | 58 +++++++ 5 files changed, 465 insertions(+) create mode 100644 drivers/clk/spear/Makefile create mode 100644 drivers/clk/spear/clk-vco-pll.c create mode 100644 drivers/clk/spear/clk.c create mode 100644 drivers/clk/spear/clk.h (limited to 'drivers') diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 24aa7144811b..0f5e03d1ef5c 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -2,3 +2,6 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ clk-mux.o clk-divider.o clk-fixed-factor.o + +# SoCs specific +obj-$(CONFIG_PLAT_SPEAR) += spear/ diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile new file mode 100644 index 000000000000..3fc2a3026cc1 --- /dev/null +++ b/drivers/clk/spear/Makefile @@ -0,0 +1,5 @@ +# +# SPEAr Clock specific Makefile +# + +obj-y += clk.o clk-vco-pll.o diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c new file mode 100644 index 000000000000..dcd4bdf4b0d9 --- /dev/null +++ b/drivers/clk/spear/clk-vco-pll.c @@ -0,0 +1,363 @@ +/* + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * VCO-PLL clock implementation + */ + +#define pr_fmt(fmt) "clk-vco-pll: " fmt + +#include +#include +#include +#include +#include "clk.h" + +/* + * DOC: VCO-PLL clock + * + * VCO and PLL rate are derived from following equations: + * + * In normal mode + * vco = (2 * M[15:8] * Fin)/N + * + * In Dithered mode + * vco = (2 * M[15:0] * Fin)/(256 * N) + * + * pll_rate = pll/2^p + * + * vco and pll are very closely bound to each other, "vco needs to program: + * mode, m & n" and "pll needs to program p", both share common enable/disable + * logic. + * + * clk_register_vco_pll() registers instances of both vco & pll. + * CLK_SET_RATE_PARENT flag is forced for pll, as it will always pass its + * set_rate to vco. A single rate table exists for both the clocks, which + * configures m, n and p. + */ + +/* PLL_CTR register masks */ +#define PLL_MODE_NORMAL 0 +#define PLL_MODE_FRACTION 1 +#define PLL_MODE_DITH_DSM 2 +#define PLL_MODE_DITH_SSM 3 +#define PLL_MODE_MASK 3 +#define PLL_MODE_SHIFT 3 +#define PLL_ENABLE 2 + +#define PLL_LOCK_SHIFT 0 +#define PLL_LOCK_MASK 1 + +/* PLL FRQ register masks */ +#define PLL_NORM_FDBK_M_MASK 0xFF +#define PLL_NORM_FDBK_M_SHIFT 24 +#define PLL_DITH_FDBK_M_MASK 0xFFFF +#define PLL_DITH_FDBK_M_SHIFT 16 +#define PLL_DIV_P_MASK 0x7 +#define PLL_DIV_P_SHIFT 8 +#define PLL_DIV_N_MASK 0xFF +#define PLL_DIV_N_SHIFT 0 + +#define to_clk_vco(_hw) container_of(_hw, struct clk_vco, hw) +#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) + +/* Calculates pll clk rate for specific value of mode, m, n and p */ +static unsigned long pll_calc_rate(struct pll_rate_tbl *rtbl, + unsigned long prate, int index, unsigned long *pll_rate) +{ + unsigned long rate = prate; + unsigned int mode; + + mode = rtbl[index].mode ? 256 : 1; + rate = (((2 * rate / 10000) * rtbl[index].m) / (mode * rtbl[index].n)); + + if (pll_rate) + *pll_rate = (rate / (1 << rtbl[index].p)) * 10000; + + return rate * 10000; +} + +static long clk_pll_round_rate_index(struct clk_hw *hw, unsigned long drate, + unsigned long *prate, int *index) +{ + struct clk_pll *pll = to_clk_pll(hw); + unsigned long prev_rate, vco_prev_rate, rate = 0; + unsigned long vco_parent_rate = + __clk_get_rate(__clk_get_parent(__clk_get_parent(hw->clk))); + + if (!prate) { + pr_err("%s: prate is must for pll clk\n", __func__); + return -EINVAL; + } + + for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) { + prev_rate = rate; + vco_prev_rate = *prate; + *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, + &rate); + if (drate < rate) { + /* previous clock was best */ + if (*index) { + rate = prev_rate; + *prate = vco_prev_rate; + (*index)--; + } + break; + } + } + + return rate; +} + +static long clk_pll_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + int unused; + + return clk_pll_round_rate_index(hw, drate, prate, &unused); +} + +static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, unsigned long + parent_rate) +{ + struct clk_pll *pll = to_clk_pll(hw); + unsigned long flags = 0; + unsigned int p; + + if (pll->vco->lock) + spin_lock_irqsave(pll->vco->lock, flags); + + p = readl_relaxed(pll->vco->cfg_reg); + + if (pll->vco->lock) + spin_unlock_irqrestore(pll->vco->lock, flags); + + p = (p >> PLL_DIV_P_SHIFT) & PLL_DIV_P_MASK; + + return parent_rate / (1 << p); +} + +static int clk_pll_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) +{ + struct clk_pll *pll = to_clk_pll(hw); + struct pll_rate_tbl *rtbl = pll->vco->rtbl; + unsigned long flags = 0, val; + int i; + + clk_pll_round_rate_index(hw, drate, NULL, &i); + + if (pll->vco->lock) + spin_lock_irqsave(pll->vco->lock, flags); + + val = readl_relaxed(pll->vco->cfg_reg); + val &= ~(PLL_DIV_P_MASK << PLL_DIV_P_SHIFT); + val |= (rtbl[i].p & PLL_DIV_P_MASK) << PLL_DIV_P_SHIFT; + writel_relaxed(val, pll->vco->cfg_reg); + + if (pll->vco->lock) + spin_unlock_irqrestore(pll->vco->lock, flags); + + return 0; +} + +static struct clk_ops clk_pll_ops = { + .recalc_rate = clk_pll_recalc_rate, + .round_rate = clk_pll_round_rate, + .set_rate = clk_pll_set_rate, +}; + +static inline unsigned long vco_calc_rate(struct clk_hw *hw, + unsigned long prate, int index) +{ + struct clk_vco *vco = to_clk_vco(hw); + + return pll_calc_rate(vco->rtbl, prate, index, NULL); +} + +static long clk_vco_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + struct clk_vco *vco = to_clk_vco(hw); + int unused; + + return clk_round_rate_index(hw, drate, *prate, vco_calc_rate, + vco->rtbl_cnt, &unused); +} + +static unsigned long clk_vco_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_vco *vco = to_clk_vco(hw); + unsigned long flags = 0; + unsigned int num = 2, den = 0, val, mode = 0; + + if (vco->lock) + spin_lock_irqsave(vco->lock, flags); + + mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK; + + val = readl_relaxed(vco->cfg_reg); + + if (vco->lock) + spin_unlock_irqrestore(vco->lock, flags); + + den = (val >> PLL_DIV_N_SHIFT) & PLL_DIV_N_MASK; + + /* calculate numerator & denominator */ + if (!mode) { + /* Normal mode */ + num *= (val >> PLL_NORM_FDBK_M_SHIFT) & PLL_NORM_FDBK_M_MASK; + } else { + /* Dithered mode */ + num *= (val >> PLL_DITH_FDBK_M_SHIFT) & PLL_DITH_FDBK_M_MASK; + den *= 256; + } + + if (!den) { + WARN(1, "%s: denominator can't be zero\n", __func__); + return 0; + } + + return (((parent_rate / 10000) * num) / den) * 10000; +} + +/* Configures new clock rate of vco */ +static int clk_vco_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) +{ + struct clk_vco *vco = to_clk_vco(hw); + struct pll_rate_tbl *rtbl = vco->rtbl; + unsigned long flags = 0, val; + int i; + + clk_round_rate_index(hw, drate, prate, vco_calc_rate, vco->rtbl_cnt, + &i); + + if (vco->lock) + spin_lock_irqsave(vco->lock, flags); + + val = readl_relaxed(vco->mode_reg); + val &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); + val |= (rtbl[i].mode & PLL_MODE_MASK) << PLL_MODE_SHIFT; + writel_relaxed(val, vco->mode_reg); + + val = readl_relaxed(vco->cfg_reg); + val &= ~(PLL_DIV_N_MASK << PLL_DIV_N_SHIFT); + val |= (rtbl[i].n & PLL_DIV_N_MASK) << PLL_DIV_N_SHIFT; + + val &= ~(PLL_DITH_FDBK_M_MASK << PLL_DITH_FDBK_M_SHIFT); + if (rtbl[i].mode) + val |= (rtbl[i].m & PLL_DITH_FDBK_M_MASK) << + PLL_DITH_FDBK_M_SHIFT; + else + val |= (rtbl[i].m & PLL_NORM_FDBK_M_MASK) << + PLL_NORM_FDBK_M_SHIFT; + + writel_relaxed(val, vco->cfg_reg); + + if (vco->lock) + spin_unlock_irqrestore(vco->lock, flags); + + return 0; +} + +static struct clk_ops clk_vco_ops = { + .recalc_rate = clk_vco_recalc_rate, + .round_rate = clk_vco_round_rate, + .set_rate = clk_vco_set_rate, +}; + +struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, + const char *vco_gate_name, const char *parent_name, + unsigned long flags, void __iomem *mode_reg, void __iomem + *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, + spinlock_t *lock, struct clk **pll_clk, + struct clk **vco_gate_clk) +{ + struct clk_vco *vco; + struct clk_pll *pll; + struct clk *vco_clk, *tpll_clk, *tvco_gate_clk; + struct clk_init_data vco_init, pll_init; + const char **vco_parent_name; + + if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || + !rtbl || !rtbl_cnt) { + pr_err("Invalid arguments passed"); + return ERR_PTR(-EINVAL); + } + + vco = kzalloc(sizeof(*vco), GFP_KERNEL); + if (!vco) { + pr_err("could not allocate vco clk\n"); + return ERR_PTR(-ENOMEM); + } + + pll = kzalloc(sizeof(*pll), GFP_KERNEL); + if (!pll) { + pr_err("could not allocate pll clk\n"); + goto free_vco; + } + + /* struct clk_vco assignments */ + vco->mode_reg = mode_reg; + vco->cfg_reg = cfg_reg; + vco->rtbl = rtbl; + vco->rtbl_cnt = rtbl_cnt; + vco->lock = lock; + vco->hw.init = &vco_init; + + pll->vco = vco; + pll->hw.init = &pll_init; + + if (vco_gate_name) { + tvco_gate_clk = clk_register_gate(NULL, vco_gate_name, + parent_name, 0, mode_reg, PLL_ENABLE, 0, lock); + if (IS_ERR_OR_NULL(tvco_gate_clk)) + goto free_pll; + + if (vco_gate_clk) + *vco_gate_clk = tvco_gate_clk; + vco_parent_name = &vco_gate_name; + } else { + vco_parent_name = &parent_name; + } + + vco_init.name = vco_name; + vco_init.ops = &clk_vco_ops; + vco_init.flags = flags; + vco_init.parent_names = vco_parent_name; + vco_init.num_parents = 1; + + pll_init.name = pll_name; + pll_init.ops = &clk_pll_ops; + pll_init.flags = CLK_SET_RATE_PARENT; + pll_init.parent_names = &vco_name; + pll_init.num_parents = 1; + + vco_clk = clk_register(NULL, &vco->hw); + if (IS_ERR_OR_NULL(vco_clk)) + goto free_pll; + + tpll_clk = clk_register(NULL, &pll->hw); + if (IS_ERR_OR_NULL(tpll_clk)) + goto free_pll; + + if (pll_clk) + *pll_clk = tpll_clk; + + return vco_clk; + +free_pll: + kfree(pll); +free_vco: + kfree(vco); + + pr_err("Failed to register vco pll clock\n"); + + return ERR_PTR(-ENOMEM); +} diff --git a/drivers/clk/spear/clk.c b/drivers/clk/spear/clk.c new file mode 100644 index 000000000000..376d4e5ff326 --- /dev/null +++ b/drivers/clk/spear/clk.c @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * SPEAr clk - Common routines + */ + +#include +#include +#include "clk.h" + +long clk_round_rate_index(struct clk_hw *hw, unsigned long drate, + unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt, + int *index) +{ + unsigned long prev_rate, rate = 0; + + for (*index = 0; *index < rtbl_cnt; (*index)++) { + prev_rate = rate; + rate = calc_rate(hw, parent_rate, *index); + if (drate < rate) { + /* previous clock was best */ + if (*index) { + rate = prev_rate; + (*index)--; + } + break; + } + } + + return rate; +} diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h new file mode 100644 index 000000000000..9979b7f7e767 --- /dev/null +++ b/drivers/clk/spear/clk.h @@ -0,0 +1,58 @@ +/* + * Clock framework definitions for SPEAr platform + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __SPEAR_CLK_H +#define __SPEAR_CLK_H + +#include +#include +#include + +/* VCO-PLL clk */ +struct pll_rate_tbl { + u8 mode; + u16 m; + u8 n; + u8 p; +}; + +struct clk_vco { + struct clk_hw hw; + void __iomem *mode_reg; + void __iomem *cfg_reg; + struct pll_rate_tbl *rtbl; + u8 rtbl_cnt; + spinlock_t *lock; +}; + +struct clk_pll { + struct clk_hw hw; + struct clk_vco *vco; + const char *parent[1]; + spinlock_t *lock; +}; + +typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate, + int index); + +/* clk register routines */ +struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, + const char *vco_gate_name, const char *parent_name, + unsigned long flags, void __iomem *mode_reg, void __iomem + *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, + spinlock_t *lock, struct clk **pll_clk, + struct clk **vco_gate_clk); + +long clk_round_rate_index(struct clk_hw *hw, unsigned long drate, + unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt, + int *index); + +#endif /* __SPEAR_CLK_H */ -- cgit v1.2.2 From 5335a639ecc5646cbe8e99086fb7e743b801ac58 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 11 Apr 2012 18:04:23 +0530 Subject: SPEAr: clk: Add Auxiliary Synthesizer clock All SPEAr SoC's contain Auxiliary Synthesizers. Their Fout is derived based on values of eq, x and y. Fout from synthesizer can be given from two equations: Fout1 = (Fin * X/Y)/2 EQ1 Fout2 = Fin * X/Y EQ2 This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette --- drivers/clk/spear/Makefile | 2 +- drivers/clk/spear/clk-aux-synth.c | 198 ++++++++++++++++++++++++++++++++++++++ drivers/clk/spear/clk.h | 43 +++++++++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/spear/clk-aux-synth.c (limited to 'drivers') diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile index 3fc2a3026cc1..e36d8c665724 100644 --- a/drivers/clk/spear/Makefile +++ b/drivers/clk/spear/Makefile @@ -2,4 +2,4 @@ # SPEAr Clock specific Makefile # -obj-y += clk.o clk-vco-pll.o +obj-y += clk.o clk-aux-synth.o clk-vco-pll.o diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c new file mode 100644 index 000000000000..af34074e702b --- /dev/null +++ b/drivers/clk/spear/clk-aux-synth.c @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Auxiliary Synthesizer clock implementation + */ + +#define pr_fmt(fmt) "clk-aux-synth: " fmt + +#include +#include +#include +#include +#include "clk.h" + +/* + * DOC: Auxiliary Synthesizer clock + * + * Aux synth gives rate for different values of eq, x and y + * + * Fout from synthesizer can be given from two equations: + * Fout1 = (Fin * X/Y)/2 EQ1 + * Fout2 = Fin * X/Y EQ2 + */ + +#define to_clk_aux(_hw) container_of(_hw, struct clk_aux, hw) + +static struct aux_clk_masks default_aux_masks = { + .eq_sel_mask = AUX_EQ_SEL_MASK, + .eq_sel_shift = AUX_EQ_SEL_SHIFT, + .eq1_mask = AUX_EQ1_SEL, + .eq2_mask = AUX_EQ2_SEL, + .xscale_sel_mask = AUX_XSCALE_MASK, + .xscale_sel_shift = AUX_XSCALE_SHIFT, + .yscale_sel_mask = AUX_YSCALE_MASK, + .yscale_sel_shift = AUX_YSCALE_SHIFT, + .enable_bit = AUX_SYNT_ENB, +}; + +static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate, + int index) +{ + struct clk_aux *aux = to_clk_aux(hw); + struct aux_rate_tbl *rtbl = aux->rtbl; + u8 eq = rtbl[index].eq ? 1 : 2; + + return (((prate / 10000) * rtbl[index].xscale) / + (rtbl[index].yscale * eq)) * 10000; +} + +static long clk_aux_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + struct clk_aux *aux = to_clk_aux(hw); + int unused; + + return clk_round_rate_index(hw, drate, *prate, aux_calc_rate, + aux->rtbl_cnt, &unused); +} + +static unsigned long clk_aux_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_aux *aux = to_clk_aux(hw); + unsigned int num = 1, den = 1, val, eqn; + unsigned long flags = 0; + + if (aux->lock) + spin_lock_irqsave(aux->lock, flags); + + val = readl_relaxed(aux->reg); + + if (aux->lock) + spin_unlock_irqrestore(aux->lock, flags); + + eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; + if (eqn == aux->masks->eq1_mask) + den = 2; + + /* calculate numerator */ + num = (val >> aux->masks->xscale_sel_shift) & + aux->masks->xscale_sel_mask; + + /* calculate denominator */ + den *= (val >> aux->masks->yscale_sel_shift) & + aux->masks->yscale_sel_mask; + + if (!den) + return 0; + + return (((parent_rate / 10000) * num) / den) * 10000; +} + +/* Configures new clock rate of aux */ +static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) +{ + struct clk_aux *aux = to_clk_aux(hw); + struct aux_rate_tbl *rtbl = aux->rtbl; + unsigned long val, flags = 0; + int i; + + clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux->rtbl_cnt, + &i); + + if (aux->lock) + spin_lock_irqsave(aux->lock, flags); + + val = readl_relaxed(aux->reg) & + ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); + val |= (rtbl[i].eq & aux->masks->eq_sel_mask) << + aux->masks->eq_sel_shift; + val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); + val |= (rtbl[i].xscale & aux->masks->xscale_sel_mask) << + aux->masks->xscale_sel_shift; + val &= ~(aux->masks->yscale_sel_mask << aux->masks->yscale_sel_shift); + val |= (rtbl[i].yscale & aux->masks->yscale_sel_mask) << + aux->masks->yscale_sel_shift; + writel_relaxed(val, aux->reg); + + if (aux->lock) + spin_unlock_irqrestore(aux->lock, flags); + + return 0; +} + +static struct clk_ops clk_aux_ops = { + .recalc_rate = clk_aux_recalc_rate, + .round_rate = clk_aux_round_rate, + .set_rate = clk_aux_set_rate, +}; + +struct clk *clk_register_aux(const char *aux_name, const char *gate_name, + const char *parent_name, unsigned long flags, void __iomem *reg, + struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, + u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk) +{ + struct clk_aux *aux; + struct clk_init_data init; + struct clk *clk; + + if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) { + pr_err("Invalid arguments passed"); + return ERR_PTR(-EINVAL); + } + + aux = kzalloc(sizeof(*aux), GFP_KERNEL); + if (!aux) { + pr_err("could not allocate aux clk\n"); + return ERR_PTR(-ENOMEM); + } + + /* struct clk_aux assignments */ + if (!masks) + aux->masks = &default_aux_masks; + else + aux->masks = masks; + + aux->reg = reg; + aux->rtbl = rtbl; + aux->rtbl_cnt = rtbl_cnt; + aux->lock = lock; + aux->hw.init = &init; + + init.name = aux_name; + init.ops = &clk_aux_ops; + init.flags = flags; + init.parent_names = &parent_name; + init.num_parents = 1; + + clk = clk_register(NULL, &aux->hw); + if (IS_ERR_OR_NULL(clk)) + goto free_aux; + + if (gate_name) { + struct clk *tgate_clk; + + tgate_clk = clk_register_gate(NULL, gate_name, aux_name, 0, reg, + aux->masks->enable_bit, 0, lock); + if (IS_ERR_OR_NULL(tgate_clk)) + goto free_aux; + + if (gate_clk) + *gate_clk = tgate_clk; + } + + return clk; + +free_aux: + kfree(aux); + pr_err("clk register failed\n"); + + return NULL; +} diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h index 9979b7f7e767..c2290800503a 100644 --- a/drivers/clk/spear/clk.h +++ b/drivers/clk/spear/clk.h @@ -16,6 +16,45 @@ #include #include +/* Auxiliary Synth clk */ +/* Default masks */ +#define AUX_EQ_SEL_SHIFT 30 +#define AUX_EQ_SEL_MASK 1 +#define AUX_EQ1_SEL 0 +#define AUX_EQ2_SEL 1 +#define AUX_XSCALE_SHIFT 16 +#define AUX_XSCALE_MASK 0xFFF +#define AUX_YSCALE_SHIFT 0 +#define AUX_YSCALE_MASK 0xFFF +#define AUX_SYNT_ENB 31 + +struct aux_clk_masks { + u32 eq_sel_mask; + u32 eq_sel_shift; + u32 eq1_mask; + u32 eq2_mask; + u32 xscale_sel_mask; + u32 xscale_sel_shift; + u32 yscale_sel_mask; + u32 yscale_sel_shift; + u32 enable_bit; +}; + +struct aux_rate_tbl { + u16 xscale; + u16 yscale; + u8 eq; +}; + +struct clk_aux { + struct clk_hw hw; + void __iomem *reg; + struct aux_clk_masks *masks; + struct aux_rate_tbl *rtbl; + u8 rtbl_cnt; + spinlock_t *lock; +}; + /* VCO-PLL clk */ struct pll_rate_tbl { u8 mode; @@ -44,6 +83,10 @@ typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate, int index); /* clk register routines */ +struct clk *clk_register_aux(const char *aux_name, const char *gate_name, + const char *parent_name, unsigned long flags, void __iomem *reg, + struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, + u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk); struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem -- cgit v1.2.2 From 270b9f421e66ee5d135c99ba1c2b883c7750ab6c Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 11 Apr 2012 18:04:23 +0530 Subject: SPEAr: clk: Add Fractional Synthesizer clock All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from following equations: Fout = Fin / (2 * div) (division factor) div is 17 bits:- 0-13 (fractional part) 14-16 (integer part) div is (16-14 bits).(13-0 bits) (in binary) Fout = Fin/(2 * div) Fout = ((Fin / 10000)/(2 * div)) * 10000 Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 div << 14 is simply 17 bit value written at register. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette --- drivers/clk/spear/Makefile | 2 +- drivers/clk/spear/clk-frac-synth.c | 165 +++++++++++++++++++++++++++++++++++++ drivers/clk/spear/clk.h | 16 ++++ 3 files changed, 182 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/spear/clk-frac-synth.c (limited to 'drivers') diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile index e36d8c665724..182703622195 100644 --- a/drivers/clk/spear/Makefile +++ b/drivers/clk/spear/Makefile @@ -2,4 +2,4 @@ # SPEAr Clock specific Makefile # -obj-y += clk.o clk-aux-synth.o clk-vco-pll.o +obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-vco-pll.o diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c new file mode 100644 index 000000000000..4dbdb3fe18e0 --- /dev/null +++ b/drivers/clk/spear/clk-frac-synth.c @@ -0,0 +1,165 @@ +/* + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Fractional Synthesizer clock implementation + */ + +#define pr_fmt(fmt) "clk-frac-synth: " fmt + +#include +#include +#include +#include +#include "clk.h" + +#define DIV_FACTOR_MASK 0x1FFFF + +/* + * DOC: Fractional Synthesizer clock + * + * Fout from synthesizer can be given from below equation: + * + * Fout= Fin/2*div (division factor) + * div is 17 bits:- + * 0-13 (fractional part) + * 14-16 (integer part) + * div is (16-14 bits).(13-0 bits) (in binary) + * + * Fout = Fin/(2 * div) + * Fout = ((Fin / 10000)/(2 * div)) * 10000 + * Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 + * Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 + * + * div << 14 simply 17 bit value written at register. + * Max error due to scaling down by 10000 is 10 KHz + */ + +#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw) + +static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate, + int index) +{ + struct clk_frac *frac = to_clk_frac(hw); + struct frac_rate_tbl *rtbl = frac->rtbl; + + prate /= 10000; + prate <<= 14; + prate /= (2 * rtbl[index].div); + prate *= 10000; + + return prate; +} + +static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + struct clk_frac *frac = to_clk_frac(hw); + int unused; + + return clk_round_rate_index(hw, drate, *prate, frac_calc_rate, + frac->rtbl_cnt, &unused); +} + +static unsigned long clk_frac_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_frac *frac = to_clk_frac(hw); + unsigned long flags = 0; + unsigned int div = 1, val; + + if (frac->lock) + spin_lock_irqsave(frac->lock, flags); + + val = readl_relaxed(frac->reg); + + if (frac->lock) + spin_unlock_irqrestore(frac->lock, flags); + + div = val & DIV_FACTOR_MASK; + + if (!div) + return 0; + + parent_rate = parent_rate / 10000; + + parent_rate = (parent_rate << 14) / (2 * div); + return parent_rate * 10000; +} + +/* Configures new clock rate of frac */ +static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) +{ + struct clk_frac *frac = to_clk_frac(hw); + struct frac_rate_tbl *rtbl = frac->rtbl; + unsigned long flags = 0, val; + int i; + + clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt, + &i); + + if (frac->lock) + spin_lock_irqsave(frac->lock, flags); + + val = readl_relaxed(frac->reg) & ~DIV_FACTOR_MASK; + val |= rtbl[i].div & DIV_FACTOR_MASK; + writel_relaxed(val, frac->reg); + + if (frac->lock) + spin_unlock_irqrestore(frac->lock, flags); + + return 0; +} + +struct clk_ops clk_frac_ops = { + .recalc_rate = clk_frac_recalc_rate, + .round_rate = clk_frac_round_rate, + .set_rate = clk_frac_set_rate, +}; + +struct clk *clk_register_frac(const char *name, const char *parent_name, + unsigned long flags, void __iomem *reg, + struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock) +{ + struct clk_init_data init; + struct clk_frac *frac; + struct clk *clk; + + if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { + pr_err("Invalid arguments passed"); + return ERR_PTR(-EINVAL); + } + + frac = kzalloc(sizeof(*frac), GFP_KERNEL); + if (!frac) { + pr_err("could not allocate frac clk\n"); + return ERR_PTR(-ENOMEM); + } + + /* struct clk_frac assignments */ + frac->reg = reg; + frac->rtbl = rtbl; + frac->rtbl_cnt = rtbl_cnt; + frac->lock = lock; + frac->hw.init = &init; + + init.name = name; + init.ops = &clk_frac_ops; + init.flags = flags; + init.parent_names = &parent_name; + init.num_parents = 1; + + clk = clk_register(NULL, &frac->hw); + if (!IS_ERR_OR_NULL(clk)) + return clk; + + pr_err("clk register failed\n"); + kfree(frac); + + return NULL; +} diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h index c2290800503a..ac9030bbd6ce 100644 --- a/drivers/clk/spear/clk.h +++ b/drivers/clk/spear/clk.h @@ -55,6 +55,19 @@ struct clk_aux { spinlock_t *lock; }; +/* Fractional Synth clk */ +struct frac_rate_tbl { + u32 div; +}; + +struct clk_frac { + struct clk_hw hw; + void __iomem *reg; + struct frac_rate_tbl *rtbl; + u8 rtbl_cnt; + spinlock_t *lock; +}; + /* VCO-PLL clk */ struct pll_rate_tbl { u8 mode; @@ -87,6 +100,9 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name, const char *parent_name, unsigned long flags, void __iomem *reg, struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk); +struct clk *clk_register_frac(const char *name, const char *parent_name, + unsigned long flags, void __iomem *reg, + struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock); struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem -- cgit v1.2.2 From a45896bd3a4b7beb571fa704efa7c2782b791093 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 11 Apr 2012 18:04:23 +0530 Subject: SPEAr: clk: Add General Purpose Timer Synthesizer clock All SPEAr SoC's contain GPT Synthesizers. Their Fout is derived from following equations: Fout= Fin/((2 ^ (N+1)) * (M+1)) This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette --- drivers/clk/spear/Makefile | 2 +- drivers/clk/spear/clk-gpt-synth.c | 154 ++++++++++++++++++++++++++++++++++++++ drivers/clk/spear/clk.h | 17 +++++ 3 files changed, 172 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/spear/clk-gpt-synth.c (limited to 'drivers') diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile index 182703622195..9e64824a8000 100644 --- a/drivers/clk/spear/Makefile +++ b/drivers/clk/spear/Makefile @@ -2,4 +2,4 @@ # SPEAr Clock specific Makefile # -obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-vco-pll.o +obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c new file mode 100644 index 000000000000..b471c9762a97 --- /dev/null +++ b/drivers/clk/spear/clk-gpt-synth.c @@ -0,0 +1,154 @@ +/* + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * General Purpose Timer Synthesizer clock implementation + */ + +#define pr_fmt(fmt) "clk-gpt-synth: " fmt + +#include +#include +#include +#include +#include "clk.h" + +#define GPT_MSCALE_MASK 0xFFF +#define GPT_NSCALE_SHIFT 12 +#define GPT_NSCALE_MASK 0xF + +/* + * DOC: General Purpose Timer Synthesizer clock + * + * Calculates gpt synth clk rate for different values of mscale and nscale + * + * Fout= Fin/((2 ^ (N+1)) * (M+1)) + */ + +#define to_clk_gpt(_hw) container_of(_hw, struct clk_gpt, hw) + +static unsigned long gpt_calc_rate(struct clk_hw *hw, unsigned long prate, + int index) +{ + struct clk_gpt *gpt = to_clk_gpt(hw); + struct gpt_rate_tbl *rtbl = gpt->rtbl; + + prate /= ((1 << (rtbl[index].nscale + 1)) * (rtbl[index].mscale + 1)); + + return prate; +} + +static long clk_gpt_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + struct clk_gpt *gpt = to_clk_gpt(hw); + int unused; + + return clk_round_rate_index(hw, drate, *prate, gpt_calc_rate, + gpt->rtbl_cnt, &unused); +} + +static unsigned long clk_gpt_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_gpt *gpt = to_clk_gpt(hw); + unsigned long flags = 0; + unsigned int div = 1, val; + + if (gpt->lock) + spin_lock_irqsave(gpt->lock, flags); + + val = readl_relaxed(gpt->reg); + + if (gpt->lock) + spin_unlock_irqrestore(gpt->lock, flags); + + div += val & GPT_MSCALE_MASK; + div *= 1 << (((val >> GPT_NSCALE_SHIFT) & GPT_NSCALE_MASK) + 1); + + if (!div) + return 0; + + return parent_rate / div; +} + +/* Configures new clock rate of gpt */ +static int clk_gpt_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) +{ + struct clk_gpt *gpt = to_clk_gpt(hw); + struct gpt_rate_tbl *rtbl = gpt->rtbl; + unsigned long flags = 0, val; + int i; + + clk_round_rate_index(hw, drate, prate, gpt_calc_rate, gpt->rtbl_cnt, + &i); + + if (gpt->lock) + spin_lock_irqsave(gpt->lock, flags); + + val = readl(gpt->reg) & ~GPT_MSCALE_MASK; + val &= ~(GPT_NSCALE_MASK << GPT_NSCALE_SHIFT); + + val |= rtbl[i].mscale & GPT_MSCALE_MASK; + val |= (rtbl[i].nscale & GPT_NSCALE_MASK) << GPT_NSCALE_SHIFT; + + writel_relaxed(val, gpt->reg); + + if (gpt->lock) + spin_unlock_irqrestore(gpt->lock, flags); + + return 0; +} + +static struct clk_ops clk_gpt_ops = { + .recalc_rate = clk_gpt_recalc_rate, + .round_rate = clk_gpt_round_rate, + .set_rate = clk_gpt_set_rate, +}; + +struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned + long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8 + rtbl_cnt, spinlock_t *lock) +{ + struct clk_init_data init; + struct clk_gpt *gpt; + struct clk *clk; + + if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { + pr_err("Invalid arguments passed"); + return ERR_PTR(-EINVAL); + } + + gpt = kzalloc(sizeof(*gpt), GFP_KERNEL); + if (!gpt) { + pr_err("could not allocate gpt clk\n"); + return ERR_PTR(-ENOMEM); + } + + /* struct clk_gpt assignments */ + gpt->reg = reg; + gpt->rtbl = rtbl; + gpt->rtbl_cnt = rtbl_cnt; + gpt->lock = lock; + gpt->hw.init = &init; + + init.name = name; + init.ops = &clk_gpt_ops; + init.flags = flags; + init.parent_names = &parent_name; + init.num_parents = 1; + + clk = clk_register(NULL, &gpt->hw); + if (!IS_ERR_OR_NULL(clk)) + return clk; + + pr_err("clk register failed\n"); + kfree(gpt); + + return NULL; +} diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h index ac9030bbd6ce..3321c46a071c 100644 --- a/drivers/clk/spear/clk.h +++ b/drivers/clk/spear/clk.h @@ -68,6 +68,20 @@ struct clk_frac { spinlock_t *lock; }; +/* GPT clk */ +struct gpt_rate_tbl { + u16 mscale; + u16 nscale; +}; + +struct clk_gpt { + struct clk_hw hw; + void __iomem *reg; + struct gpt_rate_tbl *rtbl; + u8 rtbl_cnt; + spinlock_t *lock; +}; + /* VCO-PLL clk */ struct pll_rate_tbl { u8 mode; @@ -103,6 +117,9 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name, struct clk *clk_register_frac(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock); +struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned + long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8 + rtbl_cnt, spinlock_t *lock); struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem -- cgit v1.2.2 From 5df33a62c4a028d6fc7f2dcc159827d09b7334b8 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 10 Apr 2012 09:02:35 +0530 Subject: SPEAr: Switch to common clock framework SPEAr SoCs used its own clock framework since now. From now on they will move to use common clock framework. This patch updates existing SPEAr machine support to adapt for common clock framework. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette Acked-by: Arnd Bergmann --- drivers/clk/spear/Makefile | 3 + drivers/clk/spear/spear3xx_clock.c | 612 +++++++++++++++++++++++++++++++++++++ drivers/clk/spear/spear6xx_clock.c | 342 +++++++++++++++++++++ 3 files changed, 957 insertions(+) create mode 100644 drivers/clk/spear/spear3xx_clock.c create mode 100644 drivers/clk/spear/spear6xx_clock.c (limited to 'drivers') diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile index 9e64824a8000..335886049c83 100644 --- a/drivers/clk/spear/Makefile +++ b/drivers/clk/spear/Makefile @@ -3,3 +3,6 @@ # obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o + +obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx_clock.o +obj-$(CONFIG_ARCH_SPEAR6XX) += spear6xx_clock.o diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c new file mode 100644 index 000000000000..440bb3e4c971 --- /dev/null +++ b/drivers/clk/spear/spear3xx_clock.c @@ -0,0 +1,612 @@ +/* + * SPEAr3xx machines clock framework source file + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +static DEFINE_SPINLOCK(_lock); + +#define PLL1_CTR (MISC_BASE + 0x008) +#define PLL1_FRQ (MISC_BASE + 0x00C) +#define PLL2_CTR (MISC_BASE + 0x014) +#define PLL2_FRQ (MISC_BASE + 0x018) +#define PLL_CLK_CFG (MISC_BASE + 0x020) + /* PLL_CLK_CFG register masks */ + #define MCTR_CLK_SHIFT 28 + #define MCTR_CLK_MASK 3 + +#define CORE_CLK_CFG (MISC_BASE + 0x024) + /* CORE CLK CFG register masks */ + #define GEN_SYNTH2_3_CLK_SHIFT 18 + #define GEN_SYNTH2_3_CLK_MASK 1 + + #define HCLK_RATIO_SHIFT 10 + #define HCLK_RATIO_MASK 2 + #define PCLK_RATIO_SHIFT 8 + #define PCLK_RATIO_MASK 2 + +#define PERIP_CLK_CFG (MISC_BASE + 0x028) + /* PERIP_CLK_CFG register masks */ + #define UART_CLK_SHIFT 4 + #define UART_CLK_MASK 1 + #define FIRDA_CLK_SHIFT 5 + #define FIRDA_CLK_MASK 2 + #define GPT0_CLK_SHIFT 8 + #define GPT1_CLK_SHIFT 11 + #define GPT2_CLK_SHIFT 12 + #define GPT_CLK_MASK 1 + +#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) + /* PERIP1_CLK_ENB register masks */ + #define UART_CLK_ENB 3 + #define SSP_CLK_ENB 5 + #define I2C_CLK_ENB 7 + #define JPEG_CLK_ENB 8 + #define FIRDA_CLK_ENB 10 + #define GPT1_CLK_ENB 11 + #define GPT2_CLK_ENB 12 + #define ADC_CLK_ENB 15 + #define RTC_CLK_ENB 17 + #define GPIO_CLK_ENB 18 + #define DMA_CLK_ENB 19 + #define SMI_CLK_ENB 21 + #define GMAC_CLK_ENB 23 + #define USBD_CLK_ENB 24 + #define USBH_CLK_ENB 25 + #define C3_CLK_ENB 31 + +#define RAS_CLK_ENB (MISC_BASE + 0x034) + #define RAS_AHB_CLK_ENB 0 + #define RAS_PLL1_CLK_ENB 1 + #define RAS_APB_CLK_ENB 2 + #define RAS_32K_CLK_ENB 3 + #define RAS_24M_CLK_ENB 4 + #define RAS_48M_CLK_ENB 5 + #define RAS_PLL2_CLK_ENB 7 + #define RAS_SYNT0_CLK_ENB 8 + #define RAS_SYNT1_CLK_ENB 9 + #define RAS_SYNT2_CLK_ENB 10 + #define RAS_SYNT3_CLK_ENB 11 + +#define PRSC0_CLK_CFG (MISC_BASE + 0x044) +#define PRSC1_CLK_CFG (MISC_BASE + 0x048) +#define PRSC2_CLK_CFG (MISC_BASE + 0x04C) +#define AMEM_CLK_CFG (MISC_BASE + 0x050) + #define AMEM_CLK_ENB 0 + +#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) +#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) +#define UART_CLK_SYNT (MISC_BASE + 0x064) +#define GMAC_CLK_SYNT (MISC_BASE + 0x068) +#define GEN0_CLK_SYNT (MISC_BASE + 0x06C) +#define GEN1_CLK_SYNT (MISC_BASE + 0x070) +#define GEN2_CLK_SYNT (MISC_BASE + 0x074) +#define GEN3_CLK_SYNT (MISC_BASE + 0x078) + +/* pll rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll_rtbl[] = { + {.mode = 0, .m = 0x53, .n = 0x0C, .p = 0x1}, /* vco 332 & pll 166 MHz */ + {.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* vco 532 & pll 266 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* vco 664 & pll 332 MHz */ +}; + +/* aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl aux_rtbl[] = { + /* For PLL1 = 332 MHz */ + {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */ + {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ +}; + +/* gpt rate configuration table, in ascending order of rates */ +static struct gpt_rate_tbl gpt_rtbl[] = { + /* For pll1 = 332 MHz */ + {.mscale = 4, .nscale = 0}, /* 41.5 MHz */ + {.mscale = 2, .nscale = 0}, /* 55.3 MHz */ + {.mscale = 1, .nscale = 0}, /* 83 MHz */ +}; + +/* clock parents */ +static const char *uart0_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", }; +static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk", +}; +static const char *gpt0_parents[] = { "pll3_48m_clk", "gpt0_synth_clk", }; +static const char *gpt1_parents[] = { "pll3_48m_clk", "gpt1_synth_clk", }; +static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", }; +static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", }; +static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", + "pll2_clk", }; + +#ifdef CONFIG_MACH_SPEAR300 +static void __init spear300_clk_init(void) +{ + struct clk *clk; + + clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0, + 1, 1); + clk_register_clkdev(clk, NULL, "60000000.clcd"); + + clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "94000000.flash"); + + clk = clk_register_fixed_factor(NULL, "sdhci_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "70000000.sdhci"); + + clk = clk_register_fixed_factor(NULL, "gpio1_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "a9000000.gpio"); + + clk = clk_register_fixed_factor(NULL, "kbd_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "a0000000.kbd"); +} +#endif + +/* array of all spear 310 clock lookups */ +#ifdef CONFIG_MACH_SPEAR310 +static void __init spear310_clk_init(void) +{ + struct clk *clk; + + clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, "emi", NULL); + + clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "44000000.flash"); + + clk = clk_register_fixed_factor(NULL, "tdm_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "tdm"); + + clk = clk_register_fixed_factor(NULL, "uart1_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "b2000000.serial"); + + clk = clk_register_fixed_factor(NULL, "uart2_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "b2080000.serial"); + + clk = clk_register_fixed_factor(NULL, "uart3_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "b2100000.serial"); + + clk = clk_register_fixed_factor(NULL, "uart4_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "b2180000.serial"); + + clk = clk_register_fixed_factor(NULL, "uart5_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "b2200000.serial"); +} +#endif + +/* array of all spear 320 clock lookups */ +#ifdef CONFIG_MACH_SPEAR320 + #define SMII_PCLK_SHIFT 18 + #define SMII_PCLK_MASK 2 + #define SMII_PCLK_VAL_PAD 0x0 + #define SMII_PCLK_VAL_PLL2 0x1 + #define SMII_PCLK_VAL_SYNTH0 0x2 + #define SDHCI_PCLK_SHIFT 15 + #define SDHCI_PCLK_MASK 1 + #define SDHCI_PCLK_VAL_48M 0x0 + #define SDHCI_PCLK_VAL_SYNTH3 0x1 + #define I2S_REF_PCLK_SHIFT 8 + #define I2S_REF_PCLK_MASK 1 + #define I2S_REF_PCLK_SYNTH_VAL 0x1 + #define I2S_REF_PCLK_PLL2_VAL 0x0 + #define UART1_PCLK_SHIFT 6 + #define UART1_PCLK_MASK 1 + #define SPEAR320_UARTX_PCLK_VAL_SYNTH1 0x0 + #define SPEAR320_UARTX_PCLK_VAL_APB 0x1 + +static const char *i2s_ref_parents[] = { "ras_pll2_clk", + "ras_gen2_synth_gate_clk", }; +static const char *sdhci_parents[] = { "ras_pll3_48m_clk", + "ras_gen3_synth_gate_clk", +}; +static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk", + "ras_gen0_synth_gate_clk", }; +static const char *uartx_parents[] = { "ras_gen1_synth_gate_clk", "ras_apb_clk", +}; + +static void __init spear320_clk_init(void) +{ + struct clk *clk; + + clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL, + CLK_IS_ROOT, 125000000); + clk_register_clkdev(clk, "smii_125m_pad", NULL); + + clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0, + 1, 1); + clk_register_clkdev(clk, NULL, "90000000.clcd"); + + clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, "emi", NULL); + + clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "4c000000.flash"); + + clk = clk_register_fixed_factor(NULL, "i2c1_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "a7000000.i2c"); + + clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, "pwm", NULL); + + clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "a5000000.spi"); + + clk = clk_register_fixed_factor(NULL, "ssp2_clk", "ras_ahb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "a6000000.spi"); + + clk = clk_register_fixed_factor(NULL, "can0_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "c_can_platform.0"); + + clk = clk_register_fixed_factor(NULL, "can1_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "c_can_platform.1"); + + clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "i2s"); + + clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents, + ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG, + I2S_REF_PCLK_SHIFT, I2S_REF_PCLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "i2s_ref_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "i2s_sclk", "i2s_ref_clk", 0, 1, + 4); + clk_register_clkdev(clk, "i2s_sclk", NULL); + + clk = clk_register_mux(NULL, "rs485_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_RS485_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "a9300000.serial"); + + clk = clk_register_mux(NULL, "sdhci_clk", sdhci_parents, + ARRAY_SIZE(sdhci_parents), 0, SPEAR320_CONTROL_REG, + SDHCI_PCLK_SHIFT, SDHCI_PCLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "70000000.sdhci"); + + clk = clk_register_mux(NULL, "smii_pclk", smii0_parents, + ARRAY_SIZE(smii0_parents), 0, SPEAR320_CONTROL_REG, + SMII_PCLK_SHIFT, SMII_PCLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "smii_pclk"); + + clk = clk_register_fixed_factor(NULL, "smii_clk", "smii_pclk", 0, 1, 1); + clk_register_clkdev(clk, NULL, "smii"); + + clk = clk_register_mux(NULL, "uart1_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_CONTROL_REG, + UART1_PCLK_SHIFT, UART1_PCLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "a3000000.serial"); + + clk = clk_register_mux(NULL, "uart2_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_UART2_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "a4000000.serial"); + + clk = clk_register_mux(NULL, "uart3_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_UART3_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "a9100000.serial"); + + clk = clk_register_mux(NULL, "uart4_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_UART4_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "a9200000.serial"); + + clk = clk_register_mux(NULL, "uart5_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_UART5_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "60000000.serial"); + + clk = clk_register_mux(NULL, "uart6_clk", uartx_parents, + ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG, + SPEAR320_UART6_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, NULL, "60100000.serial"); +} +#endif + +void __init spear3xx_clk_init(void) +{ + struct clk *clk, *clk1; + + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, + 32000); + clk_register_clkdev(clk, "osc_32k_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, + 24000000); + clk_register_clkdev(clk, "osc_24m_clk", NULL); + + /* clock derived from 32 KHz osc clk */ + clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0, + PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc900000.rtc"); + + /* clock derived from 24 MHz osc clk */ + clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0, + 48000000); + clk_register_clkdev(clk, "pll3_48m_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "fc880000.wdt"); + + clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, + "osc_24m_clk", 0, PLL1_CTR, PLL1_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco1_clk", NULL); + clk_register_clkdev(clk1, "pll1_clk", NULL); + + clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, + "osc_24m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco2_clk", NULL); + clk_register_clkdev(clk1, "pll2_clk", NULL); + + /* clock derived from pll1 clk */ + clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1); + clk_register_clkdev(clk, "cpu_clk", NULL); + + clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk", + CLK_SET_RATE_PARENT, CORE_CLK_CFG, HCLK_RATIO_SHIFT, + HCLK_RATIO_MASK, 0, &_lock); + clk_register_clkdev(clk, "ahb_clk", NULL); + + clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", + "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "uart_synth_clk", NULL); + clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, + ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG, + UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "uart0_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart0", "uart0_mux_clk", 0, + PERIP1_CLK_ENB, UART_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0000000.serial"); + + clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk", + "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "firda_synth_clk", NULL); + clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents, + ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, + FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "firda_mux_clk", NULL); + + clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0, + PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "firda"); + + /* gpt clocks */ + clk_register_gpt("gpt0_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents, + ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG, + GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt0"); + + clk_register_gpt("gpt1_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt1_parents, + ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG, + GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gpt1_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, + PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt1"); + + clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents, + ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, + GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gpt2_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, + PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt2"); + + /* general synths clocks */ + clk = clk_register_aux("gen0_synth_clk", "gen0_synth_gate_clk", + "pll1_clk", 0, GEN0_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gen0_synth_clk", NULL); + clk_register_clkdev(clk1, "gen0_synth_gate_clk", NULL); + + clk = clk_register_aux("gen1_synth_clk", "gen1_synth_gate_clk", + "pll1_clk", 0, GEN1_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gen1_synth_clk", NULL); + clk_register_clkdev(clk1, "gen1_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "gen2_3_parent_clk", gen2_3_parents, + ARRAY_SIZE(gen2_3_parents), 0, CORE_CLK_CFG, + GEN_SYNTH2_3_CLK_SHIFT, GEN_SYNTH2_3_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gen2_3_parent_clk", NULL); + + clk = clk_register_aux("gen2_synth_clk", "gen2_synth_gate_clk", + "gen2_3_parent_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gen2_synth_clk", NULL); + clk_register_clkdev(clk1, "gen2_synth_gate_clk", NULL); + + clk = clk_register_aux("gen3_synth_clk", "gen3_synth_gate_clk", + "gen2_3_parent_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gen3_synth_clk", NULL); + clk_register_clkdev(clk1, "gen3_synth_gate_clk", NULL); + + /* clock derived from pll3 clk */ + clk = clk_register_gate(NULL, "usbh_clk", "pll3_48m_clk", 0, + PERIP1_CLK_ENB, USBH_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "usbh_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1, + 1); + clk_register_clkdev(clk, "usbh.0_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "usbh.1_clk", "usbh_clk", 0, 1, + 1); + clk_register_clkdev(clk, "usbh.1_clk", NULL); + + clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0, + PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "designware_udc"); + + /* clock derived from ahb clk */ + clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2, + 1); + clk_register_clkdev(clk, "ahbmult2_clk", NULL); + + clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, + ARRAY_SIZE(ddr_parents), 0, PLL_CLK_CFG, MCTR_CLK_SHIFT, + MCTR_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "ddr_clk", NULL); + + clk = clk_register_divider(NULL, "apb_clk", "ahb_clk", + CLK_SET_RATE_PARENT, CORE_CLK_CFG, PCLK_RATIO_SHIFT, + PCLK_RATIO_MASK, 0, &_lock); + clk_register_clkdev(clk, "apb_clk", NULL); + + clk = clk_register_gate(NULL, "amem_clk", "ahb_clk", 0, AMEM_CLK_CFG, + AMEM_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "amem_clk", NULL); + + clk = clk_register_gate(NULL, "c3_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + C3_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "c3_clk"); + + clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + DMA_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc400000.dma"); + + clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + GMAC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "e0800000.eth"); + + clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + I2C_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0180000.i2c"); + + clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + JPEG_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "jpeg"); + + clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + SMI_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc000000.flash"); + + /* clock derived from apb clk */ + clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB, + ADC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "adc"); + + clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB, + GPIO_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc980000.gpio"); + + clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB, + SSP_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0100000.spi"); + + /* RAS clk enable */ + clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0, RAS_CLK_ENB, + RAS_AHB_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_ahb_clk", NULL); + + clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0, RAS_CLK_ENB, + RAS_APB_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_apb_clk", NULL); + + clk = clk_register_gate(NULL, "ras_32k_clk", "osc_32k_clk", 0, + RAS_CLK_ENB, RAS_32K_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_32k_clk", NULL); + + clk = clk_register_gate(NULL, "ras_24m_clk", "osc_24m_clk", 0, + RAS_CLK_ENB, RAS_24M_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_24m_clk", NULL); + + clk = clk_register_gate(NULL, "ras_pll1_clk", "pll1_clk", 0, + RAS_CLK_ENB, RAS_PLL1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_pll1_clk", NULL); + + clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0, + RAS_CLK_ENB, RAS_PLL2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_pll2_clk", NULL); + + clk = clk_register_gate(NULL, "ras_pll3_48m_clk", "pll3_48m_clk", 0, + RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_pll3_48m_clk", NULL); + + clk = clk_register_gate(NULL, "ras_gen0_synth_gate_clk", + "gen0_synth_gate_clk", 0, RAS_CLK_ENB, + RAS_SYNT0_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_gen0_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "ras_gen1_synth_gate_clk", + "gen1_synth_gate_clk", 0, RAS_CLK_ENB, + RAS_SYNT1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_gen1_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "ras_gen2_synth_gate_clk", + "gen2_synth_gate_clk", 0, RAS_CLK_ENB, + RAS_SYNT2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_gen2_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "ras_gen3_synth_gate_clk", + "gen3_synth_gate_clk", 0, RAS_CLK_ENB, + RAS_SYNT3_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, "ras_gen3_synth_gate_clk", NULL); + + if (of_machine_is_compatible("st,spear300")) + spear300_clk_init(); + else if (of_machine_is_compatible("st,spear310")) + spear310_clk_init(); + else if (of_machine_is_compatible("st,spear320")) + spear320_clk_init(); +} diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c new file mode 100644 index 000000000000..f9a20b382304 --- /dev/null +++ b/drivers/clk/spear/spear6xx_clock.c @@ -0,0 +1,342 @@ +/* + * SPEAr6xx machines clock framework source file + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include "clk.h" + +static DEFINE_SPINLOCK(_lock); + +#define PLL1_CTR (MISC_BASE + 0x008) +#define PLL1_FRQ (MISC_BASE + 0x00C) +#define PLL2_CTR (MISC_BASE + 0x014) +#define PLL2_FRQ (MISC_BASE + 0x018) +#define PLL_CLK_CFG (MISC_BASE + 0x020) + /* PLL_CLK_CFG register masks */ + #define MCTR_CLK_SHIFT 28 + #define MCTR_CLK_MASK 3 + +#define CORE_CLK_CFG (MISC_BASE + 0x024) + /* CORE CLK CFG register masks */ + #define HCLK_RATIO_SHIFT 10 + #define HCLK_RATIO_MASK 2 + #define PCLK_RATIO_SHIFT 8 + #define PCLK_RATIO_MASK 2 + +#define PERIP_CLK_CFG (MISC_BASE + 0x028) + /* PERIP_CLK_CFG register masks */ + #define CLCD_CLK_SHIFT 2 + #define CLCD_CLK_MASK 2 + #define UART_CLK_SHIFT 4 + #define UART_CLK_MASK 1 + #define FIRDA_CLK_SHIFT 5 + #define FIRDA_CLK_MASK 2 + #define GPT0_CLK_SHIFT 8 + #define GPT1_CLK_SHIFT 10 + #define GPT2_CLK_SHIFT 11 + #define GPT3_CLK_SHIFT 12 + #define GPT_CLK_MASK 1 + +#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) + /* PERIP1_CLK_ENB register masks */ + #define UART0_CLK_ENB 3 + #define UART1_CLK_ENB 4 + #define SSP0_CLK_ENB 5 + #define SSP1_CLK_ENB 6 + #define I2C_CLK_ENB 7 + #define JPEG_CLK_ENB 8 + #define FSMC_CLK_ENB 9 + #define FIRDA_CLK_ENB 10 + #define GPT2_CLK_ENB 11 + #define GPT3_CLK_ENB 12 + #define GPIO2_CLK_ENB 13 + #define SSP2_CLK_ENB 14 + #define ADC_CLK_ENB 15 + #define GPT1_CLK_ENB 11 + #define RTC_CLK_ENB 17 + #define GPIO1_CLK_ENB 18 + #define DMA_CLK_ENB 19 + #define SMI_CLK_ENB 21 + #define CLCD_CLK_ENB 22 + #define GMAC_CLK_ENB 23 + #define USBD_CLK_ENB 24 + #define USBH0_CLK_ENB 25 + #define USBH1_CLK_ENB 26 + +#define PRSC0_CLK_CFG (MISC_BASE + 0x044) +#define PRSC1_CLK_CFG (MISC_BASE + 0x048) +#define PRSC2_CLK_CFG (MISC_BASE + 0x04C) + +#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) +#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) +#define UART_CLK_SYNT (MISC_BASE + 0x064) + +/* vco rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll_rtbl[] = { + {.mode = 0, .m = 0x53, .n = 0x0F, .p = 0x1}, /* vco 332 & pll 166 MHz */ + {.mode = 0, .m = 0x85, .n = 0x0F, .p = 0x1}, /* vco 532 & pll 266 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x0F, .p = 0x1}, /* vco 664 & pll 332 MHz */ +}; + +/* aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl aux_rtbl[] = { + /* For PLL1 = 332 MHz */ + {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ +}; + +static const char *clcd_parents[] = { "pll3_48m_clk", "clcd_synth_gate_clk", }; +static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk", +}; +static const char *uart_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", }; +static const char *gpt0_1_parents[] = { "pll3_48m_clk", "gpt0_1_synth_clk", }; +static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", }; +static const char *gpt3_parents[] = { "pll3_48m_clk", "gpt3_synth_clk", }; +static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", + "pll2_clk", }; + +/* gpt rate configuration table, in ascending order of rates */ +static struct gpt_rate_tbl gpt_rtbl[] = { + /* For pll1 = 332 MHz */ + {.mscale = 4, .nscale = 0}, /* 41.5 MHz */ + {.mscale = 2, .nscale = 0}, /* 55.3 MHz */ + {.mscale = 1, .nscale = 0}, /* 83 MHz */ +}; + +void __init spear6xx_clk_init(void) +{ + struct clk *clk, *clk1; + + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, + 32000); + clk_register_clkdev(clk, "osc_32k_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT, + 30000000); + clk_register_clkdev(clk, "osc_30m_clk", NULL); + + /* clock derived from 32 KHz osc clk */ + clk = clk_register_gate(NULL, "rtc_spear", "osc_32k_clk", 0, + PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "rtc-spear"); + + /* clock derived from 30 MHz osc clk */ + clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0, + 48000000); + clk_register_clkdev(clk, "pll3_48m_clk", NULL); + + clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk", + 0, PLL1_CTR, PLL1_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl), + &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco1_clk", NULL); + clk_register_clkdev(clk1, "pll1_clk", NULL); + + clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, + "osc_30m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco2_clk", NULL); + clk_register_clkdev(clk1, "pll2_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_30m_clk", 0, 1, + 1); + clk_register_clkdev(clk, NULL, "wdt"); + + /* clock derived from pll1 clk */ + clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1); + clk_register_clkdev(clk, "cpu_clk", NULL); + + clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk", + CLK_SET_RATE_PARENT, CORE_CLK_CFG, HCLK_RATIO_SHIFT, + HCLK_RATIO_MASK, 0, &_lock); + clk_register_clkdev(clk, "ahb_clk", NULL); + + clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", + "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "uart_synth_clk", NULL); + clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "uart_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, PERIP_CLK_CFG, + UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "uart_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart0", "uart_mux_clk", 0, + PERIP1_CLK_ENB, UART0_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0000000.serial"); + + clk = clk_register_gate(NULL, "uart1", "uart_mux_clk", 0, + PERIP1_CLK_ENB, UART1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0080000.serial"); + + clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk", + "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "firda_synth_clk", NULL); + clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents, + ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG, + FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "firda_mux_clk", NULL); + + clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0, + PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "firda"); + + clk = clk_register_aux("clcd_synth_clk", "clcd_synth_gate_clk", + "pll1_clk", 0, CLCD_CLK_SYNT, NULL, aux_rtbl, + ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "clcd_synth_clk", NULL); + clk_register_clkdev(clk1, "clcd_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "clcd_mux_clk", clcd_parents, + ARRAY_SIZE(clcd_parents), 0, PERIP_CLK_CFG, + CLCD_CLK_SHIFT, CLCD_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "clcd_mux_clk", NULL); + + clk = clk_register_gate(NULL, "clcd_clk", "clcd_mux_clk", 0, + PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "clcd"); + + /* gpt clocks */ + clk = clk_register_gpt("gpt0_1_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk_register_clkdev(clk, "gpt0_1_synth_clk", NULL); + + clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt0_1_parents, + ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, + GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt0"); + + clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt0_1_parents, + ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG, + GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gpt1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, + PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt1"); + + clk = clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk_register_clkdev(clk, "gpt2_synth_clk", NULL); + + clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents, + ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG, + GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gpt2_mux_clk", NULL); + + clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, + PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt2"); + + clk = clk_register_gpt("gpt3_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG, + gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock); + clk_register_clkdev(clk, "gpt3_synth_clk", NULL); + + clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt3_parents, + ARRAY_SIZE(gpt3_parents), 0, PERIP_CLK_CFG, + GPT3_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gpt3_mux_clk", NULL); + + clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, + PERIP1_CLK_ENB, GPT3_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gpt3"); + + /* clock derived from pll3 clk */ + clk = clk_register_gate(NULL, "usbh0_clk", "pll3_48m_clk", 0, + PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "usbh.0_clk"); + + clk = clk_register_gate(NULL, "usbh1_clk", "pll3_48m_clk", 0, + PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "usbh.1_clk"); + + clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0, + PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "designware_udc"); + + /* clock derived from ahb clk */ + clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2, + 1); + clk_register_clkdev(clk, "ahbmult2_clk", NULL); + + clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, + ARRAY_SIZE(ddr_parents), + 0, PLL_CLK_CFG, MCTR_CLK_SHIFT, MCTR_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "ddr_clk", NULL); + + clk = clk_register_divider(NULL, "apb_clk", "ahb_clk", + CLK_SET_RATE_PARENT, CORE_CLK_CFG, PCLK_RATIO_SHIFT, + PCLK_RATIO_MASK, 0, &_lock); + clk_register_clkdev(clk, "apb_clk", NULL); + + clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + DMA_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc400000.dma"); + + clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + FSMC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d1800000.flash"); + + clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + GMAC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "gmac"); + + clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + I2C_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d0200000.i2c"); + + clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + JPEG_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "jpeg"); + + clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB, + SMI_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc000000.flash"); + + /* clock derived from apb clk */ + clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB, + ADC_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "adc"); + + clk = clk_register_fixed_factor(NULL, "gpio0_clk", "apb_clk", 0, 1, 1); + clk_register_clkdev(clk, NULL, "f0100000.gpio"); + + clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, PERIP1_CLK_ENB, + GPIO1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "fc980000.gpio"); + + clk = clk_register_gate(NULL, "gpio2_clk", "apb_clk", 0, PERIP1_CLK_ENB, + GPIO2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "d8100000.gpio"); + + clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB, + SSP0_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "ssp-pl022.0"); + + clk = clk_register_gate(NULL, "ssp1_clk", "apb_clk", 0, PERIP1_CLK_ENB, + SSP1_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "ssp-pl022.1"); + + clk = clk_register_gate(NULL, "ssp2_clk", "apb_clk", 0, PERIP1_CLK_ENB, + SSP2_CLK_ENB, 0, &_lock); + clk_register_clkdev(clk, NULL, "ssp-pl022.2"); +} -- cgit v1.2.2 From 70e60206885b227ff17a88e83145efe33917db24 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 5 May 2012 19:40:09 +0800 Subject: mmc: mxs-mmc: use global stmp_device functionality Use global stmp_device functionality to reduce mach-dependency. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index bb03ddda481d..2ea53613c794 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -40,9 +40,9 @@ #include #include #include +#include #include -#include #include #define DRIVER_NAME "mxs-mmc" @@ -191,7 +191,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host) { u32 ctrl0, ctrl1; - mxs_reset_block(host->base); + stmp_reset_block(host->base); ctrl0 = BM_SSP_CTRL0_IGNORE_CRC; ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) | @@ -279,7 +279,7 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id) stat = readl(host->base + HW_SSP_CTRL1); writel(stat & MXS_MMC_IRQ_BITS, - host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); + host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_CLR); if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN)) mmc_signal_sdio_irq(host->mmc); @@ -637,18 +637,18 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) if (enable) { writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, - host->base + HW_SSP_CTRL0 + MXS_SET_ADDR); + host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); writel(BM_SSP_CTRL1_SDIO_IRQ_EN, - host->base + HW_SSP_CTRL1 + MXS_SET_ADDR); + host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_SET); if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ) mmc_signal_sdio_irq(host->mmc); } else { writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, - host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR); + host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); writel(BM_SSP_CTRL1_SDIO_IRQ_EN, - host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); + host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_CLR); } spin_unlock_irqrestore(&host->lock, flags); -- cgit v1.2.2 From e0bf141db2e649830a1851f7c5c01f3b9b410778 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 09:36:39 +0800 Subject: mmc: mxs-mmc: let ssp_is_old take host as parameter Let macro ssp_is_old take host as parameter to make the code easy to read. Signed-off-by: Shawn Guo Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 57 +++++++++++++++++++++++----------------------- 1 file changed, 29 insertions(+), 28 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 2ea53613c794..a699a8673766 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -51,7 +51,7 @@ #define MXS_MMC_DETECT_TIMEOUT (HZ/2) #define SSP_VERSION_LATEST 4 -#define ssp_is_old() (host->version < SSP_VERSION_LATEST) +#define ssp_is_old(host) ((host)->version < SSP_VERSION_LATEST) /* SSP registers */ #define HW_SSP_CTRL0 0x000 @@ -86,14 +86,14 @@ #define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4) #define BP_SSP_BLOCK_SIZE_BLOCK_SIZE (0) #define BM_SSP_BLOCK_SIZE_BLOCK_SIZE (0xf) -#define HW_SSP_TIMING (ssp_is_old() ? 0x050 : 0x070) +#define HW_SSP_TIMING(h) (ssp_is_old(h) ? 0x050 : 0x070) #define BP_SSP_TIMING_TIMEOUT (16) #define BM_SSP_TIMING_TIMEOUT (0xffff << 16) #define BP_SSP_TIMING_CLOCK_DIVIDE (8) #define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8) #define BP_SSP_TIMING_CLOCK_RATE (0) #define BM_SSP_TIMING_CLOCK_RATE (0xff) -#define HW_SSP_CTRL1 (ssp_is_old() ? 0x060 : 0x080) +#define HW_SSP_CTRL1(h) (ssp_is_old(h) ? 0x060 : 0x080) #define BM_SSP_CTRL1_SDIO_IRQ (1 << 31) #define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30) #define BM_SSP_CTRL1_RESP_ERR_IRQ (1 << 29) @@ -116,11 +116,11 @@ #define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4) #define BP_SSP_CTRL1_SSP_MODE (0) #define BM_SSP_CTRL1_SSP_MODE (0xf) -#define HW_SSP_SDRESP0 (ssp_is_old() ? 0x080 : 0x0a0) -#define HW_SSP_SDRESP1 (ssp_is_old() ? 0x090 : 0x0b0) -#define HW_SSP_SDRESP2 (ssp_is_old() ? 0x0a0 : 0x0c0) -#define HW_SSP_SDRESP3 (ssp_is_old() ? 0x0b0 : 0x0d0) -#define HW_SSP_STATUS (ssp_is_old() ? 0x0c0 : 0x100) +#define HW_SSP_SDRESP0(h) (ssp_is_old(h) ? 0x080 : 0x0a0) +#define HW_SSP_SDRESP1(h) (ssp_is_old(h) ? 0x090 : 0x0b0) +#define HW_SSP_SDRESP2(h) (ssp_is_old(h) ? 0x0a0 : 0x0c0) +#define HW_SSP_SDRESP3(h) (ssp_is_old(h) ? 0x0b0 : 0x0d0) +#define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100) #define BM_SSP_STATUS_CARD_DETECT (1 << 28) #define BM_SSP_STATUS_SDIO_IRQ (1 << 17) #define HW_SSP_VERSION (cpu_is_mx23() ? 0x110 : 0x130) @@ -183,7 +183,7 @@ static int mxs_mmc_get_cd(struct mmc_host *mmc) { struct mxs_mmc_host *host = mmc_priv(mmc); - return !(readl(host->base + HW_SSP_STATUS) & + return !(readl(host->base + HW_SSP_STATUS(host)) & BM_SSP_STATUS_CARD_DETECT); } @@ -207,7 +207,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host) writel(BF_SSP(0xffff, TIMING_TIMEOUT) | BF_SSP(2, TIMING_CLOCK_DIVIDE) | BF_SSP(0, TIMING_CLOCK_RATE), - host->base + HW_SSP_TIMING); + host->base + HW_SSP_TIMING(host)); if (host->sdio_irq_en) { ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK; @@ -215,7 +215,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host) } writel(ctrl0, host->base + HW_SSP_CTRL0); - writel(ctrl1, host->base + HW_SSP_CTRL1); + writel(ctrl1, host->base + HW_SSP_CTRL1(host)); } static void mxs_mmc_start_cmd(struct mxs_mmc_host *host, @@ -229,12 +229,12 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host) if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) { if (mmc_resp_type(cmd) & MMC_RSP_136) { - cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0); - cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1); - cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2); - cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3); + cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0(host)); + cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1(host)); + cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2(host)); + cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3(host)); } else { - cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0); + cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0(host)); } } @@ -277,9 +277,9 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id) spin_lock(&host->lock); - stat = readl(host->base + HW_SSP_CTRL1); + stat = readl(host->base + HW_SSP_CTRL1(host)); writel(stat & MXS_MMC_IRQ_BITS, - host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_CLR); + host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR); if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN)) mmc_signal_sdio_irq(host->mmc); @@ -485,7 +485,7 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host) blocks = 1; /* xfer count, block size and count need to be set differently */ - if (ssp_is_old()) { + if (ssp_is_old(host)) { ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT); cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) | BF_SSP(blocks - 1, CMD0_BLOCK_COUNT); @@ -509,10 +509,10 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host) /* set the timeout count */ timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns); - val = readl(host->base + HW_SSP_TIMING); + val = readl(host->base + HW_SSP_TIMING(host)); val &= ~(BM_SSP_TIMING_TIMEOUT); val |= BF_SSP(timeout, TIMING_TIMEOUT); - writel(val, host->base + HW_SSP_TIMING); + writel(val, host->base + HW_SSP_TIMING(host)); /* pio */ host->ssp_pio_words[0] = ctrl0; @@ -598,11 +598,11 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate) ssp_sck = ssp_clk / clock_divide / (1 + clock_rate); - val = readl(host->base + HW_SSP_TIMING); + val = readl(host->base + HW_SSP_TIMING(host)); val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE); val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE); val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE); - writel(val, host->base + HW_SSP_TIMING); + writel(val, host->base + HW_SSP_TIMING(host)); host->clk_rate = ssp_sck; @@ -639,16 +639,17 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); writel(BM_SSP_CTRL1_SDIO_IRQ_EN, - host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_SET); + host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET); - if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ) + if (readl(host->base + HW_SSP_STATUS(host)) & + BM_SSP_STATUS_SDIO_IRQ) mmc_signal_sdio_irq(host->mmc); } else { writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); writel(BM_SSP_CTRL1_SDIO_IRQ_EN, - host->base + HW_SSP_CTRL1 + STMP_OFFSET_REG_CLR); + host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR); } spin_unlock_irqrestore(&host->lock, flags); @@ -765,8 +766,8 @@ static int mxs_mmc_probe(struct platform_device *pdev) mmc->max_segs = 52; mmc->max_blk_size = 1 << 0xf; - mmc->max_blk_count = (ssp_is_old()) ? 0xff : 0xffffff; - mmc->max_req_size = (ssp_is_old()) ? 0xffff : 0xffffffff; + mmc->max_blk_count = (ssp_is_old(host)) ? 0xff : 0xffffff; + mmc->max_req_size = (ssp_is_old(host)) ? 0xffff : 0xffffffff; mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev); platform_set_drvdata(pdev, mmc); -- cgit v1.2.2 From ef9b4d3996624f65ffa928bd7767f0e186687c15 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 5 May 2012 20:24:01 +0800 Subject: mmc: mxs-mmc: get rid of the use of cpu_is_xxx The register HW_SSP_VERSION is broken for ssp version detection, as the address of the register is different between imx23 and imx28. Let's use platform_device_id to detect the device, so that the use of cpu_is_xxx can be removed. Signed-off-by: Shawn Guo Acked-by: Chris Ball --- drivers/clk/mxs/clk-imx23.c | 4 ++-- drivers/clk/mxs/clk-imx28.c | 8 ++++---- drivers/mmc/host/mxs-mmc.c | 32 ++++++++++++++++++++++---------- 3 files changed, 28 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 96562f5f92f7..f7be225f544c 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -93,8 +93,8 @@ static struct clk_lookup xbus_lookups[] __initdata = { }; static struct clk_lookup ssp_lookups[] __initdata = { - { .dev_id = "mxs-mmc.0", }, - { .dev_id = "mxs-mmc.1", }, + { .dev_id = "imx23-mmc.0", }, + { .dev_id = "imx23-mmc.1", }, { .dev_id = "80010000.ssp", }, { .dev_id = "80034000.ssp", }, }; diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index a7ff4f106ce2..2826a2606a29 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -148,22 +148,22 @@ static struct clk_lookup xbus_lookups[] __initdata = { }; static struct clk_lookup ssp0_lookups[] __initdata = { - { .dev_id = "mxs-mmc.0", }, + { .dev_id = "imx28-mmc.0", }, { .dev_id = "80010000.ssp", }, }; static struct clk_lookup ssp1_lookups[] __initdata = { - { .dev_id = "mxs-mmc.1", }, + { .dev_id = "imx28-mmc.1", }, { .dev_id = "80012000.ssp", }, }; static struct clk_lookup ssp2_lookups[] __initdata = { - { .dev_id = "mxs-mmc.2", }, + { .dev_id = "imx28-mmc.2", }, { .dev_id = "80014000.ssp", }, }; static struct clk_lookup ssp3_lookups[] __initdata = { - { .dev_id = "mxs-mmc.3", }, + { .dev_id = "imx28-mmc.3", }, { .dev_id = "80016000.ssp", }, }; diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index a699a8673766..92395563cd82 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -42,7 +42,6 @@ #include #include -#include #include #define DRIVER_NAME "mxs-mmc" @@ -50,8 +49,7 @@ /* card detect polling timeout */ #define MXS_MMC_DETECT_TIMEOUT (HZ/2) -#define SSP_VERSION_LATEST 4 -#define ssp_is_old(host) ((host)->version < SSP_VERSION_LATEST) +#define ssp_is_old(host) ((host)->devid == IMX23_MMC) /* SSP registers */ #define HW_SSP_CTRL0 0x000 @@ -123,8 +121,6 @@ #define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100) #define BM_SSP_STATUS_CARD_DETECT (1 << 28) #define BM_SSP_STATUS_SDIO_IRQ (1 << 17) -#define HW_SSP_VERSION (cpu_is_mx23() ? 0x110 : 0x130) -#define BP_SSP_VERSION_MAJOR (24) #define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field) @@ -139,6 +135,11 @@ #define SSP_PIO_NUM 3 +enum mxs_mmc_id { + IMX23_MMC, + IMX28_MMC, +}; + struct mxs_mmc_host { struct mmc_host *mmc; struct mmc_request *mrq; @@ -158,7 +159,7 @@ struct mxs_mmc_host { enum dma_transfer_direction slave_dirn; u32 ssp_pio_words[SSP_PIO_NUM]; - unsigned int version; + enum mxs_mmc_id devid; unsigned char bus_width; spinlock_t lock; int sdio_irq_en; @@ -678,6 +679,19 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param) return true; } +static struct platform_device_id mxs_mmc_ids[] = { + { + .name = "imx23-mmc", + .driver_data = IMX23_MMC, + }, { + .name = "imx28-mmc", + .driver_data = IMX28_MMC, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mxs_mmc_ids); + static int mxs_mmc_probe(struct platform_device *pdev) { struct mxs_mmc_host *host; @@ -712,10 +726,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) goto out_mmc_free; } - /* only major verion does matter */ - host->version = readl(host->base + HW_SSP_VERSION) >> - BP_SSP_VERSION_MAJOR; - + host->devid = pdev->id_entry->driver_data; host->mmc = mmc; host->res = r; host->dma_res = dmares; @@ -866,6 +877,7 @@ static const struct dev_pm_ops mxs_mmc_pm_ops = { static struct platform_driver mxs_mmc_driver = { .probe = mxs_mmc_probe, .remove = mxs_mmc_remove, + .id_table = mxs_mmc_ids, .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, -- cgit v1.2.2 From 81f38ee8e6a9472193337da248c30963a9741a30 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 10:04:23 +0800 Subject: mmc: mxs-mmc: move header from mach into linux folder Rename arch/arm/mach-mxs/include/mach/mmc.h to include/linux/mmc/mxs-mmc.h, so that mxs-mmc driver becomes inclusion free. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 92395563cd82..5343190bb9d9 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -41,8 +41,7 @@ #include #include #include - -#include +#include #define DRIVER_NAME "mxs-mmc" -- cgit v1.2.2 From df06bfc724b58d649eef4bf51a953c7aeed9635f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 11:20:40 +0800 Subject: mmc: mxs-mmc: use devm_* helper to make cleanup simpler Use devm_request_and_ioremap and devm_request_irq helpers to clean up the code a little bit. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 40 +++++++++------------------------------- 1 file changed, 9 insertions(+), 31 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 5343190bb9d9..d2729e117ae1 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -146,8 +146,6 @@ struct mxs_mmc_host { struct mmc_data *data; void __iomem *base; - int irq; - struct resource *res; struct resource *dma_res; struct clk *clk; unsigned int clk_rate; @@ -695,7 +693,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) { struct mxs_mmc_host *host; struct mmc_host *mmc; - struct resource *iores, *dmares, *r; + struct resource *iores, *dmares; struct mxs_mmc_platform_data *pdata; struct pinctrl *pinctrl; int ret = 0, irq_err, irq_dma; @@ -708,28 +706,20 @@ static int mxs_mmc_probe(struct platform_device *pdev) if (!iores || !dmares || irq_err < 0 || irq_dma < 0) return -EINVAL; - r = request_mem_region(iores->start, resource_size(iores), pdev->name); - if (!r) - return -EBUSY; - mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev); - if (!mmc) { - ret = -ENOMEM; - goto out_release_mem; - } + if (!mmc) + return -ENOMEM; host = mmc_priv(mmc); - host->base = ioremap(r->start, resource_size(r)); + host->base = devm_request_and_ioremap(&pdev->dev, iores); if (!host->base) { - ret = -ENOMEM; + ret = -EADDRNOTAVAIL; goto out_mmc_free; } host->devid = pdev->id_entry->driver_data; host->mmc = mmc; - host->res = r; host->dma_res = dmares; - host->irq = irq_err; host->sdio_irq_en = 0; pinctrl = devm_pinctrl_get_select_default(&pdev->dev); @@ -741,7 +731,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) host->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(host->clk)) { ret = PTR_ERR(host->clk); - goto out_iounmap; + goto out_mmc_free; } clk_prepare_enable(host->clk); @@ -782,7 +772,8 @@ static int mxs_mmc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mmc); - ret = request_irq(host->irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host); + ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0, + DRIVER_NAME, host); if (ret) goto out_free_dma; @@ -790,26 +781,20 @@ static int mxs_mmc_probe(struct platform_device *pdev) ret = mmc_add_host(mmc); if (ret) - goto out_free_irq; + goto out_free_dma; dev_info(mmc_dev(host->mmc), "initialized\n"); return 0; -out_free_irq: - free_irq(host->irq, host); out_free_dma: if (host->dmach) dma_release_channel(host->dmach); out_clk_put: clk_disable_unprepare(host->clk); clk_put(host->clk); -out_iounmap: - iounmap(host->base); out_mmc_free: mmc_free_host(mmc); -out_release_mem: - release_mem_region(iores->start, resource_size(iores)); return ret; } @@ -817,12 +802,9 @@ static int mxs_mmc_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); struct mxs_mmc_host *host = mmc_priv(mmc); - struct resource *res = host->res; mmc_remove_host(mmc); - free_irq(host->irq, host); - platform_set_drvdata(pdev, NULL); if (host->dmach) @@ -831,12 +813,8 @@ static int mxs_mmc_remove(struct platform_device *pdev) clk_disable_unprepare(host->clk); clk_put(host->clk); - iounmap(host->base); - mmc_free_host(mmc); - release_mem_region(res->start, resource_size(res)); - return 0; } -- cgit v1.2.2 From b60188c820347040087bfe329f77b286dfd50a7e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 11:25:35 +0800 Subject: mmc: mxs-mmc: have dma_channel than dma_res in mxs_mmc_host It replaces dma_res with dma_channel in struct mxs_mmc_host, so that the device tree support will be a little easier, since dma channel can not be retrieved from "struct resource *dma_res". Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index d2729e117ae1..202d0966b673 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -146,7 +146,7 @@ struct mxs_mmc_host { struct mmc_data *data; void __iomem *base; - struct resource *dma_res; + int dma_channel; struct clk *clk; unsigned int clk_rate; @@ -668,7 +668,7 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param) if (!mxs_dma_is_apbh(chan)) return false; - if (chan->chan_id != host->dma_res->start) + if (chan->chan_id != host->dma_channel) return false; chan->private = &host->dma_data; @@ -719,7 +719,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) host->devid = pdev->id_entry->driver_data; host->mmc = mmc; - host->dma_res = dmares; + host->dma_channel = dmares->start; host->sdio_irq_en = 0; pinctrl = devm_pinctrl_get_select_default(&pdev->dev); -- cgit v1.2.2 From 31b0ff5e7390a955f0d7279ab922e4b41469729d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 13:33:40 +0800 Subject: mmc: mxs-mmc: copy wp_gpio in struct mxs_mmc_host Copy wp_gpio from platform_data into struct mxs_mmc_host, so that the use of platform_data can be limited in probe function, which will ease the device tree probe. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 202d0966b673..76232dd277c9 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -160,21 +160,17 @@ struct mxs_mmc_host { unsigned char bus_width; spinlock_t lock; int sdio_irq_en; + int wp_gpio; }; static int mxs_mmc_get_ro(struct mmc_host *mmc) { struct mxs_mmc_host *host = mmc_priv(mmc); - struct mxs_mmc_platform_data *pdata = - mmc_dev(host->mmc)->platform_data; - if (!pdata) - return -EFAULT; - - if (!gpio_is_valid(pdata->wp_gpio)) + if (!gpio_is_valid(host->wp_gpio)) return -EINVAL; - return gpio_get_value(pdata->wp_gpio); + return gpio_get_value(host->wp_gpio); } static int mxs_mmc_get_cd(struct mmc_host *mmc) @@ -758,6 +754,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; if (pdata->flags & SLOTF_4_BIT_CAPABLE) mmc->caps |= MMC_CAP_4_BIT_DATA; + host->wp_gpio = pdata->wp_gpio; } mmc->f_min = 400000; -- cgit v1.2.2 From 6de4d817aa38ea74dd446d015c8ed62a3ebaeafb Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 13:30:44 +0800 Subject: mmc: mxs-mmc: add device tree support It adds device tree probe support for mxs-mmc driver. Signed-off-by: Shawn Guo Acked-by: Chris Ball --- drivers/mmc/host/mxs-mmc.c | 48 +++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 43 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 76232dd277c9..34a90266ab11 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -23,6 +23,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -685,8 +688,18 @@ static struct platform_device_id mxs_mmc_ids[] = { }; MODULE_DEVICE_TABLE(platform, mxs_mmc_ids); +static const struct of_device_id mxs_mmc_dt_ids[] = { + { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_MMC, }, + { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_MMC, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids); + static int mxs_mmc_probe(struct platform_device *pdev) { + const struct of_device_id *of_id = + of_match_device(mxs_mmc_dt_ids, &pdev->dev); + struct device_node *np = pdev->dev.of_node; struct mxs_mmc_host *host; struct mmc_host *mmc; struct resource *iores, *dmares; @@ -699,7 +712,7 @@ static int mxs_mmc_probe(struct platform_device *pdev) dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); irq_err = platform_get_irq(pdev, 0); irq_dma = platform_get_irq(pdev, 1); - if (!iores || !dmares || irq_err < 0 || irq_dma < 0) + if (!iores || irq_err < 0 || irq_dma < 0) return -EINVAL; mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev); @@ -713,15 +726,31 @@ static int mxs_mmc_probe(struct platform_device *pdev) goto out_mmc_free; } - host->devid = pdev->id_entry->driver_data; + if (np) { + host->devid = (enum mxs_mmc_id) of_id->data; + /* + * TODO: This is a temporary solution and should be changed + * to use generic DMA binding later when the helpers get in. + */ + ret = of_property_read_u32(np, "fsl,ssp-dma-channel", + &host->dma_channel); + if (ret) { + dev_err(mmc_dev(host->mmc), + "failed to get dma channel\n"); + goto out_mmc_free; + } + } else { + host->devid = pdev->id_entry->driver_data; + host->dma_channel = dmares->start; + } + host->mmc = mmc; - host->dma_channel = dmares->start; host->sdio_irq_en = 0; pinctrl = devm_pinctrl_get_select_default(&pdev->dev); if (IS_ERR(pinctrl)) { ret = PTR_ERR(pinctrl); - goto out_iounmap; + goto out_mmc_free; } host->clk = clk_get(&pdev->dev, NULL); @@ -749,7 +778,15 @@ static int mxs_mmc_probe(struct platform_device *pdev) MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL; pdata = mmc_dev(host->mmc)->platform_data; - if (pdata) { + if (!pdata) { + u32 bus_width = 0; + of_property_read_u32(np, "bus-width", &bus_width); + if (bus_width == 4) + mmc->caps |= MMC_CAP_4_BIT_DATA; + else if (bus_width == 8) + mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; + host->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); + } else { if (pdata->flags & SLOTF_8_BIT_CAPABLE) mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; if (pdata->flags & SLOTF_4_BIT_CAPABLE) @@ -857,6 +894,7 @@ static struct platform_driver mxs_mmc_driver = { .owner = THIS_MODULE, #ifdef CONFIG_PM .pm = &mxs_mmc_pm_ops, + .of_match_table = mxs_mmc_dt_ids, #endif }, }; -- cgit v1.2.2 From b2378668489d16eb1a1ac722e84cc6a9a1513ba0 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 12 May 2012 13:43:32 +0800 Subject: i2c: mxs: add device tree probe support Add device tree probe support for i2c-mxs driver. So far, it's only been tested on imx28. Signed-off-by: Shawn Guo Acked-by: Wolfram Sang --- drivers/i2c/busses/i2c-mxs.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 7fa73eed84a7..7dca58b0e746 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c @@ -27,6 +27,9 @@ #include #include #include +#include +#include +#include #include @@ -371,6 +374,7 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) adap->algo = &mxs_i2c_algo; adap->dev.parent = dev; adap->nr = pdev->id; + adap->dev.of_node = pdev->dev.of_node; i2c_set_adapdata(adap, i2c); err = i2c_add_numbered_adapter(adap); if (err) { @@ -380,6 +384,8 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) return err; } + of_i2c_register_devices(adap); + return 0; } @@ -399,10 +405,17 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id mxs_i2c_dt_ids[] = { + { .compatible = "fsl,imx28-i2c", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids); + static struct platform_driver mxs_i2c_driver = { .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, + .of_match_table = mxs_i2c_dt_ids, }, .remove = __devexit_p(mxs_i2c_remove), }; -- cgit v1.2.2 From 0b928af1f40f152dd6469f32b7792480048e6b44 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Thu, 19 Apr 2012 22:23:13 +0530 Subject: SPEAr13xx: Add common clock framework support This patch adds SPEAr1310 and SPEAr1340's clock framework support. It is based on earlier support for SPEAr3xx family. Signed-off-by: Viresh Kumar Reviewed-by: Mike Turquette --- drivers/clk/spear/Makefile | 2 + drivers/clk/spear/spear1310_clock.c | 1106 +++++++++++++++++++++++++++++++++++ drivers/clk/spear/spear1340_clock.c | 964 ++++++++++++++++++++++++++++++ 3 files changed, 2072 insertions(+) create mode 100644 drivers/clk/spear/spear1310_clock.c create mode 100644 drivers/clk/spear/spear1340_clock.c (limited to 'drivers') diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile index 335886049c83..cdb425d3b8ee 100644 --- a/drivers/clk/spear/Makefile +++ b/drivers/clk/spear/Makefile @@ -6,3 +6,5 @@ obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx_clock.o obj-$(CONFIG_ARCH_SPEAR6XX) += spear6xx_clock.o +obj-$(CONFIG_MACH_SPEAR1310) += spear1310_clock.o +obj-$(CONFIG_MACH_SPEAR1340) += spear1340_clock.o diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c new file mode 100644 index 000000000000..42b68df9aeef --- /dev/null +++ b/drivers/clk/spear/spear1310_clock.c @@ -0,0 +1,1106 @@ +/* + * arch/arm/mach-spear13xx/spear1310_clock.c + * + * SPEAr1310 machine clock framework source file + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +/* PLL related registers and bit values */ +#define SPEAR1310_PLL_CFG (VA_MISC_BASE + 0x210) + /* PLL_CFG bit values */ + #define SPEAR1310_CLCD_SYNT_CLK_MASK 1 + #define SPEAR1310_CLCD_SYNT_CLK_SHIFT 31 + #define SPEAR1310_RAS_SYNT2_3_CLK_MASK 2 + #define SPEAR1310_RAS_SYNT2_3_CLK_SHIFT 29 + #define SPEAR1310_RAS_SYNT_CLK_MASK 2 + #define SPEAR1310_RAS_SYNT0_1_CLK_SHIFT 27 + #define SPEAR1310_PLL_CLK_MASK 2 + #define SPEAR1310_PLL3_CLK_SHIFT 24 + #define SPEAR1310_PLL2_CLK_SHIFT 22 + #define SPEAR1310_PLL1_CLK_SHIFT 20 + +#define SPEAR1310_PLL1_CTR (VA_MISC_BASE + 0x214) +#define SPEAR1310_PLL1_FRQ (VA_MISC_BASE + 0x218) +#define SPEAR1310_PLL2_CTR (VA_MISC_BASE + 0x220) +#define SPEAR1310_PLL2_FRQ (VA_MISC_BASE + 0x224) +#define SPEAR1310_PLL3_CTR (VA_MISC_BASE + 0x22C) +#define SPEAR1310_PLL3_FRQ (VA_MISC_BASE + 0x230) +#define SPEAR1310_PLL4_CTR (VA_MISC_BASE + 0x238) +#define SPEAR1310_PLL4_FRQ (VA_MISC_BASE + 0x23C) +#define SPEAR1310_PERIP_CLK_CFG (VA_MISC_BASE + 0x244) + /* PERIP_CLK_CFG bit values */ + #define SPEAR1310_GPT_OSC24_VAL 0 + #define SPEAR1310_GPT_APB_VAL 1 + #define SPEAR1310_GPT_CLK_MASK 1 + #define SPEAR1310_GPT3_CLK_SHIFT 11 + #define SPEAR1310_GPT2_CLK_SHIFT 10 + #define SPEAR1310_GPT1_CLK_SHIFT 9 + #define SPEAR1310_GPT0_CLK_SHIFT 8 + #define SPEAR1310_UART_CLK_PLL5_VAL 0 + #define SPEAR1310_UART_CLK_OSC24_VAL 1 + #define SPEAR1310_UART_CLK_SYNT_VAL 2 + #define SPEAR1310_UART_CLK_MASK 2 + #define SPEAR1310_UART_CLK_SHIFT 4 + + #define SPEAR1310_AUX_CLK_PLL5_VAL 0 + #define SPEAR1310_AUX_CLK_SYNT_VAL 1 + #define SPEAR1310_CLCD_CLK_MASK 2 + #define SPEAR1310_CLCD_CLK_SHIFT 2 + #define SPEAR1310_C3_CLK_MASK 1 + #define SPEAR1310_C3_CLK_SHIFT 1 + +#define SPEAR1310_GMAC_CLK_CFG (VA_MISC_BASE + 0x248) + #define SPEAR1310_GMAC_PHY_IF_SEL_MASK 3 + #define SPEAR1310_GMAC_PHY_IF_SEL_SHIFT 4 + #define SPEAR1310_GMAC_PHY_CLK_MASK 1 + #define SPEAR1310_GMAC_PHY_CLK_SHIFT 3 + #define SPEAR1310_GMAC_PHY_INPUT_CLK_MASK 2 + #define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT 1 + +#define SPEAR1310_I2S_CLK_CFG (VA_MISC_BASE + 0x24C) + /* I2S_CLK_CFG register mask */ + #define SPEAR1310_I2S_SCLK_X_MASK 0x1F + #define SPEAR1310_I2S_SCLK_X_SHIFT 27 + #define SPEAR1310_I2S_SCLK_Y_MASK 0x1F + #define SPEAR1310_I2S_SCLK_Y_SHIFT 22 + #define SPEAR1310_I2S_SCLK_EQ_SEL_SHIFT 21 + #define SPEAR1310_I2S_SCLK_SYNTH_ENB 20 + #define SPEAR1310_I2S_PRS1_CLK_X_MASK 0xFF + #define SPEAR1310_I2S_PRS1_CLK_X_SHIFT 12 + #define SPEAR1310_I2S_PRS1_CLK_Y_MASK 0xFF + #define SPEAR1310_I2S_PRS1_CLK_Y_SHIFT 4 + #define SPEAR1310_I2S_PRS1_EQ_SEL_SHIFT 3 + #define SPEAR1310_I2S_REF_SEL_MASK 1 + #define SPEAR1310_I2S_REF_SHIFT 2 + #define SPEAR1310_I2S_SRC_CLK_MASK 2 + #define SPEAR1310_I2S_SRC_CLK_SHIFT 0 + +#define SPEAR1310_C3_CLK_SYNT (VA_MISC_BASE + 0x250) +#define SPEAR1310_UART_CLK_SYNT (VA_MISC_BASE + 0x254) +#define SPEAR1310_GMAC_CLK_SYNT (VA_MISC_BASE + 0x258) +#define SPEAR1310_SDHCI_CLK_SYNT (VA_MISC_BASE + 0x25C) +#define SPEAR1310_CFXD_CLK_SYNT (VA_MISC_BASE + 0x260) +#define SPEAR1310_ADC_CLK_SYNT (VA_MISC_BASE + 0x264) +#define SPEAR1310_AMBA_CLK_SYNT (VA_MISC_BASE + 0x268) +#define SPEAR1310_CLCD_CLK_SYNT (VA_MISC_BASE + 0x270) +#define SPEAR1310_RAS_CLK_SYNT0 (VA_MISC_BASE + 0x280) +#define SPEAR1310_RAS_CLK_SYNT1 (VA_MISC_BASE + 0x288) +#define SPEAR1310_RAS_CLK_SYNT2 (VA_MISC_BASE + 0x290) +#define SPEAR1310_RAS_CLK_SYNT3 (VA_MISC_BASE + 0x298) + /* Check Fractional synthesizer reg masks */ + +#define SPEAR1310_PERIP1_CLK_ENB (VA_MISC_BASE + 0x300) + /* PERIP1_CLK_ENB register masks */ + #define SPEAR1310_RTC_CLK_ENB 31 + #define SPEAR1310_ADC_CLK_ENB 30 + #define SPEAR1310_C3_CLK_ENB 29 + #define SPEAR1310_JPEG_CLK_ENB 28 + #define SPEAR1310_CLCD_CLK_ENB 27 + #define SPEAR1310_DMA_CLK_ENB 25 + #define SPEAR1310_GPIO1_CLK_ENB 24 + #define SPEAR1310_GPIO0_CLK_ENB 23 + #define SPEAR1310_GPT1_CLK_ENB 22 + #define SPEAR1310_GPT0_CLK_ENB 21 + #define SPEAR1310_I2S0_CLK_ENB 20 + #define SPEAR1310_I2S1_CLK_ENB 19 + #define SPEAR1310_I2C0_CLK_ENB 18 + #define SPEAR1310_SSP_CLK_ENB 17 + #define SPEAR1310_UART_CLK_ENB 15 + #define SPEAR1310_PCIE_SATA_2_CLK_ENB 14 + #define SPEAR1310_PCIE_SATA_1_CLK_ENB 13 + #define SPEAR1310_PCIE_SATA_0_CLK_ENB 12 + #define SPEAR1310_UOC_CLK_ENB 11 + #define SPEAR1310_UHC1_CLK_ENB 10 + #define SPEAR1310_UHC0_CLK_ENB 9 + #define SPEAR1310_GMAC_CLK_ENB 8 + #define SPEAR1310_CFXD_CLK_ENB 7 + #define SPEAR1310_SDHCI_CLK_ENB 6 + #define SPEAR1310_SMI_CLK_ENB 5 + #define SPEAR1310_FSMC_CLK_ENB 4 + #define SPEAR1310_SYSRAM0_CLK_ENB 3 + #define SPEAR1310_SYSRAM1_CLK_ENB 2 + #define SPEAR1310_SYSROM_CLK_ENB 1 + #define SPEAR1310_BUS_CLK_ENB 0 + +#define SPEAR1310_PERIP2_CLK_ENB (VA_MISC_BASE + 0x304) + /* PERIP2_CLK_ENB register masks */ + #define SPEAR1310_THSENS_CLK_ENB 8 + #define SPEAR1310_I2S_REF_PAD_CLK_ENB 7 + #define SPEAR1310_ACP_CLK_ENB 6 + #define SPEAR1310_GPT3_CLK_ENB 5 + #define SPEAR1310_GPT2_CLK_ENB 4 + #define SPEAR1310_KBD_CLK_ENB 3 + #define SPEAR1310_CPU_DBG_CLK_ENB 2 + #define SPEAR1310_DDR_CORE_CLK_ENB 1 + #define SPEAR1310_DDR_CTRL_CLK_ENB 0 + +#define SPEAR1310_RAS_CLK_ENB (VA_MISC_BASE + 0x310) + /* RAS_CLK_ENB register masks */ + #define SPEAR1310_SYNT3_CLK_ENB 17 + #define SPEAR1310_SYNT2_CLK_ENB 16 + #define SPEAR1310_SYNT1_CLK_ENB 15 + #define SPEAR1310_SYNT0_CLK_ENB 14 + #define SPEAR1310_PCLK3_CLK_ENB 13 + #define SPEAR1310_PCLK2_CLK_ENB 12 + #define SPEAR1310_PCLK1_CLK_ENB 11 + #define SPEAR1310_PCLK0_CLK_ENB 10 + #define SPEAR1310_PLL3_CLK_ENB 9 + #define SPEAR1310_PLL2_CLK_ENB 8 + #define SPEAR1310_C125M_PAD_CLK_ENB 7 + #define SPEAR1310_C30M_CLK_ENB 6 + #define SPEAR1310_C48M_CLK_ENB 5 + #define SPEAR1310_OSC_25M_CLK_ENB 4 + #define SPEAR1310_OSC_32K_CLK_ENB 3 + #define SPEAR1310_OSC_24M_CLK_ENB 2 + #define SPEAR1310_PCLK_CLK_ENB 1 + #define SPEAR1310_ACLK_CLK_ENB 0 + +/* RAS Area Control Register */ +#define SPEAR1310_RAS_CTRL_REG0 (VA_SPEAR1310_RAS_BASE + 0x000) + #define SPEAR1310_SSP1_CLK_MASK 3 + #define SPEAR1310_SSP1_CLK_SHIFT 26 + #define SPEAR1310_TDM_CLK_MASK 1 + #define SPEAR1310_TDM2_CLK_SHIFT 24 + #define SPEAR1310_TDM1_CLK_SHIFT 23 + #define SPEAR1310_I2C_CLK_MASK 1 + #define SPEAR1310_I2C7_CLK_SHIFT 22 + #define SPEAR1310_I2C6_CLK_SHIFT 21 + #define SPEAR1310_I2C5_CLK_SHIFT 20 + #define SPEAR1310_I2C4_CLK_SHIFT 19 + #define SPEAR1310_I2C3_CLK_SHIFT 18 + #define SPEAR1310_I2C2_CLK_SHIFT 17 + #define SPEAR1310_I2C1_CLK_SHIFT 16 + #define SPEAR1310_GPT64_CLK_MASK 1 + #define SPEAR1310_GPT64_CLK_SHIFT 15 + #define SPEAR1310_RAS_UART_CLK_MASK 1 + #define SPEAR1310_UART5_CLK_SHIFT 14 + #define SPEAR1310_UART4_CLK_SHIFT 13 + #define SPEAR1310_UART3_CLK_SHIFT 12 + #define SPEAR1310_UART2_CLK_SHIFT 11 + #define SPEAR1310_UART1_CLK_SHIFT 10 + #define SPEAR1310_PCI_CLK_MASK 1 + #define SPEAR1310_PCI_CLK_SHIFT 0 + +#define SPEAR1310_RAS_CTRL_REG1 (VA_SPEAR1310_RAS_BASE + 0x004) + #define SPEAR1310_PHY_CLK_MASK 0x3 + #define SPEAR1310_RMII_PHY_CLK_SHIFT 0 + #define SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT 2 + +#define SPEAR1310_RAS_SW_CLK_CTRL (VA_SPEAR1310_RAS_BASE + 0x0148) + #define SPEAR1310_CAN1_CLK_ENB 25 + #define SPEAR1310_CAN0_CLK_ENB 24 + #define SPEAR1310_GPT64_CLK_ENB 23 + #define SPEAR1310_SSP1_CLK_ENB 22 + #define SPEAR1310_I2C7_CLK_ENB 21 + #define SPEAR1310_I2C6_CLK_ENB 20 + #define SPEAR1310_I2C5_CLK_ENB 19 + #define SPEAR1310_I2C4_CLK_ENB 18 + #define SPEAR1310_I2C3_CLK_ENB 17 + #define SPEAR1310_I2C2_CLK_ENB 16 + #define SPEAR1310_I2C1_CLK_ENB 15 + #define SPEAR1310_UART5_CLK_ENB 14 + #define SPEAR1310_UART4_CLK_ENB 13 + #define SPEAR1310_UART3_CLK_ENB 12 + #define SPEAR1310_UART2_CLK_ENB 11 + #define SPEAR1310_UART1_CLK_ENB 10 + #define SPEAR1310_RS485_1_CLK_ENB 9 + #define SPEAR1310_RS485_0_CLK_ENB 8 + #define SPEAR1310_TDM2_CLK_ENB 7 + #define SPEAR1310_TDM1_CLK_ENB 6 + #define SPEAR1310_PCI_CLK_ENB 5 + #define SPEAR1310_GMII_CLK_ENB 4 + #define SPEAR1310_MII2_CLK_ENB 3 + #define SPEAR1310_MII1_CLK_ENB 2 + #define SPEAR1310_MII0_CLK_ENB 1 + #define SPEAR1310_ESRAM_CLK_ENB 0 + +static DEFINE_SPINLOCK(_lock); + +/* pll rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll_rtbl[] = { + /* PCLK 24MHz */ + {.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */ + {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */ + {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */ +}; + +/* vco-pll4 rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll4_rtbl[] = { + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */ + {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */ +}; + +/* aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl aux_rtbl[] = { + /* For VCO1div2 = 500 MHz */ + {.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */ + {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */ + {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */ + {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */ +}; + +/* gmac rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl gmac_rtbl[] = { + /* For gmac phy input clk */ + {.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */ + {.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */ +}; + +/* clcd rate configuration table, in ascending order of rates */ +static struct frac_rate_tbl clcd_rtbl[] = { + {.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */ + {.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */ + {.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */ + {.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/ +}; + +/* i2s prescaler1 masks */ +static struct aux_clk_masks i2s_prs1_masks = { + .eq_sel_mask = AUX_EQ_SEL_MASK, + .eq_sel_shift = SPEAR1310_I2S_PRS1_EQ_SEL_SHIFT, + .eq1_mask = AUX_EQ1_SEL, + .eq2_mask = AUX_EQ2_SEL, + .xscale_sel_mask = SPEAR1310_I2S_PRS1_CLK_X_MASK, + .xscale_sel_shift = SPEAR1310_I2S_PRS1_CLK_X_SHIFT, + .yscale_sel_mask = SPEAR1310_I2S_PRS1_CLK_Y_MASK, + .yscale_sel_shift = SPEAR1310_I2S_PRS1_CLK_Y_SHIFT, +}; + +/* i2s sclk (bit clock) syynthesizers masks */ +static struct aux_clk_masks i2s_sclk_masks = { + .eq_sel_mask = AUX_EQ_SEL_MASK, + .eq_sel_shift = SPEAR1310_I2S_SCLK_EQ_SEL_SHIFT, + .eq1_mask = AUX_EQ1_SEL, + .eq2_mask = AUX_EQ2_SEL, + .xscale_sel_mask = SPEAR1310_I2S_SCLK_X_MASK, + .xscale_sel_shift = SPEAR1310_I2S_SCLK_X_SHIFT, + .yscale_sel_mask = SPEAR1310_I2S_SCLK_Y_MASK, + .yscale_sel_shift = SPEAR1310_I2S_SCLK_Y_SHIFT, + .enable_bit = SPEAR1310_I2S_SCLK_SYNTH_ENB, +}; + +/* i2s prs1 aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl i2s_prs1_rtbl[] = { + /* For parent clk = 49.152 MHz */ + {.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz */ +}; + +/* i2s sclk aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl i2s_sclk_rtbl[] = { + /* For i2s_ref_clk = 12.288MHz */ + {.xscale = 1, .yscale = 4, .eq = 0}, /* 1.53 MHz */ + {.xscale = 1, .yscale = 2, .eq = 0}, /* 3.07 Mhz */ +}; + +/* adc rate configuration table, in ascending order of rates */ +/* possible adc range is 2.5 MHz to 20 MHz. */ +static struct aux_rate_tbl adc_rtbl[] = { + /* For ahb = 166.67 MHz */ + {.xscale = 1, .yscale = 31, .eq = 0}, /* 2.68 MHz */ + {.xscale = 2, .yscale = 21, .eq = 0}, /* 7.94 MHz */ + {.xscale = 4, .yscale = 21, .eq = 0}, /* 15.87 MHz */ + {.xscale = 10, .yscale = 42, .eq = 0}, /* 19.84 MHz */ +}; + +/* General synth rate configuration table, in ascending order of rates */ +static struct frac_rate_tbl gen_rtbl[] = { + /* For vco1div4 = 250 MHz */ + {.div = 0x14000}, /* 25 MHz */ + {.div = 0x0A000}, /* 50 MHz */ + {.div = 0x05000}, /* 100 MHz */ + {.div = 0x02000}, /* 250 MHz */ +}; + +/* clock parents */ +static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; +static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; +static const char *uart0_parents[] = { "pll5_clk", "uart_synth_gate_clk", }; +static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", }; +static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk", + "osc_25m_clk", }; +static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk", + "gmac_phy_synth_gate_clk", }; +static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; +static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", }; +static const char *i2s_src_parents[] = { "vco1div2_clk", "none", "pll3_clk", + "i2s_src_pad_clk", }; +static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", }; +static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", + "pll3_clk", }; +static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk", + "pll2_clk", }; +static const char *rmii_phy_parents[] = { "ras_tx50_clk", "none", + "ras_pll2_clk", "ras_synth0_clk", }; +static const char *smii_rgmii_phy_parents[] = { "none", "ras_tx125_clk", + "ras_pll2_clk", "ras_synth0_clk", }; +static const char *uart_parents[] = { "ras_apb_clk", "gen_synth3_clk", }; +static const char *i2c_parents[] = { "ras_apb_clk", "gen_synth1_clk", }; +static const char *ssp1_parents[] = { "ras_apb_clk", "gen_synth1_clk", + "ras_plclk0_clk", }; +static const char *pci_parents[] = { "ras_pll3_clk", "gen_synth2_clk", }; +static const char *tdm_parents[] = { "ras_pll3_clk", "gen_synth1_clk", }; + +void __init spear1310_clk_init(void) +{ + struct clk *clk, *clk1; + + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, + 32000); + clk_register_clkdev(clk, "osc_32k_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, + 24000000); + clk_register_clkdev(clk, "osc_24m_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, + 25000000); + clk_register_clkdev(clk, "osc_25m_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL, + CLK_IS_ROOT, 125000000); + clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, + CLK_IS_ROOT, 12288000); + clk_register_clkdev(clk, "i2s_src_pad_clk", NULL); + + /* clock derived from 32 KHz osc clk */ + clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_RTC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "fc900000.rtc"); + + /* clock derived from 24 or 25 MHz osc clk */ + /* vco-pll */ + clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, + SPEAR1310_PLL1_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco1_mux_clk", NULL); + clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk", + 0, SPEAR1310_PLL1_CTR, SPEAR1310_PLL1_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco1_clk", NULL); + clk_register_clkdev(clk1, "pll1_clk", NULL); + + clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, + SPEAR1310_PLL2_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco2_mux_clk", NULL); + clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk", + 0, SPEAR1310_PLL2_CTR, SPEAR1310_PLL2_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco2_clk", NULL); + clk_register_clkdev(clk1, "pll2_clk", NULL); + + clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG, + SPEAR1310_PLL3_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco3_mux_clk", NULL); + clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk", + 0, SPEAR1310_PLL3_CTR, SPEAR1310_PLL3_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco3_clk", NULL); + clk_register_clkdev(clk1, "pll3_clk", NULL); + + clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk", + 0, SPEAR1310_PLL4_CTR, SPEAR1310_PLL4_FRQ, pll4_rtbl, + ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco4_clk", NULL); + clk_register_clkdev(clk1, "pll4_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0, + 48000000); + clk_register_clkdev(clk, "pll5_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0, + 25000000); + clk_register_clkdev(clk, "pll6_clk", NULL); + + /* vco div n clocks */ + clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco1div2_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1, + 4); + clk_register_clkdev(clk, "vco1div4_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco2div2_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco3div2_clk", NULL); + + /* peripherals */ + clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, + 128); + clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0, + SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_THSENS_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_thermal"); + + /* clock derived from pll4 clk */ + clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1, + 1); + clk_register_clkdev(clk, "ddr_clk", NULL); + + /* clock derived from pll1 clk */ + clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 2); + clk_register_clkdev(clk, "cpu_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1, + 2); + clk_register_clkdev(clk, NULL, "ec800620.wdt"); + + clk = clk_register_fixed_factor(NULL, "ahb_clk", "pll1_clk", 0, 1, + 6); + clk_register_clkdev(clk, "ahb_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "apb_clk", "pll1_clk", 0, 1, + 12); + clk_register_clkdev(clk, "apb_clk", NULL); + + /* gpt clocks */ + clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_GPT0_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt0_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt0"); + + clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_GPT1_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt1_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt1"); + + clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_GPT2_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt2_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, + SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt2"); + + clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_GPT3_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt3_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, + SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt3"); + + /* others */ + clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1310_UART_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "uart_synth_clk", NULL); + clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, + ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "uart0_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0000000.serial"); + + clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "sdhci_synth_clk", NULL); + clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b3000000.sdhci"); + + clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1310_CFXD_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "cfxd_synth_clk", NULL); + clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b2800000.cf"); + clk_register_clkdev(clk, NULL, "arasan_xd"); + + clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1310_C3_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "c3_synth_clk", NULL); + clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents, + ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG, + SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "c3_mux_clk", NULL); + + clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_C3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "c3"); + + /* gmac */ + clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk", + gmac_phy_input_parents, + ARRAY_SIZE(gmac_phy_input_parents), 0, + SPEAR1310_GMAC_CLK_CFG, + SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT, + SPEAR1310_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL); + + clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk", + "gmac_phy_input_mux_clk", 0, SPEAR1310_GMAC_CLK_SYNT, + NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL); + clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents, + ARRAY_SIZE(gmac_phy_parents), 0, + SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT, + SPEAR1310_GMAC_PHY_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "stmmacphy.0"); + + /* clcd */ + clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents, + ARRAY_SIZE(clcd_synth_parents), 0, + SPEAR1310_CLCD_CLK_SYNT, SPEAR1310_CLCD_SYNT_CLK_SHIFT, + SPEAR1310_CLCD_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL); + + clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0, + SPEAR1310_CLCD_CLK_SYNT, clcd_rtbl, + ARRAY_SIZE(clcd_rtbl), &_lock); + clk_register_clkdev(clk, "clcd_synth_clk", NULL); + + clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents, + ARRAY_SIZE(clcd_pixel_parents), 0, + SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, + SPEAR1310_CLCD_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "clcd_pixel_clk", NULL); + + clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "clcd_clk", NULL); + + /* i2s */ + clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents, + ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG, + SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "i2s_src_clk", NULL); + + clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0, + SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, + ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); + clk_register_clkdev(clk, "i2s_prs1_clk", NULL); + + clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents, + ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG, + SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2s_ref_clk", NULL); + + clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0, + SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); + + clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk", + "i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG, + &i2s_sclk_masks, i2s_sclk_rtbl, + ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "i2s_sclk_clk", NULL); + clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL); + + /* clock derived from ahb clk */ + clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2C0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0280000.i2c"); + + clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_DMA_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "ea800000.dma"); + clk_register_clkdev(clk, NULL, "eb000000.dma"); + + clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_JPEG_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b2000000.jpeg"); + + clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GMAC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e2000000.eth"); + + clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_FSMC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b0000000.flash"); + + clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SMI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "ea000000.flash"); + + clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "usbh.0_clk", NULL); + + clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "usbh.1_clk", NULL); + + clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UOC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "uoc"); + + clk = clk_register_gate(NULL, "pcie_sata_0_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_0_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "dw_pcie.0"); + clk_register_clkdev(clk, NULL, "ahci.0"); + + clk = clk_register_gate(NULL, "pcie_sata_1_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_1_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "dw_pcie.1"); + clk_register_clkdev(clk, NULL, "ahci.1"); + + clk = clk_register_gate(NULL, "pcie_sata_2_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_2_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "dw_pcie.2"); + clk_register_clkdev(clk, NULL, "ahci.2"); + + clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SYSRAM0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "sysram0_clk", NULL); + + clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SYSRAM1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "sysram1_clk", NULL); + + clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk", + 0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl, + ARRAY_SIZE(adc_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "adc_synth_clk", NULL); + clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "adc_clk"); + + /* clock derived from apb clk */ + clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SSP_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0100000.spi"); + + clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPIO0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0600000.gpio"); + + clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPIO1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0680000.gpio"); + + clk = clk_register_gate(NULL, "i2s0_clk", "apb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2S0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0180000.i2s"); + + clk = clk_register_gate(NULL, "i2s1_clk", "apb_clk", 0, + SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2S1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0200000.i2s"); + + clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0, + SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_KBD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0300000.kbd"); + + /* RAS clks */ + clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk", + gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents), + 0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT0_1_CLK_SHIFT, + SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gen_synth0_1_clk", NULL); + + clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk", + gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents), + 0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT2_3_CLK_SHIFT, + SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gen_synth2_3_clk", NULL); + + clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0, + SPEAR1310_RAS_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth0_clk", NULL); + + clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0, + SPEAR1310_RAS_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth1_clk", NULL); + + clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0, + SPEAR1310_RAS_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth2_clk", NULL); + + clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0, + SPEAR1310_RAS_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth3_clk", NULL); + + clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_24M_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_osc_24m_clk", NULL); + + clk = clk_register_gate(NULL, "ras_osc_25m_clk", "osc_25m_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_25M_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_osc_25m_clk", NULL); + + clk = clk_register_gate(NULL, "ras_osc_32k_clk", "osc_32k_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_32K_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_osc_32k_clk", NULL); + + clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_PLL2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_pll2_clk", NULL); + + clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_PLL3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_pll3_clk", NULL); + + clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_125m_pad_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_C125M_PAD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_tx125_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "ras_30m_fixed_clk", "pll5_clk", 0, + 30000000); + clk = clk_register_gate(NULL, "ras_30m_clk", "ras_30m_fixed_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_C30M_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_30m_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "ras_48m_fixed_clk", "pll5_clk", 0, + 48000000); + clk = clk_register_gate(NULL, "ras_48m_clk", "ras_48m_fixed_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_C48M_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_48m_clk", NULL); + + clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_ACLK_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_ahb_clk", NULL); + + clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0, + SPEAR1310_RAS_CLK_ENB, SPEAR1310_PCLK_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "ras_apb_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, CLK_IS_ROOT, + 50000000); + + clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, CLK_IS_ROOT, + 50000000); + + clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "c_can_platform.0"); + + clk = clk_register_gate(NULL, "can1_clk", "apb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "c_can_platform.1"); + + clk = clk_register_gate(NULL, "ras_smii0_clk", "ras_ahb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c400000.eth"); + + clk = clk_register_gate(NULL, "ras_smii1_clk", "ras_ahb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c500000.eth"); + + clk = clk_register_gate(NULL, "ras_smii2_clk", "ras_ahb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c600000.eth"); + + clk = clk_register_gate(NULL, "ras_rgmii_clk", "ras_ahb_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_GMII_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c700000.eth"); + + clk = clk_register_mux(NULL, "smii_rgmii_phy_mux_clk", + smii_rgmii_phy_parents, + ARRAY_SIZE(smii_rgmii_phy_parents), 0, + SPEAR1310_RAS_CTRL_REG1, + SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT, + SPEAR1310_PHY_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "stmmacphy.1"); + clk_register_clkdev(clk, NULL, "stmmacphy.2"); + clk_register_clkdev(clk, NULL, "stmmacphy.4"); + + clk = clk_register_mux(NULL, "rmii_phy_mux_clk", rmii_phy_parents, + ARRAY_SIZE(rmii_phy_parents), 0, + SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT, + SPEAR1310_PHY_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "stmmacphy.3"); + + clk = clk_register_mux(NULL, "uart1_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_UART1_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "uart1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c800000.serial"); + + clk = clk_register_mux(NULL, "uart2_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_UART2_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "uart2_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart2_clk", "uart2_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5c900000.serial"); + + clk = clk_register_mux(NULL, "uart3_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_UART3_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "uart3_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart3_clk", "uart3_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5ca00000.serial"); + + clk = clk_register_mux(NULL, "uart4_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_UART4_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "uart4_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart4_clk", "uart4_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART4_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5cb00000.serial"); + + clk = clk_register_mux(NULL, "uart5_mux_clk", uart_parents, + ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_UART5_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "uart5_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart5_clk", "uart5_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART5_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5cc00000.serial"); + + clk = clk_register_mux(NULL, "i2c1_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C1_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5cd00000.i2c"); + + clk = clk_register_mux(NULL, "i2c2_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C2_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c2_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5ce00000.i2c"); + + clk = clk_register_mux(NULL, "i2c3_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C3_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c3_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5cf00000.i2c"); + + clk = clk_register_mux(NULL, "i2c4_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C4_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c4_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C4_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5d000000.i2c"); + + clk = clk_register_mux(NULL, "i2c5_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C5_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c5_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C5_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5d100000.i2c"); + + clk = clk_register_mux(NULL, "i2c6_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C6_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c6_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C6_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5d200000.i2c"); + + clk = clk_register_mux(NULL, "i2c7_mux_clk", i2c_parents, + ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_I2C7_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2c7_mux_clk", NULL); + + clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C7_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5d300000.i2c"); + + clk = clk_register_mux(NULL, "ssp1_mux_clk", ssp1_parents, + ARRAY_SIZE(ssp1_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_SSP1_CLK_SHIFT, SPEAR1310_SSP1_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "ssp1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_SSP1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "5d400000.spi"); + + clk = clk_register_mux(NULL, "pci_mux_clk", pci_parents, + ARRAY_SIZE(pci_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_PCI_CLK_SHIFT, SPEAR1310_PCI_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "pci_mux_clk", NULL); + + clk = clk_register_gate(NULL, "pci_clk", "pci_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_PCI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "pci"); + + clk = clk_register_mux(NULL, "tdm1_mux_clk", tdm_parents, + ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_TDM1_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "tdm1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "tdm_hdlc.0"); + + clk = clk_register_mux(NULL, "tdm2_mux_clk", tdm_parents, + ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0, + SPEAR1310_TDM2_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "tdm2_mux_clk", NULL); + + clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mux_clk", 0, + SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "tdm_hdlc.1"); +} diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c new file mode 100644 index 000000000000..f130919d5bf8 --- /dev/null +++ b/drivers/clk/spear/spear1340_clock.c @@ -0,0 +1,964 @@ +/* + * arch/arm/mach-spear13xx/spear1340_clock.c + * + * SPEAr1340 machine clock framework source file + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "clk.h" + +/* Clock Configuration Registers */ +#define SPEAR1340_SYS_CLK_CTRL (VA_MISC_BASE + 0x200) + #define SPEAR1340_HCLK_SRC_SEL_SHIFT 27 + #define SPEAR1340_HCLK_SRC_SEL_MASK 1 + #define SPEAR1340_SCLK_SRC_SEL_SHIFT 23 + #define SPEAR1340_SCLK_SRC_SEL_MASK 3 + +/* PLL related registers and bit values */ +#define SPEAR1340_PLL_CFG (VA_MISC_BASE + 0x210) + /* PLL_CFG bit values */ + #define SPEAR1340_CLCD_SYNT_CLK_MASK 1 + #define SPEAR1340_CLCD_SYNT_CLK_SHIFT 31 + #define SPEAR1340_GEN_SYNT2_3_CLK_SHIFT 29 + #define SPEAR1340_GEN_SYNT_CLK_MASK 2 + #define SPEAR1340_GEN_SYNT0_1_CLK_SHIFT 27 + #define SPEAR1340_PLL_CLK_MASK 2 + #define SPEAR1340_PLL3_CLK_SHIFT 24 + #define SPEAR1340_PLL2_CLK_SHIFT 22 + #define SPEAR1340_PLL1_CLK_SHIFT 20 + +#define SPEAR1340_PLL1_CTR (VA_MISC_BASE + 0x214) +#define SPEAR1340_PLL1_FRQ (VA_MISC_BASE + 0x218) +#define SPEAR1340_PLL2_CTR (VA_MISC_BASE + 0x220) +#define SPEAR1340_PLL2_FRQ (VA_MISC_BASE + 0x224) +#define SPEAR1340_PLL3_CTR (VA_MISC_BASE + 0x22C) +#define SPEAR1340_PLL3_FRQ (VA_MISC_BASE + 0x230) +#define SPEAR1340_PLL4_CTR (VA_MISC_BASE + 0x238) +#define SPEAR1340_PLL4_FRQ (VA_MISC_BASE + 0x23C) +#define SPEAR1340_PERIP_CLK_CFG (VA_MISC_BASE + 0x244) + /* PERIP_CLK_CFG bit values */ + #define SPEAR1340_SPDIF_CLK_MASK 1 + #define SPEAR1340_SPDIF_OUT_CLK_SHIFT 15 + #define SPEAR1340_SPDIF_IN_CLK_SHIFT 14 + #define SPEAR1340_GPT3_CLK_SHIFT 13 + #define SPEAR1340_GPT2_CLK_SHIFT 12 + #define SPEAR1340_GPT_CLK_MASK 1 + #define SPEAR1340_GPT1_CLK_SHIFT 9 + #define SPEAR1340_GPT0_CLK_SHIFT 8 + #define SPEAR1340_UART_CLK_MASK 2 + #define SPEAR1340_UART1_CLK_SHIFT 6 + #define SPEAR1340_UART0_CLK_SHIFT 4 + #define SPEAR1340_CLCD_CLK_MASK 2 + #define SPEAR1340_CLCD_CLK_SHIFT 2 + #define SPEAR1340_C3_CLK_MASK 1 + #define SPEAR1340_C3_CLK_SHIFT 1 + +#define SPEAR1340_GMAC_CLK_CFG (VA_MISC_BASE + 0x248) + #define SPEAR1340_GMAC_PHY_CLK_MASK 1 + #define SPEAR1340_GMAC_PHY_CLK_SHIFT 2 + #define SPEAR1340_GMAC_PHY_INPUT_CLK_MASK 2 + #define SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT 0 + +#define SPEAR1340_I2S_CLK_CFG (VA_MISC_BASE + 0x24C) + /* I2S_CLK_CFG register mask */ + #define SPEAR1340_I2S_SCLK_X_MASK 0x1F + #define SPEAR1340_I2S_SCLK_X_SHIFT 27 + #define SPEAR1340_I2S_SCLK_Y_MASK 0x1F + #define SPEAR1340_I2S_SCLK_Y_SHIFT 22 + #define SPEAR1340_I2S_SCLK_EQ_SEL_SHIFT 21 + #define SPEAR1340_I2S_SCLK_SYNTH_ENB 20 + #define SPEAR1340_I2S_PRS1_CLK_X_MASK 0xFF + #define SPEAR1340_I2S_PRS1_CLK_X_SHIFT 12 + #define SPEAR1340_I2S_PRS1_CLK_Y_MASK 0xFF + #define SPEAR1340_I2S_PRS1_CLK_Y_SHIFT 4 + #define SPEAR1340_I2S_PRS1_EQ_SEL_SHIFT 3 + #define SPEAR1340_I2S_REF_SEL_MASK 1 + #define SPEAR1340_I2S_REF_SHIFT 2 + #define SPEAR1340_I2S_SRC_CLK_MASK 2 + #define SPEAR1340_I2S_SRC_CLK_SHIFT 0 + +#define SPEAR1340_C3_CLK_SYNT (VA_MISC_BASE + 0x250) +#define SPEAR1340_UART0_CLK_SYNT (VA_MISC_BASE + 0x254) +#define SPEAR1340_UART1_CLK_SYNT (VA_MISC_BASE + 0x258) +#define SPEAR1340_GMAC_CLK_SYNT (VA_MISC_BASE + 0x25C) +#define SPEAR1340_SDHCI_CLK_SYNT (VA_MISC_BASE + 0x260) +#define SPEAR1340_CFXD_CLK_SYNT (VA_MISC_BASE + 0x264) +#define SPEAR1340_ADC_CLK_SYNT (VA_MISC_BASE + 0x270) +#define SPEAR1340_AMBA_CLK_SYNT (VA_MISC_BASE + 0x274) +#define SPEAR1340_CLCD_CLK_SYNT (VA_MISC_BASE + 0x27C) +#define SPEAR1340_SYS_CLK_SYNT (VA_MISC_BASE + 0x284) +#define SPEAR1340_GEN_CLK_SYNT0 (VA_MISC_BASE + 0x28C) +#define SPEAR1340_GEN_CLK_SYNT1 (VA_MISC_BASE + 0x294) +#define SPEAR1340_GEN_CLK_SYNT2 (VA_MISC_BASE + 0x29C) +#define SPEAR1340_GEN_CLK_SYNT3 (VA_MISC_BASE + 0x304) +#define SPEAR1340_PERIP1_CLK_ENB (VA_MISC_BASE + 0x30C) + #define SPEAR1340_RTC_CLK_ENB 31 + #define SPEAR1340_ADC_CLK_ENB 30 + #define SPEAR1340_C3_CLK_ENB 29 + #define SPEAR1340_CLCD_CLK_ENB 27 + #define SPEAR1340_DMA_CLK_ENB 25 + #define SPEAR1340_GPIO1_CLK_ENB 24 + #define SPEAR1340_GPIO0_CLK_ENB 23 + #define SPEAR1340_GPT1_CLK_ENB 22 + #define SPEAR1340_GPT0_CLK_ENB 21 + #define SPEAR1340_I2S_PLAY_CLK_ENB 20 + #define SPEAR1340_I2S_REC_CLK_ENB 19 + #define SPEAR1340_I2C0_CLK_ENB 18 + #define SPEAR1340_SSP_CLK_ENB 17 + #define SPEAR1340_UART0_CLK_ENB 15 + #define SPEAR1340_PCIE_SATA_CLK_ENB 12 + #define SPEAR1340_UOC_CLK_ENB 11 + #define SPEAR1340_UHC1_CLK_ENB 10 + #define SPEAR1340_UHC0_CLK_ENB 9 + #define SPEAR1340_GMAC_CLK_ENB 8 + #define SPEAR1340_CFXD_CLK_ENB 7 + #define SPEAR1340_SDHCI_CLK_ENB 6 + #define SPEAR1340_SMI_CLK_ENB 5 + #define SPEAR1340_FSMC_CLK_ENB 4 + #define SPEAR1340_SYSRAM0_CLK_ENB 3 + #define SPEAR1340_SYSRAM1_CLK_ENB 2 + #define SPEAR1340_SYSROM_CLK_ENB 1 + #define SPEAR1340_BUS_CLK_ENB 0 + +#define SPEAR1340_PERIP2_CLK_ENB (VA_MISC_BASE + 0x310) + #define SPEAR1340_THSENS_CLK_ENB 8 + #define SPEAR1340_I2S_REF_PAD_CLK_ENB 7 + #define SPEAR1340_ACP_CLK_ENB 6 + #define SPEAR1340_GPT3_CLK_ENB 5 + #define SPEAR1340_GPT2_CLK_ENB 4 + #define SPEAR1340_KBD_CLK_ENB 3 + #define SPEAR1340_CPU_DBG_CLK_ENB 2 + #define SPEAR1340_DDR_CORE_CLK_ENB 1 + #define SPEAR1340_DDR_CTRL_CLK_ENB 0 + +#define SPEAR1340_PERIP3_CLK_ENB (VA_MISC_BASE + 0x314) + #define SPEAR1340_PLGPIO_CLK_ENB 18 + #define SPEAR1340_VIDEO_DEC_CLK_ENB 16 + #define SPEAR1340_VIDEO_ENC_CLK_ENB 15 + #define SPEAR1340_SPDIF_OUT_CLK_ENB 13 + #define SPEAR1340_SPDIF_IN_CLK_ENB 12 + #define SPEAR1340_VIDEO_IN_CLK_ENB 11 + #define SPEAR1340_CAM0_CLK_ENB 10 + #define SPEAR1340_CAM1_CLK_ENB 9 + #define SPEAR1340_CAM2_CLK_ENB 8 + #define SPEAR1340_CAM3_CLK_ENB 7 + #define SPEAR1340_MALI_CLK_ENB 6 + #define SPEAR1340_CEC0_CLK_ENB 5 + #define SPEAR1340_CEC1_CLK_ENB 4 + #define SPEAR1340_PWM_CLK_ENB 3 + #define SPEAR1340_I2C1_CLK_ENB 2 + #define SPEAR1340_UART1_CLK_ENB 1 + +static DEFINE_SPINLOCK(_lock); + +/* pll rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll_rtbl[] = { + /* PCLK 24MHz */ + {.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */ + {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */ + {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */ + {.mode = 0, .m = 0x96, .n = 0x06, .p = 0x0}, /* vco 1200, pll 1200 MHz */ +}; + +/* vco-pll4 rate configuration table, in ascending order of rates */ +static struct pll_rate_tbl pll4_rtbl[] = { + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */ + {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */ + {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */ + {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */ +}; + +/* + * All below entries generate 166 MHz for + * different values of vco1div2 + */ +static struct frac_rate_tbl amba_synth_rtbl[] = { + {.div = 0x06062}, /* for vco1div2 = 500 MHz */ + {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */ + {.div = 0x04000}, /* for vco1div2 = 332 MHz */ + {.div = 0x03031}, /* for vco1div2 = 250 MHz */ + {.div = 0x0268D}, /* for vco1div2 = 200 MHz */ +}; + +/* + * Synthesizer Clock derived from vcodiv2. This clock is one of the + * possible clocks to feed cpu directly. + * We can program this synthesizer to make cpu run on different clock + * frequencies. + * Following table provides configuration values to let cpu run on 200, + * 250, 332, 400 or 500 MHz considering different possibilites of input + * (vco1div2) clock. + * + * -------------------------------------------------------------------- + * vco1div2(Mhz) fout(Mhz) cpuclk = fout/2 div + * -------------------------------------------------------------------- + * 400 200 100 0x04000 + * 400 250 125 0x03333 + * 400 332 166 0x0268D + * 400 400 200 0x02000 + * -------------------------------------------------------------------- + * 500 200 100 0x05000 + * 500 250 125 0x04000 + * 500 332 166 0x03031 + * 500 400 200 0x02800 + * 500 500 250 0x02000 + * -------------------------------------------------------------------- + * 664 200 100 0x06a38 + * 664 250 125 0x054FD + * 664 332 166 0x04000 + * 664 400 200 0x0351E + * 664 500 250 0x02A7E + * -------------------------------------------------------------------- + * 800 200 100 0x08000 + * 800 250 125 0x06666 + * 800 332 166 0x04D18 + * 800 400 200 0x04000 + * 800 500 250 0x03333 + * -------------------------------------------------------------------- + * sys rate configuration table is in descending order of divisor. + */ +static struct frac_rate_tbl sys_synth_rtbl[] = { + {.div = 0x08000}, + {.div = 0x06a38}, + {.div = 0x06666}, + {.div = 0x054FD}, + {.div = 0x05000}, + {.div = 0x04D18}, + {.div = 0x04000}, + {.div = 0x0351E}, + {.div = 0x03333}, + {.div = 0x03031}, + {.div = 0x02A7E}, + {.div = 0x02800}, + {.div = 0x0268D}, + {.div = 0x02000}, +}; + +/* aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl aux_rtbl[] = { + /* For VCO1div2 = 500 MHz */ + {.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */ + {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */ + {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */ + {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */ +}; + +/* gmac rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl gmac_rtbl[] = { + /* For gmac phy input clk */ + {.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */ + {.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */ + {.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */ + {.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */ +}; + +/* clcd rate configuration table, in ascending order of rates */ +static struct frac_rate_tbl clcd_rtbl[] = { + {.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */ + {.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */ + {.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x07BA0}, /* 65 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */ + {.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x0360D}, /* 148 Mhz , for vc01div4 = 250 MHz*/ + {.div = 0x035E0}, /* 148.5 MHz, for vc01div4 = 250 MHz*/ +}; + +/* i2s prescaler1 masks */ +static struct aux_clk_masks i2s_prs1_masks = { + .eq_sel_mask = AUX_EQ_SEL_MASK, + .eq_sel_shift = SPEAR1340_I2S_PRS1_EQ_SEL_SHIFT, + .eq1_mask = AUX_EQ1_SEL, + .eq2_mask = AUX_EQ2_SEL, + .xscale_sel_mask = SPEAR1340_I2S_PRS1_CLK_X_MASK, + .xscale_sel_shift = SPEAR1340_I2S_PRS1_CLK_X_SHIFT, + .yscale_sel_mask = SPEAR1340_I2S_PRS1_CLK_Y_MASK, + .yscale_sel_shift = SPEAR1340_I2S_PRS1_CLK_Y_SHIFT, +}; + +/* i2s sclk (bit clock) syynthesizers masks */ +static struct aux_clk_masks i2s_sclk_masks = { + .eq_sel_mask = AUX_EQ_SEL_MASK, + .eq_sel_shift = SPEAR1340_I2S_SCLK_EQ_SEL_SHIFT, + .eq1_mask = AUX_EQ1_SEL, + .eq2_mask = AUX_EQ2_SEL, + .xscale_sel_mask = SPEAR1340_I2S_SCLK_X_MASK, + .xscale_sel_shift = SPEAR1340_I2S_SCLK_X_SHIFT, + .yscale_sel_mask = SPEAR1340_I2S_SCLK_Y_MASK, + .yscale_sel_shift = SPEAR1340_I2S_SCLK_Y_SHIFT, + .enable_bit = SPEAR1340_I2S_SCLK_SYNTH_ENB, +}; + +/* i2s prs1 aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl i2s_prs1_rtbl[] = { + /* For parent clk = 49.152 MHz */ + {.xscale = 1, .yscale = 12, .eq = 0}, /* 2.048 MHz, smp freq = 8Khz */ + {.xscale = 11, .yscale = 96, .eq = 0}, /* 2.816 MHz, smp freq = 11Khz */ + {.xscale = 1, .yscale = 6, .eq = 0}, /* 4.096 MHz, smp freq = 16Khz */ + {.xscale = 11, .yscale = 48, .eq = 0}, /* 5.632 MHz, smp freq = 22Khz */ + + /* + * with parent clk = 49.152, freq gen is 8.192 MHz, smp freq = 32Khz + * with parent clk = 12.288, freq gen is 2.048 MHz, smp freq = 8Khz + */ + {.xscale = 1, .yscale = 3, .eq = 0}, + + /* For parent clk = 49.152 MHz */ + {.xscale = 17, .yscale = 37, .eq = 0}, /* 11.289 MHz, smp freq = 44Khz*/ + {.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz, smp freq = 48Khz*/ +}; + +/* i2s sclk aux rate configuration table, in ascending order of rates */ +static struct aux_rate_tbl i2s_sclk_rtbl[] = { + /* For sclk = ref_clk * x/2/y */ + {.xscale = 1, .yscale = 4, .eq = 0}, + {.xscale = 1, .yscale = 2, .eq = 0}, +}; + +/* adc rate configuration table, in ascending order of rates */ +/* possible adc range is 2.5 MHz to 20 MHz. */ +static struct aux_rate_tbl adc_rtbl[] = { + /* For ahb = 166.67 MHz */ + {.xscale = 1, .yscale = 31, .eq = 0}, /* 2.68 MHz */ + {.xscale = 2, .yscale = 21, .eq = 0}, /* 7.94 MHz */ + {.xscale = 4, .yscale = 21, .eq = 0}, /* 15.87 MHz */ + {.xscale = 10, .yscale = 42, .eq = 0}, /* 19.84 MHz */ +}; + +/* General synth rate configuration table, in ascending order of rates */ +static struct frac_rate_tbl gen_rtbl[] = { + /* For vco1div4 = 250 MHz */ + {.div = 0x1624E}, /* 22.5792 MHz */ + {.div = 0x14585}, /* 24.576 MHz */ + {.div = 0x14000}, /* 25 MHz */ + {.div = 0x0B127}, /* 45.1584 MHz */ + {.div = 0x0A000}, /* 50 MHz */ + {.div = 0x061A8}, /* 81.92 MHz */ + {.div = 0x05000}, /* 100 MHz */ + {.div = 0x02800}, /* 200 MHz */ + {.div = 0x02620}, /* 210 MHz */ + {.div = 0x02460}, /* 220 MHz */ + {.div = 0x022C0}, /* 230 MHz */ + {.div = 0x02160}, /* 240 MHz */ + {.div = 0x02000}, /* 250 MHz */ +}; + +/* clock parents */ +static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", }; +static const char *sys_parents[] = { "none", "pll1_clk", "none", "none", + "sys_synth_clk", "none", "pll2_clk", "pll3_clk", }; +static const char *ahb_parents[] = { "cpu_div3_clk", "amba_synth_clk", }; +static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", }; +static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk", + "uart0_synth_gate_clk", }; +static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk", + "uart1_synth_gate_clk", }; +static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", }; +static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk", + "osc_25m_clk", }; +static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk", + "gmac_phy_synth_gate_clk", }; +static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; +static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", }; +static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk", + "i2s_src_pad_clk", }; +static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", }; +static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_synth2_clk", +}; +static const char *spdif_in_parents[] = { "pll2_clk", "gen_synth3_clk", }; + +static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", + "pll3_clk", }; +static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk", + "pll2_clk", }; + +void __init spear1340_clk_init(void) +{ + struct clk *clk, *clk1; + + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, + 32000); + clk_register_clkdev(clk, "osc_32k_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, + 24000000); + clk_register_clkdev(clk, "osc_24m_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, + 25000000); + clk_register_clkdev(clk, "osc_25m_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL, + CLK_IS_ROOT, 125000000); + clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, + CLK_IS_ROOT, 12288000); + clk_register_clkdev(clk, "i2s_src_pad_clk", NULL); + + /* clock derived from 32 KHz osc clk */ + clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_RTC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "fc900000.rtc"); + + /* clock derived from 24 or 25 MHz osc clk */ + /* vco-pll */ + clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, + SPEAR1340_PLL1_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco1_mux_clk", NULL); + clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk", + 0, SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco1_clk", NULL); + clk_register_clkdev(clk1, "pll1_clk", NULL); + + clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, + SPEAR1340_PLL2_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco2_mux_clk", NULL); + clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk", + 0, SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco2_clk", NULL); + clk_register_clkdev(clk1, "pll2_clk", NULL); + + clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents, + ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG, + SPEAR1340_PLL3_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "vco3_mux_clk", NULL); + clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk", + 0, SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl, + ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco3_clk", NULL); + clk_register_clkdev(clk1, "pll3_clk", NULL); + + clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk", + 0, SPEAR1340_PLL4_CTR, SPEAR1340_PLL4_FRQ, pll4_rtbl, + ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); + clk_register_clkdev(clk, "vco4_clk", NULL); + clk_register_clkdev(clk1, "pll4_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0, + 48000000); + clk_register_clkdev(clk, "pll5_clk", NULL); + + clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0, + 25000000); + clk_register_clkdev(clk, "pll6_clk", NULL); + + /* vco div n clocks */ + clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco1div2_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1, + 4); + clk_register_clkdev(clk, "vco1div4_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco2div2_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1, + 2); + clk_register_clkdev(clk, "vco3div2_clk", NULL); + + /* peripherals */ + clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1, + 128); + clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_thermal"); + + /* clock derived from pll4 clk */ + clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1, + 1); + clk_register_clkdev(clk, "ddr_clk", NULL); + + /* clock derived from pll1 clk */ + clk = clk_register_frac("sys_synth_clk", "vco1div2_clk", 0, + SPEAR1340_SYS_CLK_SYNT, sys_synth_rtbl, + ARRAY_SIZE(sys_synth_rtbl), &_lock); + clk_register_clkdev(clk, "sys_synth_clk", NULL); + + clk = clk_register_frac("amba_synth_clk", "vco1div2_clk", 0, + SPEAR1340_AMBA_CLK_SYNT, amba_synth_rtbl, + ARRAY_SIZE(amba_synth_rtbl), &_lock); + clk_register_clkdev(clk, "amba_synth_clk", NULL); + + clk = clk_register_mux(NULL, "sys_mux_clk", sys_parents, + ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL, + SPEAR1340_SCLK_SRC_SEL_SHIFT, + SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock); + clk_register_clkdev(clk, "sys_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mux_clk", 0, 1, + 2); + clk_register_clkdev(clk, "cpu_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "cpu_div3_clk", "cpu_clk", 0, 1, + 3); + clk_register_clkdev(clk, "cpu_div3_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1, + 2); + clk_register_clkdev(clk, NULL, "ec800620.wdt"); + + clk = clk_register_mux(NULL, "ahb_clk", ahb_parents, + ARRAY_SIZE(ahb_parents), 0, SPEAR1340_SYS_CLK_CTRL, + SPEAR1340_HCLK_SRC_SEL_SHIFT, + SPEAR1340_HCLK_SRC_SEL_MASK, 0, &_lock); + clk_register_clkdev(clk, "ahb_clk", NULL); + + clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, + 2); + clk_register_clkdev(clk, "apb_clk", NULL); + + /* gpt clocks */ + clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_GPT0_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt0_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt0"); + + clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_GPT1_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt1_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt1"); + + clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_GPT2_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt2_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt2"); + + clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents, + ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_GPT3_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "gpt3_mux_clk", NULL); + clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "gpt3"); + + /* others */ + clk = clk_register_aux("uart0_synth_clk", "uart0_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1340_UART0_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "uart0_synth_clk", NULL); + clk_register_clkdev(clk1, "uart0_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents, + ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "uart0_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0000000.serial"); + + clk = clk_register_aux("uart1_synth_clk", "uart1_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1340_UART1_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "uart1_synth_clk", NULL); + clk_register_clkdev(clk1, "uart1_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "uart1_mux_clk", uart1_parents, + ARRAY_SIZE(uart1_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_UART1_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "uart1_mux_clk", NULL); + + clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b4100000.serial"); + + clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1340_SDHCI_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "sdhci_synth_clk", NULL); + clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b3000000.sdhci"); + + clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1340_CFXD_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "cfxd_synth_clk", NULL); + clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b2800000.cf"); + clk_register_clkdev(clk, NULL, "arasan_xd"); + + clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk", + "vco1div2_clk", 0, SPEAR1340_C3_CLK_SYNT, NULL, + aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "c3_synth_clk", NULL); + clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents, + ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG, + SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0, + &_lock); + clk_register_clkdev(clk, "c3_mux_clk", NULL); + + clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "c3"); + + /* gmac */ + clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk", + gmac_phy_input_parents, + ARRAY_SIZE(gmac_phy_input_parents), 0, + SPEAR1340_GMAC_CLK_CFG, + SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT, + SPEAR1340_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL); + + clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk", + "gmac_phy_input_mux_clk", 0, SPEAR1340_GMAC_CLK_SYNT, + NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL); + clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL); + + clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents, + ARRAY_SIZE(gmac_phy_parents), 0, + SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT, + SPEAR1340_GMAC_PHY_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, NULL, "stmmacphy.0"); + + /* clcd */ + clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents, + ARRAY_SIZE(clcd_synth_parents), 0, + SPEAR1340_CLCD_CLK_SYNT, SPEAR1340_CLCD_SYNT_CLK_SHIFT, + SPEAR1340_CLCD_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL); + + clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0, + SPEAR1340_CLCD_CLK_SYNT, clcd_rtbl, + ARRAY_SIZE(clcd_rtbl), &_lock); + clk_register_clkdev(clk, "clcd_synth_clk", NULL); + + clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents, + ARRAY_SIZE(clcd_pixel_parents), 0, + SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT, + SPEAR1340_CLCD_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "clcd_pixel_clk", NULL); + + clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "clcd_clk", NULL); + + /* i2s */ + clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents, + ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG, + SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK, + 0, &_lock); + clk_register_clkdev(clk, "i2s_src_clk", NULL); + + clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0, + SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, + ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL); + clk_register_clkdev(clk, "i2s_prs1_clk", NULL); + + clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents, + ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG, + SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0, + &_lock); + clk_register_clkdev(clk, "i2s_ref_clk", NULL); + + clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); + + clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk", + "i2s_ref_mux_clk", 0, SPEAR1340_I2S_CLK_CFG, + &i2s_sclk_masks, i2s_sclk_rtbl, + ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "i2s_sclk_clk", NULL); + clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL); + + /* clock derived from ahb clk */ + clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0280000.i2c"); + + clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b4000000.i2c"); + + clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_DMA_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "ea800000.dma"); + clk_register_clkdev(clk, NULL, "eb000000.dma"); + + clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GMAC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e2000000.eth"); + + clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_FSMC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b0000000.flash"); + + clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SMI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "ea000000.flash"); + + clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "usbh.0_clk", NULL); + + clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "usbh.1_clk", NULL); + + clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UOC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "uoc"); + + clk = clk_register_gate(NULL, "pcie_sata_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_PCIE_SATA_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "dw_pcie"); + clk_register_clkdev(clk, NULL, "ahci"); + + clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SYSRAM0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "sysram0_clk", NULL); + + clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SYSRAM1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, "sysram1_clk", NULL); + + clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk", + 0, SPEAR1340_ADC_CLK_SYNT, NULL, adc_rtbl, + ARRAY_SIZE(adc_rtbl), &_lock, &clk1); + clk_register_clkdev(clk, "adc_synth_clk", NULL); + clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL); + + clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "adc_clk"); + + /* clock derived from apb clk */ + clk = clk_register_gate(NULL, "ssp_clk", "apb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SSP_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0100000.spi"); + + clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPIO0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0600000.gpio"); + + clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPIO1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0680000.gpio"); + + clk = clk_register_gate(NULL, "i2s_play_clk", "apb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_PLAY_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b2400000.i2s"); + + clk = clk_register_gate(NULL, "i2s_rec_clk", "apb_clk", 0, + SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_REC_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "b2000000.i2s"); + + clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_KBD_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "e0300000.kbd"); + + /* RAS clks */ + clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk", + gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents), + 0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT0_1_CLK_SHIFT, + SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gen_synth0_1_clk", NULL); + + clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk", + gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents), + 0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT2_3_CLK_SHIFT, + SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "gen_synth2_3_clk", NULL); + + clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0, + SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth0_clk", NULL); + + clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0, + SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth1_clk", NULL); + + clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0, + SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth2_clk", NULL); + + clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0, + SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl), + &_lock); + clk_register_clkdev(clk, "gen_synth3_clk", NULL); + + clk = clk_register_gate(NULL, "mali_clk", "gen_synth3_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "mali"); + + clk = clk_register_gate(NULL, "cec0_clk", "ahb_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CEC0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_cec.0"); + + clk = clk_register_gate(NULL, "cec1_clk", "ahb_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CEC1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_cec.1"); + + clk = clk_register_mux(NULL, "spdif_out_mux_clk", spdif_out_parents, + ARRAY_SIZE(spdif_out_parents), 0, + SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT, + SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "spdif_out_mux_clk", NULL); + + clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "spdif-out"); + + clk = clk_register_mux(NULL, "spdif_in_mux_clk", spdif_in_parents, + ARRAY_SIZE(spdif_in_parents), 0, + SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT, + SPEAR1340_SPDIF_CLK_MASK, 0, &_lock); + clk_register_clkdev(clk, "spdif_in_mux_clk", NULL); + + clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spdif-in"); + + clk = clk_register_gate(NULL, "acp_clk", "acp_mux_clk", 0, + SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "acp_clk"); + + clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "plgpio"); + + clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "video_dec"); + + clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_ENC_CLK_ENB, + 0, &_lock); + clk_register_clkdev(clk, NULL, "video_enc"); + + clk = clk_register_gate(NULL, "video_in_clk", "video_in_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_IN_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_vip"); + + clk = clk_register_gate(NULL, "cam0_clk", "cam0_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_camif.0"); + + clk = clk_register_gate(NULL, "cam1_clk", "cam1_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_camif.1"); + + clk = clk_register_gate(NULL, "cam2_clk", "cam2_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_camif.2"); + + clk = clk_register_gate(NULL, "cam3_clk", "cam3_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "spear_camif.3"); + + clk = clk_register_gate(NULL, "pwm_clk", "pwm_mux_clk", 0, + SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0, + &_lock); + clk_register_clkdev(clk, NULL, "pwm"); +} -- cgit v1.2.2 From d1e77afe9d647174428de7d29be85a13f94f645b Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Thu, 5 Apr 2012 18:59:23 +0530 Subject: pinctrl: SPEAr: Create macro for declaring GPIO PINS Same GPIO pins declarations would be required for other SoCs and that will be a lot of lines of code. Its better to create common macros for it. Signed-off-by: Viresh Kumar Acked-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-spear.h | 105 +++++++++++++++++++++++++++++++ drivers/pinctrl/spear/pinctrl-spear3xx.c | 103 +----------------------------- 2 files changed, 106 insertions(+), 102 deletions(-) (limited to 'drivers') diff --git a/drivers/pinctrl/spear/pinctrl-spear.h b/drivers/pinctrl/spear/pinctrl-spear.h index 47a6b5b72f90..1f51dc9fbb62 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.h +++ b/drivers/pinctrl/spear/pinctrl-spear.h @@ -139,4 +139,109 @@ void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg); int __devinit spear_pinctrl_probe(struct platform_device *pdev, struct spear_pinctrl_machdata *machdata); int __devexit spear_pinctrl_remove(struct platform_device *pdev); + +#define SPEAR_PIN_0_TO_101 \ + PINCTRL_PIN(0, "PLGPIO0"), \ + PINCTRL_PIN(1, "PLGPIO1"), \ + PINCTRL_PIN(2, "PLGPIO2"), \ + PINCTRL_PIN(3, "PLGPIO3"), \ + PINCTRL_PIN(4, "PLGPIO4"), \ + PINCTRL_PIN(5, "PLGPIO5"), \ + PINCTRL_PIN(6, "PLGPIO6"), \ + PINCTRL_PIN(7, "PLGPIO7"), \ + PINCTRL_PIN(8, "PLGPIO8"), \ + PINCTRL_PIN(9, "PLGPIO9"), \ + PINCTRL_PIN(10, "PLGPIO10"), \ + PINCTRL_PIN(11, "PLGPIO11"), \ + PINCTRL_PIN(12, "PLGPIO12"), \ + PINCTRL_PIN(13, "PLGPIO13"), \ + PINCTRL_PIN(14, "PLGPIO14"), \ + PINCTRL_PIN(15, "PLGPIO15"), \ + PINCTRL_PIN(16, "PLGPIO16"), \ + PINCTRL_PIN(17, "PLGPIO17"), \ + PINCTRL_PIN(18, "PLGPIO18"), \ + PINCTRL_PIN(19, "PLGPIO19"), \ + PINCTRL_PIN(20, "PLGPIO20"), \ + PINCTRL_PIN(21, "PLGPIO21"), \ + PINCTRL_PIN(22, "PLGPIO22"), \ + PINCTRL_PIN(23, "PLGPIO23"), \ + PINCTRL_PIN(24, "PLGPIO24"), \ + PINCTRL_PIN(25, "PLGPIO25"), \ + PINCTRL_PIN(26, "PLGPIO26"), \ + PINCTRL_PIN(27, "PLGPIO27"), \ + PINCTRL_PIN(28, "PLGPIO28"), \ + PINCTRL_PIN(29, "PLGPIO29"), \ + PINCTRL_PIN(30, "PLGPIO30"), \ + PINCTRL_PIN(31, "PLGPIO31"), \ + PINCTRL_PIN(32, "PLGPIO32"), \ + PINCTRL_PIN(33, "PLGPIO33"), \ + PINCTRL_PIN(34, "PLGPIO34"), \ + PINCTRL_PIN(35, "PLGPIO35"), \ + PINCTRL_PIN(36, "PLGPIO36"), \ + PINCTRL_PIN(37, "PLGPIO37"), \ + PINCTRL_PIN(38, "PLGPIO38"), \ + PINCTRL_PIN(39, "PLGPIO39"), \ + PINCTRL_PIN(40, "PLGPIO40"), \ + PINCTRL_PIN(41, "PLGPIO41"), \ + PINCTRL_PIN(42, "PLGPIO42"), \ + PINCTRL_PIN(43, "PLGPIO43"), \ + PINCTRL_PIN(44, "PLGPIO44"), \ + PINCTRL_PIN(45, "PLGPIO45"), \ + PINCTRL_PIN(46, "PLGPIO46"), \ + PINCTRL_PIN(47, "PLGPIO47"), \ + PINCTRL_PIN(48, "PLGPIO48"), \ + PINCTRL_PIN(49, "PLGPIO49"), \ + PINCTRL_PIN(50, "PLGPIO50"), \ + PINCTRL_PIN(51, "PLGPIO51"), \ + PINCTRL_PIN(52, "PLGPIO52"), \ + PINCTRL_PIN(53, "PLGPIO53"), \ + PINCTRL_PIN(54, "PLGPIO54"), \ + PINCTRL_PIN(55, "PLGPIO55"), \ + PINCTRL_PIN(56, "PLGPIO56"), \ + PINCTRL_PIN(57, "PLGPIO57"), \ + PINCTRL_PIN(58, "PLGPIO58"), \ + PINCTRL_PIN(59, "PLGPIO59"), \ + PINCTRL_PIN(60, "PLGPIO60"), \ + PINCTRL_PIN(61, "PLGPIO61"), \ + PINCTRL_PIN(62, "PLGPIO62"), \ + PINCTRL_PIN(63, "PLGPIO63"), \ + PINCTRL_PIN(64, "PLGPIO64"), \ + PINCTRL_PIN(65, "PLGPIO65"), \ + PINCTRL_PIN(66, "PLGPIO66"), \ + PINCTRL_PIN(67, "PLGPIO67"), \ + PINCTRL_PIN(68, "PLGPIO68"), \ + PINCTRL_PIN(69, "PLGPIO69"), \ + PINCTRL_PIN(70, "PLGPIO70"), \ + PINCTRL_PIN(71, "PLGPIO71"), \ + PINCTRL_PIN(72, "PLGPIO72"), \ + PINCTRL_PIN(73, "PLGPIO73"), \ + PINCTRL_PIN(74, "PLGPIO74"), \ + PINCTRL_PIN(75, "PLGPIO75"), \ + PINCTRL_PIN(76, "PLGPIO76"), \ + PINCTRL_PIN(77, "PLGPIO77"), \ + PINCTRL_PIN(78, "PLGPIO78"), \ + PINCTRL_PIN(79, "PLGPIO79"), \ + PINCTRL_PIN(80, "PLGPIO80"), \ + PINCTRL_PIN(81, "PLGPIO81"), \ + PINCTRL_PIN(82, "PLGPIO82"), \ + PINCTRL_PIN(83, "PLGPIO83"), \ + PINCTRL_PIN(84, "PLGPIO84"), \ + PINCTRL_PIN(85, "PLGPIO85"), \ + PINCTRL_PIN(86, "PLGPIO86"), \ + PINCTRL_PIN(87, "PLGPIO87"), \ + PINCTRL_PIN(88, "PLGPIO88"), \ + PINCTRL_PIN(89, "PLGPIO89"), \ + PINCTRL_PIN(90, "PLGPIO90"), \ + PINCTRL_PIN(91, "PLGPIO91"), \ + PINCTRL_PIN(92, "PLGPIO92"), \ + PINCTRL_PIN(93, "PLGPIO93"), \ + PINCTRL_PIN(94, "PLGPIO94"), \ + PINCTRL_PIN(95, "PLGPIO95"), \ + PINCTRL_PIN(96, "PLGPIO96"), \ + PINCTRL_PIN(97, "PLGPIO97"), \ + PINCTRL_PIN(98, "PLGPIO98"), \ + PINCTRL_PIN(99, "PLGPIO99"), \ + PINCTRL_PIN(100, "PLGPIO100"), \ + PINCTRL_PIN(101, "PLGPIO101") + #endif /* __PINMUX_SPEAR_H__ */ diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.c b/drivers/pinctrl/spear/pinctrl-spear3xx.c index 832049a8b1c9..91c883bc46a6 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.c +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.c @@ -15,108 +15,7 @@ /* pins */ static const struct pinctrl_pin_desc spear3xx_pins[] = { - PINCTRL_PIN(0, "PLGPIO0"), - PINCTRL_PIN(1, "PLGPIO1"), - PINCTRL_PIN(2, "PLGPIO2"), - PINCTRL_PIN(3, "PLGPIO3"), - PINCTRL_PIN(4, "PLGPIO4"), - PINCTRL_PIN(5, "PLGPIO5"), - PINCTRL_PIN(6, "PLGPIO6"), - PINCTRL_PIN(7, "PLGPIO7"), - PINCTRL_PIN(8, "PLGPIO8"), - PINCTRL_PIN(9, "PLGPIO9"), - PINCTRL_PIN(10, "PLGPIO10"), - PINCTRL_PIN(11, "PLGPIO11"), - PINCTRL_PIN(12, "PLGPIO12"), - PINCTRL_PIN(13, "PLGPIO13"), - PINCTRL_PIN(14, "PLGPIO14"), - PINCTRL_PIN(15, "PLGPIO15"), - PINCTRL_PIN(16, "PLGPIO16"), - PINCTRL_PIN(17, "PLGPIO17"), - PINCTRL_PIN(18, "PLGPIO18"), - PINCTRL_PIN(19, "PLGPIO19"), - PINCTRL_PIN(20, "PLGPIO20"), - PINCTRL_PIN(21, "PLGPIO21"), - PINCTRL_PIN(22, "PLGPIO22"), - PINCTRL_PIN(23, "PLGPIO23"), - PINCTRL_PIN(24, "PLGPIO24"), - PINCTRL_PIN(25, "PLGPIO25"), - PINCTRL_PIN(26, "PLGPIO26"), - PINCTRL_PIN(27, "PLGPIO27"), - PINCTRL_PIN(28, "PLGPIO28"), - PINCTRL_PIN(29, "PLGPIO29"), - PINCTRL_PIN(30, "PLGPIO30"), - PINCTRL_PIN(31, "PLGPIO31"), - PINCTRL_PIN(32, "PLGPIO32"), - PINCTRL_PIN(33, "PLGPIO33"), - PINCTRL_PIN(34, "PLGPIO34"), - PINCTRL_PIN(35, "PLGPIO35"), - PINCTRL_PIN(36, "PLGPIO36"), - PINCTRL_PIN(37, "PLGPIO37"), - PINCTRL_PIN(38, "PLGPIO38"), - PINCTRL_PIN(39, "PLGPIO39"), - PINCTRL_PIN(40, "PLGPIO40"), - PINCTRL_PIN(41, "PLGPIO41"), - PINCTRL_PIN(42, "PLGPIO42"), - PINCTRL_PIN(43, "PLGPIO43"), - PINCTRL_PIN(44, "PLGPIO44"), - PINCTRL_PIN(45, "PLGPIO45"), - PINCTRL_PIN(46, "PLGPIO46"), - PINCTRL_PIN(47, "PLGPIO47"), - PINCTRL_PIN(48, "PLGPIO48"), - PINCTRL_PIN(49, "PLGPIO49"), - PINCTRL_PIN(50, "PLGPIO50"), - PINCTRL_PIN(51, "PLGPIO51"), - PINCTRL_PIN(52, "PLGPIO52"), - PINCTRL_PIN(53, "PLGPIO53"), - PINCTRL_PIN(54, "PLGPIO54"), - PINCTRL_PIN(55, "PLGPIO55"), - PINCTRL_PIN(56, "PLGPIO56"), - PINCTRL_PIN(57, "PLGPIO57"), - PINCTRL_PIN(58, "PLGPIO58"), - PINCTRL_PIN(59, "PLGPIO59"), - PINCTRL_PIN(60, "PLGPIO60"), - PINCTRL_PIN(61, "PLGPIO61"), - PINCTRL_PIN(62, "PLGPIO62"), - PINCTRL_PIN(63, "PLGPIO63"), - PINCTRL_PIN(64, "PLGPIO64"), - PINCTRL_PIN(65, "PLGPIO65"), - PINCTRL_PIN(66, "PLGPIO66"), - PINCTRL_PIN(67, "PLGPIO67"), - PINCTRL_PIN(68, "PLGPIO68"), - PINCTRL_PIN(69, "PLGPIO69"), - PINCTRL_PIN(70, "PLGPIO70"), - PINCTRL_PIN(71, "PLGPIO71"), - PINCTRL_PIN(72, "PLGPIO72"), - PINCTRL_PIN(73, "PLGPIO73"), - PINCTRL_PIN(74, "PLGPIO74"), - PINCTRL_PIN(75, "PLGPIO75"), - PINCTRL_PIN(76, "PLGPIO76"), - PINCTRL_PIN(77, "PLGPIO77"), - PINCTRL_PIN(78, "PLGPIO78"), - PINCTRL_PIN(79, "PLGPIO79"), - PINCTRL_PIN(80, "PLGPIO80"), - PINCTRL_PIN(81, "PLGPIO81"), - PINCTRL_PIN(82, "PLGPIO82"), - PINCTRL_PIN(83, "PLGPIO83"), - PINCTRL_PIN(84, "PLGPIO84"), - PINCTRL_PIN(85, "PLGPIO85"), - PINCTRL_PIN(86, "PLGPIO86"), - PINCTRL_PIN(87, "PLGPIO87"), - PINCTRL_PIN(88, "PLGPIO88"), - PINCTRL_PIN(89, "PLGPIO89"), - PINCTRL_PIN(90, "PLGPIO90"), - PINCTRL_PIN(91, "PLGPIO91"), - PINCTRL_PIN(92, "PLGPIO92"), - PINCTRL_PIN(93, "PLGPIO93"), - PINCTRL_PIN(94, "PLGPIO94"), - PINCTRL_PIN(95, "PLGPIO95"), - PINCTRL_PIN(96, "PLGPIO96"), - PINCTRL_PIN(97, "PLGPIO97"), - PINCTRL_PIN(98, "PLGPIO98"), - PINCTRL_PIN(99, "PLGPIO99"), - PINCTRL_PIN(100, "PLGPIO100"), - PINCTRL_PIN(101, "PLGPIO101"), + SPEAR_PIN_0_TO_101, }; /* firda_pins */ -- cgit v1.2.2 From 85ed41a76f7a3939b55872f39df841039321f033 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 28 Mar 2012 22:27:07 +0530 Subject: pinctrl: Add SPEAr13xx pinctrl drivers This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two machines: SPEAr1310 and SPEAr1340. Signed-off-by: Viresh Kumar Acked-by: Linus Walleij --- drivers/pinctrl/spear/Kconfig | 10 + drivers/pinctrl/spear/Makefile | 2 + drivers/pinctrl/spear/pinctrl-spear.h | 146 ++ drivers/pinctrl/spear/pinctrl-spear1310.c | 2198 +++++++++++++++++++++++++++++ drivers/pinctrl/spear/pinctrl-spear1340.c | 1989 ++++++++++++++++++++++++++ 5 files changed, 4345 insertions(+) create mode 100644 drivers/pinctrl/spear/pinctrl-spear1310.c create mode 100644 drivers/pinctrl/spear/pinctrl-spear1340.c (limited to 'drivers') diff --git a/drivers/pinctrl/spear/Kconfig b/drivers/pinctrl/spear/Kconfig index 6a2596b4f359..91558791e766 100644 --- a/drivers/pinctrl/spear/Kconfig +++ b/drivers/pinctrl/spear/Kconfig @@ -31,4 +31,14 @@ config PINCTRL_SPEAR320 depends on MACH_SPEAR320 select PINCTRL_SPEAR3XX +config PINCTRL_SPEAR1310 + bool "ST Microelectronics SPEAr1310 SoC pin controller driver" + depends on MACH_SPEAR1310 + select PINCTRL_SPEAR + +config PINCTRL_SPEAR1340 + bool "ST Microelectronics SPEAr1340 SoC pin controller driver" + depends on MACH_SPEAR1340 + select PINCTRL_SPEAR + endif diff --git a/drivers/pinctrl/spear/Makefile b/drivers/pinctrl/spear/Makefile index 15dcb85da22d..b28a7ba22443 100644 --- a/drivers/pinctrl/spear/Makefile +++ b/drivers/pinctrl/spear/Makefile @@ -5,3 +5,5 @@ obj-$(CONFIG_PINCTRL_SPEAR3XX) += pinctrl-spear3xx.o obj-$(CONFIG_PINCTRL_SPEAR300) += pinctrl-spear300.o obj-$(CONFIG_PINCTRL_SPEAR310) += pinctrl-spear310.o obj-$(CONFIG_PINCTRL_SPEAR320) += pinctrl-spear320.o +obj-$(CONFIG_PINCTRL_SPEAR1310) += pinctrl-spear1310.o +obj-$(CONFIG_PINCTRL_SPEAR1340) += pinctrl-spear1340.o diff --git a/drivers/pinctrl/spear/pinctrl-spear.h b/drivers/pinctrl/spear/pinctrl-spear.h index 1f51dc9fbb62..9155783bb47f 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.h +++ b/drivers/pinctrl/spear/pinctrl-spear.h @@ -244,4 +244,150 @@ int __devexit spear_pinctrl_remove(struct platform_device *pdev); PINCTRL_PIN(100, "PLGPIO100"), \ PINCTRL_PIN(101, "PLGPIO101") +#define SPEAR_PIN_102_TO_245 \ + PINCTRL_PIN(102, "PLGPIO102"), \ + PINCTRL_PIN(103, "PLGPIO103"), \ + PINCTRL_PIN(104, "PLGPIO104"), \ + PINCTRL_PIN(105, "PLGPIO105"), \ + PINCTRL_PIN(106, "PLGPIO106"), \ + PINCTRL_PIN(107, "PLGPIO107"), \ + PINCTRL_PIN(108, "PLGPIO108"), \ + PINCTRL_PIN(109, "PLGPIO109"), \ + PINCTRL_PIN(110, "PLGPIO110"), \ + PINCTRL_PIN(111, "PLGPIO111"), \ + PINCTRL_PIN(112, "PLGPIO112"), \ + PINCTRL_PIN(113, "PLGPIO113"), \ + PINCTRL_PIN(114, "PLGPIO114"), \ + PINCTRL_PIN(115, "PLGPIO115"), \ + PINCTRL_PIN(116, "PLGPIO116"), \ + PINCTRL_PIN(117, "PLGPIO117"), \ + PINCTRL_PIN(118, "PLGPIO118"), \ + PINCTRL_PIN(119, "PLGPIO119"), \ + PINCTRL_PIN(120, "PLGPIO120"), \ + PINCTRL_PIN(121, "PLGPIO121"), \ + PINCTRL_PIN(122, "PLGPIO122"), \ + PINCTRL_PIN(123, "PLGPIO123"), \ + PINCTRL_PIN(124, "PLGPIO124"), \ + PINCTRL_PIN(125, "PLGPIO125"), \ + PINCTRL_PIN(126, "PLGPIO126"), \ + PINCTRL_PIN(127, "PLGPIO127"), \ + PINCTRL_PIN(128, "PLGPIO128"), \ + PINCTRL_PIN(129, "PLGPIO129"), \ + PINCTRL_PIN(130, "PLGPIO130"), \ + PINCTRL_PIN(131, "PLGPIO131"), \ + PINCTRL_PIN(132, "PLGPIO132"), \ + PINCTRL_PIN(133, "PLGPIO133"), \ + PINCTRL_PIN(134, "PLGPIO134"), \ + PINCTRL_PIN(135, "PLGPIO135"), \ + PINCTRL_PIN(136, "PLGPIO136"), \ + PINCTRL_PIN(137, "PLGPIO137"), \ + PINCTRL_PIN(138, "PLGPIO138"), \ + PINCTRL_PIN(139, "PLGPIO139"), \ + PINCTRL_PIN(140, "PLGPIO140"), \ + PINCTRL_PIN(141, "PLGPIO141"), \ + PINCTRL_PIN(142, "PLGPIO142"), \ + PINCTRL_PIN(143, "PLGPIO143"), \ + PINCTRL_PIN(144, "PLGPIO144"), \ + PINCTRL_PIN(145, "PLGPIO145"), \ + PINCTRL_PIN(146, "PLGPIO146"), \ + PINCTRL_PIN(147, "PLGPIO147"), \ + PINCTRL_PIN(148, "PLGPIO148"), \ + PINCTRL_PIN(149, "PLGPIO149"), \ + PINCTRL_PIN(150, "PLGPIO150"), \ + PINCTRL_PIN(151, "PLGPIO151"), \ + PINCTRL_PIN(152, "PLGPIO152"), \ + PINCTRL_PIN(153, "PLGPIO153"), \ + PINCTRL_PIN(154, "PLGPIO154"), \ + PINCTRL_PIN(155, "PLGPIO155"), \ + PINCTRL_PIN(156, "PLGPIO156"), \ + PINCTRL_PIN(157, "PLGPIO157"), \ + PINCTRL_PIN(158, "PLGPIO158"), \ + PINCTRL_PIN(159, "PLGPIO159"), \ + PINCTRL_PIN(160, "PLGPIO160"), \ + PINCTRL_PIN(161, "PLGPIO161"), \ + PINCTRL_PIN(162, "PLGPIO162"), \ + PINCTRL_PIN(163, "PLGPIO163"), \ + PINCTRL_PIN(164, "PLGPIO164"), \ + PINCTRL_PIN(165, "PLGPIO165"), \ + PINCTRL_PIN(166, "PLGPIO166"), \ + PINCTRL_PIN(167, "PLGPIO167"), \ + PINCTRL_PIN(168, "PLGPIO168"), \ + PINCTRL_PIN(169, "PLGPIO169"), \ + PINCTRL_PIN(170, "PLGPIO170"), \ + PINCTRL_PIN(171, "PLGPIO171"), \ + PINCTRL_PIN(172, "PLGPIO172"), \ + PINCTRL_PIN(173, "PLGPIO173"), \ + PINCTRL_PIN(174, "PLGPIO174"), \ + PINCTRL_PIN(175, "PLGPIO175"), \ + PINCTRL_PIN(176, "PLGPIO176"), \ + PINCTRL_PIN(177, "PLGPIO177"), \ + PINCTRL_PIN(178, "PLGPIO178"), \ + PINCTRL_PIN(179, "PLGPIO179"), \ + PINCTRL_PIN(180, "PLGPIO180"), \ + PINCTRL_PIN(181, "PLGPIO181"), \ + PINCTRL_PIN(182, "PLGPIO182"), \ + PINCTRL_PIN(183, "PLGPIO183"), \ + PINCTRL_PIN(184, "PLGPIO184"), \ + PINCTRL_PIN(185, "PLGPIO185"), \ + PINCTRL_PIN(186, "PLGPIO186"), \ + PINCTRL_PIN(187, "PLGPIO187"), \ + PINCTRL_PIN(188, "PLGPIO188"), \ + PINCTRL_PIN(189, "PLGPIO189"), \ + PINCTRL_PIN(190, "PLGPIO190"), \ + PINCTRL_PIN(191, "PLGPIO191"), \ + PINCTRL_PIN(192, "PLGPIO192"), \ + PINCTRL_PIN(193, "PLGPIO193"), \ + PINCTRL_PIN(194, "PLGPIO194"), \ + PINCTRL_PIN(195, "PLGPIO195"), \ + PINCTRL_PIN(196, "PLGPIO196"), \ + PINCTRL_PIN(197, "PLGPIO197"), \ + PINCTRL_PIN(198, "PLGPIO198"), \ + PINCTRL_PIN(199, "PLGPIO199"), \ + PINCTRL_PIN(200, "PLGPIO200"), \ + PINCTRL_PIN(201, "PLGPIO201"), \ + PINCTRL_PIN(202, "PLGPIO202"), \ + PINCTRL_PIN(203, "PLGPIO203"), \ + PINCTRL_PIN(204, "PLGPIO204"), \ + PINCTRL_PIN(205, "PLGPIO205"), \ + PINCTRL_PIN(206, "PLGPIO206"), \ + PINCTRL_PIN(207, "PLGPIO207"), \ + PINCTRL_PIN(208, "PLGPIO208"), \ + PINCTRL_PIN(209, "PLGPIO209"), \ + PINCTRL_PIN(210, "PLGPIO210"), \ + PINCTRL_PIN(211, "PLGPIO211"), \ + PINCTRL_PIN(212, "PLGPIO212"), \ + PINCTRL_PIN(213, "PLGPIO213"), \ + PINCTRL_PIN(214, "PLGPIO214"), \ + PINCTRL_PIN(215, "PLGPIO215"), \ + PINCTRL_PIN(216, "PLGPIO216"), \ + PINCTRL_PIN(217, "PLGPIO217"), \ + PINCTRL_PIN(218, "PLGPIO218"), \ + PINCTRL_PIN(219, "PLGPIO219"), \ + PINCTRL_PIN(220, "PLGPIO220"), \ + PINCTRL_PIN(221, "PLGPIO221"), \ + PINCTRL_PIN(222, "PLGPIO222"), \ + PINCTRL_PIN(223, "PLGPIO223"), \ + PINCTRL_PIN(224, "PLGPIO224"), \ + PINCTRL_PIN(225, "PLGPIO225"), \ + PINCTRL_PIN(226, "PLGPIO226"), \ + PINCTRL_PIN(227, "PLGPIO227"), \ + PINCTRL_PIN(228, "PLGPIO228"), \ + PINCTRL_PIN(229, "PLGPIO229"), \ + PINCTRL_PIN(230, "PLGPIO230"), \ + PINCTRL_PIN(231, "PLGPIO231"), \ + PINCTRL_PIN(232, "PLGPIO232"), \ + PINCTRL_PIN(233, "PLGPIO233"), \ + PINCTRL_PIN(234, "PLGPIO234"), \ + PINCTRL_PIN(235, "PLGPIO235"), \ + PINCTRL_PIN(236, "PLGPIO236"), \ + PINCTRL_PIN(237, "PLGPIO237"), \ + PINCTRL_PIN(238, "PLGPIO238"), \ + PINCTRL_PIN(239, "PLGPIO239"), \ + PINCTRL_PIN(240, "PLGPIO240"), \ + PINCTRL_PIN(241, "PLGPIO241"), \ + PINCTRL_PIN(242, "PLGPIO242"), \ + PINCTRL_PIN(243, "PLGPIO243"), \ + PINCTRL_PIN(244, "PLGPIO244"), \ + PINCTRL_PIN(245, "PLGPIO245") + #endif /* __PINMUX_SPEAR_H__ */ diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c new file mode 100644 index 000000000000..12b094dc806f --- /dev/null +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c @@ -0,0 +1,2198 @@ +/* + * Driver for the ST Microelectronics SPEAr1310 pinmux + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include "pinctrl-spear.h" + +#define DRIVER_NAME "spear1310-pinmux" + +/* pins */ +static const struct pinctrl_pin_desc spear1310_pins[] = { + SPEAR_PIN_0_TO_101, + SPEAR_PIN_102_TO_245, +}; + +/* registers */ +#define PERIP_CFG 0x32C + #define MCIF_SEL_SHIFT 3 + #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) + #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) + #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) + #define MCIF_SEL_MASK (0x3 << MCIF_SEL_SHIFT) + +#define PCIE_SATA_CFG 0x3A4 + #define PCIE_SATA2_SEL_PCIE (0 << 31) + #define PCIE_SATA1_SEL_PCIE (0 << 30) + #define PCIE_SATA0_SEL_PCIE (0 << 29) + #define PCIE_SATA2_SEL_SATA (1 << 31) + #define PCIE_SATA1_SEL_SATA (1 << 30) + #define PCIE_SATA0_SEL_SATA (1 << 29) + #define SATA2_CFG_TX_CLK_EN (1 << 27) + #define SATA2_CFG_RX_CLK_EN (1 << 26) + #define SATA2_CFG_POWERUP_RESET (1 << 25) + #define SATA2_CFG_PM_CLK_EN (1 << 24) + #define SATA1_CFG_TX_CLK_EN (1 << 23) + #define SATA1_CFG_RX_CLK_EN (1 << 22) + #define SATA1_CFG_POWERUP_RESET (1 << 21) + #define SATA1_CFG_PM_CLK_EN (1 << 20) + #define SATA0_CFG_TX_CLK_EN (1 << 19) + #define SATA0_CFG_RX_CLK_EN (1 << 18) + #define SATA0_CFG_POWERUP_RESET (1 << 17) + #define SATA0_CFG_PM_CLK_EN (1 << 16) + #define PCIE2_CFG_DEVICE_PRESENT (1 << 11) + #define PCIE2_CFG_POWERUP_RESET (1 << 10) + #define PCIE2_CFG_CORE_CLK_EN (1 << 9) + #define PCIE2_CFG_AUX_CLK_EN (1 << 8) + #define PCIE1_CFG_DEVICE_PRESENT (1 << 7) + #define PCIE1_CFG_POWERUP_RESET (1 << 6) + #define PCIE1_CFG_CORE_CLK_EN (1 << 5) + #define PCIE1_CFG_AUX_CLK_EN (1 << 4) + #define PCIE0_CFG_DEVICE_PRESENT (1 << 3) + #define PCIE0_CFG_POWERUP_RESET (1 << 2) + #define PCIE0_CFG_CORE_CLK_EN (1 << 1) + #define PCIE0_CFG_AUX_CLK_EN (1 << 0) + +#define PAD_FUNCTION_EN_0 0x650 + #define PMX_UART0_MASK (1 << 1) + #define PMX_I2C0_MASK (1 << 2) + #define PMX_I2S0_MASK (1 << 3) + #define PMX_SSP0_MASK (1 << 4) + #define PMX_CLCD1_MASK (1 << 5) + #define PMX_EGPIO00_MASK (1 << 6) + #define PMX_EGPIO01_MASK (1 << 7) + #define PMX_EGPIO02_MASK (1 << 8) + #define PMX_EGPIO03_MASK (1 << 9) + #define PMX_EGPIO04_MASK (1 << 10) + #define PMX_EGPIO05_MASK (1 << 11) + #define PMX_EGPIO06_MASK (1 << 12) + #define PMX_EGPIO07_MASK (1 << 13) + #define PMX_EGPIO08_MASK (1 << 14) + #define PMX_EGPIO09_MASK (1 << 15) + #define PMX_SMI_MASK (1 << 16) + #define PMX_NAND8_MASK (1 << 17) + #define PMX_GMIICLK_MASK (1 << 18) + #define PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK (1 << 19) + #define PMX_RXCLK_RDV_TXEN_D03_MASK (1 << 20) + #define PMX_GMIID47_MASK (1 << 21) + #define PMX_MDC_MDIO_MASK (1 << 22) + #define PMX_MCI_DATA8_15_MASK (1 << 23) + #define PMX_NFAD23_MASK (1 << 24) + #define PMX_NFAD24_MASK (1 << 25) + #define PMX_NFAD25_MASK (1 << 26) + #define PMX_NFCE3_MASK (1 << 27) + #define PMX_NFWPRT3_MASK (1 << 28) + #define PMX_NFRSTPWDWN0_MASK (1 << 29) + #define PMX_NFRSTPWDWN1_MASK (1 << 30) + #define PMX_NFRSTPWDWN2_MASK (1 << 31) + +#define PAD_FUNCTION_EN_1 0x654 + #define PMX_NFRSTPWDWN3_MASK (1 << 0) + #define PMX_SMINCS2_MASK (1 << 1) + #define PMX_SMINCS3_MASK (1 << 2) + #define PMX_CLCD2_MASK (1 << 3) + #define PMX_KBD_ROWCOL68_MASK (1 << 4) + #define PMX_EGPIO10_MASK (1 << 5) + #define PMX_EGPIO11_MASK (1 << 6) + #define PMX_EGPIO12_MASK (1 << 7) + #define PMX_EGPIO13_MASK (1 << 8) + #define PMX_EGPIO14_MASK (1 << 9) + #define PMX_EGPIO15_MASK (1 << 10) + #define PMX_UART0_MODEM_MASK (1 << 11) + #define PMX_GPT0_TMR0_MASK (1 << 12) + #define PMX_GPT0_TMR1_MASK (1 << 13) + #define PMX_GPT1_TMR0_MASK (1 << 14) + #define PMX_GPT1_TMR1_MASK (1 << 15) + #define PMX_I2S1_MASK (1 << 16) + #define PMX_KBD_ROWCOL25_MASK (1 << 17) + #define PMX_NFIO8_15_MASK (1 << 18) + #define PMX_KBD_COL1_MASK (1 << 19) + #define PMX_NFCE1_MASK (1 << 20) + #define PMX_KBD_COL0_MASK (1 << 21) + #define PMX_NFCE2_MASK (1 << 22) + #define PMX_KBD_ROW1_MASK (1 << 23) + #define PMX_NFWPRT1_MASK (1 << 24) + #define PMX_KBD_ROW0_MASK (1 << 25) + #define PMX_NFWPRT2_MASK (1 << 26) + #define PMX_MCIDATA0_MASK (1 << 27) + #define PMX_MCIDATA1_MASK (1 << 28) + #define PMX_MCIDATA2_MASK (1 << 29) + #define PMX_MCIDATA3_MASK (1 << 30) + #define PMX_MCIDATA4_MASK (1 << 31) + +#define PAD_FUNCTION_EN_2 0x658 + #define PMX_MCIDATA5_MASK (1 << 0) + #define PMX_MCIDATA6_MASK (1 << 1) + #define PMX_MCIDATA7_MASK (1 << 2) + #define PMX_MCIDATA1SD_MASK (1 << 3) + #define PMX_MCIDATA2SD_MASK (1 << 4) + #define PMX_MCIDATA3SD_MASK (1 << 5) + #define PMX_MCIADDR0ALE_MASK (1 << 6) + #define PMX_MCIADDR1CLECLK_MASK (1 << 7) + #define PMX_MCIADDR2_MASK (1 << 8) + #define PMX_MCICECF_MASK (1 << 9) + #define PMX_MCICEXD_MASK (1 << 10) + #define PMX_MCICESDMMC_MASK (1 << 11) + #define PMX_MCICDCF1_MASK (1 << 12) + #define PMX_MCICDCF2_MASK (1 << 13) + #define PMX_MCICDXD_MASK (1 << 14) + #define PMX_MCICDSDMMC_MASK (1 << 15) + #define PMX_MCIDATADIR_MASK (1 << 16) + #define PMX_MCIDMARQWP_MASK (1 << 17) + #define PMX_MCIIORDRE_MASK (1 << 18) + #define PMX_MCIIOWRWE_MASK (1 << 19) + #define PMX_MCIRESETCF_MASK (1 << 20) + #define PMX_MCICS0CE_MASK (1 << 21) + #define PMX_MCICFINTR_MASK (1 << 22) + #define PMX_MCIIORDY_MASK (1 << 23) + #define PMX_MCICS1_MASK (1 << 24) + #define PMX_MCIDMAACK_MASK (1 << 25) + #define PMX_MCISDCMD_MASK (1 << 26) + #define PMX_MCILEDS_MASK (1 << 27) + #define PMX_TOUCH_XY_MASK (1 << 28) + #define PMX_SSP0_CS0_MASK (1 << 29) + #define PMX_SSP0_CS1_2_MASK (1 << 30) + +/* combined macros */ +#define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ + PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ + PMX_RXCLK_RDV_TXEN_D03_MASK | \ + PMX_GMIID47_MASK | PMX_MDC_MDIO_MASK) + +#define PMX_EGPIO_0_GRP_MASK (PMX_EGPIO00_MASK | PMX_EGPIO01_MASK | \ + PMX_EGPIO02_MASK | \ + PMX_EGPIO03_MASK | PMX_EGPIO04_MASK | \ + PMX_EGPIO05_MASK | PMX_EGPIO06_MASK | \ + PMX_EGPIO07_MASK | PMX_EGPIO08_MASK | \ + PMX_EGPIO09_MASK) +#define PMX_EGPIO_1_GRP_MASK (PMX_EGPIO10_MASK | PMX_EGPIO11_MASK | \ + PMX_EGPIO12_MASK | PMX_EGPIO13_MASK | \ + PMX_EGPIO14_MASK | PMX_EGPIO15_MASK) + +#define PMX_KEYBOARD_6X6_MASK (PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \ + PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL0_MASK | \ + PMX_KBD_COL1_MASK) + +#define PMX_NAND8BIT_0_MASK (PMX_NAND8_MASK | PMX_NFAD23_MASK | \ + PMX_NFAD24_MASK | PMX_NFAD25_MASK | \ + PMX_NFWPRT3_MASK | PMX_NFRSTPWDWN0_MASK | \ + PMX_NFRSTPWDWN1_MASK | PMX_NFRSTPWDWN2_MASK | \ + PMX_NFCE3_MASK) +#define PMX_NAND8BIT_1_MASK PMX_NFRSTPWDWN3_MASK + +#define PMX_NAND16BIT_1_MASK (PMX_KBD_ROWCOL25_MASK | PMX_NFIO8_15_MASK) +#define PMX_NAND_4CHIPS_MASK (PMX_NFCE1_MASK | PMX_NFCE2_MASK | \ + PMX_NFWPRT1_MASK | PMX_NFWPRT2_MASK | \ + PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \ + PMX_KBD_COL0_MASK | PMX_KBD_COL1_MASK) + +#define PMX_MCIFALL_1_MASK 0xF8000000 +#define PMX_MCIFALL_2_MASK 0x0FFFFFFF + +#define PMX_PCI_REG1_MASK (PMX_SMINCS2_MASK | PMX_SMINCS3_MASK | \ + PMX_CLCD2_MASK | PMX_KBD_ROWCOL68_MASK | \ + PMX_EGPIO_1_GRP_MASK | PMX_GPT0_TMR0_MASK | \ + PMX_GPT0_TMR1_MASK | PMX_GPT1_TMR0_MASK | \ + PMX_GPT1_TMR1_MASK | PMX_I2S1_MASK | \ + PMX_NFCE2_MASK) +#define PMX_PCI_REG2_MASK (PMX_TOUCH_XY_MASK | PMX_SSP0_CS0_MASK | \ + PMX_SSP0_CS1_2_MASK) + +#define PMX_SMII_0_1_2_MASK (PMX_CLCD2_MASK | PMX_KBD_ROWCOL68_MASK) +#define PMX_RGMII_REG0_MASK (PMX_MCI_DATA8_15_MASK | \ + PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ + PMX_GMIID47_MASK) +#define PMX_RGMII_REG1_MASK (PMX_KBD_ROWCOL68_MASK | PMX_EGPIO_1_GRP_MASK |\ + PMX_KBD_ROW1_MASK | PMX_NFWPRT1_MASK | \ + PMX_KBD_ROW0_MASK | PMX_NFWPRT2_MASK) +#define PMX_RGMII_REG2_MASK (PMX_TOUCH_XY_MASK | PMX_SSP0_CS0_MASK | \ + PMX_SSP0_CS1_2_MASK) + +#define PCIE_CFG_VAL(x) (PCIE_SATA##x##_SEL_PCIE | \ + PCIE##x##_CFG_AUX_CLK_EN | \ + PCIE##x##_CFG_CORE_CLK_EN | \ + PCIE##x##_CFG_POWERUP_RESET | \ + PCIE##x##_CFG_DEVICE_PRESENT) +#define SATA_CFG_VAL(x) (PCIE_SATA##x##_SEL_SATA | \ + SATA##x##_CFG_PM_CLK_EN | \ + SATA##x##_CFG_POWERUP_RESET | \ + SATA##x##_CFG_RX_CLK_EN | \ + SATA##x##_CFG_TX_CLK_EN) + +/* Pad multiplexing for i2c0 device */ +static const unsigned i2c0_pins[] = { 102, 103 }; +static struct spear_muxreg i2c0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_I2C0_MASK, + .val = PMX_I2C0_MASK, + }, +}; + +static struct spear_modemux i2c0_modemux[] = { + { + .muxregs = i2c0_muxreg, + .nmuxregs = ARRAY_SIZE(i2c0_muxreg), + }, +}; + +static struct spear_pingroup i2c0_pingroup = { + .name = "i2c0_grp", + .pins = i2c0_pins, + .npins = ARRAY_SIZE(i2c0_pins), + .modemuxs = i2c0_modemux, + .nmodemuxs = ARRAY_SIZE(i2c0_modemux), +}; + +static const char *const i2c0_grps[] = { "i2c0_grp" }; +static struct spear_function i2c0_function = { + .name = "i2c0", + .groups = i2c0_grps, + .ngroups = ARRAY_SIZE(i2c0_grps), +}; + +/* Pad multiplexing for ssp0 device */ +static const unsigned ssp0_pins[] = { 109, 110, 111, 112 }; +static struct spear_muxreg ssp0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_SSP0_MASK, + .val = PMX_SSP0_MASK, + }, +}; + +static struct spear_modemux ssp0_modemux[] = { + { + .muxregs = ssp0_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_muxreg), + }, +}; + +static struct spear_pingroup ssp0_pingroup = { + .name = "ssp0_grp", + .pins = ssp0_pins, + .npins = ARRAY_SIZE(ssp0_pins), + .modemuxs = ssp0_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_modemux), +}; + +/* Pad multiplexing for ssp0_cs0 device */ +static const unsigned ssp0_cs0_pins[] = { 96 }; +static struct spear_muxreg ssp0_cs0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_SSP0_CS0_MASK, + .val = PMX_SSP0_CS0_MASK, + }, +}; + +static struct spear_modemux ssp0_cs0_modemux[] = { + { + .muxregs = ssp0_cs0_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_cs0_muxreg), + }, +}; + +static struct spear_pingroup ssp0_cs0_pingroup = { + .name = "ssp0_cs0_grp", + .pins = ssp0_cs0_pins, + .npins = ARRAY_SIZE(ssp0_cs0_pins), + .modemuxs = ssp0_cs0_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_cs0_modemux), +}; + +/* ssp0_cs1_2 device */ +static const unsigned ssp0_cs1_2_pins[] = { 94, 95 }; +static struct spear_muxreg ssp0_cs1_2_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_SSP0_CS1_2_MASK, + .val = PMX_SSP0_CS1_2_MASK, + }, +}; + +static struct spear_modemux ssp0_cs1_2_modemux[] = { + { + .muxregs = ssp0_cs1_2_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_cs1_2_muxreg), + }, +}; + +static struct spear_pingroup ssp0_cs1_2_pingroup = { + .name = "ssp0_cs1_2_grp", + .pins = ssp0_cs1_2_pins, + .npins = ARRAY_SIZE(ssp0_cs1_2_pins), + .modemuxs = ssp0_cs1_2_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_cs1_2_modemux), +}; + +static const char *const ssp0_grps[] = { "ssp0_grp", "ssp0_cs0_grp", + "ssp0_cs1_2_grp" }; +static struct spear_function ssp0_function = { + .name = "ssp0", + .groups = ssp0_grps, + .ngroups = ARRAY_SIZE(ssp0_grps), +}; + +/* Pad multiplexing for i2s0 device */ +static const unsigned i2s0_pins[] = { 104, 105, 106, 107, 108 }; +static struct spear_muxreg i2s0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_I2S0_MASK, + .val = PMX_I2S0_MASK, + }, +}; + +static struct spear_modemux i2s0_modemux[] = { + { + .muxregs = i2s0_muxreg, + .nmuxregs = ARRAY_SIZE(i2s0_muxreg), + }, +}; + +static struct spear_pingroup i2s0_pingroup = { + .name = "i2s0_grp", + .pins = i2s0_pins, + .npins = ARRAY_SIZE(i2s0_pins), + .modemuxs = i2s0_modemux, + .nmodemuxs = ARRAY_SIZE(i2s0_modemux), +}; + +static const char *const i2s0_grps[] = { "i2s0_grp" }; +static struct spear_function i2s0_function = { + .name = "i2s0", + .groups = i2s0_grps, + .ngroups = ARRAY_SIZE(i2s0_grps), +}; + +/* Pad multiplexing for i2s1 device */ +static const unsigned i2s1_pins[] = { 0, 1, 2, 3 }; +static struct spear_muxreg i2s1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_I2S1_MASK, + .val = PMX_I2S1_MASK, + }, +}; + +static struct spear_modemux i2s1_modemux[] = { + { + .muxregs = i2s1_muxreg, + .nmuxregs = ARRAY_SIZE(i2s1_muxreg), + }, +}; + +static struct spear_pingroup i2s1_pingroup = { + .name = "i2s1_grp", + .pins = i2s1_pins, + .npins = ARRAY_SIZE(i2s1_pins), + .modemuxs = i2s1_modemux, + .nmodemuxs = ARRAY_SIZE(i2s1_modemux), +}; + +static const char *const i2s1_grps[] = { "i2s1_grp" }; +static struct spear_function i2s1_function = { + .name = "i2s1", + .groups = i2s1_grps, + .ngroups = ARRAY_SIZE(i2s1_grps), +}; + +/* Pad multiplexing for clcd device */ +static const unsigned clcd_pins[] = { 113, 114, 115, 116, 117, 118, 119, 120, + 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, + 135, 136, 137, 138, 139, 140, 141, 142 }; +static struct spear_muxreg clcd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_CLCD1_MASK, + .val = PMX_CLCD1_MASK, + }, +}; + +static struct spear_modemux clcd_modemux[] = { + { + .muxregs = clcd_muxreg, + .nmuxregs = ARRAY_SIZE(clcd_muxreg), + }, +}; + +static struct spear_pingroup clcd_pingroup = { + .name = "clcd_grp", + .pins = clcd_pins, + .npins = ARRAY_SIZE(clcd_pins), + .modemuxs = clcd_modemux, + .nmodemuxs = ARRAY_SIZE(clcd_modemux), +}; + +static const unsigned clcd_high_res_pins[] = { 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52 }; +static struct spear_muxreg clcd_high_res_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_CLCD2_MASK, + .val = PMX_CLCD2_MASK, + }, +}; + +static struct spear_modemux clcd_high_res_modemux[] = { + { + .muxregs = clcd_high_res_muxreg, + .nmuxregs = ARRAY_SIZE(clcd_high_res_muxreg), + }, +}; + +static struct spear_pingroup clcd_high_res_pingroup = { + .name = "clcd_high_res_grp", + .pins = clcd_high_res_pins, + .npins = ARRAY_SIZE(clcd_high_res_pins), + .modemuxs = clcd_high_res_modemux, + .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), +}; + +static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" }; +static struct spear_function clcd_function = { + .name = "clcd", + .groups = clcd_grps, + .ngroups = ARRAY_SIZE(clcd_grps), +}; + +static const unsigned arm_gpio_pins[] = { 18, 19, 20, 21, 22, 23, 143, 144, 145, + 146, 147, 148, 149, 150, 151, 152 }; +static struct spear_muxreg arm_gpio_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_EGPIO_0_GRP_MASK, + .val = PMX_EGPIO_0_GRP_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_EGPIO_1_GRP_MASK, + .val = PMX_EGPIO_1_GRP_MASK, + }, +}; + +static struct spear_modemux arm_gpio_modemux[] = { + { + .muxregs = arm_gpio_muxreg, + .nmuxregs = ARRAY_SIZE(arm_gpio_muxreg), + }, +}; + +static struct spear_pingroup arm_gpio_pingroup = { + .name = "arm_gpio_grp", + .pins = arm_gpio_pins, + .npins = ARRAY_SIZE(arm_gpio_pins), + .modemuxs = arm_gpio_modemux, + .nmodemuxs = ARRAY_SIZE(arm_gpio_modemux), +}; + +static const char *const arm_gpio_grps[] = { "arm_gpio_grp" }; +static struct spear_function arm_gpio_function = { + .name = "arm_gpio", + .groups = arm_gpio_grps, + .ngroups = ARRAY_SIZE(arm_gpio_grps), +}; + +/* Pad multiplexing for smi 2 chips device */ +static const unsigned smi_2_chips_pins[] = { 153, 154, 155, 156, 157 }; +static struct spear_muxreg smi_2_chips_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_SMI_MASK, + .val = PMX_SMI_MASK, + }, +}; + +static struct spear_modemux smi_2_chips_modemux[] = { + { + .muxregs = smi_2_chips_muxreg, + .nmuxregs = ARRAY_SIZE(smi_2_chips_muxreg), + }, +}; + +static struct spear_pingroup smi_2_chips_pingroup = { + .name = "smi_2_chips_grp", + .pins = smi_2_chips_pins, + .npins = ARRAY_SIZE(smi_2_chips_pins), + .modemuxs = smi_2_chips_modemux, + .nmodemuxs = ARRAY_SIZE(smi_2_chips_modemux), +}; + +static const unsigned smi_4_chips_pins[] = { 54, 55 }; +static struct spear_muxreg smi_4_chips_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_SMI_MASK, + .val = PMX_SMI_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, + .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, + }, +}; + +static struct spear_modemux smi_4_chips_modemux[] = { + { + .muxregs = smi_4_chips_muxreg, + .nmuxregs = ARRAY_SIZE(smi_4_chips_muxreg), + }, +}; + +static struct spear_pingroup smi_4_chips_pingroup = { + .name = "smi_4_chips_grp", + .pins = smi_4_chips_pins, + .npins = ARRAY_SIZE(smi_4_chips_pins), + .modemuxs = smi_4_chips_modemux, + .nmodemuxs = ARRAY_SIZE(smi_4_chips_modemux), +}; + +static const char *const smi_grps[] = { "smi_2_chips_grp", "smi_4_chips_grp" }; +static struct spear_function smi_function = { + .name = "smi", + .groups = smi_grps, + .ngroups = ARRAY_SIZE(smi_grps), +}; + +/* Pad multiplexing for gmii device */ +static const unsigned gmii_pins[] = { 173, 174, 175, 176, 177, 178, 179, 180, + 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, + 195, 196, 197, 198, 199, 200 }; +static struct spear_muxreg gmii_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_GMII_MASK, + .val = PMX_GMII_MASK, + }, +}; + +static struct spear_modemux gmii_modemux[] = { + { + .muxregs = gmii_muxreg, + .nmuxregs = ARRAY_SIZE(gmii_muxreg), + }, +}; + +static struct spear_pingroup gmii_pingroup = { + .name = "gmii_grp", + .pins = gmii_pins, + .npins = ARRAY_SIZE(gmii_pins), + .modemuxs = gmii_modemux, + .nmodemuxs = ARRAY_SIZE(gmii_modemux), +}; + +static const char *const gmii_grps[] = { "gmii_grp" }; +static struct spear_function gmii_function = { + .name = "gmii", + .groups = gmii_grps, + .ngroups = ARRAY_SIZE(gmii_grps), +}; + +/* Pad multiplexing for rgmii device */ +static const unsigned rgmii_pins[] = { 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 175, + 180, 181, 182, 183, 185, 188, 193, 194, 195, 196, 197, 198, 211, 212 }; +static struct spear_muxreg rgmii_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_RGMII_REG0_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_RGMII_REG1_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_RGMII_REG2_MASK, + .val = 0, + }, +}; + +static struct spear_modemux rgmii_modemux[] = { + { + .muxregs = rgmii_muxreg, + .nmuxregs = ARRAY_SIZE(rgmii_muxreg), + }, +}; + +static struct spear_pingroup rgmii_pingroup = { + .name = "rgmii_grp", + .pins = rgmii_pins, + .npins = ARRAY_SIZE(rgmii_pins), + .modemuxs = rgmii_modemux, + .nmodemuxs = ARRAY_SIZE(rgmii_modemux), +}; + +static const char *const rgmii_grps[] = { "rgmii_grp" }; +static struct spear_function rgmii_function = { + .name = "rgmii", + .groups = rgmii_grps, + .ngroups = ARRAY_SIZE(rgmii_grps), +}; + +/* Pad multiplexing for smii_0_1_2 device */ +static const unsigned smii_0_1_2_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, + 51, 52, 53, 54, 55 }; +static struct spear_muxreg smii_0_1_2_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_SMII_0_1_2_MASK, + .val = 0, + }, +}; + +static struct spear_modemux smii_0_1_2_modemux[] = { + { + .muxregs = smii_0_1_2_muxreg, + .nmuxregs = ARRAY_SIZE(smii_0_1_2_muxreg), + }, +}; + +static struct spear_pingroup smii_0_1_2_pingroup = { + .name = "smii_0_1_2_grp", + .pins = smii_0_1_2_pins, + .npins = ARRAY_SIZE(smii_0_1_2_pins), + .modemuxs = smii_0_1_2_modemux, + .nmodemuxs = ARRAY_SIZE(smii_0_1_2_modemux), +}; + +static const char *const smii_0_1_2_grps[] = { "smii_0_1_2_grp" }; +static struct spear_function smii_0_1_2_function = { + .name = "smii_0_1_2", + .groups = smii_0_1_2_grps, + .ngroups = ARRAY_SIZE(smii_0_1_2_grps), +}; + +/* Pad multiplexing for ras_mii_txclk device */ +static const unsigned ras_mii_txclk_pins[] = { 98, 99 }; +static struct spear_muxreg ras_mii_txclk_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_NFCE2_MASK, + .val = 0, + }, +}; + +static struct spear_modemux ras_mii_txclk_modemux[] = { + { + .muxregs = ras_mii_txclk_muxreg, + .nmuxregs = ARRAY_SIZE(ras_mii_txclk_muxreg), + }, +}; + +static struct spear_pingroup ras_mii_txclk_pingroup = { + .name = "ras_mii_txclk_grp", + .pins = ras_mii_txclk_pins, + .npins = ARRAY_SIZE(ras_mii_txclk_pins), + .modemuxs = ras_mii_txclk_modemux, + .nmodemuxs = ARRAY_SIZE(ras_mii_txclk_modemux), +}; + +static const char *const ras_mii_txclk_grps[] = { "ras_mii_txclk_grp" }; +static struct spear_function ras_mii_txclk_function = { + .name = "ras_mii_txclk", + .groups = ras_mii_txclk_grps, + .ngroups = ARRAY_SIZE(ras_mii_txclk_grps), +}; + +/* Pad multiplexing for nand 8bit device (cs0 only) */ +static const unsigned nand_8bit_pins[] = { 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, + 170, 171, 172, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, + 212 }; +static struct spear_muxreg nand_8bit_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_NAND8BIT_0_MASK, + .val = PMX_NAND8BIT_0_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_NAND8BIT_1_MASK, + .val = PMX_NAND8BIT_1_MASK, + }, +}; + +static struct spear_modemux nand_8bit_modemux[] = { + { + .muxregs = nand_8bit_muxreg, + .nmuxregs = ARRAY_SIZE(nand_8bit_muxreg), + }, +}; + +static struct spear_pingroup nand_8bit_pingroup = { + .name = "nand_8bit_grp", + .pins = nand_8bit_pins, + .npins = ARRAY_SIZE(nand_8bit_pins), + .modemuxs = nand_8bit_modemux, + .nmodemuxs = ARRAY_SIZE(nand_8bit_modemux), +}; + +/* Pad multiplexing for nand 16bit device */ +static const unsigned nand_16bit_pins[] = { 201, 202, 203, 204, 207, 208, 209, + 210 }; +static struct spear_muxreg nand_16bit_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_NAND16BIT_1_MASK, + .val = PMX_NAND16BIT_1_MASK, + }, +}; + +static struct spear_modemux nand_16bit_modemux[] = { + { + .muxregs = nand_16bit_muxreg, + .nmuxregs = ARRAY_SIZE(nand_16bit_muxreg), + }, +}; + +static struct spear_pingroup nand_16bit_pingroup = { + .name = "nand_16bit_grp", + .pins = nand_16bit_pins, + .npins = ARRAY_SIZE(nand_16bit_pins), + .modemuxs = nand_16bit_modemux, + .nmodemuxs = ARRAY_SIZE(nand_16bit_modemux), +}; + +/* Pad multiplexing for nand 4 chips */ +static const unsigned nand_4_chips_pins[] = { 205, 206, 211, 212 }; +static struct spear_muxreg nand_4_chips_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_NAND_4CHIPS_MASK, + .val = PMX_NAND_4CHIPS_MASK, + }, +}; + +static struct spear_modemux nand_4_chips_modemux[] = { + { + .muxregs = nand_4_chips_muxreg, + .nmuxregs = ARRAY_SIZE(nand_4_chips_muxreg), + }, +}; + +static struct spear_pingroup nand_4_chips_pingroup = { + .name = "nand_4_chips_grp", + .pins = nand_4_chips_pins, + .npins = ARRAY_SIZE(nand_4_chips_pins), + .modemuxs = nand_4_chips_modemux, + .nmodemuxs = ARRAY_SIZE(nand_4_chips_modemux), +}; + +static const char *const nand_grps[] = { "nand_8bit_grp", "nand_16bit_grp", + "nand_4_chips_grp" }; +static struct spear_function nand_function = { + .name = "nand", + .groups = nand_grps, + .ngroups = ARRAY_SIZE(nand_grps), +}; + +/* Pad multiplexing for keyboard_6x6 device */ +static const unsigned keyboard_6x6_pins[] = { 201, 202, 203, 204, 205, 206, 207, + 208, 209, 210, 211, 212 }; +static struct spear_muxreg keyboard_6x6_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_KEYBOARD_6X6_MASK | PMX_NFIO8_15_MASK | + PMX_NFCE1_MASK | PMX_NFCE2_MASK | PMX_NFWPRT1_MASK | + PMX_NFWPRT2_MASK, + .val = PMX_KEYBOARD_6X6_MASK, + }, +}; + +static struct spear_modemux keyboard_6x6_modemux[] = { + { + .muxregs = keyboard_6x6_muxreg, + .nmuxregs = ARRAY_SIZE(keyboard_6x6_muxreg), + }, +}; + +static struct spear_pingroup keyboard_6x6_pingroup = { + .name = "keyboard_6x6_grp", + .pins = keyboard_6x6_pins, + .npins = ARRAY_SIZE(keyboard_6x6_pins), + .modemuxs = keyboard_6x6_modemux, + .nmodemuxs = ARRAY_SIZE(keyboard_6x6_modemux), +}; + +/* Pad multiplexing for keyboard_rowcol6_8 device */ +static const unsigned keyboard_rowcol6_8_pins[] = { 24, 25, 26, 27, 28, 29 }; +static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_KBD_ROWCOL68_MASK, + .val = PMX_KBD_ROWCOL68_MASK, + }, +}; + +static struct spear_modemux keyboard_rowcol6_8_modemux[] = { + { + .muxregs = keyboard_rowcol6_8_muxreg, + .nmuxregs = ARRAY_SIZE(keyboard_rowcol6_8_muxreg), + }, +}; + +static struct spear_pingroup keyboard_rowcol6_8_pingroup = { + .name = "keyboard_rowcol6_8_grp", + .pins = keyboard_rowcol6_8_pins, + .npins = ARRAY_SIZE(keyboard_rowcol6_8_pins), + .modemuxs = keyboard_rowcol6_8_modemux, + .nmodemuxs = ARRAY_SIZE(keyboard_rowcol6_8_modemux), +}; + +static const char *const keyboard_grps[] = { "keyboard_6x6_grp", + "keyboard_rowcol6_8_grp" }; +static struct spear_function keyboard_function = { + .name = "keyboard", + .groups = keyboard_grps, + .ngroups = ARRAY_SIZE(keyboard_grps), +}; + +/* Pad multiplexing for uart0 device */ +static const unsigned uart0_pins[] = { 100, 101 }; +static struct spear_muxreg uart0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_UART0_MASK, + .val = PMX_UART0_MASK, + }, +}; + +static struct spear_modemux uart0_modemux[] = { + { + .muxregs = uart0_muxreg, + .nmuxregs = ARRAY_SIZE(uart0_muxreg), + }, +}; + +static struct spear_pingroup uart0_pingroup = { + .name = "uart0_grp", + .pins = uart0_pins, + .npins = ARRAY_SIZE(uart0_pins), + .modemuxs = uart0_modemux, + .nmodemuxs = ARRAY_SIZE(uart0_modemux), +}; + +/* Pad multiplexing for uart0_modem device */ +static const unsigned uart0_modem_pins[] = { 12, 13, 14, 15, 16, 17 }; +static struct spear_muxreg uart0_modem_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_UART0_MODEM_MASK, + .val = PMX_UART0_MODEM_MASK, + }, +}; + +static struct spear_modemux uart0_modem_modemux[] = { + { + .muxregs = uart0_modem_muxreg, + .nmuxregs = ARRAY_SIZE(uart0_modem_muxreg), + }, +}; + +static struct spear_pingroup uart0_modem_pingroup = { + .name = "uart0_modem_grp", + .pins = uart0_modem_pins, + .npins = ARRAY_SIZE(uart0_modem_pins), + .modemuxs = uart0_modem_modemux, + .nmodemuxs = ARRAY_SIZE(uart0_modem_modemux), +}; + +static const char *const uart0_grps[] = { "uart0_grp", "uart0_modem_grp" }; +static struct spear_function uart0_function = { + .name = "uart0", + .groups = uart0_grps, + .ngroups = ARRAY_SIZE(uart0_grps), +}; + +/* Pad multiplexing for gpt0_tmr0 device */ +static const unsigned gpt0_tmr0_pins[] = { 10, 11 }; +static struct spear_muxreg gpt0_tmr0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_GPT0_TMR0_MASK, + .val = PMX_GPT0_TMR0_MASK, + }, +}; + +static struct spear_modemux gpt0_tmr0_modemux[] = { + { + .muxregs = gpt0_tmr0_muxreg, + .nmuxregs = ARRAY_SIZE(gpt0_tmr0_muxreg), + }, +}; + +static struct spear_pingroup gpt0_tmr0_pingroup = { + .name = "gpt0_tmr0_grp", + .pins = gpt0_tmr0_pins, + .npins = ARRAY_SIZE(gpt0_tmr0_pins), + .modemuxs = gpt0_tmr0_modemux, + .nmodemuxs = ARRAY_SIZE(gpt0_tmr0_modemux), +}; + +/* Pad multiplexing for gpt0_tmr1 device */ +static const unsigned gpt0_tmr1_pins[] = { 8, 9 }; +static struct spear_muxreg gpt0_tmr1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_GPT0_TMR1_MASK, + .val = PMX_GPT0_TMR1_MASK, + }, +}; + +static struct spear_modemux gpt0_tmr1_modemux[] = { + { + .muxregs = gpt0_tmr1_muxreg, + .nmuxregs = ARRAY_SIZE(gpt0_tmr1_muxreg), + }, +}; + +static struct spear_pingroup gpt0_tmr1_pingroup = { + .name = "gpt0_tmr1_grp", + .pins = gpt0_tmr1_pins, + .npins = ARRAY_SIZE(gpt0_tmr1_pins), + .modemuxs = gpt0_tmr1_modemux, + .nmodemuxs = ARRAY_SIZE(gpt0_tmr1_modemux), +}; + +static const char *const gpt0_grps[] = { "gpt0_tmr0_grp", "gpt0_tmr1_grp" }; +static struct spear_function gpt0_function = { + .name = "gpt0", + .groups = gpt0_grps, + .ngroups = ARRAY_SIZE(gpt0_grps), +}; + +/* Pad multiplexing for gpt1_tmr0 device */ +static const unsigned gpt1_tmr0_pins[] = { 6, 7 }; +static struct spear_muxreg gpt1_tmr0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_GPT1_TMR0_MASK, + .val = PMX_GPT1_TMR0_MASK, + }, +}; + +static struct spear_modemux gpt1_tmr0_modemux[] = { + { + .muxregs = gpt1_tmr0_muxreg, + .nmuxregs = ARRAY_SIZE(gpt1_tmr0_muxreg), + }, +}; + +static struct spear_pingroup gpt1_tmr0_pingroup = { + .name = "gpt1_tmr0_grp", + .pins = gpt1_tmr0_pins, + .npins = ARRAY_SIZE(gpt1_tmr0_pins), + .modemuxs = gpt1_tmr0_modemux, + .nmodemuxs = ARRAY_SIZE(gpt1_tmr0_modemux), +}; + +/* Pad multiplexing for gpt1_tmr1 device */ +static const unsigned gpt1_tmr1_pins[] = { 4, 5 }; +static struct spear_muxreg gpt1_tmr1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_GPT1_TMR1_MASK, + .val = PMX_GPT1_TMR1_MASK, + }, +}; + +static struct spear_modemux gpt1_tmr1_modemux[] = { + { + .muxregs = gpt1_tmr1_muxreg, + .nmuxregs = ARRAY_SIZE(gpt1_tmr1_muxreg), + }, +}; + +static struct spear_pingroup gpt1_tmr1_pingroup = { + .name = "gpt1_tmr1_grp", + .pins = gpt1_tmr1_pins, + .npins = ARRAY_SIZE(gpt1_tmr1_pins), + .modemuxs = gpt1_tmr1_modemux, + .nmodemuxs = ARRAY_SIZE(gpt1_tmr1_modemux), +}; + +static const char *const gpt1_grps[] = { "gpt1_tmr1_grp", "gpt1_tmr0_grp" }; +static struct spear_function gpt1_function = { + .name = "gpt1", + .groups = gpt1_grps, + .ngroups = ARRAY_SIZE(gpt1_grps), +}; + +/* Pad multiplexing for mcif device */ +static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214, + 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, + 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, + 243, 244, 245 }; +#define MCIF_MUXREG \ + { \ + .reg = PAD_FUNCTION_EN_0, \ + .mask = PMX_MCI_DATA8_15_MASK, \ + .val = PMX_MCI_DATA8_15_MASK, \ + }, { \ + .reg = PAD_FUNCTION_EN_1, \ + .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ + PMX_NFWPRT2_MASK, \ + .val = PMX_MCIFALL_1_MASK, \ + }, { \ + .reg = PAD_FUNCTION_EN_2, \ + .mask = PMX_MCIFALL_2_MASK, \ + .val = PMX_MCIFALL_2_MASK, \ + } + +/* sdhci device */ +static struct spear_muxreg sdhci_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_SD, + }, +}; + +static struct spear_modemux sdhci_modemux[] = { + { + .muxregs = sdhci_muxreg, + .nmuxregs = ARRAY_SIZE(sdhci_muxreg), + }, +}; + +static struct spear_pingroup sdhci_pingroup = { + .name = "sdhci_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = sdhci_modemux, + .nmodemuxs = ARRAY_SIZE(sdhci_modemux), +}; + +static const char *const sdhci_grps[] = { "sdhci_grp" }; +static struct spear_function sdhci_function = { + .name = "sdhci", + .groups = sdhci_grps, + .ngroups = ARRAY_SIZE(sdhci_grps), +}; + +/* cf device */ +static struct spear_muxreg cf_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_CF, + }, +}; + +static struct spear_modemux cf_modemux[] = { + { + .muxregs = cf_muxreg, + .nmuxregs = ARRAY_SIZE(cf_muxreg), + }, +}; + +static struct spear_pingroup cf_pingroup = { + .name = "cf_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = cf_modemux, + .nmodemuxs = ARRAY_SIZE(cf_modemux), +}; + +static const char *const cf_grps[] = { "cf_grp" }; +static struct spear_function cf_function = { + .name = "cf", + .groups = cf_grps, + .ngroups = ARRAY_SIZE(cf_grps), +}; + +/* xd device */ +static struct spear_muxreg xd_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_XD, + }, +}; + +static struct spear_modemux xd_modemux[] = { + { + .muxregs = xd_muxreg, + .nmuxregs = ARRAY_SIZE(xd_muxreg), + }, +}; + +static struct spear_pingroup xd_pingroup = { + .name = "xd_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = xd_modemux, + .nmodemuxs = ARRAY_SIZE(xd_modemux), +}; + +static const char *const xd_grps[] = { "xd_grp" }; +static struct spear_function xd_function = { + .name = "xd", + .groups = xd_grps, + .ngroups = ARRAY_SIZE(xd_grps), +}; + +/* Pad multiplexing for touch_xy device */ +static const unsigned touch_xy_pins[] = { 97 }; +static struct spear_muxreg touch_xy_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_TOUCH_XY_MASK, + .val = PMX_TOUCH_XY_MASK, + }, +}; + +static struct spear_modemux touch_xy_modemux[] = { + { + .muxregs = touch_xy_muxreg, + .nmuxregs = ARRAY_SIZE(touch_xy_muxreg), + }, +}; + +static struct spear_pingroup touch_xy_pingroup = { + .name = "touch_xy_grp", + .pins = touch_xy_pins, + .npins = ARRAY_SIZE(touch_xy_pins), + .modemuxs = touch_xy_modemux, + .nmodemuxs = ARRAY_SIZE(touch_xy_modemux), +}; + +static const char *const touch_xy_grps[] = { "touch_xy_grp" }; +static struct spear_function touch_xy_function = { + .name = "touchscreen", + .groups = touch_xy_grps, + .ngroups = ARRAY_SIZE(touch_xy_grps), +}; + +/* Pad multiplexing for uart1 device */ +/* Muxed with I2C */ +static const unsigned uart1_dis_i2c_pins[] = { 102, 103 }; +static struct spear_muxreg uart1_dis_i2c_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_I2C0_MASK, + .val = 0, + }, +}; + +static struct spear_modemux uart1_dis_i2c_modemux[] = { + { + .muxregs = uart1_dis_i2c_muxreg, + .nmuxregs = ARRAY_SIZE(uart1_dis_i2c_muxreg), + }, +}; + +static struct spear_pingroup uart_1_dis_i2c_pingroup = { + .name = "uart1_disable_i2c_grp", + .pins = uart1_dis_i2c_pins, + .npins = ARRAY_SIZE(uart1_dis_i2c_pins), + .modemuxs = uart1_dis_i2c_modemux, + .nmodemuxs = ARRAY_SIZE(uart1_dis_i2c_modemux), +}; + +/* Muxed with SD/MMC */ +static const unsigned uart1_dis_sd_pins[] = { 214, 215 }; +static struct spear_muxreg uart1_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_MCIDATA1_MASK | + PMX_MCIDATA2_MASK, + .val = 0, + }, +}; + +static struct spear_modemux uart1_dis_sd_modemux[] = { + { + .muxregs = uart1_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(uart1_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup uart_1_dis_sd_pingroup = { + .name = "uart1_disable_sd_grp", + .pins = uart1_dis_sd_pins, + .npins = ARRAY_SIZE(uart1_dis_sd_pins), + .modemuxs = uart1_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(uart1_dis_sd_modemux), +}; + +static const char *const uart1_grps[] = { "uart1_disable_i2c_grp", + "uart1_disable_sd_grp" }; +static struct spear_function uart1_function = { + .name = "uart1", + .groups = uart1_grps, + .ngroups = ARRAY_SIZE(uart1_grps), +}; + +/* Pad multiplexing for uart2_3 device */ +static const unsigned uart2_3_pins[] = { 104, 105, 106, 107 }; +static struct spear_muxreg uart2_3_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_I2S0_MASK, + .val = 0, + }, +}; + +static struct spear_modemux uart2_3_modemux[] = { + { + .muxregs = uart2_3_muxreg, + .nmuxregs = ARRAY_SIZE(uart2_3_muxreg), + }, +}; + +static struct spear_pingroup uart_2_3_pingroup = { + .name = "uart2_3_grp", + .pins = uart2_3_pins, + .npins = ARRAY_SIZE(uart2_3_pins), + .modemuxs = uart2_3_modemux, + .nmodemuxs = ARRAY_SIZE(uart2_3_modemux), +}; + +static const char *const uart2_3_grps[] = { "uart2_3_grp" }; +static struct spear_function uart2_3_function = { + .name = "uart2_3", + .groups = uart2_3_grps, + .ngroups = ARRAY_SIZE(uart2_3_grps), +}; + +/* Pad multiplexing for uart4 device */ +static const unsigned uart4_pins[] = { 108, 113 }; +static struct spear_muxreg uart4_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, + .val = 0, + }, +}; + +static struct spear_modemux uart4_modemux[] = { + { + .muxregs = uart4_muxreg, + .nmuxregs = ARRAY_SIZE(uart4_muxreg), + }, +}; + +static struct spear_pingroup uart_4_pingroup = { + .name = "uart4_grp", + .pins = uart4_pins, + .npins = ARRAY_SIZE(uart4_pins), + .modemuxs = uart4_modemux, + .nmodemuxs = ARRAY_SIZE(uart4_modemux), +}; + +static const char *const uart4_grps[] = { "uart4_grp" }; +static struct spear_function uart4_function = { + .name = "uart4", + .groups = uart4_grps, + .ngroups = ARRAY_SIZE(uart4_grps), +}; + +/* Pad multiplexing for uart5 device */ +static const unsigned uart5_pins[] = { 114, 115 }; +static struct spear_muxreg uart5_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_CLCD1_MASK, + .val = 0, + }, +}; + +static struct spear_modemux uart5_modemux[] = { + { + .muxregs = uart5_muxreg, + .nmuxregs = ARRAY_SIZE(uart5_muxreg), + }, +}; + +static struct spear_pingroup uart_5_pingroup = { + .name = "uart5_grp", + .pins = uart5_pins, + .npins = ARRAY_SIZE(uart5_pins), + .modemuxs = uart5_modemux, + .nmodemuxs = ARRAY_SIZE(uart5_modemux), +}; + +static const char *const uart5_grps[] = { "uart5_grp" }; +static struct spear_function uart5_function = { + .name = "uart5", + .groups = uart5_grps, + .ngroups = ARRAY_SIZE(uart5_grps), +}; + +/* Pad multiplexing for rs485_0_1_tdm_0_1 device */ +static const unsigned rs485_0_1_tdm_0_1_pins[] = { 116, 117, 118, 119, 120, 121, + 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, + 136, 137 }; +static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_CLCD1_MASK, + .val = 0, + }, +}; + +static struct spear_modemux rs485_0_1_tdm_0_1_modemux[] = { + { + .muxregs = rs485_0_1_tdm_0_1_muxreg, + .nmuxregs = ARRAY_SIZE(rs485_0_1_tdm_0_1_muxreg), + }, +}; + +static struct spear_pingroup rs485_0_1_tdm_0_1_pingroup = { + .name = "rs485_0_1_tdm_0_1_grp", + .pins = rs485_0_1_tdm_0_1_pins, + .npins = ARRAY_SIZE(rs485_0_1_tdm_0_1_pins), + .modemuxs = rs485_0_1_tdm_0_1_modemux, + .nmodemuxs = ARRAY_SIZE(rs485_0_1_tdm_0_1_modemux), +}; + +static const char *const rs485_0_1_tdm_0_1_grps[] = { "rs485_0_1_tdm_0_1_grp" }; +static struct spear_function rs485_0_1_tdm_0_1_function = { + .name = "rs485_0_1_tdm_0_1", + .groups = rs485_0_1_tdm_0_1_grps, + .ngroups = ARRAY_SIZE(rs485_0_1_tdm_0_1_grps), +}; + +/* Pad multiplexing for i2c_1_2 device */ +static const unsigned i2c_1_2_pins[] = { 138, 139, 140, 141 }; +static struct spear_muxreg i2c_1_2_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_CLCD1_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c_1_2_modemux[] = { + { + .muxregs = i2c_1_2_muxreg, + .nmuxregs = ARRAY_SIZE(i2c_1_2_muxreg), + }, +}; + +static struct spear_pingroup i2c_1_2_pingroup = { + .name = "i2c_1_2_grp", + .pins = i2c_1_2_pins, + .npins = ARRAY_SIZE(i2c_1_2_pins), + .modemuxs = i2c_1_2_modemux, + .nmodemuxs = ARRAY_SIZE(i2c_1_2_modemux), +}; + +static const char *const i2c_1_2_grps[] = { "i2c_1_2_grp" }; +static struct spear_function i2c_1_2_function = { + .name = "i2c_1_2", + .groups = i2c_1_2_grps, + .ngroups = ARRAY_SIZE(i2c_1_2_grps), +}; + +/* Pad multiplexing for i2c3_dis_smi_clcd device */ +/* Muxed with SMI & CLCD */ +static const unsigned i2c3_dis_smi_clcd_pins[] = { 142, 153 }; +static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c3_dis_smi_clcd_modemux[] = { + { + .muxregs = i2c3_dis_smi_clcd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c3_dis_smi_clcd_muxreg), + }, +}; + +static struct spear_pingroup i2c3_dis_smi_clcd_pingroup = { + .name = "i2c3_dis_smi_clcd_grp", + .pins = i2c3_dis_smi_clcd_pins, + .npins = ARRAY_SIZE(i2c3_dis_smi_clcd_pins), + .modemuxs = i2c3_dis_smi_clcd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c3_dis_smi_clcd_modemux), +}; + +/* Pad multiplexing for i2c3_dis_sd_i2s0 device */ +/* Muxed with SD/MMC & I2S1 */ +static const unsigned i2c3_dis_sd_i2s0_pins[] = { 0, 216 }; +static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c3_dis_sd_i2s0_modemux[] = { + { + .muxregs = i2c3_dis_sd_i2s0_muxreg, + .nmuxregs = ARRAY_SIZE(i2c3_dis_sd_i2s0_muxreg), + }, +}; + +static struct spear_pingroup i2c3_dis_sd_i2s0_pingroup = { + .name = "i2c3_dis_sd_i2s0_grp", + .pins = i2c3_dis_sd_i2s0_pins, + .npins = ARRAY_SIZE(i2c3_dis_sd_i2s0_pins), + .modemuxs = i2c3_dis_sd_i2s0_modemux, + .nmodemuxs = ARRAY_SIZE(i2c3_dis_sd_i2s0_modemux), +}; + +static const char *const i2c3_grps[] = { "i2c3_dis_smi_clcd_grp", + "i2c3_dis_sd_i2s0_grp" }; +static struct spear_function i2c3_unction = { + .name = "i2c3_i2s1", + .groups = i2c3_grps, + .ngroups = ARRAY_SIZE(i2c3_grps), +}; + +/* Pad multiplexing for i2c_4_5_dis_smi device */ +/* Muxed with SMI */ +static const unsigned i2c_4_5_dis_smi_pins[] = { 154, 155, 156, 157 }; +static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_SMI_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c_4_5_dis_smi_modemux[] = { + { + .muxregs = i2c_4_5_dis_smi_muxreg, + .nmuxregs = ARRAY_SIZE(i2c_4_5_dis_smi_muxreg), + }, +}; + +static struct spear_pingroup i2c_4_5_dis_smi_pingroup = { + .name = "i2c_4_5_dis_smi_grp", + .pins = i2c_4_5_dis_smi_pins, + .npins = ARRAY_SIZE(i2c_4_5_dis_smi_pins), + .modemuxs = i2c_4_5_dis_smi_modemux, + .nmodemuxs = ARRAY_SIZE(i2c_4_5_dis_smi_modemux), +}; + +/* Pad multiplexing for i2c4_dis_sd device */ +/* Muxed with SD/MMC */ +static const unsigned i2c4_dis_sd_pins[] = { 217, 218 }; +static struct spear_muxreg i2c4_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_MCIDATA4_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCIDATA5_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c4_dis_sd_modemux[] = { + { + .muxregs = i2c4_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c4_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup i2c4_dis_sd_pingroup = { + .name = "i2c4_dis_sd_grp", + .pins = i2c4_dis_sd_pins, + .npins = ARRAY_SIZE(i2c4_dis_sd_pins), + .modemuxs = i2c4_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c4_dis_sd_modemux), +}; + +/* Pad multiplexing for i2c5_dis_sd device */ +/* Muxed with SD/MMC */ +static const unsigned i2c5_dis_sd_pins[] = { 219, 220 }; +static struct spear_muxreg i2c5_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCIDATA6_MASK | + PMX_MCIDATA7_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c5_dis_sd_modemux[] = { + { + .muxregs = i2c5_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c5_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup i2c5_dis_sd_pingroup = { + .name = "i2c5_dis_sd_grp", + .pins = i2c5_dis_sd_pins, + .npins = ARRAY_SIZE(i2c5_dis_sd_pins), + .modemuxs = i2c5_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c5_dis_sd_modemux), +}; + +static const char *const i2c_4_5_grps[] = { "i2c5_dis_sd_grp", + "i2c4_dis_sd_grp", "i2c_4_5_dis_smi_grp" }; +static struct spear_function i2c_4_5_function = { + .name = "i2c_4_5", + .groups = i2c_4_5_grps, + .ngroups = ARRAY_SIZE(i2c_4_5_grps), +}; + +/* Pad multiplexing for i2c_6_7_dis_kbd device */ +/* Muxed with KBD */ +static const unsigned i2c_6_7_dis_kbd_pins[] = { 207, 208, 209, 210 }; +static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_KBD_ROWCOL25_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c_6_7_dis_kbd_modemux[] = { + { + .muxregs = i2c_6_7_dis_kbd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c_6_7_dis_kbd_muxreg), + }, +}; + +static struct spear_pingroup i2c_6_7_dis_kbd_pingroup = { + .name = "i2c_6_7_dis_kbd_grp", + .pins = i2c_6_7_dis_kbd_pins, + .npins = ARRAY_SIZE(i2c_6_7_dis_kbd_pins), + .modemuxs = i2c_6_7_dis_kbd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c_6_7_dis_kbd_modemux), +}; + +/* Pad multiplexing for i2c6_dis_sd device */ +/* Muxed with SD/MMC */ +static const unsigned i2c6_dis_sd_pins[] = { 236, 237 }; +static struct spear_muxreg i2c6_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCIIORDRE_MASK | + PMX_MCIIOWRWE_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c6_dis_sd_modemux[] = { + { + .muxregs = i2c6_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c6_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup i2c6_dis_sd_pingroup = { + .name = "i2c6_dis_sd_grp", + .pins = i2c6_dis_sd_pins, + .npins = ARRAY_SIZE(i2c6_dis_sd_pins), + .modemuxs = i2c6_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c6_dis_sd_modemux), +}; + +/* Pad multiplexing for i2c7_dis_sd device */ +static const unsigned i2c7_dis_sd_pins[] = { 238, 239 }; +static struct spear_muxreg i2c7_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCIRESETCF_MASK | + PMX_MCICS0CE_MASK, + .val = 0, + }, +}; + +static struct spear_modemux i2c7_dis_sd_modemux[] = { + { + .muxregs = i2c7_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(i2c7_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup i2c7_dis_sd_pingroup = { + .name = "i2c7_dis_sd_grp", + .pins = i2c7_dis_sd_pins, + .npins = ARRAY_SIZE(i2c7_dis_sd_pins), + .modemuxs = i2c7_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(i2c7_dis_sd_modemux), +}; + +static const char *const i2c_6_7_grps[] = { "i2c6_dis_sd_grp", + "i2c7_dis_sd_grp", "i2c_6_7_dis_kbd_grp" }; +static struct spear_function i2c_6_7_function = { + .name = "i2c_6_7", + .groups = i2c_6_7_grps, + .ngroups = ARRAY_SIZE(i2c_6_7_grps), +}; + +/* Pad multiplexing for can0_dis_nor device */ +/* Muxed with NOR */ +static const unsigned can0_dis_nor_pins[] = { 56, 57 }; +static struct spear_muxreg can0_dis_nor_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_NFRSTPWDWN2_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_NFRSTPWDWN3_MASK, + .val = 0, + }, +}; + +static struct spear_modemux can0_dis_nor_modemux[] = { + { + .muxregs = can0_dis_nor_muxreg, + .nmuxregs = ARRAY_SIZE(can0_dis_nor_muxreg), + }, +}; + +static struct spear_pingroup can0_dis_nor_pingroup = { + .name = "can0_dis_nor_grp", + .pins = can0_dis_nor_pins, + .npins = ARRAY_SIZE(can0_dis_nor_pins), + .modemuxs = can0_dis_nor_modemux, + .nmodemuxs = ARRAY_SIZE(can0_dis_nor_modemux), +}; + +/* Pad multiplexing for can0_dis_sd device */ +/* Muxed with SD/MMC */ +static const unsigned can0_dis_sd_pins[] = { 240, 241 }; +static struct spear_muxreg can0_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, + .val = 0, + }, +}; + +static struct spear_modemux can0_dis_sd_modemux[] = { + { + .muxregs = can0_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(can0_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup can0_dis_sd_pingroup = { + .name = "can0_dis_sd_grp", + .pins = can0_dis_sd_pins, + .npins = ARRAY_SIZE(can0_dis_sd_pins), + .modemuxs = can0_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(can0_dis_sd_modemux), +}; + +static const char *const can0_grps[] = { "can0_dis_nor_grp", "can0_dis_sd_grp" +}; +static struct spear_function can0_function = { + .name = "can0", + .groups = can0_grps, + .ngroups = ARRAY_SIZE(can0_grps), +}; + +/* Pad multiplexing for can1_dis_sd device */ +/* Muxed with SD/MMC */ +static const unsigned can1_dis_sd_pins[] = { 242, 243 }; +static struct spear_muxreg can1_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, + .val = 0, + }, +}; + +static struct spear_modemux can1_dis_sd_modemux[] = { + { + .muxregs = can1_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(can1_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup can1_dis_sd_pingroup = { + .name = "can1_dis_sd_grp", + .pins = can1_dis_sd_pins, + .npins = ARRAY_SIZE(can1_dis_sd_pins), + .modemuxs = can1_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(can1_dis_sd_modemux), +}; + +/* Pad multiplexing for can1_dis_kbd device */ +/* Muxed with KBD */ +static const unsigned can1_dis_kbd_pins[] = { 201, 202 }; +static struct spear_muxreg can1_dis_kbd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_KBD_ROWCOL25_MASK, + .val = 0, + }, +}; + +static struct spear_modemux can1_dis_kbd_modemux[] = { + { + .muxregs = can1_dis_kbd_muxreg, + .nmuxregs = ARRAY_SIZE(can1_dis_kbd_muxreg), + }, +}; + +static struct spear_pingroup can1_dis_kbd_pingroup = { + .name = "can1_dis_kbd_grp", + .pins = can1_dis_kbd_pins, + .npins = ARRAY_SIZE(can1_dis_kbd_pins), + .modemuxs = can1_dis_kbd_modemux, + .nmodemuxs = ARRAY_SIZE(can1_dis_kbd_modemux), +}; + +static const char *const can1_grps[] = { "can1_dis_sd_grp", "can1_dis_kbd_grp" +}; +static struct spear_function can1_function = { + .name = "can1", + .groups = can1_grps, + .ngroups = ARRAY_SIZE(can1_grps), +}; + +/* Pad multiplexing for pci device */ +static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, + 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, + 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; +#define PCI_SATA_MUXREG \ + { \ + .reg = PAD_FUNCTION_EN_0, \ + .mask = PMX_MCI_DATA8_15_MASK, \ + .val = 0, \ + }, { \ + .reg = PAD_FUNCTION_EN_1, \ + .mask = PMX_PCI_REG1_MASK, \ + .val = 0, \ + }, { \ + .reg = PAD_FUNCTION_EN_2, \ + .mask = PMX_PCI_REG2_MASK, \ + .val = 0, \ + } + +/* pad multiplexing for pcie0 device */ +static struct spear_muxreg pcie0_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = PCIE_CFG_VAL(0), + .val = PCIE_CFG_VAL(0), + }, +}; + +static struct spear_modemux pcie0_modemux[] = { + { + .muxregs = pcie0_muxreg, + .nmuxregs = ARRAY_SIZE(pcie0_muxreg), + }, +}; + +static struct spear_pingroup pcie0_pingroup = { + .name = "pcie0_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = pcie0_modemux, + .nmodemuxs = ARRAY_SIZE(pcie0_modemux), +}; + +/* pad multiplexing for pcie1 device */ +static struct spear_muxreg pcie1_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = PCIE_CFG_VAL(1), + .val = PCIE_CFG_VAL(1), + }, +}; + +static struct spear_modemux pcie1_modemux[] = { + { + .muxregs = pcie1_muxreg, + .nmuxregs = ARRAY_SIZE(pcie1_muxreg), + }, +}; + +static struct spear_pingroup pcie1_pingroup = { + .name = "pcie1_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = pcie1_modemux, + .nmodemuxs = ARRAY_SIZE(pcie1_modemux), +}; + +/* pad multiplexing for pcie2 device */ +static struct spear_muxreg pcie2_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = PCIE_CFG_VAL(2), + .val = PCIE_CFG_VAL(2), + }, +}; + +static struct spear_modemux pcie2_modemux[] = { + { + .muxregs = pcie2_muxreg, + .nmuxregs = ARRAY_SIZE(pcie2_muxreg), + }, +}; + +static struct spear_pingroup pcie2_pingroup = { + .name = "pcie2_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = pcie2_modemux, + .nmodemuxs = ARRAY_SIZE(pcie2_modemux), +}; + +static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" }; +static struct spear_function pci_function = { + .name = "pci", + .groups = pci_grps, + .ngroups = ARRAY_SIZE(pci_grps), +}; + +/* pad multiplexing for sata0 device */ +static struct spear_muxreg sata0_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = SATA_CFG_VAL(0), + .val = SATA_CFG_VAL(0), + }, +}; + +static struct spear_modemux sata0_modemux[] = { + { + .muxregs = sata0_muxreg, + .nmuxregs = ARRAY_SIZE(sata0_muxreg), + }, +}; + +static struct spear_pingroup sata0_pingroup = { + .name = "sata0_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = sata0_modemux, + .nmodemuxs = ARRAY_SIZE(sata0_modemux), +}; + +/* pad multiplexing for sata1 device */ +static struct spear_muxreg sata1_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = SATA_CFG_VAL(1), + .val = SATA_CFG_VAL(1), + }, +}; + +static struct spear_modemux sata1_modemux[] = { + { + .muxregs = sata1_muxreg, + .nmuxregs = ARRAY_SIZE(sata1_muxreg), + }, +}; + +static struct spear_pingroup sata1_pingroup = { + .name = "sata1_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = sata1_modemux, + .nmodemuxs = ARRAY_SIZE(sata1_modemux), +}; + +/* pad multiplexing for sata2 device */ +static struct spear_muxreg sata2_muxreg[] = { + PCI_SATA_MUXREG, + { + .reg = PCIE_SATA_CFG, + .mask = SATA_CFG_VAL(2), + .val = SATA_CFG_VAL(2), + }, +}; + +static struct spear_modemux sata2_modemux[] = { + { + .muxregs = sata2_muxreg, + .nmuxregs = ARRAY_SIZE(sata2_muxreg), + }, +}; + +static struct spear_pingroup sata2_pingroup = { + .name = "sata2_grp", + .pins = pci_sata_pins, + .npins = ARRAY_SIZE(pci_sata_pins), + .modemuxs = sata2_modemux, + .nmodemuxs = ARRAY_SIZE(sata2_modemux), +}; + +static const char *const sata_grps[] = { "sata0_grp", "sata1_grp", "sata2_grp" +}; +static struct spear_function sata_function = { + .name = "sata", + .groups = sata_grps, + .ngroups = ARRAY_SIZE(sata_grps), +}; + +/* Pad multiplexing for ssp1_dis_kbd device */ +static const unsigned ssp1_dis_kbd_pins[] = { 203, 204, 205, 206 }; +static struct spear_muxreg ssp1_dis_kbd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | + PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | + PMX_NFCE2_MASK, + .val = 0, + }, +}; + +static struct spear_modemux ssp1_dis_kbd_modemux[] = { + { + .muxregs = ssp1_dis_kbd_muxreg, + .nmuxregs = ARRAY_SIZE(ssp1_dis_kbd_muxreg), + }, +}; + +static struct spear_pingroup ssp1_dis_kbd_pingroup = { + .name = "ssp1_dis_kbd_grp", + .pins = ssp1_dis_kbd_pins, + .npins = ARRAY_SIZE(ssp1_dis_kbd_pins), + .modemuxs = ssp1_dis_kbd_modemux, + .nmodemuxs = ARRAY_SIZE(ssp1_dis_kbd_modemux), +}; + +/* Pad multiplexing for ssp1_dis_sd device */ +static const unsigned ssp1_dis_sd_pins[] = { 224, 226, 227, 228 }; +static struct spear_muxreg ssp1_dis_sd_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | + PMX_MCICECF_MASK | PMX_MCICEXD_MASK, + .val = 0, + }, +}; + +static struct spear_modemux ssp1_dis_sd_modemux[] = { + { + .muxregs = ssp1_dis_sd_muxreg, + .nmuxregs = ARRAY_SIZE(ssp1_dis_sd_muxreg), + }, +}; + +static struct spear_pingroup ssp1_dis_sd_pingroup = { + .name = "ssp1_dis_sd_grp", + .pins = ssp1_dis_sd_pins, + .npins = ARRAY_SIZE(ssp1_dis_sd_pins), + .modemuxs = ssp1_dis_sd_modemux, + .nmodemuxs = ARRAY_SIZE(ssp1_dis_sd_modemux), +}; + +static const char *const ssp1_grps[] = { "ssp1_dis_kbd_grp", + "ssp1_dis_sd_grp" }; +static struct spear_function ssp1_function = { + .name = "ssp1", + .groups = ssp1_grps, + .ngroups = ARRAY_SIZE(ssp1_grps), +}; + +/* Pad multiplexing for gpt64 device */ +static const unsigned gpt64_pins[] = { 230, 231, 232, 245 }; +static struct spear_muxreg gpt64_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK + | PMX_MCILEDS_MASK, + .val = 0, + }, +}; + +static struct spear_modemux gpt64_modemux[] = { + { + .muxregs = gpt64_muxreg, + .nmuxregs = ARRAY_SIZE(gpt64_muxreg), + }, +}; + +static struct spear_pingroup gpt64_pingroup = { + .name = "gpt64_grp", + .pins = gpt64_pins, + .npins = ARRAY_SIZE(gpt64_pins), + .modemuxs = gpt64_modemux, + .nmodemuxs = ARRAY_SIZE(gpt64_modemux), +}; + +static const char *const gpt64_grps[] = { "gpt64_grp" }; +static struct spear_function gpt64_function = { + .name = "gpt64", + .groups = gpt64_grps, + .ngroups = ARRAY_SIZE(gpt64_grps), +}; + +/* pingroups */ +static struct spear_pingroup *spear1310_pingroups[] = { + &i2c0_pingroup, + &ssp0_pingroup, + &i2s0_pingroup, + &i2s1_pingroup, + &clcd_pingroup, + &clcd_high_res_pingroup, + &arm_gpio_pingroup, + &smi_2_chips_pingroup, + &smi_4_chips_pingroup, + &gmii_pingroup, + &rgmii_pingroup, + &smii_0_1_2_pingroup, + &ras_mii_txclk_pingroup, + &nand_8bit_pingroup, + &nand_16bit_pingroup, + &nand_4_chips_pingroup, + &keyboard_6x6_pingroup, + &keyboard_rowcol6_8_pingroup, + &uart0_pingroup, + &uart0_modem_pingroup, + &gpt0_tmr0_pingroup, + &gpt0_tmr1_pingroup, + &gpt1_tmr0_pingroup, + &gpt1_tmr1_pingroup, + &sdhci_pingroup, + &cf_pingroup, + &xd_pingroup, + &touch_xy_pingroup, + &ssp0_cs0_pingroup, + &ssp0_cs1_2_pingroup, + &uart_1_dis_i2c_pingroup, + &uart_1_dis_sd_pingroup, + &uart_2_3_pingroup, + &uart_4_pingroup, + &uart_5_pingroup, + &rs485_0_1_tdm_0_1_pingroup, + &i2c_1_2_pingroup, + &i2c3_dis_smi_clcd_pingroup, + &i2c3_dis_sd_i2s0_pingroup, + &i2c_4_5_dis_smi_pingroup, + &i2c4_dis_sd_pingroup, + &i2c5_dis_sd_pingroup, + &i2c_6_7_dis_kbd_pingroup, + &i2c6_dis_sd_pingroup, + &i2c7_dis_sd_pingroup, + &can0_dis_nor_pingroup, + &can0_dis_sd_pingroup, + &can1_dis_sd_pingroup, + &can1_dis_kbd_pingroup, + &pcie0_pingroup, + &pcie1_pingroup, + &pcie2_pingroup, + &sata0_pingroup, + &sata1_pingroup, + &sata2_pingroup, + &ssp1_dis_kbd_pingroup, + &ssp1_dis_sd_pingroup, + &gpt64_pingroup, +}; + +/* functions */ +static struct spear_function *spear1310_functions[] = { + &i2c0_function, + &ssp0_function, + &i2s0_function, + &i2s1_function, + &clcd_function, + &arm_gpio_function, + &smi_function, + &gmii_function, + &rgmii_function, + &smii_0_1_2_function, + &ras_mii_txclk_function, + &nand_function, + &keyboard_function, + &uart0_function, + &gpt0_function, + &gpt1_function, + &sdhci_function, + &cf_function, + &xd_function, + &touch_xy_function, + &uart1_function, + &uart2_3_function, + &uart4_function, + &uart5_function, + &rs485_0_1_tdm_0_1_function, + &i2c_1_2_function, + &i2c3_unction, + &i2c_4_5_function, + &i2c_6_7_function, + &can0_function, + &can1_function, + &pci_function, + &sata_function, + &ssp1_function, + &gpt64_function, +}; + +static struct spear_pinctrl_machdata spear1310_machdata = { + .pins = spear1310_pins, + .npins = ARRAY_SIZE(spear1310_pins), + .groups = spear1310_pingroups, + .ngroups = ARRAY_SIZE(spear1310_pingroups), + .functions = spear1310_functions, + .nfunctions = ARRAY_SIZE(spear1310_functions), + .modes_supported = false, +}; + +static struct of_device_id spear1310_pinctrl_of_match[] __devinitdata = { + { + .compatible = "st,spear1310-pinmux", + }, + {}, +}; + +static int __devinit spear1310_pinctrl_probe(struct platform_device *pdev) +{ + return spear_pinctrl_probe(pdev, &spear1310_machdata); +} + +static int __devexit spear1310_pinctrl_remove(struct platform_device *pdev) +{ + return spear_pinctrl_remove(pdev); +} + +static struct platform_driver spear1310_pinctrl_driver = { + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = spear1310_pinctrl_of_match, + }, + .probe = spear1310_pinctrl_probe, + .remove = __devexit_p(spear1310_pinctrl_remove), +}; + +static int __init spear1310_pinctrl_init(void) +{ + return platform_driver_register(&spear1310_pinctrl_driver); +} +arch_initcall(spear1310_pinctrl_init); + +static void __exit spear1310_pinctrl_exit(void) +{ + platform_driver_unregister(&spear1310_pinctrl_driver); +} +module_exit(spear1310_pinctrl_exit); + +MODULE_AUTHOR("Viresh Kumar "); +MODULE_DESCRIPTION("ST Microelectronics SPEAr1310 pinctrl driver"); +MODULE_LICENSE("GPL v2"); +MODULE_DEVICE_TABLE(of, spear1310_pinctrl_of_match); diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c new file mode 100644 index 000000000000..a8ab2a6f51bf --- /dev/null +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c @@ -0,0 +1,1989 @@ +/* + * Driver for the ST Microelectronics SPEAr1340 pinmux + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include "pinctrl-spear.h" + +#define DRIVER_NAME "spear1340-pinmux" + +/* pins */ +static const struct pinctrl_pin_desc spear1340_pins[] = { + SPEAR_PIN_0_TO_101, + SPEAR_PIN_102_TO_245, + PINCTRL_PIN(246, "PLGPIO246"), + PINCTRL_PIN(247, "PLGPIO247"), + PINCTRL_PIN(248, "PLGPIO248"), + PINCTRL_PIN(249, "PLGPIO249"), + PINCTRL_PIN(250, "PLGPIO250"), + PINCTRL_PIN(251, "PLGPIO251"), +}; + +/* In SPEAr1340 there are two levels of pad muxing */ +/* - pads as gpio OR peripherals */ +#define PAD_FUNCTION_EN_1 0x668 +#define PAD_FUNCTION_EN_2 0x66C +#define PAD_FUNCTION_EN_3 0x670 +#define PAD_FUNCTION_EN_4 0x674 +#define PAD_FUNCTION_EN_5 0x690 +#define PAD_FUNCTION_EN_6 0x694 +#define PAD_FUNCTION_EN_7 0x698 +#define PAD_FUNCTION_EN_8 0x69C + +/* - If peripherals, then primary OR alternate peripheral */ +#define PAD_SHARED_IP_EN_1 0x6A0 +#define PAD_SHARED_IP_EN_2 0x6A4 + +/* + * Macro's for first level of pmx - pads as gpio OR peripherals. There are 8 + * registers with 32 bits each for handling gpio pads, register 8 has only 26 + * relevant bits. + */ +/* macro's for making pads as gpio's */ +#define PADS_AS_GPIO_REG0_MASK 0xFFFFFFFE +#define PADS_AS_GPIO_REGS_MASK 0xFFFFFFFF +#define PADS_AS_GPIO_REG7_MASK 0x07FFFFFF + +/* macro's for making pads as peripherals */ +#define FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK 0x00000FFE +#define UART0_ENH_AND_GPT_REG0_MASK 0x0003F000 +#define PWM1_AND_KBD_COL5_REG0_MASK 0x00040000 +#define I2C1_REG0_MASK 0x01080000 +#define SPDIF_IN_REG0_MASK 0x00100000 +#define PWM2_AND_GPT0_TMR0_CPT_REG0_MASK 0x00400000 +#define PWM3_AND_GPT0_TMR1_CLK_REG0_MASK 0x00800000 +#define PWM0_AND_SSP0_CS1_REG0_MASK 0x02000000 +#define VIP_AND_CAM3_REG0_MASK 0xFC200000 +#define VIP_AND_CAM3_REG1_MASK 0x0000000F +#define VIP_REG1_MASK 0x00001EF0 +#define VIP_AND_CAM2_REG1_MASK 0x007FE100 +#define VIP_AND_CAM1_REG1_MASK 0xFF800000 +#define VIP_AND_CAM1_REG2_MASK 0x00000003 +#define VIP_AND_CAM0_REG2_MASK 0x00001FFC +#define SMI_REG2_MASK 0x0021E000 +#define SSP0_REG2_MASK 0x001E0000 +#define TS_AND_SSP0_CS2_REG2_MASK 0x00400000 +#define UART0_REG2_MASK 0x01800000 +#define UART1_REG2_MASK 0x06000000 +#define I2S_IN_REG2_MASK 0xF8000000 +#define DEVS_GRP_AND_MIPHY_DBG_REG3_MASK 0x000001FE +#define I2S_OUT_REG3_MASK 0x000001EF +#define I2S_IN_REG3_MASK 0x00000010 +#define GMAC_REG3_MASK 0xFFFFFE00 +#define GMAC_REG4_MASK 0x0000001F +#define DEVS_GRP_AND_MIPHY_DBG_REG4_MASK 0x7FFFFF20 +#define SSP0_CS3_REG4_MASK 0x00000020 +#define I2C0_REG4_MASK 0x000000C0 +#define CEC0_REG4_MASK 0x00000100 +#define CEC1_REG4_MASK 0x00000200 +#define SPDIF_OUT_REG4_MASK 0x00000400 +#define CLCD_REG4_MASK 0x7FFFF800 +#define CLCD_AND_ARM_TRACE_REG4_MASK 0x80000000 +#define CLCD_AND_ARM_TRACE_REG5_MASK 0xFFFFFFFF +#define CLCD_AND_ARM_TRACE_REG6_MASK 0x00000001 +#define FSMC_PNOR_AND_MCIF_REG6_MASK 0x073FFFFE +#define MCIF_REG6_MASK 0xF8C00000 +#define MCIF_REG7_MASK 0x000043FF +#define FSMC_8BIT_REG7_MASK 0x07FFBC00 + +/* other registers */ +#define PERIP_CFG 0x42C + /* PERIP_CFG register masks */ + #define SSP_CS_CTL_HW 0 + #define SSP_CS_CTL_SW 1 + #define SSP_CS_CTL_MASK 1 + #define SSP_CS_CTL_SHIFT 21 + #define SSP_CS_VAL_MASK 1 + #define SSP_CS_VAL_SHIFT 20 + #define SSP_CS_SEL_CS0 0 + #define SSP_CS_SEL_CS1 1 + #define SSP_CS_SEL_CS2 2 + #define SSP_CS_SEL_MASK 3 + #define SSP_CS_SEL_SHIFT 18 + + #define I2S_CHNL_2_0 (0) + #define I2S_CHNL_3_1 (1) + #define I2S_CHNL_5_1 (2) + #define I2S_CHNL_7_1 (3) + #define I2S_CHNL_PLAY_SHIFT (4) + #define I2S_CHNL_PLAY_MASK (3 << 4) + #define I2S_CHNL_REC_SHIFT (6) + #define I2S_CHNL_REC_MASK (3 << 6) + + #define SPDIF_OUT_ENB_MASK (1 << 2) + #define SPDIF_OUT_ENB_SHIFT 2 + + #define MCIF_SEL_SD 1 + #define MCIF_SEL_CF 2 + #define MCIF_SEL_XD 3 + #define MCIF_SEL_MASK 3 + #define MCIF_SEL_SHIFT 0 + +#define GMAC_CLK_CFG 0x248 + #define GMAC_PHY_IF_GMII_VAL (0 << 3) + #define GMAC_PHY_IF_RGMII_VAL (1 << 3) + #define GMAC_PHY_IF_SGMII_VAL (2 << 3) + #define GMAC_PHY_IF_RMII_VAL (4 << 3) + #define GMAC_PHY_IF_SEL_MASK (7 << 3) + #define GMAC_PHY_INPUT_ENB_VAL 0 + #define GMAC_PHY_SYNT_ENB_VAL 1 + #define GMAC_PHY_CLK_MASK 1 + #define GMAC_PHY_CLK_SHIFT 2 + #define GMAC_PHY_125M_PAD_VAL 0 + #define GMAC_PHY_PLL2_VAL 1 + #define GMAC_PHY_OSC3_VAL 2 + #define GMAC_PHY_INPUT_CLK_MASK 3 + #define GMAC_PHY_INPUT_CLK_SHIFT 0 + +#define PCIE_SATA_CFG 0x424 + /* PCIE CFG MASks */ + #define PCIE_CFG_DEVICE_PRESENT (1 << 11) + #define PCIE_CFG_POWERUP_RESET (1 << 10) + #define PCIE_CFG_CORE_CLK_EN (1 << 9) + #define PCIE_CFG_AUX_CLK_EN (1 << 8) + #define SATA_CFG_TX_CLK_EN (1 << 4) + #define SATA_CFG_RX_CLK_EN (1 << 3) + #define SATA_CFG_POWERUP_RESET (1 << 2) + #define SATA_CFG_PM_CLK_EN (1 << 1) + #define PCIE_SATA_SEL_PCIE (0) + #define PCIE_SATA_SEL_SATA (1) + #define SATA_PCIE_CFG_MASK 0xF1F + #define PCIE_CFG_VAL (PCIE_SATA_SEL_PCIE | PCIE_CFG_AUX_CLK_EN | \ + PCIE_CFG_CORE_CLK_EN | PCIE_CFG_POWERUP_RESET |\ + PCIE_CFG_DEVICE_PRESENT) + #define SATA_CFG_VAL (PCIE_SATA_SEL_SATA | SATA_CFG_PM_CLK_EN | \ + SATA_CFG_POWERUP_RESET | SATA_CFG_RX_CLK_EN | \ + SATA_CFG_TX_CLK_EN) + +/* Macro's for second level of pmx - pads as primary OR alternate peripheral */ +/* Write 0 to enable FSMC_16_BIT */ +#define KBD_ROW_COL_MASK (1 << 0) + +/* Write 0 to enable UART0_ENH */ +#define GPT_MASK (1 << 1) /* Only clk & cpt */ + +/* Write 0 to enable PWM1 */ +#define KBD_COL5_MASK (1 << 2) + +/* Write 0 to enable PWM2 */ +#define GPT0_TMR0_CPT_MASK (1 << 3) /* Only clk & cpt */ + +/* Write 0 to enable PWM3 */ +#define GPT0_TMR1_CLK_MASK (1 << 4) /* Only clk & cpt */ + +/* Write 0 to enable PWM0 */ +#define SSP0_CS1_MASK (1 << 5) + +/* Write 0 to enable VIP */ +#define CAM3_MASK (1 << 6) + +/* Write 0 to enable VIP */ +#define CAM2_MASK (1 << 7) + +/* Write 0 to enable VIP */ +#define CAM1_MASK (1 << 8) + +/* Write 0 to enable VIP */ +#define CAM0_MASK (1 << 9) + +/* Write 0 to enable TS */ +#define SSP0_CS2_MASK (1 << 10) + +/* Write 0 to enable FSMC PNOR */ +#define MCIF_MASK (1 << 11) + +/* Write 0 to enable CLCD */ +#define ARM_TRACE_MASK (1 << 12) + +/* Write 0 to enable I2S, SSP0_CS2, CEC0, 1, SPDIF out, CLCD */ +#define MIPHY_DBG_MASK (1 << 13) + +/* + * Pad multiplexing for making all pads as gpio's. This is done to override the + * values passed from bootloader and start from scratch. + */ +static const unsigned pads_as_gpio_pins[] = { 251 }; +static struct spear_muxreg pads_as_gpio_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = PADS_AS_GPIO_REG0_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_4, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_5, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_6, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_7, + .mask = PADS_AS_GPIO_REGS_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_8, + .mask = PADS_AS_GPIO_REG7_MASK, + .val = 0x0, + }, +}; + +static struct spear_modemux pads_as_gpio_modemux[] = { + { + .muxregs = pads_as_gpio_muxreg, + .nmuxregs = ARRAY_SIZE(pads_as_gpio_muxreg), + }, +}; + +static struct spear_pingroup pads_as_gpio_pingroup = { + .name = "pads_as_gpio_grp", + .pins = pads_as_gpio_pins, + .npins = ARRAY_SIZE(pads_as_gpio_pins), + .modemuxs = pads_as_gpio_modemux, + .nmodemuxs = ARRAY_SIZE(pads_as_gpio_modemux), +}; + +static const char *const pads_as_gpio_grps[] = { "pads_as_gpio_grp" }; +static struct spear_function pads_as_gpio_function = { + .name = "pads_as_gpio", + .groups = pads_as_gpio_grps, + .ngroups = ARRAY_SIZE(pads_as_gpio_grps), +}; + +/* Pad multiplexing for fsmc_8bit device */ +static const unsigned fsmc_8bit_pins[] = { 233, 234, 235, 236, 238, 239, 240, + 241, 242, 243, 244, 245, 246, 247, 248, 249 }; +static struct spear_muxreg fsmc_8bit_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_8, + .mask = FSMC_8BIT_REG7_MASK, + .val = FSMC_8BIT_REG7_MASK, + } +}; + +static struct spear_modemux fsmc_8bit_modemux[] = { + { + .muxregs = fsmc_8bit_muxreg, + .nmuxregs = ARRAY_SIZE(fsmc_8bit_muxreg), + }, +}; + +static struct spear_pingroup fsmc_8bit_pingroup = { + .name = "fsmc_8bit_grp", + .pins = fsmc_8bit_pins, + .npins = ARRAY_SIZE(fsmc_8bit_pins), + .modemuxs = fsmc_8bit_modemux, + .nmodemuxs = ARRAY_SIZE(fsmc_8bit_modemux), +}; + +/* Pad multiplexing for fsmc_16bit device */ +static const unsigned fsmc_16bit_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }; +static struct spear_muxreg fsmc_16bit_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = KBD_ROW_COL_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK, + .val = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK, + }, +}; + +static struct spear_modemux fsmc_16bit_modemux[] = { + { + .muxregs = fsmc_16bit_muxreg, + .nmuxregs = ARRAY_SIZE(fsmc_16bit_muxreg), + }, +}; + +static struct spear_pingroup fsmc_16bit_pingroup = { + .name = "fsmc_16bit_grp", + .pins = fsmc_16bit_pins, + .npins = ARRAY_SIZE(fsmc_16bit_pins), + .modemuxs = fsmc_16bit_modemux, + .nmodemuxs = ARRAY_SIZE(fsmc_16bit_modemux), +}; + +/* pad multiplexing for fsmc_pnor device */ +static const unsigned fsmc_pnor_pins[] = { 192, 193, 194, 195, 196, 197, 198, + 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, + 215, 216, 217 }; +static struct spear_muxreg fsmc_pnor_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = MCIF_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_7, + .mask = FSMC_PNOR_AND_MCIF_REG6_MASK, + .val = FSMC_PNOR_AND_MCIF_REG6_MASK, + }, +}; + +static struct spear_modemux fsmc_pnor_modemux[] = { + { + .muxregs = fsmc_pnor_muxreg, + .nmuxregs = ARRAY_SIZE(fsmc_pnor_muxreg), + }, +}; + +static struct spear_pingroup fsmc_pnor_pingroup = { + .name = "fsmc_pnor_grp", + .pins = fsmc_pnor_pins, + .npins = ARRAY_SIZE(fsmc_pnor_pins), + .modemuxs = fsmc_pnor_modemux, + .nmodemuxs = ARRAY_SIZE(fsmc_pnor_modemux), +}; + +static const char *const fsmc_grps[] = { "fsmc_8bit_grp", "fsmc_16bit_grp", + "fsmc_pnor_grp" }; +static struct spear_function fsmc_function = { + .name = "fsmc", + .groups = fsmc_grps, + .ngroups = ARRAY_SIZE(fsmc_grps), +}; + +/* pad multiplexing for keyboard rows-cols device */ +static const unsigned keyboard_row_col_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, + 10 }; +static struct spear_muxreg keyboard_row_col_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = KBD_ROW_COL_MASK, + .val = KBD_ROW_COL_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK, + .val = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK, + }, +}; + +static struct spear_modemux keyboard_row_col_modemux[] = { + { + .muxregs = keyboard_row_col_muxreg, + .nmuxregs = ARRAY_SIZE(keyboard_row_col_muxreg), + }, +}; + +static struct spear_pingroup keyboard_row_col_pingroup = { + .name = "keyboard_row_col_grp", + .pins = keyboard_row_col_pins, + .npins = ARRAY_SIZE(keyboard_row_col_pins), + .modemuxs = keyboard_row_col_modemux, + .nmodemuxs = ARRAY_SIZE(keyboard_row_col_modemux), +}; + +/* pad multiplexing for keyboard col5 device */ +static const unsigned keyboard_col5_pins[] = { 17 }; +static struct spear_muxreg keyboard_col5_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = KBD_COL5_MASK, + .val = KBD_COL5_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM1_AND_KBD_COL5_REG0_MASK, + .val = PWM1_AND_KBD_COL5_REG0_MASK, + }, +}; + +static struct spear_modemux keyboard_col5_modemux[] = { + { + .muxregs = keyboard_col5_muxreg, + .nmuxregs = ARRAY_SIZE(keyboard_col5_muxreg), + }, +}; + +static struct spear_pingroup keyboard_col5_pingroup = { + .name = "keyboard_col5_grp", + .pins = keyboard_col5_pins, + .npins = ARRAY_SIZE(keyboard_col5_pins), + .modemuxs = keyboard_col5_modemux, + .nmodemuxs = ARRAY_SIZE(keyboard_col5_modemux), +}; + +static const char *const keyboard_grps[] = { "keyboard_row_col_grp", + "keyboard_col5_grp" }; +static struct spear_function keyboard_function = { + .name = "keyboard", + .groups = keyboard_grps, + .ngroups = ARRAY_SIZE(keyboard_grps), +}; + +/* pad multiplexing for spdif_in device */ +static const unsigned spdif_in_pins[] = { 19 }; +static struct spear_muxreg spdif_in_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = SPDIF_IN_REG0_MASK, + .val = SPDIF_IN_REG0_MASK, + }, +}; + +static struct spear_modemux spdif_in_modemux[] = { + { + .muxregs = spdif_in_muxreg, + .nmuxregs = ARRAY_SIZE(spdif_in_muxreg), + }, +}; + +static struct spear_pingroup spdif_in_pingroup = { + .name = "spdif_in_grp", + .pins = spdif_in_pins, + .npins = ARRAY_SIZE(spdif_in_pins), + .modemuxs = spdif_in_modemux, + .nmodemuxs = ARRAY_SIZE(spdif_in_modemux), +}; + +static const char *const spdif_in_grps[] = { "spdif_in_grp" }; +static struct spear_function spdif_in_function = { + .name = "spdif_in", + .groups = spdif_in_grps, + .ngroups = ARRAY_SIZE(spdif_in_grps), +}; + +/* pad multiplexing for spdif_out device */ +static const unsigned spdif_out_pins[] = { 137 }; +static struct spear_muxreg spdif_out_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_5, + .mask = SPDIF_OUT_REG4_MASK, + .val = SPDIF_OUT_REG4_MASK, + }, { + .reg = PERIP_CFG, + .mask = SPDIF_OUT_ENB_MASK, + .val = SPDIF_OUT_ENB_MASK, + } +}; + +static struct spear_modemux spdif_out_modemux[] = { + { + .muxregs = spdif_out_muxreg, + .nmuxregs = ARRAY_SIZE(spdif_out_muxreg), + }, +}; + +static struct spear_pingroup spdif_out_pingroup = { + .name = "spdif_out_grp", + .pins = spdif_out_pins, + .npins = ARRAY_SIZE(spdif_out_pins), + .modemuxs = spdif_out_modemux, + .nmodemuxs = ARRAY_SIZE(spdif_out_modemux), +}; + +static const char *const spdif_out_grps[] = { "spdif_out_grp" }; +static struct spear_function spdif_out_function = { + .name = "spdif_out", + .groups = spdif_out_grps, + .ngroups = ARRAY_SIZE(spdif_out_grps), +}; + +/* pad multiplexing for gpt_0_1 device */ +static const unsigned gpt_0_1_pins[] = { 11, 12, 13, 14, 15, 16, 21, 22 }; +static struct spear_muxreg gpt_0_1_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = GPT_MASK | GPT0_TMR0_CPT_MASK | GPT0_TMR1_CLK_MASK, + .val = GPT_MASK | GPT0_TMR0_CPT_MASK | GPT0_TMR1_CLK_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = UART0_ENH_AND_GPT_REG0_MASK | + PWM2_AND_GPT0_TMR0_CPT_REG0_MASK | + PWM3_AND_GPT0_TMR1_CLK_REG0_MASK, + .val = UART0_ENH_AND_GPT_REG0_MASK | + PWM2_AND_GPT0_TMR0_CPT_REG0_MASK | + PWM3_AND_GPT0_TMR1_CLK_REG0_MASK, + }, +}; + +static struct spear_modemux gpt_0_1_modemux[] = { + { + .muxregs = gpt_0_1_muxreg, + .nmuxregs = ARRAY_SIZE(gpt_0_1_muxreg), + }, +}; + +static struct spear_pingroup gpt_0_1_pingroup = { + .name = "gpt_0_1_grp", + .pins = gpt_0_1_pins, + .npins = ARRAY_SIZE(gpt_0_1_pins), + .modemuxs = gpt_0_1_modemux, + .nmodemuxs = ARRAY_SIZE(gpt_0_1_modemux), +}; + +static const char *const gpt_0_1_grps[] = { "gpt_0_1_grp" }; +static struct spear_function gpt_0_1_function = { + .name = "gpt_0_1", + .groups = gpt_0_1_grps, + .ngroups = ARRAY_SIZE(gpt_0_1_grps), +}; + +/* pad multiplexing for pwm0 device */ +static const unsigned pwm0_pins[] = { 24 }; +static struct spear_muxreg pwm0_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = SSP0_CS1_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM0_AND_SSP0_CS1_REG0_MASK, + .val = PWM0_AND_SSP0_CS1_REG0_MASK, + }, +}; + +static struct spear_modemux pwm0_modemux[] = { + { + .muxregs = pwm0_muxreg, + .nmuxregs = ARRAY_SIZE(pwm0_muxreg), + }, +}; + +static struct spear_pingroup pwm0_pingroup = { + .name = "pwm0_grp", + .pins = pwm0_pins, + .npins = ARRAY_SIZE(pwm0_pins), + .modemuxs = pwm0_modemux, + .nmodemuxs = ARRAY_SIZE(pwm0_modemux), +}; + +/* pad multiplexing for pwm1 device */ +static const unsigned pwm1_pins[] = { 17 }; +static struct spear_muxreg pwm1_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = KBD_COL5_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM1_AND_KBD_COL5_REG0_MASK, + .val = PWM1_AND_KBD_COL5_REG0_MASK, + }, +}; + +static struct spear_modemux pwm1_modemux[] = { + { + .muxregs = pwm1_muxreg, + .nmuxregs = ARRAY_SIZE(pwm1_muxreg), + }, +}; + +static struct spear_pingroup pwm1_pingroup = { + .name = "pwm1_grp", + .pins = pwm1_pins, + .npins = ARRAY_SIZE(pwm1_pins), + .modemuxs = pwm1_modemux, + .nmodemuxs = ARRAY_SIZE(pwm1_modemux), +}; + +/* pad multiplexing for pwm2 device */ +static const unsigned pwm2_pins[] = { 21 }; +static struct spear_muxreg pwm2_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = GPT0_TMR0_CPT_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM2_AND_GPT0_TMR0_CPT_REG0_MASK, + .val = PWM2_AND_GPT0_TMR0_CPT_REG0_MASK, + }, +}; + +static struct spear_modemux pwm2_modemux[] = { + { + .muxregs = pwm2_muxreg, + .nmuxregs = ARRAY_SIZE(pwm2_muxreg), + }, +}; + +static struct spear_pingroup pwm2_pingroup = { + .name = "pwm2_grp", + .pins = pwm2_pins, + .npins = ARRAY_SIZE(pwm2_pins), + .modemuxs = pwm2_modemux, + .nmodemuxs = ARRAY_SIZE(pwm2_modemux), +}; + +/* pad multiplexing for pwm3 device */ +static const unsigned pwm3_pins[] = { 22 }; +static struct spear_muxreg pwm3_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = GPT0_TMR1_CLK_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM3_AND_GPT0_TMR1_CLK_REG0_MASK, + .val = PWM3_AND_GPT0_TMR1_CLK_REG0_MASK, + }, +}; + +static struct spear_modemux pwm3_modemux[] = { + { + .muxregs = pwm3_muxreg, + .nmuxregs = ARRAY_SIZE(pwm3_muxreg), + }, +}; + +static struct spear_pingroup pwm3_pingroup = { + .name = "pwm3_grp", + .pins = pwm3_pins, + .npins = ARRAY_SIZE(pwm3_pins), + .modemuxs = pwm3_modemux, + .nmodemuxs = ARRAY_SIZE(pwm3_modemux), +}; + +static const char *const pwm_grps[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp", + "pwm3_grp" }; +static struct spear_function pwm_function = { + .name = "pwm", + .groups = pwm_grps, + .ngroups = ARRAY_SIZE(pwm_grps), +}; + +/* pad multiplexing for vip_mux device */ +static const unsigned vip_mux_pins[] = { 35, 36, 37, 38, 40, 41, 42, 43 }; +static struct spear_muxreg vip_mux_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_REG1_MASK, + .val = VIP_REG1_MASK, + }, +}; + +static struct spear_modemux vip_mux_modemux[] = { + { + .muxregs = vip_mux_muxreg, + .nmuxregs = ARRAY_SIZE(vip_mux_muxreg), + }, +}; + +static struct spear_pingroup vip_mux_pingroup = { + .name = "vip_mux_grp", + .pins = vip_mux_pins, + .npins = ARRAY_SIZE(vip_mux_pins), + .modemuxs = vip_mux_modemux, + .nmodemuxs = ARRAY_SIZE(vip_mux_modemux), +}; + +/* pad multiplexing for vip_mux_cam0 (disables cam0) device */ +static const unsigned vip_mux_cam0_pins[] = { 65, 66, 67, 68, 69, 70, 71, 72, + 73, 74, 75 }; +static struct spear_muxreg vip_mux_cam0_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM0_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = VIP_AND_CAM0_REG2_MASK, + .val = VIP_AND_CAM0_REG2_MASK, + }, +}; + +static struct spear_modemux vip_mux_cam0_modemux[] = { + { + .muxregs = vip_mux_cam0_muxreg, + .nmuxregs = ARRAY_SIZE(vip_mux_cam0_muxreg), + }, +}; + +static struct spear_pingroup vip_mux_cam0_pingroup = { + .name = "vip_mux_cam0_grp", + .pins = vip_mux_cam0_pins, + .npins = ARRAY_SIZE(vip_mux_cam0_pins), + .modemuxs = vip_mux_cam0_modemux, + .nmodemuxs = ARRAY_SIZE(vip_mux_cam0_modemux), +}; + +/* pad multiplexing for vip_mux_cam1 (disables cam1) device */ +static const unsigned vip_mux_cam1_pins[] = { 54, 55, 56, 57, 58, 59, 60, 61, + 62, 63, 64 }; +static struct spear_muxreg vip_mux_cam1_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM1_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM1_REG1_MASK, + .val = VIP_AND_CAM1_REG1_MASK, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = VIP_AND_CAM1_REG2_MASK, + .val = VIP_AND_CAM1_REG2_MASK, + }, +}; + +static struct spear_modemux vip_mux_cam1_modemux[] = { + { + .muxregs = vip_mux_cam1_muxreg, + .nmuxregs = ARRAY_SIZE(vip_mux_cam1_muxreg), + }, +}; + +static struct spear_pingroup vip_mux_cam1_pingroup = { + .name = "vip_mux_cam1_grp", + .pins = vip_mux_cam1_pins, + .npins = ARRAY_SIZE(vip_mux_cam1_pins), + .modemuxs = vip_mux_cam1_modemux, + .nmodemuxs = ARRAY_SIZE(vip_mux_cam1_modemux), +}; + +/* pad multiplexing for vip_mux_cam2 (disables cam2) device */ +static const unsigned vip_mux_cam2_pins[] = { 39, 44, 45, 46, 47, 48, 49, 50, + 51, 52, 53 }; +static struct spear_muxreg vip_mux_cam2_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM2_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM2_REG1_MASK, + .val = VIP_AND_CAM2_REG1_MASK, + }, +}; + +static struct spear_modemux vip_mux_cam2_modemux[] = { + { + .muxregs = vip_mux_cam2_muxreg, + .nmuxregs = ARRAY_SIZE(vip_mux_cam2_muxreg), + }, +}; + +static struct spear_pingroup vip_mux_cam2_pingroup = { + .name = "vip_mux_cam2_grp", + .pins = vip_mux_cam2_pins, + .npins = ARRAY_SIZE(vip_mux_cam2_pins), + .modemuxs = vip_mux_cam2_modemux, + .nmodemuxs = ARRAY_SIZE(vip_mux_cam2_modemux), +}; + +/* pad multiplexing for vip_mux_cam3 (disables cam3) device */ +static const unsigned vip_mux_cam3_pins[] = { 20, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34 }; +static struct spear_muxreg vip_mux_cam3_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM3_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = VIP_AND_CAM3_REG0_MASK, + .val = VIP_AND_CAM3_REG0_MASK, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM3_REG1_MASK, + .val = VIP_AND_CAM3_REG1_MASK, + }, +}; + +static struct spear_modemux vip_mux_cam3_modemux[] = { + { + .muxregs = vip_mux_cam3_muxreg, + .nmuxregs = ARRAY_SIZE(vip_mux_cam3_muxreg), + }, +}; + +static struct spear_pingroup vip_mux_cam3_pingroup = { + .name = "vip_mux_cam3_grp", + .pins = vip_mux_cam3_pins, + .npins = ARRAY_SIZE(vip_mux_cam3_pins), + .modemuxs = vip_mux_cam3_modemux, + .nmodemuxs = ARRAY_SIZE(vip_mux_cam3_modemux), +}; + +static const char *const vip_grps[] = { "vip_mux_grp", "vip_mux_cam0_grp" , + "vip_mux_cam1_grp" , "vip_mux_cam2_grp", "vip_mux_cam3_grp" }; +static struct spear_function vip_function = { + .name = "vip", + .groups = vip_grps, + .ngroups = ARRAY_SIZE(vip_grps), +}; + +/* pad multiplexing for cam0 device */ +static const unsigned cam0_pins[] = { 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75 +}; +static struct spear_muxreg cam0_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM0_MASK, + .val = CAM0_MASK, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = VIP_AND_CAM0_REG2_MASK, + .val = VIP_AND_CAM0_REG2_MASK, + }, +}; + +static struct spear_modemux cam0_modemux[] = { + { + .muxregs = cam0_muxreg, + .nmuxregs = ARRAY_SIZE(cam0_muxreg), + }, +}; + +static struct spear_pingroup cam0_pingroup = { + .name = "cam0_grp", + .pins = cam0_pins, + .npins = ARRAY_SIZE(cam0_pins), + .modemuxs = cam0_modemux, + .nmodemuxs = ARRAY_SIZE(cam0_modemux), +}; + +static const char *const cam0_grps[] = { "cam0_grp" }; +static struct spear_function cam0_function = { + .name = "cam0", + .groups = cam0_grps, + .ngroups = ARRAY_SIZE(cam0_grps), +}; + +/* pad multiplexing for cam1 device */ +static const unsigned cam1_pins[] = { 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64 +}; +static struct spear_muxreg cam1_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM1_MASK, + .val = CAM1_MASK, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM1_REG1_MASK, + .val = VIP_AND_CAM1_REG1_MASK, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = VIP_AND_CAM1_REG2_MASK, + .val = VIP_AND_CAM1_REG2_MASK, + }, +}; + +static struct spear_modemux cam1_modemux[] = { + { + .muxregs = cam1_muxreg, + .nmuxregs = ARRAY_SIZE(cam1_muxreg), + }, +}; + +static struct spear_pingroup cam1_pingroup = { + .name = "cam1_grp", + .pins = cam1_pins, + .npins = ARRAY_SIZE(cam1_pins), + .modemuxs = cam1_modemux, + .nmodemuxs = ARRAY_SIZE(cam1_modemux), +}; + +static const char *const cam1_grps[] = { "cam1_grp" }; +static struct spear_function cam1_function = { + .name = "cam1", + .groups = cam1_grps, + .ngroups = ARRAY_SIZE(cam1_grps), +}; + +/* pad multiplexing for cam2 device */ +static const unsigned cam2_pins[] = { 39, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53 +}; +static struct spear_muxreg cam2_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM2_MASK, + .val = CAM2_MASK, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM2_REG1_MASK, + .val = VIP_AND_CAM2_REG1_MASK, + }, +}; + +static struct spear_modemux cam2_modemux[] = { + { + .muxregs = cam2_muxreg, + .nmuxregs = ARRAY_SIZE(cam2_muxreg), + }, +}; + +static struct spear_pingroup cam2_pingroup = { + .name = "cam2_grp", + .pins = cam2_pins, + .npins = ARRAY_SIZE(cam2_pins), + .modemuxs = cam2_modemux, + .nmodemuxs = ARRAY_SIZE(cam2_modemux), +}; + +static const char *const cam2_grps[] = { "cam2_grp" }; +static struct spear_function cam2_function = { + .name = "cam2", + .groups = cam2_grps, + .ngroups = ARRAY_SIZE(cam2_grps), +}; + +/* pad multiplexing for cam3 device */ +static const unsigned cam3_pins[] = { 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34 +}; +static struct spear_muxreg cam3_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = CAM3_MASK, + .val = CAM3_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = VIP_AND_CAM3_REG0_MASK, + .val = VIP_AND_CAM3_REG0_MASK, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = VIP_AND_CAM3_REG1_MASK, + .val = VIP_AND_CAM3_REG1_MASK, + }, +}; + +static struct spear_modemux cam3_modemux[] = { + { + .muxregs = cam3_muxreg, + .nmuxregs = ARRAY_SIZE(cam3_muxreg), + }, +}; + +static struct spear_pingroup cam3_pingroup = { + .name = "cam3_grp", + .pins = cam3_pins, + .npins = ARRAY_SIZE(cam3_pins), + .modemuxs = cam3_modemux, + .nmodemuxs = ARRAY_SIZE(cam3_modemux), +}; + +static const char *const cam3_grps[] = { "cam3_grp" }; +static struct spear_function cam3_function = { + .name = "cam3", + .groups = cam3_grps, + .ngroups = ARRAY_SIZE(cam3_grps), +}; + +/* pad multiplexing for smi device */ +static const unsigned smi_pins[] = { 76, 77, 78, 79, 84 }; +static struct spear_muxreg smi_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_3, + .mask = SMI_REG2_MASK, + .val = SMI_REG2_MASK, + }, +}; + +static struct spear_modemux smi_modemux[] = { + { + .muxregs = smi_muxreg, + .nmuxregs = ARRAY_SIZE(smi_muxreg), + }, +}; + +static struct spear_pingroup smi_pingroup = { + .name = "smi_grp", + .pins = smi_pins, + .npins = ARRAY_SIZE(smi_pins), + .modemuxs = smi_modemux, + .nmodemuxs = ARRAY_SIZE(smi_modemux), +}; + +static const char *const smi_grps[] = { "smi_grp" }; +static struct spear_function smi_function = { + .name = "smi", + .groups = smi_grps, + .ngroups = ARRAY_SIZE(smi_grps), +}; + +/* pad multiplexing for ssp0 device */ +static const unsigned ssp0_pins[] = { 80, 81, 82, 83 }; +static struct spear_muxreg ssp0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_3, + .mask = SSP0_REG2_MASK, + .val = SSP0_REG2_MASK, + }, +}; + +static struct spear_modemux ssp0_modemux[] = { + { + .muxregs = ssp0_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_muxreg), + }, +}; + +static struct spear_pingroup ssp0_pingroup = { + .name = "ssp0_grp", + .pins = ssp0_pins, + .npins = ARRAY_SIZE(ssp0_pins), + .modemuxs = ssp0_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_modemux), +}; + +/* pad multiplexing for ssp0_cs1 device */ +static const unsigned ssp0_cs1_pins[] = { 24 }; +static struct spear_muxreg ssp0_cs1_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = SSP0_CS1_MASK, + .val = SSP0_CS1_MASK, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PWM0_AND_SSP0_CS1_REG0_MASK, + .val = PWM0_AND_SSP0_CS1_REG0_MASK, + }, +}; + +static struct spear_modemux ssp0_cs1_modemux[] = { + { + .muxregs = ssp0_cs1_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_cs1_muxreg), + }, +}; + +static struct spear_pingroup ssp0_cs1_pingroup = { + .name = "ssp0_cs1_grp", + .pins = ssp0_cs1_pins, + .npins = ARRAY_SIZE(ssp0_cs1_pins), + .modemuxs = ssp0_cs1_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_cs1_modemux), +}; + +/* pad multiplexing for ssp0_cs2 device */ +static const unsigned ssp0_cs2_pins[] = { 85 }; +static struct spear_muxreg ssp0_cs2_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = SSP0_CS2_MASK, + .val = SSP0_CS2_MASK, + }, { + .reg = PAD_FUNCTION_EN_3, + .mask = TS_AND_SSP0_CS2_REG2_MASK, + .val = TS_AND_SSP0_CS2_REG2_MASK, + }, +}; + +static struct spear_modemux ssp0_cs2_modemux[] = { + { + .muxregs = ssp0_cs2_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_cs2_muxreg), + }, +}; + +static struct spear_pingroup ssp0_cs2_pingroup = { + .name = "ssp0_cs2_grp", + .pins = ssp0_cs2_pins, + .npins = ARRAY_SIZE(ssp0_cs2_pins), + .modemuxs = ssp0_cs2_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_cs2_modemux), +}; + +/* pad multiplexing for ssp0_cs3 device */ +static const unsigned ssp0_cs3_pins[] = { 132 }; +static struct spear_muxreg ssp0_cs3_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_5, + .mask = SSP0_CS3_REG4_MASK, + .val = SSP0_CS3_REG4_MASK, + }, +}; + +static struct spear_modemux ssp0_cs3_modemux[] = { + { + .muxregs = ssp0_cs3_muxreg, + .nmuxregs = ARRAY_SIZE(ssp0_cs3_muxreg), + }, +}; + +static struct spear_pingroup ssp0_cs3_pingroup = { + .name = "ssp0_cs3_grp", + .pins = ssp0_cs3_pins, + .npins = ARRAY_SIZE(ssp0_cs3_pins), + .modemuxs = ssp0_cs3_modemux, + .nmodemuxs = ARRAY_SIZE(ssp0_cs3_modemux), +}; + +static const char *const ssp0_grps[] = { "ssp0_grp", "ssp0_cs1_grp", + "ssp0_cs2_grp", "ssp0_cs3_grp" }; +static struct spear_function ssp0_function = { + .name = "ssp0", + .groups = ssp0_grps, + .ngroups = ARRAY_SIZE(ssp0_grps), +}; + +/* pad multiplexing for uart0 device */ +static const unsigned uart0_pins[] = { 86, 87 }; +static struct spear_muxreg uart0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_3, + .mask = UART0_REG2_MASK, + .val = UART0_REG2_MASK, + }, +}; + +static struct spear_modemux uart0_modemux[] = { + { + .muxregs = uart0_muxreg, + .nmuxregs = ARRAY_SIZE(uart0_muxreg), + }, +}; + +static struct spear_pingroup uart0_pingroup = { + .name = "uart0_grp", + .pins = uart0_pins, + .npins = ARRAY_SIZE(uart0_pins), + .modemuxs = uart0_modemux, + .nmodemuxs = ARRAY_SIZE(uart0_modemux), +}; + +/* pad multiplexing for uart0_enh device */ +static const unsigned uart0_enh_pins[] = { 11, 12, 13, 14, 15, 16 }; +static struct spear_muxreg uart0_enh_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = GPT_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = UART0_ENH_AND_GPT_REG0_MASK, + .val = UART0_ENH_AND_GPT_REG0_MASK, + }, +}; + +static struct spear_modemux uart0_enh_modemux[] = { + { + .muxregs = uart0_enh_muxreg, + .nmuxregs = ARRAY_SIZE(uart0_enh_muxreg), + }, +}; + +static struct spear_pingroup uart0_enh_pingroup = { + .name = "uart0_enh_grp", + .pins = uart0_enh_pins, + .npins = ARRAY_SIZE(uart0_enh_pins), + .modemuxs = uart0_enh_modemux, + .nmodemuxs = ARRAY_SIZE(uart0_enh_modemux), +}; + +static const char *const uart0_grps[] = { "uart0_grp", "uart0_enh_grp" }; +static struct spear_function uart0_function = { + .name = "uart0", + .groups = uart0_grps, + .ngroups = ARRAY_SIZE(uart0_grps), +}; + +/* pad multiplexing for uart1 device */ +static const unsigned uart1_pins[] = { 88, 89 }; +static struct spear_muxreg uart1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_3, + .mask = UART1_REG2_MASK, + .val = UART1_REG2_MASK, + }, +}; + +static struct spear_modemux uart1_modemux[] = { + { + .muxregs = uart1_muxreg, + .nmuxregs = ARRAY_SIZE(uart1_muxreg), + }, +}; + +static struct spear_pingroup uart1_pingroup = { + .name = "uart1_grp", + .pins = uart1_pins, + .npins = ARRAY_SIZE(uart1_pins), + .modemuxs = uart1_modemux, + .nmodemuxs = ARRAY_SIZE(uart1_modemux), +}; + +static const char *const uart1_grps[] = { "uart1_grp" }; +static struct spear_function uart1_function = { + .name = "uart1", + .groups = uart1_grps, + .ngroups = ARRAY_SIZE(uart1_grps), +}; + +/* pad multiplexing for i2s_in device */ +static const unsigned i2s_in_pins[] = { 90, 91, 92, 93, 94, 99 }; +static struct spear_muxreg i2s_in_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_3, + .mask = I2S_IN_REG2_MASK, + .val = I2S_IN_REG2_MASK, + }, { + .reg = PAD_FUNCTION_EN_4, + .mask = I2S_IN_REG3_MASK, + .val = I2S_IN_REG3_MASK, + }, +}; + +static struct spear_modemux i2s_in_modemux[] = { + { + .muxregs = i2s_in_muxreg, + .nmuxregs = ARRAY_SIZE(i2s_in_muxreg), + }, +}; + +static struct spear_pingroup i2s_in_pingroup = { + .name = "i2s_in_grp", + .pins = i2s_in_pins, + .npins = ARRAY_SIZE(i2s_in_pins), + .modemuxs = i2s_in_modemux, + .nmodemuxs = ARRAY_SIZE(i2s_in_modemux), +}; + +/* pad multiplexing for i2s_out device */ +static const unsigned i2s_out_pins[] = { 95, 96, 97, 98, 100, 101, 102, 103 }; +static struct spear_muxreg i2s_out_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_4, + .mask = I2S_OUT_REG3_MASK, + .val = I2S_OUT_REG3_MASK, + }, +}; + +static struct spear_modemux i2s_out_modemux[] = { + { + .muxregs = i2s_out_muxreg, + .nmuxregs = ARRAY_SIZE(i2s_out_muxreg), + }, +}; + +static struct spear_pingroup i2s_out_pingroup = { + .name = "i2s_out_grp", + .pins = i2s_out_pins, + .npins = ARRAY_SIZE(i2s_out_pins), + .modemuxs = i2s_out_modemux, + .nmodemuxs = ARRAY_SIZE(i2s_out_modemux), +}; + +static const char *const i2s_grps[] = { "i2s_in_grp", "i2s_out_grp" }; +static struct spear_function i2s_function = { + .name = "i2s", + .groups = i2s_grps, + .ngroups = ARRAY_SIZE(i2s_grps), +}; + +/* pad multiplexing for gmac device */ +static const unsigned gmac_pins[] = { 104, 105, 106, 107, 108, 109, 110, 111, + 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, + 126, 127, 128, 129, 130, 131 }; +#define GMAC_MUXREG \ + { \ + .reg = PAD_FUNCTION_EN_4, \ + .mask = GMAC_REG3_MASK, \ + .val = GMAC_REG3_MASK, \ + }, { \ + .reg = PAD_FUNCTION_EN_5, \ + .mask = GMAC_REG4_MASK, \ + .val = GMAC_REG4_MASK, \ + } + +/* pad multiplexing for gmii device */ +static struct spear_muxreg gmii_muxreg[] = { + GMAC_MUXREG, + { + .reg = GMAC_CLK_CFG, + .mask = GMAC_PHY_IF_SEL_MASK, + .val = GMAC_PHY_IF_GMII_VAL, + }, +}; + +static struct spear_modemux gmii_modemux[] = { + { + .muxregs = gmii_muxreg, + .nmuxregs = ARRAY_SIZE(gmii_muxreg), + }, +}; + +static struct spear_pingroup gmii_pingroup = { + .name = "gmii_grp", + .pins = gmac_pins, + .npins = ARRAY_SIZE(gmac_pins), + .modemuxs = gmii_modemux, + .nmodemuxs = ARRAY_SIZE(gmii_modemux), +}; + +/* pad multiplexing for rgmii device */ +static struct spear_muxreg rgmii_muxreg[] = { + GMAC_MUXREG, + { + .reg = GMAC_CLK_CFG, + .mask = GMAC_PHY_IF_SEL_MASK, + .val = GMAC_PHY_IF_RGMII_VAL, + }, +}; + +static struct spear_modemux rgmii_modemux[] = { + { + .muxregs = rgmii_muxreg, + .nmuxregs = ARRAY_SIZE(rgmii_muxreg), + }, +}; + +static struct spear_pingroup rgmii_pingroup = { + .name = "rgmii_grp", + .pins = gmac_pins, + .npins = ARRAY_SIZE(gmac_pins), + .modemuxs = rgmii_modemux, + .nmodemuxs = ARRAY_SIZE(rgmii_modemux), +}; + +/* pad multiplexing for rmii device */ +static struct spear_muxreg rmii_muxreg[] = { + GMAC_MUXREG, + { + .reg = GMAC_CLK_CFG, + .mask = GMAC_PHY_IF_SEL_MASK, + .val = GMAC_PHY_IF_RMII_VAL, + }, +}; + +static struct spear_modemux rmii_modemux[] = { + { + .muxregs = rmii_muxreg, + .nmuxregs = ARRAY_SIZE(rmii_muxreg), + }, +}; + +static struct spear_pingroup rmii_pingroup = { + .name = "rmii_grp", + .pins = gmac_pins, + .npins = ARRAY_SIZE(gmac_pins), + .modemuxs = rmii_modemux, + .nmodemuxs = ARRAY_SIZE(rmii_modemux), +}; + +/* pad multiplexing for sgmii device */ +static struct spear_muxreg sgmii_muxreg[] = { + GMAC_MUXREG, + { + .reg = GMAC_CLK_CFG, + .mask = GMAC_PHY_IF_SEL_MASK, + .val = GMAC_PHY_IF_SGMII_VAL, + }, +}; + +static struct spear_modemux sgmii_modemux[] = { + { + .muxregs = sgmii_muxreg, + .nmuxregs = ARRAY_SIZE(sgmii_muxreg), + }, +}; + +static struct spear_pingroup sgmii_pingroup = { + .name = "sgmii_grp", + .pins = gmac_pins, + .npins = ARRAY_SIZE(gmac_pins), + .modemuxs = sgmii_modemux, + .nmodemuxs = ARRAY_SIZE(sgmii_modemux), +}; + +static const char *const gmac_grps[] = { "gmii_grp", "rgmii_grp", "rmii_grp", + "sgmii_grp" }; +static struct spear_function gmac_function = { + .name = "gmac", + .groups = gmac_grps, + .ngroups = ARRAY_SIZE(gmac_grps), +}; + +/* pad multiplexing for i2c0 device */ +static const unsigned i2c0_pins[] = { 133, 134 }; +static struct spear_muxreg i2c0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_5, + .mask = I2C0_REG4_MASK, + .val = I2C0_REG4_MASK, + }, +}; + +static struct spear_modemux i2c0_modemux[] = { + { + .muxregs = i2c0_muxreg, + .nmuxregs = ARRAY_SIZE(i2c0_muxreg), + }, +}; + +static struct spear_pingroup i2c0_pingroup = { + .name = "i2c0_grp", + .pins = i2c0_pins, + .npins = ARRAY_SIZE(i2c0_pins), + .modemuxs = i2c0_modemux, + .nmodemuxs = ARRAY_SIZE(i2c0_modemux), +}; + +static const char *const i2c0_grps[] = { "i2c0_grp" }; +static struct spear_function i2c0_function = { + .name = "i2c0", + .groups = i2c0_grps, + .ngroups = ARRAY_SIZE(i2c0_grps), +}; + +/* pad multiplexing for i2c1 device */ +static const unsigned i2c1_pins[] = { 18, 23 }; +static struct spear_muxreg i2c1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_1, + .mask = I2C1_REG0_MASK, + .val = I2C1_REG0_MASK, + }, +}; + +static struct spear_modemux i2c1_modemux[] = { + { + .muxregs = i2c1_muxreg, + .nmuxregs = ARRAY_SIZE(i2c1_muxreg), + }, +}; + +static struct spear_pingroup i2c1_pingroup = { + .name = "i2c1_grp", + .pins = i2c1_pins, + .npins = ARRAY_SIZE(i2c1_pins), + .modemuxs = i2c1_modemux, + .nmodemuxs = ARRAY_SIZE(i2c1_modemux), +}; + +static const char *const i2c1_grps[] = { "i2c1_grp" }; +static struct spear_function i2c1_function = { + .name = "i2c1", + .groups = i2c1_grps, + .ngroups = ARRAY_SIZE(i2c1_grps), +}; + +/* pad multiplexing for cec0 device */ +static const unsigned cec0_pins[] = { 135 }; +static struct spear_muxreg cec0_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_5, + .mask = CEC0_REG4_MASK, + .val = CEC0_REG4_MASK, + }, +}; + +static struct spear_modemux cec0_modemux[] = { + { + .muxregs = cec0_muxreg, + .nmuxregs = ARRAY_SIZE(cec0_muxreg), + }, +}; + +static struct spear_pingroup cec0_pingroup = { + .name = "cec0_grp", + .pins = cec0_pins, + .npins = ARRAY_SIZE(cec0_pins), + .modemuxs = cec0_modemux, + .nmodemuxs = ARRAY_SIZE(cec0_modemux), +}; + +static const char *const cec0_grps[] = { "cec0_grp" }; +static struct spear_function cec0_function = { + .name = "cec0", + .groups = cec0_grps, + .ngroups = ARRAY_SIZE(cec0_grps), +}; + +/* pad multiplexing for cec1 device */ +static const unsigned cec1_pins[] = { 136 }; +static struct spear_muxreg cec1_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_5, + .mask = CEC1_REG4_MASK, + .val = CEC1_REG4_MASK, + }, +}; + +static struct spear_modemux cec1_modemux[] = { + { + .muxregs = cec1_muxreg, + .nmuxregs = ARRAY_SIZE(cec1_muxreg), + }, +}; + +static struct spear_pingroup cec1_pingroup = { + .name = "cec1_grp", + .pins = cec1_pins, + .npins = ARRAY_SIZE(cec1_pins), + .modemuxs = cec1_modemux, + .nmodemuxs = ARRAY_SIZE(cec1_modemux), +}; + +static const char *const cec1_grps[] = { "cec1_grp" }; +static struct spear_function cec1_function = { + .name = "cec1", + .groups = cec1_grps, + .ngroups = ARRAY_SIZE(cec1_grps), +}; + +/* pad multiplexing for mcif devices */ +static const unsigned mcif_pins[] = { 193, 194, 195, 196, 197, 198, 199, 200, + 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, + 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, + 229, 230, 231, 232, 237 }; +#define MCIF_MUXREG \ + { \ + .reg = PAD_SHARED_IP_EN_1, \ + .mask = MCIF_MASK, \ + .val = MCIF_MASK, \ + }, { \ + .reg = PAD_FUNCTION_EN_7, \ + .mask = FSMC_PNOR_AND_MCIF_REG6_MASK | MCIF_REG6_MASK, \ + .val = FSMC_PNOR_AND_MCIF_REG6_MASK | MCIF_REG6_MASK, \ + }, { \ + .reg = PAD_FUNCTION_EN_8, \ + .mask = MCIF_REG7_MASK, \ + .val = MCIF_REG7_MASK, \ + } + +/* Pad multiplexing for sdhci device */ +static struct spear_muxreg sdhci_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_SD, + }, +}; + +static struct spear_modemux sdhci_modemux[] = { + { + .muxregs = sdhci_muxreg, + .nmuxregs = ARRAY_SIZE(sdhci_muxreg), + }, +}; + +static struct spear_pingroup sdhci_pingroup = { + .name = "sdhci_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = sdhci_modemux, + .nmodemuxs = ARRAY_SIZE(sdhci_modemux), +}; + +static const char *const sdhci_grps[] = { "sdhci_grp" }; +static struct spear_function sdhci_function = { + .name = "sdhci", + .groups = sdhci_grps, + .ngroups = ARRAY_SIZE(sdhci_grps), +}; + +/* Pad multiplexing for cf device */ +static struct spear_muxreg cf_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_CF, + }, +}; + +static struct spear_modemux cf_modemux[] = { + { + .muxregs = cf_muxreg, + .nmuxregs = ARRAY_SIZE(cf_muxreg), + }, +}; + +static struct spear_pingroup cf_pingroup = { + .name = "cf_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = cf_modemux, + .nmodemuxs = ARRAY_SIZE(cf_modemux), +}; + +static const char *const cf_grps[] = { "cf_grp" }; +static struct spear_function cf_function = { + .name = "cf", + .groups = cf_grps, + .ngroups = ARRAY_SIZE(cf_grps), +}; + +/* Pad multiplexing for xd device */ +static struct spear_muxreg xd_muxreg[] = { + MCIF_MUXREG, + { + .reg = PERIP_CFG, + .mask = MCIF_SEL_MASK, + .val = MCIF_SEL_XD, + }, +}; + +static struct spear_modemux xd_modemux[] = { + { + .muxregs = xd_muxreg, + .nmuxregs = ARRAY_SIZE(xd_muxreg), + }, +}; + +static struct spear_pingroup xd_pingroup = { + .name = "xd_grp", + .pins = mcif_pins, + .npins = ARRAY_SIZE(mcif_pins), + .modemuxs = xd_modemux, + .nmodemuxs = ARRAY_SIZE(xd_modemux), +}; + +static const char *const xd_grps[] = { "xd_grp" }; +static struct spear_function xd_function = { + .name = "xd", + .groups = xd_grps, + .ngroups = ARRAY_SIZE(xd_grps), +}; + +/* pad multiplexing for clcd device */ +static const unsigned clcd_pins[] = { 138, 139, 140, 141, 142, 143, 144, 145, + 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, + 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, + 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, + 188, 189, 190, 191 }; +static struct spear_muxreg clcd_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_5, + .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, + .val = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, + }, { + .reg = PAD_FUNCTION_EN_6, + .mask = CLCD_AND_ARM_TRACE_REG5_MASK, + .val = CLCD_AND_ARM_TRACE_REG5_MASK, + }, { + .reg = PAD_FUNCTION_EN_7, + .mask = CLCD_AND_ARM_TRACE_REG6_MASK, + .val = CLCD_AND_ARM_TRACE_REG6_MASK, + }, +}; + +static struct spear_modemux clcd_modemux[] = { + { + .muxregs = clcd_muxreg, + .nmuxregs = ARRAY_SIZE(clcd_muxreg), + }, +}; + +static struct spear_pingroup clcd_pingroup = { + .name = "clcd_grp", + .pins = clcd_pins, + .npins = ARRAY_SIZE(clcd_pins), + .modemuxs = clcd_modemux, + .nmodemuxs = ARRAY_SIZE(clcd_modemux), +}; + +static const char *const clcd_grps[] = { "clcd_grp" }; +static struct spear_function clcd_function = { + .name = "clcd", + .groups = clcd_grps, + .ngroups = ARRAY_SIZE(clcd_grps), +}; + +/* pad multiplexing for arm_trace device */ +static const unsigned arm_trace_pins[] = { 158, 159, 160, 161, 162, 163, 164, + 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, + 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, + 193, 194, 195, 196, 197, 198, 199, 200 }; +static struct spear_muxreg arm_trace_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = ARM_TRACE_MASK, + .val = ARM_TRACE_MASK, + }, { + .reg = PAD_FUNCTION_EN_5, + .mask = CLCD_AND_ARM_TRACE_REG4_MASK, + .val = CLCD_AND_ARM_TRACE_REG4_MASK, + }, { + .reg = PAD_FUNCTION_EN_6, + .mask = CLCD_AND_ARM_TRACE_REG5_MASK, + .val = CLCD_AND_ARM_TRACE_REG5_MASK, + }, { + .reg = PAD_FUNCTION_EN_7, + .mask = CLCD_AND_ARM_TRACE_REG6_MASK, + .val = CLCD_AND_ARM_TRACE_REG6_MASK, + }, +}; + +static struct spear_modemux arm_trace_modemux[] = { + { + .muxregs = arm_trace_muxreg, + .nmuxregs = ARRAY_SIZE(arm_trace_muxreg), + }, +}; + +static struct spear_pingroup arm_trace_pingroup = { + .name = "arm_trace_grp", + .pins = arm_trace_pins, + .npins = ARRAY_SIZE(arm_trace_pins), + .modemuxs = arm_trace_modemux, + .nmodemuxs = ARRAY_SIZE(arm_trace_modemux), +}; + +static const char *const arm_trace_grps[] = { "arm_trace_grp" }; +static struct spear_function arm_trace_function = { + .name = "arm_trace", + .groups = arm_trace_grps, + .ngroups = ARRAY_SIZE(arm_trace_grps), +}; + +/* pad multiplexing for miphy_dbg device */ +static const unsigned miphy_dbg_pins[] = { 96, 97, 98, 99, 100, 101, 102, 103, + 132, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, + 148, 149, 150, 151, 152, 153, 154, 155, 156, 157 }; +static struct spear_muxreg miphy_dbg_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = MIPHY_DBG_MASK, + .val = MIPHY_DBG_MASK, + }, { + .reg = PAD_FUNCTION_EN_5, + .mask = DEVS_GRP_AND_MIPHY_DBG_REG4_MASK, + .val = DEVS_GRP_AND_MIPHY_DBG_REG4_MASK, + }, +}; + +static struct spear_modemux miphy_dbg_modemux[] = { + { + .muxregs = miphy_dbg_muxreg, + .nmuxregs = ARRAY_SIZE(miphy_dbg_muxreg), + }, +}; + +static struct spear_pingroup miphy_dbg_pingroup = { + .name = "miphy_dbg_grp", + .pins = miphy_dbg_pins, + .npins = ARRAY_SIZE(miphy_dbg_pins), + .modemuxs = miphy_dbg_modemux, + .nmodemuxs = ARRAY_SIZE(miphy_dbg_modemux), +}; + +static const char *const miphy_dbg_grps[] = { "miphy_dbg_grp" }; +static struct spear_function miphy_dbg_function = { + .name = "miphy_dbg", + .groups = miphy_dbg_grps, + .ngroups = ARRAY_SIZE(miphy_dbg_grps), +}; + +/* pad multiplexing for pcie device */ +static const unsigned pcie_pins[] = { 250 }; +static struct spear_muxreg pcie_muxreg[] = { + { + .reg = PCIE_SATA_CFG, + .mask = SATA_PCIE_CFG_MASK, + .val = PCIE_CFG_VAL, + }, +}; + +static struct spear_modemux pcie_modemux[] = { + { + .muxregs = pcie_muxreg, + .nmuxregs = ARRAY_SIZE(pcie_muxreg), + }, +}; + +static struct spear_pingroup pcie_pingroup = { + .name = "pcie_grp", + .pins = pcie_pins, + .npins = ARRAY_SIZE(pcie_pins), + .modemuxs = pcie_modemux, + .nmodemuxs = ARRAY_SIZE(pcie_modemux), +}; + +static const char *const pcie_grps[] = { "pcie_grp" }; +static struct spear_function pcie_function = { + .name = "pcie", + .groups = pcie_grps, + .ngroups = ARRAY_SIZE(pcie_grps), +}; + +/* pad multiplexing for sata device */ +static const unsigned sata_pins[] = { 250 }; +static struct spear_muxreg sata_muxreg[] = { + { + .reg = PCIE_SATA_CFG, + .mask = SATA_PCIE_CFG_MASK, + .val = SATA_CFG_VAL, + }, +}; + +static struct spear_modemux sata_modemux[] = { + { + .muxregs = sata_muxreg, + .nmuxregs = ARRAY_SIZE(sata_muxreg), + }, +}; + +static struct spear_pingroup sata_pingroup = { + .name = "sata_grp", + .pins = sata_pins, + .npins = ARRAY_SIZE(sata_pins), + .modemuxs = sata_modemux, + .nmodemuxs = ARRAY_SIZE(sata_modemux), +}; + +static const char *const sata_grps[] = { "sata_grp" }; +static struct spear_function sata_function = { + .name = "sata", + .groups = sata_grps, + .ngroups = ARRAY_SIZE(sata_grps), +}; + +/* pingroups */ +static struct spear_pingroup *spear1340_pingroups[] = { + &pads_as_gpio_pingroup, + &fsmc_8bit_pingroup, + &fsmc_16bit_pingroup, + &fsmc_pnor_pingroup, + &keyboard_row_col_pingroup, + &keyboard_col5_pingroup, + &spdif_in_pingroup, + &spdif_out_pingroup, + &gpt_0_1_pingroup, + &pwm0_pingroup, + &pwm1_pingroup, + &pwm2_pingroup, + &pwm3_pingroup, + &vip_mux_pingroup, + &vip_mux_cam0_pingroup, + &vip_mux_cam1_pingroup, + &vip_mux_cam2_pingroup, + &vip_mux_cam3_pingroup, + &cam0_pingroup, + &cam1_pingroup, + &cam2_pingroup, + &cam3_pingroup, + &smi_pingroup, + &ssp0_pingroup, + &ssp0_cs1_pingroup, + &ssp0_cs2_pingroup, + &ssp0_cs3_pingroup, + &uart0_pingroup, + &uart0_enh_pingroup, + &uart1_pingroup, + &i2s_in_pingroup, + &i2s_out_pingroup, + &gmii_pingroup, + &rgmii_pingroup, + &rmii_pingroup, + &sgmii_pingroup, + &i2c0_pingroup, + &i2c1_pingroup, + &cec0_pingroup, + &cec1_pingroup, + &sdhci_pingroup, + &cf_pingroup, + &xd_pingroup, + &clcd_pingroup, + &arm_trace_pingroup, + &miphy_dbg_pingroup, + &pcie_pingroup, + &sata_pingroup, +}; + +/* functions */ +static struct spear_function *spear1340_functions[] = { + &pads_as_gpio_function, + &fsmc_function, + &keyboard_function, + &spdif_in_function, + &spdif_out_function, + &gpt_0_1_function, + &pwm_function, + &vip_function, + &cam0_function, + &cam1_function, + &cam2_function, + &cam3_function, + &smi_function, + &ssp0_function, + &uart0_function, + &uart1_function, + &i2s_function, + &gmac_function, + &i2c0_function, + &i2c1_function, + &cec0_function, + &cec1_function, + &sdhci_function, + &cf_function, + &xd_function, + &clcd_function, + &arm_trace_function, + &miphy_dbg_function, + &pcie_function, + &sata_function, +}; + +static struct spear_pinctrl_machdata spear1340_machdata = { + .pins = spear1340_pins, + .npins = ARRAY_SIZE(spear1340_pins), + .groups = spear1340_pingroups, + .ngroups = ARRAY_SIZE(spear1340_pingroups), + .functions = spear1340_functions, + .nfunctions = ARRAY_SIZE(spear1340_functions), + .modes_supported = false, +}; + +static struct of_device_id spear1340_pinctrl_of_match[] __devinitdata = { + { + .compatible = "st,spear1340-pinmux", + }, + {}, +}; + +static int __devinit spear1340_pinctrl_probe(struct platform_device *pdev) +{ + return spear_pinctrl_probe(pdev, &spear1340_machdata); +} + +static int __devexit spear1340_pinctrl_remove(struct platform_device *pdev) +{ + return spear_pinctrl_remove(pdev); +} + +static struct platform_driver spear1340_pinctrl_driver = { + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = spear1340_pinctrl_of_match, + }, + .probe = spear1340_pinctrl_probe, + .remove = __devexit_p(spear1340_pinctrl_remove), +}; + +static int __init spear1340_pinctrl_init(void) +{ + return platform_driver_register(&spear1340_pinctrl_driver); +} +arch_initcall(spear1340_pinctrl_init); + +static void __exit spear1340_pinctrl_exit(void) +{ + platform_driver_unregister(&spear1340_pinctrl_driver); +} +module_exit(spear1340_pinctrl_exit); + +MODULE_AUTHOR("Viresh Kumar "); +MODULE_DESCRIPTION("ST Microelectronics SPEAr1340 pinctrl driver"); +MODULE_LICENSE("GPL v2"); +MODULE_DEVICE_TABLE(of, spear1340_pinctrl_of_match); -- cgit v1.2.2 From eb3f995d7e73fd78b8fcdc55cfbf01a74a09a6e8 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 27 Apr 2012 17:05:10 +0530 Subject: pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res Signed-off-by: Viresh Kumar Acked-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-spear1310.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index 12b094dc806f..fff168be7f00 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c @@ -437,7 +437,7 @@ static struct spear_pingroup clcd_pingroup = { }; static const unsigned clcd_high_res_pins[] = { 30, 31, 32, 33, 34, 35, 36, 37, - 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52 }; + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53 }; static struct spear_muxreg clcd_high_res_muxreg[] = { { .reg = PAD_FUNCTION_EN_1, -- cgit v1.2.2 From b409ebfb14a71b64e11b156dc82ede698480397e Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 10 May 2012 12:17:40 +0200 Subject: dmaengine: at_hdmac: remove ATC_DEFAULT_CTRLA constant Not needed constant that was set to 0. Signed-off-by: Nicolas Ferre Signed-off-by: Vinod Koul --- drivers/dma/at_hdmac.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index bf0d7e4e345b..c057309c8ae5 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -39,7 +39,6 @@ */ #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) -#define ATC_DEFAULT_CTRLA (0) #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ |ATC_DIF(AT_DMA_MEM_IF)) @@ -574,7 +573,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, return NULL; } - ctrla = ATC_DEFAULT_CTRLA; ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN | ATC_SRC_ADDR_MODE_INCR | ATC_DST_ADDR_MODE_INCR @@ -585,13 +583,13 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, * of the most common optimization. */ if (!((src | dest | len) & 3)) { - ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; + ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; src_width = dst_width = 2; } else if (!((src | dest | len) & 1)) { - ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; + ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; src_width = dst_width = 1; } else { - ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; + ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; src_width = dst_width = 0; } @@ -668,7 +666,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, return NULL; } - ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; + ctrla = atslave->ctrla; ctrlb = ATC_IEN; switch (direction) { @@ -801,7 +799,7 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, u32 ctrla; /* prepare common CRTLA value */ - ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla + ctrla = atslave->ctrla | ATC_DST_WIDTH(reg_width) | ATC_SRC_WIDTH(reg_width) | period_len >> reg_width; -- cgit v1.2.2 From 1dd1ea8eb46a71201943148cc0ed3182cd04e288 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 10 May 2012 12:17:41 +0200 Subject: dmaengine: at_hdmac: take maxburst from slave configuration The maxburst/chunk size was taken from the private slave DMA data structure. Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst values. The ctrla field is not needed anymore in the slave private structure nor the header constants that were located in an architecture specific directory. The at91sam9g45_devices.c file that was using this platform data is also modified to remove this now useless data. Signed-off-by: Nicolas Ferre Signed-off-by: Vinod Koul --- drivers/dma/at_hdmac.c | 7 ++++--- drivers/dma/at_hdmac_regs.h | 21 ++++++++++++++++++++- 2 files changed, 24 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index c057309c8ae5..7292aa87b2dd 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -666,7 +666,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, return NULL; } - ctrla = atslave->ctrla; + ctrla = ATC_SCSIZE(sconfig->src_maxburst) + | ATC_DCSIZE(sconfig->dst_maxburst); ctrlb = ATC_IEN; switch (direction) { @@ -794,12 +795,12 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, enum dma_transfer_direction direction) { struct at_dma_chan *atchan = to_at_dma_chan(chan); - struct at_dma_slave *atslave = chan->private; struct dma_slave_config *sconfig = &atchan->dma_sconfig; u32 ctrla; /* prepare common CRTLA value */ - ctrla = atslave->ctrla + ctrla = ATC_SCSIZE(sconfig->src_maxburst) + | ATC_DCSIZE(sconfig->dst_maxburst) | ATC_DST_WIDTH(reg_width) | ATC_SRC_WIDTH(reg_width) | period_len >> reg_width; diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h index 897a8bcaec90..8a6c8e8b2940 100644 --- a/drivers/dma/at_hdmac_regs.h +++ b/drivers/dma/at_hdmac_regs.h @@ -87,7 +87,26 @@ /* Bitfields in CTRLA */ #define ATC_BTSIZE_MAX 0xFFFFUL /* Maximum Buffer Transfer Size */ #define ATC_BTSIZE(x) (ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */ -/* Chunck Tranfer size definitions are in at_hdmac.h */ +#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */ +#define ATC_SCSIZE(x) (ATC_SCSIZE_MASK & ((x) << 16)) +#define ATC_SCSIZE_1 (0x0 << 16) +#define ATC_SCSIZE_4 (0x1 << 16) +#define ATC_SCSIZE_8 (0x2 << 16) +#define ATC_SCSIZE_16 (0x3 << 16) +#define ATC_SCSIZE_32 (0x4 << 16) +#define ATC_SCSIZE_64 (0x5 << 16) +#define ATC_SCSIZE_128 (0x6 << 16) +#define ATC_SCSIZE_256 (0x7 << 16) +#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */ +#define ATC_DCSIZE(x) (ATC_DCSIZE_MASK & ((x) << 20)) +#define ATC_DCSIZE_1 (0x0 << 20) +#define ATC_DCSIZE_4 (0x1 << 20) +#define ATC_DCSIZE_8 (0x2 << 20) +#define ATC_DCSIZE_16 (0x3 << 20) +#define ATC_DCSIZE_32 (0x4 << 20) +#define ATC_DCSIZE_64 (0x5 << 20) +#define ATC_DCSIZE_128 (0x6 << 20) +#define ATC_DCSIZE_256 (0x7 << 20) #define ATC_SRC_WIDTH_MASK (0x3 << 24) /* Source Single Transfer Size */ #define ATC_SRC_WIDTH(x) ((x) << 24) #define ATC_SRC_WIDTH_BYTE (0x0 << 24) -- cgit v1.2.2 From 7f217794ffa72f208a250b79ab0b7ea3de19677f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 13 May 2012 00:14:24 -0400 Subject: mmc: dt: Consolidate DT bindings This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: Chris Ball Signed-off-by: Arnd Bergmann --- drivers/mmc/host/omap_hsmmc.c | 2 +- drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- drivers/mmc/host/sdhci-pltfm.c | 8 ++++++-- 3 files changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 56d4499d4388..33e81c24e140 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1766,7 +1766,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) pdata->slots[0].nonremovable = true; pdata->slots[0].no_regulator_off_init = true; } - of_property_read_u32(np, "ti,bus-width", &bus_width); + of_property_read_u32(np, "bus-width", &bus_width); if (bus_width == 4) pdata->slots[0].caps |= MMC_CAP_4_BIT_DATA; else if (bus_width == 8) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 8abdaf6697a8..0d2b082f2246 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -402,7 +402,7 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, if (!np) return -ENODEV; - if (of_get_property(np, "fsl,card-wired", NULL)) + if (of_get_property(np, "non-removable", NULL)) boarddata->cd_type = ESDHC_CD_PERMANENT; if (of_get_property(np, "fsl,cd-controller", NULL)) diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index c5c2a48bdd94..d9a4ef4f1ed0 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -42,7 +42,8 @@ static struct sdhci_ops sdhci_pltfm_ops = { #ifdef CONFIG_OF static bool sdhci_of_wp_inverted(struct device_node *np) { - if (of_get_property(np, "sdhci,wp-inverted", NULL)) + if (of_get_property(np, "sdhci,wp-inverted", NULL) || + of_get_property(np, "wp-inverted", NULL)) return true; /* Old device trees don't have the wp-inverted property. */ @@ -59,13 +60,16 @@ void sdhci_get_of_property(struct platform_device *pdev) struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); const __be32 *clk; + u32 bus_width; int size; if (of_device_is_available(np)) { if (of_get_property(np, "sdhci,auto-cmd12", NULL)) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; - if (of_get_property(np, "sdhci,1-bit-only", NULL)) + if (of_get_property(np, "sdhci,1-bit-only", NULL) || + (of_property_read_u32(np, "bus-width", &bus_width) == 0 && + bus_width == 1)) host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; if (sdhci_of_wp_inverted(np)) -- cgit v1.2.2 From cc06748cf00e6a4accb18c1b70079dccffc69c37 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Tue, 28 Feb 2012 19:24:44 -0500 Subject: SERIAL: MIPS DECstation zs.c driver needs module.h This driver is a module and needs module.h, otherwise it will break when we remove a bogus usage of module.h from one of the other MIPS headers. Signed-off-by: Paul Gortmaker Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3446/ Signed-off-by: Ralf Baechle --- drivers/tty/serial/zs.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/tty/serial/zs.c b/drivers/tty/serial/zs.c index 4001eee6c08d..92c00b24d0df 100644 --- a/drivers/tty/serial/zs.c +++ b/drivers/tty/serial/zs.c @@ -57,6 +57,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.2 From 346f81a9a9726740461480e257366c47fbcfdaa3 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Tue, 28 Feb 2012 19:24:45 -0500 Subject: SERIAL: MIPS Swarm sb1250-duart.c driver needs module.h This driver is a module and needs module.h, otherwise it will break when we remove a bogus usage of module.h from one of the other MIPS headers. Signed-off-by: Paul Gortmaker Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3447/ Signed-off-by: Ralf Baechle --- drivers/tty/serial/sb1250-duart.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/tty/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c index 0be8a2f00d0b..f76b1688c5c8 100644 --- a/drivers/tty/serial/sb1250-duart.c +++ b/drivers/tty/serial/sb1250-duart.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.2 From 1df5c939f6d9dff7dfbe108d93133b9636baa607 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 18 Apr 2012 09:07:12 +0100 Subject: clk: Provide dummy clk_unregister() While there's no actual implementation behind it having the call to use in drivers makes them feel neater from a driver author point of view. An actual implementation can wait for someone who needs to use the function in a real system. Signed-off-by: Mark Brown [mturquette@linaro.org: void return type instead of int -EINVAL] Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e5d5dc13bcfd..a7e5dd59e19d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1420,6 +1420,15 @@ fail_out: } EXPORT_SYMBOL_GPL(clk_register); +/** + * clk_unregister - unregister a currently registered clock + * @clk: clock to unregister + * + * Currently unimplemented. + */ +void clk_unregister(struct clk *clk) {} +EXPORT_SYMBOL_GPL(clk_unregister); + /*** clk rate change notifiers ***/ /** -- cgit v1.2.2 From f10590c9836c9fc595d1dafff965b280029d4f16 Mon Sep 17 00:00:00 2001 From: Sangsu Park Date: Tue, 24 Apr 2012 14:44:58 -0700 Subject: ARM: EXYNOS: add GPC4 bank instance Add GPC4 bank instance which is included in rev1 of EXYNOS5. Signed-off-by: Sangsu Park Signed-off-by: Thomas Abraham Acked-by: Grant Likely Signed-off-by: Kukjin Kim --- drivers/gpio/gpio-samsung.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index e991d9171961..f88bb9f919a8 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -2452,6 +2452,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = { .ngpio = EXYNOS5_GPIO_C3_NR, .label = "GPC3", }, + }, { + .chip = { + .base = EXYNOS5_GPC4(0), + .ngpio = EXYNOS5_GPIO_C4_NR, + .label = "GPC4", + }, }, { .chip = { .base = EXYNOS5_GPD0(0), @@ -2878,8 +2884,11 @@ static __init int samsung_gpiolib_init(void) goto err_ioremap1; } + /* need to set base address for gpc4 */ + exynos5_gpios_1[11].base = gpio_base1 + 0x2E0; + /* need to set base address for gpx */ - chip = &exynos5_gpios_1[20]; + chip = &exynos5_gpios_1[21]; gpx_base = gpio_base1 + 0xC00; for (i = 0; i < 4; i++, chip++, gpx_base += 0x20) chip->base = gpx_base; -- cgit v1.2.2 From 7e0fa1b5fa91d9aa456d102c273b2cf0f2e95d39 Mon Sep 17 00:00:00 2001 From: Saravana Kannan Date: Tue, 15 May 2012 13:43:42 -0700 Subject: clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate(). The clk_set_rate() code shouldn't check the clock's enable count when validating CLK_SET_RATE_GATE flag since the enable count could change after the validation. Similar to clk_set_parent(), it should instead check the prepare count. The prepare count should go to zero only when the end user expects the clock to not be enabled in the future. Since the code already grabs the prepare count before validation, it's not possible for prepare count to change after validation and by association not possible for a well behaving end user to enable the clock while the set rate is in progress. Signed-off-by: Saravana Kannan Reviewed-by: Richard Zhao Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a7e5dd59e19d..687b00d67c8a 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -903,7 +903,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (rate == clk->rate) goto out; - if ((clk->flags & CLK_SET_RATE_GATE) && __clk_is_enabled(clk)) { + if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) { ret = -EBUSY; goto out; } -- cgit v1.2.2 From b01a4f1ce2cde9acd97ce5c06e35bc9c1eacded7 Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Tue, 8 May 2012 17:05:33 +0530 Subject: mmc: omap: convert to per instance workqueue Currently, a global mmc_omap_wq is created for all instances of omap hosts, which can lead to races and doesn't lend itself to unload the module cleanly. Instead, create per instance workqueue and remove the common workqueue. Signed-off-by: Venkatraman S Acked-by: Balaji T K Signed-off-by: Chris Ball --- drivers/mmc/host/omap.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 887c0e598cf3..2d7628eee3d3 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -169,11 +169,11 @@ struct mmc_omap_host { struct timer_list clk_timer; spinlock_t clk_lock; /* for changing enabled state */ unsigned int fclk_enabled:1; + struct workqueue_struct *mmc_omap_wq; struct omap_mmc_platform_data *pdata; }; -static struct workqueue_struct *mmc_omap_wq; static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) { @@ -291,7 +291,7 @@ static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled) host->next_slot = new_slot; host->mmc = new_slot->mmc; spin_unlock_irqrestore(&host->slot_lock, flags); - queue_work(mmc_omap_wq, &host->slot_release_work); + queue_work(host->mmc_omap_wq, &host->slot_release_work); return; } @@ -459,7 +459,7 @@ mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) } host->stop_data = data; - queue_work(mmc_omap_wq, &host->send_stop_work); + queue_work(host->mmc_omap_wq, &host->send_stop_work); } static void @@ -639,7 +639,7 @@ mmc_omap_cmd_timer(unsigned long data) OMAP_MMC_WRITE(host, IE, 0); disable_irq(host->irq); host->abort = 1; - queue_work(mmc_omap_wq, &host->cmd_abort_work); + queue_work(host->mmc_omap_wq, &host->cmd_abort_work); } spin_unlock_irqrestore(&host->slot_lock, flags); } @@ -828,7 +828,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id) host->abort = 1; OMAP_MMC_WRITE(host, IE, 0); disable_irq_nosync(host->irq); - queue_work(mmc_omap_wq, &host->cmd_abort_work); + queue_work(host->mmc_omap_wq, &host->cmd_abort_work); return IRQ_HANDLED; } @@ -1389,7 +1389,7 @@ static void mmc_omap_remove_slot(struct mmc_omap_slot *slot) tasklet_kill(&slot->cover_tasklet); del_timer_sync(&slot->cover_timer); - flush_workqueue(mmc_omap_wq); + flush_workqueue(slot->host->mmc_omap_wq); mmc_remove_host(mmc); mmc_free_host(mmc); @@ -1497,6 +1497,10 @@ static int __init mmc_omap_probe(struct platform_device *pdev) host->reg_shift = (cpu_is_omap7xx() ? 1 : 2); + host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0); + if (!host->mmc_omap_wq) + goto err_plat_cleanup; + return 0; err_plat_cleanup: @@ -1542,6 +1546,7 @@ static int mmc_omap_remove(struct platform_device *pdev) iounmap(host->virt_base); release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start + 1); + destroy_workqueue(host->mmc_omap_wq); kfree(host); @@ -1610,22 +1615,12 @@ static struct platform_driver mmc_omap_driver = { static int __init mmc_omap_init(void) { - int ret; - - mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0); - if (!mmc_omap_wq) - return -ENOMEM; - - ret = platform_driver_probe(&mmc_omap_driver, mmc_omap_probe); - if (ret) - destroy_workqueue(mmc_omap_wq); - return ret; + return platform_driver_probe(&mmc_omap_driver, mmc_omap_probe); } static void __exit mmc_omap_exit(void) { platform_driver_unregister(&mmc_omap_driver); - destroy_workqueue(mmc_omap_wq); } module_init(mmc_omap_init); -- cgit v1.2.2 From b6e0703bbf0121cd6440277a0604d860f5734b2c Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Tue, 8 May 2012 17:05:34 +0530 Subject: mmc: omap: make it behave well as a module Use proper __devinit and __devexit annotation for driver functions. Instantiate the probe function for driver_ops instead of a probe in the register function. Signed-off-by: Venkatraman S Acked-by: Balaji T K Signed-off-by: Chris Ball --- drivers/mmc/host/omap.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 2d7628eee3d3..0056bd8acc83 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1395,7 +1395,7 @@ static void mmc_omap_remove_slot(struct mmc_omap_slot *slot) mmc_free_host(mmc); } -static int __init mmc_omap_probe(struct platform_device *pdev) +static int __devinit mmc_omap_probe(struct platform_device *pdev) { struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; struct mmc_omap_host *host = NULL; @@ -1522,7 +1522,7 @@ err_free_mem_region: return ret; } -static int mmc_omap_remove(struct platform_device *pdev) +static int __devexit mmc_omap_remove(struct platform_device *pdev) { struct mmc_omap_host *host = platform_get_drvdata(pdev); int i; @@ -1604,7 +1604,8 @@ static int mmc_omap_resume(struct platform_device *pdev) #endif static struct platform_driver mmc_omap_driver = { - .remove = mmc_omap_remove, + .probe = mmc_omap_probe, + .remove = __devexit_p(mmc_omap_remove), .suspend = mmc_omap_suspend, .resume = mmc_omap_resume, .driver = { @@ -1615,7 +1616,7 @@ static struct platform_driver mmc_omap_driver = { static int __init mmc_omap_init(void) { - return platform_driver_probe(&mmc_omap_driver, mmc_omap_probe); + return platform_driver_register(&mmc_omap_driver); } static void __exit mmc_omap_exit(void) -- cgit v1.2.2 From 680f1b5b216af1ae051bdf237e3ea47ba9124876 Mon Sep 17 00:00:00 2001 From: Venkatraman S Date: Tue, 8 May 2012 17:05:35 +0530 Subject: mmc: omap: convert to module_platform_driver Get rid of boilerplate code by using module_platform_driver macro, no functional changes. Signed-off-by: Venkatraman S Acked-by: Balaji T K Signed-off-by: Chris Ball --- drivers/mmc/host/omap.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 0056bd8acc83..552196c764d4 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1614,19 +1614,7 @@ static struct platform_driver mmc_omap_driver = { }, }; -static int __init mmc_omap_init(void) -{ - return platform_driver_register(&mmc_omap_driver); -} - -static void __exit mmc_omap_exit(void) -{ - platform_driver_unregister(&mmc_omap_driver); -} - -module_init(mmc_omap_init); -module_exit(mmc_omap_exit); - +module_platform_driver(mmc_omap_driver); MODULE_DESCRIPTION("OMAP Multimedia Card driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:" DRIVER_NAME); -- cgit v1.2.2 From 705ad0472bd55fa38e6c594b2d6318c31e86068a Mon Sep 17 00:00:00 2001 From: Kyoungil Kim Date: Mon, 14 May 2012 17:38:48 +0900 Subject: mmc: dw_mmc: Fixed sdio interrupt mask bit setting bug The sdio interrupt mask bits are arranged in [31:16]. (1 << SDMMC_INT_SDIO(slot->id))) does 16 bits left shift twice. So this patch changes to do 16 bits left shift only one time. Signed-off-by: Kyoungil Kim Acked-by: Shashidhar Hiremath Acked-by: Will Newton Signed-off-by: Chris Ball --- drivers/mmc/host/dw_mmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 1532357787cb..9bbf45f8c538 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -857,10 +857,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) int_mask = mci_readl(host, INTMASK); if (enb) { mci_writel(host, INTMASK, - (int_mask | (1 << SDMMC_INT_SDIO(slot->id)))); + (int_mask | SDMMC_INT_SDIO(slot->id))); } else { mci_writel(host, INTMASK, - (int_mask & ~(1 << SDMMC_INT_SDIO(slot->id)))); + (int_mask & ~SDMMC_INT_SDIO(slot->id))); } } -- cgit v1.2.2 From 7a90dcc2d7ceb64bb37044a8d2ee462b936ddf73 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 16 May 2012 15:25:58 +0200 Subject: mmc: atmel-mci: the r/w proof capability lack was not well managed First mci IPs (mainly on rm9200 and 9261) don't have the r/w proof capability. The driver didn't work correctly without this capability in PDC mode because of the double buffer switch which is too slow even if we stop the transfer to perform this switch. Signed-off-by: Ludovic Desroches Signed-off-by: Chris Ball --- drivers/mmc/host/atmel-mci.c | 92 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 78 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index e94476beca18..6f56ef025ab5 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -91,6 +91,11 @@ struct atmel_mci_dma { * @regs: Pointer to MMIO registers. * @sg: Scatterlist entry currently being processed by PIO or PDC code. * @pio_offset: Offset into the current scatterlist entry. + * @buffer: Buffer used if we don't have the r/w proof capability. We + * don't have the time to switch pdc buffers so we have to use only + * one buffer for the full transaction. + * @buf_size: size of the buffer. + * @phys_buf_addr: buffer address needed for pdc. * @cur_slot: The slot which is currently using the controller. * @mrq: The request currently being processed on @cur_slot, * or NULL if the controller is idle. @@ -166,6 +171,9 @@ struct atmel_mci { struct scatterlist *sg; unsigned int pio_offset; + unsigned int *buffer; + unsigned int buf_size; + dma_addr_t buf_phys_addr; struct atmel_mci_slot *cur_slot; struct mmc_request *mrq; @@ -480,6 +488,11 @@ err: dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); } +static inline unsigned int atmci_get_version(struct atmel_mci *host) +{ + return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; +} + static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, unsigned int ns) { @@ -603,6 +616,7 @@ static void atmci_pdc_set_single_buf(struct atmel_mci *host, enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb) { u32 pointer_reg, counter_reg; + unsigned int buf_size; if (dir == XFER_RECEIVE) { pointer_reg = ATMEL_PDC_RPR; @@ -617,8 +631,15 @@ static void atmci_pdc_set_single_buf(struct atmel_mci *host, counter_reg += ATMEL_PDC_SCND_BUF_OFF; } - atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); - if (host->data_size <= sg_dma_len(host->sg)) { + if (!host->caps.has_rwproof) { + buf_size = host->buf_size; + atmci_writel(host, pointer_reg, host->buf_phys_addr); + } else { + buf_size = sg_dma_len(host->sg); + atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); + } + + if (host->data_size <= buf_size) { if (host->data_size & 0x3) { /* If size is different from modulo 4, transfer bytes */ atmci_writel(host, counter_reg, host->data_size); @@ -670,7 +691,15 @@ static void atmci_pdc_cleanup(struct atmel_mci *host) */ static void atmci_pdc_complete(struct atmel_mci *host) { + int transfer_size = host->data->blocks * host->data->blksz; + atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); + + if ((!host->caps.has_rwproof) + && (host->data->flags & MMC_DATA_READ)) + sg_copy_from_buffer(host->data->sg, host->data->sg_len, + host->buffer, transfer_size); + atmci_pdc_cleanup(host); /* @@ -818,6 +847,12 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) /* Configure PDC */ host->data_size = data->blocks * data->blksz; sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); + + if ((!host->caps.has_rwproof) + && (host->data->flags & MMC_DATA_WRITE)) + sg_copy_to_buffer(host->data->sg, host->data->sg_len, + host->buffer, host->data_size); + if (host->data_size) atmci_pdc_set_both_buf(host, ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT)); @@ -1877,13 +1912,26 @@ static int __init atmci_init_slot(struct atmel_mci *host, mmc->caps |= MMC_CAP_SDIO_IRQ; if (host->caps.has_highspeed) mmc->caps |= MMC_CAP_SD_HIGHSPEED; - if (slot_data->bus_width >= 4) + /* + * Without the read/write proof capability, it is strongly suggested to + * use only one bit for data to prevent fifo underruns and overruns + * which will corrupt data. + */ + if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) mmc->caps |= MMC_CAP_4_BIT_DATA; - mmc->max_segs = 64; - mmc->max_req_size = 32768 * 512; - mmc->max_blk_size = 32768; - mmc->max_blk_count = 512; + if (atmci_get_version(host) < 0x200) { + mmc->max_segs = 256; + mmc->max_blk_size = 4095; + mmc->max_blk_count = 256; + mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; + mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs; + } else { + mmc->max_segs = 64; + mmc->max_req_size = 32768 * 512; + mmc->max_blk_size = 32768; + mmc->max_blk_count = 512; + } /* Assume card is present initially */ set_bit(ATMCI_CARD_PRESENT, &slot->flags); @@ -2007,11 +2055,6 @@ static bool atmci_configure_dma(struct atmel_mci *host) } } -static inline unsigned int atmci_get_version(struct atmel_mci *host) -{ - return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; -} - /* * HSMCI (High Speed MCI) module is not fully compatible with MCI module. * HSMCI provides DMA support and a new config register but no more supports @@ -2138,14 +2181,20 @@ static int __init atmci_probe(struct platform_device *pdev) if (pdata->slot[0].bus_width) { ret = atmci_init_slot(host, &pdata->slot[0], 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA); - if (!ret) + if (!ret) { nr_slots++; + host->buf_size = host->slot[0]->mmc->max_req_size; + } } if (pdata->slot[1].bus_width) { ret = atmci_init_slot(host, &pdata->slot[1], 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB); - if (!ret) + if (!ret) { nr_slots++; + if (host->slot[1]->mmc->max_req_size > host->buf_size) + host->buf_size = + host->slot[1]->mmc->max_req_size; + } } if (!nr_slots) { @@ -2153,6 +2202,17 @@ static int __init atmci_probe(struct platform_device *pdev) goto err_init_slot; } + if (!host->caps.has_rwproof) { + host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size, + &host->buf_phys_addr, + GFP_KERNEL); + if (!host->buffer) { + ret = -ENOMEM; + dev_err(&pdev->dev, "buffer allocation failed\n"); + goto err_init_slot; + } + } + dev_info(&pdev->dev, "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", host->mapbase, irq, nr_slots); @@ -2179,6 +2239,10 @@ static int __exit atmci_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); + if (host->buffer) + dma_free_coherent(&pdev->dev, host->buf_size, + host->buffer, host->buf_phys_addr); + for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { if (host->slot[i]) atmci_cleanup_slot(host->slot[i], i); -- cgit v1.2.2 From f51775471ac6155d3bb8494dcb5c0a13a84f611e Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 16 May 2012 15:25:59 +0200 Subject: mmc: atmel-mci: change the state machine for compatibility with old IP The state machine use in atmel-mci can't work with old IP versions (< 0x200). This patch allows to have a common state machine for all versions in order to remove at91-mci driver only used for old versions. Signed-off-by: Ludovic Desroches Signed-off-by: Chris Ball --- drivers/mmc/host/atmel-mci.c | 278 +++++++++++++++++++++++++------------------ 1 file changed, 162 insertions(+), 116 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 6f56ef025ab5..1baaaebbeda8 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -45,19 +45,19 @@ #define ATMCI_DMA_THRESHOLD 16 enum { - EVENT_CMD_COMPLETE = 0, + EVENT_CMD_RDY = 0, EVENT_XFER_COMPLETE, - EVENT_DATA_COMPLETE, + EVENT_NOTBUSY, EVENT_DATA_ERROR, }; enum atmel_mci_state { STATE_IDLE = 0, STATE_SENDING_CMD, - STATE_SENDING_DATA, - STATE_DATA_BUSY, + STATE_DATA_XFER, + STATE_WAITING_NOTBUSY, STATE_SENDING_STOP, - STATE_DATA_ERROR, + STATE_END_REQUEST, }; enum atmci_xfer_dir { @@ -709,7 +709,6 @@ static void atmci_pdc_complete(struct atmel_mci *host) if (host->data) { atmci_set_pending(host, EVENT_XFER_COMPLETE); tasklet_schedule(&host->tasklet); - atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); } } @@ -835,7 +834,7 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) iflags |= ATMCI_ENDRX | ATMCI_RXBUFF; } else { dir = DMA_TO_DEVICE; - iflags |= ATMCI_ENDTX | ATMCI_TXBUFE; + iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE; } /* Set BLKLEN */ @@ -975,8 +974,7 @@ static void atmci_stop_transfer(struct atmel_mci *host) */ static void atmci_stop_transfer_pdc(struct atmel_mci *host) { - atmci_set_pending(host, EVENT_XFER_COMPLETE); - atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); + atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); } static void atmci_stop_transfer_dma(struct atmel_mci *host) @@ -1012,6 +1010,7 @@ static void atmci_start_request(struct atmel_mci *host, host->pending_events = 0; host->completed_events = 0; + host->cmd_status = 0; host->data_status = 0; if (host->need_reset) { @@ -1029,7 +1028,7 @@ static void atmci_start_request(struct atmel_mci *host, iflags = atmci_readl(host, ATMCI_IMR); if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) - dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", + dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", iflags); if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { @@ -1367,19 +1366,6 @@ static void atmci_command_complete(struct atmel_mci *host, cmd->error = -EIO; else cmd->error = 0; - - if (cmd->error) { - dev_dbg(&host->pdev->dev, - "command error: status=0x%08x\n", status); - - if (cmd->data) { - host->stop_transfer(host); - host->data = NULL; - atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY - | ATMCI_TXRDY | ATMCI_RXRDY - | ATMCI_DATA_ERROR_FLAGS); - } - } } static void atmci_detect_change(unsigned long data) @@ -1442,23 +1428,21 @@ static void atmci_detect_change(unsigned long data) break; case STATE_SENDING_CMD: mrq->cmd->error = -ENOMEDIUM; - if (!mrq->data) - break; - /* fall through */ - case STATE_SENDING_DATA: + if (mrq->data) + host->stop_transfer(host); + break; + case STATE_DATA_XFER: mrq->data->error = -ENOMEDIUM; host->stop_transfer(host); break; - case STATE_DATA_BUSY: - case STATE_DATA_ERROR: - if (mrq->data->error == -EINPROGRESS) - mrq->data->error = -ENOMEDIUM; - if (!mrq->stop) - break; - /* fall through */ + case STATE_WAITING_NOTBUSY: + mrq->data->error = -ENOMEDIUM; + break; case STATE_SENDING_STOP: mrq->stop->error = -ENOMEDIUM; break; + case STATE_END_REQUEST: + break; } atmci_request_end(host, mrq); @@ -1486,7 +1470,6 @@ static void atmci_tasklet_func(unsigned long priv) struct atmel_mci *host = (struct atmel_mci *)priv; struct mmc_request *mrq = host->mrq; struct mmc_data *data = host->data; - struct mmc_command *cmd = host->cmd; enum atmel_mci_state state = host->state; enum atmel_mci_state prev_state; u32 status; @@ -1508,101 +1491,164 @@ static void atmci_tasklet_func(unsigned long priv) break; case STATE_SENDING_CMD: + /* + * Command has been sent, we are waiting for command + * ready. Then we have three next states possible: + * END_REQUEST by default, WAITING_NOTBUSY if it's a + * command needing it or DATA_XFER if there is data. + */ if (!atmci_test_and_clear_pending(host, - EVENT_CMD_COMPLETE)) + EVENT_CMD_RDY)) break; host->cmd = NULL; - atmci_set_completed(host, EVENT_CMD_COMPLETE); + atmci_set_completed(host, EVENT_CMD_RDY); atmci_command_complete(host, mrq->cmd); - if (!mrq->data || cmd->error) { - atmci_request_end(host, host->mrq); - goto unlock; - } + if (mrq->data) { + /* + * If there is a command error don't start + * data transfer. + */ + if (mrq->cmd->error) { + host->stop_transfer(host); + host->data = NULL; + atmci_writel(host, ATMCI_IDR, + ATMCI_TXRDY | ATMCI_RXRDY + | ATMCI_DATA_ERROR_FLAGS); + state = STATE_END_REQUEST; + } else + state = STATE_DATA_XFER; + } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { + atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); + state = STATE_WAITING_NOTBUSY; + } else + state = STATE_END_REQUEST; - prev_state = state = STATE_SENDING_DATA; - /* fall through */ + break; - case STATE_SENDING_DATA: + case STATE_DATA_XFER: if (atmci_test_and_clear_pending(host, EVENT_DATA_ERROR)) { - host->stop_transfer(host); - if (data->stop) - atmci_send_stop_cmd(host, data); - state = STATE_DATA_ERROR; + atmci_set_completed(host, EVENT_DATA_ERROR); + state = STATE_END_REQUEST; break; } + /* + * A data transfer is in progress. The event expected + * to move to the next state depends of data transfer + * type (PDC or DMA). Once transfer done we can move + * to the next step which is WAITING_NOTBUSY in write + * case and directly SENDING_STOP in read case. + */ if (!atmci_test_and_clear_pending(host, EVENT_XFER_COMPLETE)) break; atmci_set_completed(host, EVENT_XFER_COMPLETE); - prev_state = state = STATE_DATA_BUSY; - /* fall through */ - case STATE_DATA_BUSY: - if (!atmci_test_and_clear_pending(host, - EVENT_DATA_COMPLETE)) - break; - - host->data = NULL; - atmci_set_completed(host, EVENT_DATA_COMPLETE); - status = host->data_status; - if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) { - if (status & ATMCI_DTOE) { - dev_dbg(&host->pdev->dev, - "data timeout error\n"); - data->error = -ETIMEDOUT; - } else if (status & ATMCI_DCRCE) { - dev_dbg(&host->pdev->dev, - "data CRC error\n"); - data->error = -EILSEQ; - } else { - dev_dbg(&host->pdev->dev, - "data FIFO error (status=%08x)\n", - status); - data->error = -EIO; - } + if (host->data->flags & MMC_DATA_WRITE) { + atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); + state = STATE_WAITING_NOTBUSY; + } else if (host->mrq->stop) { + atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); + atmci_send_stop_cmd(host, data); + state = STATE_SENDING_STOP; } else { + host->data = NULL; data->bytes_xfered = data->blocks * data->blksz; data->error = 0; - atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS); + state = STATE_END_REQUEST; } + break; - if (!data->stop) { - atmci_request_end(host, host->mrq); - goto unlock; - } + case STATE_WAITING_NOTBUSY: + /* + * We can be in the state for two reasons: a command + * requiring waiting not busy signal (stop command + * included) or a write operation. In the latest case, + * we need to send a stop command. + */ + if (!atmci_test_and_clear_pending(host, + EVENT_NOTBUSY)) + break; - prev_state = state = STATE_SENDING_STOP; - if (!data->error) - atmci_send_stop_cmd(host, data); - /* fall through */ + atmci_set_completed(host, EVENT_NOTBUSY); + + if (host->data) { + /* + * For some commands such as CMD53, even if + * there is data transfer, there is no stop + * command to send. + */ + if (host->mrq->stop) { + atmci_writel(host, ATMCI_IER, + ATMCI_CMDRDY); + atmci_send_stop_cmd(host, data); + state = STATE_SENDING_STOP; + } else { + host->data = NULL; + data->bytes_xfered = data->blocks + * data->blksz; + data->error = 0; + state = STATE_END_REQUEST; + } + } else + state = STATE_END_REQUEST; + break; case STATE_SENDING_STOP: + /* + * In this state, it is important to set host->data to + * NULL (which is tested in the waiting notbusy state) + * in order to go to the end request state instead of + * sending stop again. + */ if (!atmci_test_and_clear_pending(host, - EVENT_CMD_COMPLETE)) + EVENT_CMD_RDY)) break; host->cmd = NULL; + host->data = NULL; + data->bytes_xfered = data->blocks * data->blksz; + data->error = 0; atmci_command_complete(host, mrq->stop); - atmci_request_end(host, host->mrq); - goto unlock; + if (mrq->stop->error) { + host->stop_transfer(host); + atmci_writel(host, ATMCI_IDR, + ATMCI_TXRDY | ATMCI_RXRDY + | ATMCI_DATA_ERROR_FLAGS); + state = STATE_END_REQUEST; + } else { + atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); + state = STATE_WAITING_NOTBUSY; + } + break; - case STATE_DATA_ERROR: - if (!atmci_test_and_clear_pending(host, - EVENT_XFER_COMPLETE)) - break; + case STATE_END_REQUEST: + atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY + | ATMCI_DATA_ERROR_FLAGS); + status = host->data_status; + if (unlikely(status)) { + host->stop_transfer(host); + host->data = NULL; + if (status & ATMCI_DTOE) { + data->error = -ETIMEDOUT; + } else if (status & ATMCI_DCRCE) { + data->error = -EILSEQ; + } else { + data->error = -EIO; + } + } - state = STATE_DATA_BUSY; + atmci_request_end(host, host->mrq); + state = STATE_IDLE; break; } } while (state != prev_state); host->state = state; -unlock: spin_unlock(&host->lock); } @@ -1655,9 +1701,6 @@ static void atmci_read_data_pio(struct atmel_mci *host) | ATMCI_DATA_ERROR_FLAGS)); host->data_status = status; data->bytes_xfered += nbytes; - smp_wmb(); - atmci_set_pending(host, EVENT_DATA_ERROR); - tasklet_schedule(&host->tasklet); return; } } while (status & ATMCI_RXRDY); @@ -1726,9 +1769,6 @@ static void atmci_write_data_pio(struct atmel_mci *host) | ATMCI_DATA_ERROR_FLAGS)); host->data_status = status; data->bytes_xfered += nbytes; - smp_wmb(); - atmci_set_pending(host, EVENT_DATA_ERROR); - tasklet_schedule(&host->tasklet); return; } } while (status & ATMCI_TXRDY); @@ -1746,16 +1786,6 @@ done: atmci_set_pending(host, EVENT_XFER_COMPLETE); } -static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status) -{ - atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); - - host->cmd_status = status; - smp_wmb(); - atmci_set_pending(host, EVENT_CMD_COMPLETE); - tasklet_schedule(&host->tasklet); -} - static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status) { int i; @@ -1784,8 +1814,9 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) if (pending & ATMCI_DATA_ERROR_FLAGS) { atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS - | ATMCI_RXRDY | ATMCI_TXRDY); - pending &= atmci_readl(host, ATMCI_IMR); + | ATMCI_RXRDY | ATMCI_TXRDY + | ATMCI_ENDRX | ATMCI_ENDTX + | ATMCI_RXBUFF | ATMCI_TXBUFE); host->data_status = status; smp_wmb(); @@ -1843,23 +1874,38 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) } } + /* + * First mci IPs, so mainly the ones having pdc, have some + * issues with the notbusy signal. You can't get it after + * data transmission if you have not sent a stop command. + * The appropriate workaround is to use the BLKE signal. + */ + if (pending & ATMCI_BLKE) { + atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); + smp_wmb(); + atmci_set_pending(host, EVENT_NOTBUSY); + tasklet_schedule(&host->tasklet); + } if (pending & ATMCI_NOTBUSY) { - atmci_writel(host, ATMCI_IDR, - ATMCI_DATA_ERROR_FLAGS | ATMCI_NOTBUSY); - if (!host->data_status) - host->data_status = status; + atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); smp_wmb(); - atmci_set_pending(host, EVENT_DATA_COMPLETE); + atmci_set_pending(host, EVENT_NOTBUSY); tasklet_schedule(&host->tasklet); } + if (pending & ATMCI_RXRDY) atmci_read_data_pio(host); if (pending & ATMCI_TXRDY) atmci_write_data_pio(host); - if (pending & ATMCI_CMDRDY) - atmci_cmd_interrupt(host, status); + if (pending & ATMCI_CMDRDY) { + atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); + host->cmd_status = status; + smp_wmb(); + atmci_set_pending(host, EVENT_CMD_RDY); + tasklet_schedule(&host->tasklet); + } if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) atmci_sdio_interrupt(host, status); -- cgit v1.2.2 From 24011f346471f7636f0ba6ffe2064fdd1a091daa Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 16 May 2012 15:26:00 +0200 Subject: mmc: atmel-mci: add support for version lower than v2xx Fix mci IP bugs and endianness issue. Signed-off-by: Ludovic Desroches Signed-off-by: Chris Ball --- drivers/mmc/host/atmel-mci.c | 62 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 58 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 1baaaebbeda8..5fe83008b746 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -78,6 +78,9 @@ struct atmel_mci_caps { bool has_highspeed; bool has_rwproof; bool has_odd_clk_div; + bool has_bad_data_ordering; + bool need_reset_after_xfer; + bool need_blksz_mul_4; }; struct atmel_mci_dma { @@ -121,6 +124,7 @@ struct atmel_mci_dma { * @queue: List of slots waiting for access to the controller. * @need_clock_update: Update the clock rate before the next request. * @need_reset: Reset controller before next request. + * @timer: Timer to balance the data timeout error flag which cannot rise. * @mode_reg: Value of the MR register. * @cfg_reg: Value of the CFG register. * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus @@ -197,6 +201,7 @@ struct atmel_mci { bool need_clock_update; bool need_reset; + struct timer_list timer; u32 mode_reg; u32 cfg_reg; unsigned long bus_hz; @@ -493,6 +498,27 @@ static inline unsigned int atmci_get_version(struct atmel_mci *host) return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; } +static void atmci_timeout_timer(unsigned long data) +{ + struct atmel_mci *host; + + host = (struct atmel_mci *)data; + + dev_dbg(&host->pdev->dev, "software timeout\n"); + + if (host->mrq->cmd->data) { + host->mrq->cmd->data->error = -ETIMEDOUT; + host->data = NULL; + } else { + host->mrq->cmd->error = -ETIMEDOUT; + host->cmd = NULL; + } + host->need_reset = 1; + host->state = STATE_END_REQUEST; + smp_wmb(); + tasklet_schedule(&host->tasklet); +} + static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, unsigned int ns) { @@ -692,13 +718,18 @@ static void atmci_pdc_cleanup(struct atmel_mci *host) static void atmci_pdc_complete(struct atmel_mci *host) { int transfer_size = host->data->blocks * host->data->blksz; + int i; atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); if ((!host->caps.has_rwproof) - && (host->data->flags & MMC_DATA_READ)) + && (host->data->flags & MMC_DATA_READ)) { + if (host->caps.has_bad_data_ordering) + for (i = 0; i < transfer_size; i++) + host->buffer[i] = swab32(host->buffer[i]); sg_copy_from_buffer(host->data->sg, host->data->sg_len, host->buffer, transfer_size); + } atmci_pdc_cleanup(host); @@ -819,6 +850,7 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) u32 iflags, tmp; unsigned int sg_len; enum dma_data_direction dir; + int i; data->error = -EINPROGRESS; @@ -848,9 +880,13 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); if ((!host->caps.has_rwproof) - && (host->data->flags & MMC_DATA_WRITE)) + && (host->data->flags & MMC_DATA_WRITE)) { sg_copy_to_buffer(host->data->sg, host->data->sg_len, host->buffer, host->data_size); + if (host->caps.has_bad_data_ordering) + for (i = 0; i < host->data_size; i++) + host->buffer[i] = swab32(host->buffer[i]); + } if (host->data_size) atmci_pdc_set_both_buf(host, @@ -1013,7 +1049,7 @@ static void atmci_start_request(struct atmel_mci *host, host->cmd_status = 0; host->data_status = 0; - if (host->need_reset) { + if (host->need_reset || host->caps.need_reset_after_xfer) { iflags = atmci_readl(host, ATMCI_IMR); iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); @@ -1077,6 +1113,8 @@ static void atmci_start_request(struct atmel_mci *host, * prepared yet.) */ atmci_writel(host, ATMCI_IER, iflags); + + mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000)); } static void atmci_queue_request(struct atmel_mci *host, @@ -1342,6 +1380,8 @@ static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq) host->state = STATE_IDLE; } + del_timer(&host->timer); + spin_unlock(&host->lock); mmc_request_done(prev_mmc, mrq); spin_lock(&host->lock); @@ -1364,7 +1404,12 @@ static void atmci_command_complete(struct atmel_mci *host, cmd->error = -EILSEQ; else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE)) cmd->error = -EIO; - else + else if (host->mrq->data && (host->mrq->data->blksz & 3)) { + if (host->caps.need_blksz_mul_4) { + cmd->error = -EINVAL; + host->need_reset = 1; + } + } else cmd->error = 0; } @@ -2121,6 +2166,9 @@ static void __init atmci_get_cap(struct atmel_mci *host) host->caps.has_highspeed = 0; host->caps.has_rwproof = 0; host->caps.has_odd_clk_div = 0; + host->caps.has_bad_data_ordering = 1; + host->caps.need_reset_after_xfer = 1; + host->caps.need_blksz_mul_4 = 1; /* keep only major version number */ switch (version & 0xf00) { @@ -2140,7 +2188,11 @@ static void __init atmci_get_cap(struct atmel_mci *host) host->caps.has_highspeed = 1; case 0x200: host->caps.has_rwproof = 1; + host->caps.need_blksz_mul_4 = 0; case 0x100: + host->caps.has_bad_data_ordering = 0; + host->caps.need_reset_after_xfer = 0; + case 0x0: break; default: host->caps.has_pdc = 0; @@ -2259,6 +2311,8 @@ static int __init atmci_probe(struct platform_device *pdev) } } + setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host); + dev_info(&pdev->dev, "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", host->mapbase, irq, nr_slots); -- cgit v1.2.2 From 6801c41a77123712accfde898820972a1f6fc117 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 16 May 2012 15:26:01 +0200 Subject: mmc: atmel-mci: add debug logs Signed-off-by: Ludovic Desroches Signed-off-by: Chris Ball --- drivers/mmc/host/atmel-mci.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 5fe83008b746..420aca642b14 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -630,6 +630,7 @@ static void atmci_send_command(struct atmel_mci *host, static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) { + dev_dbg(&host->pdev->dev, "send stop command\n"); atmci_send_command(host, data->stop, host->stop_cmdr); atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); } @@ -738,6 +739,8 @@ static void atmci_pdc_complete(struct atmel_mci *host) * to send the stop command or waiting for NBUSY in this case. */ if (host->data) { + dev_dbg(&host->pdev->dev, + "(%s) set pending xfer complete\n", __func__); atmci_set_pending(host, EVENT_XFER_COMPLETE); tasklet_schedule(&host->tasklet); } @@ -775,6 +778,8 @@ static void atmci_dma_complete(void *arg) * to send the stop command or waiting for NBUSY in this case. */ if (data) { + dev_dbg(&host->pdev->dev, + "(%s) set pending xfer complete\n", __func__); atmci_set_pending(host, EVENT_XFER_COMPLETE); tasklet_schedule(&host->tasklet); @@ -1001,6 +1006,8 @@ atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data) static void atmci_stop_transfer(struct atmel_mci *host) { + dev_dbg(&host->pdev->dev, + "(%s) set pending xfer complete\n", __func__); atmci_set_pending(host, EVENT_XFER_COMPLETE); atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); } @@ -1022,6 +1029,8 @@ static void atmci_stop_transfer_dma(struct atmel_mci *host) atmci_dma_cleanup(host); } else { /* Data transfer was stopped by the interrupt handler */ + dev_dbg(&host->pdev->dev, + "(%s) set pending xfer complete\n", __func__); atmci_set_pending(host, EVENT_XFER_COMPLETE); atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); } @@ -1049,6 +1058,8 @@ static void atmci_start_request(struct atmel_mci *host, host->cmd_status = 0; host->data_status = 0; + dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode); + if (host->need_reset || host->caps.need_reset_after_xfer) { iflags = atmci_readl(host, ATMCI_IMR); iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); @@ -1129,6 +1140,7 @@ static void atmci_queue_request(struct atmel_mci *host, host->state = STATE_SENDING_CMD; atmci_start_request(host, slot); } else { + dev_dbg(&host->pdev->dev, "queue request\n"); list_add_tail(&slot->queue_node, &host->queue); } spin_unlock_bh(&host->lock); @@ -1141,6 +1153,7 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) struct mmc_data *data; WARN_ON(slot->mrq); + dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode); /* * We may "know" the card is gone even though there's still an @@ -1530,6 +1543,7 @@ static void atmci_tasklet_func(unsigned long priv) do { prev_state = state; + dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state); switch (state) { case STATE_IDLE: @@ -1542,14 +1556,18 @@ static void atmci_tasklet_func(unsigned long priv) * END_REQUEST by default, WAITING_NOTBUSY if it's a * command needing it or DATA_XFER if there is data. */ + dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); if (!atmci_test_and_clear_pending(host, EVENT_CMD_RDY)) break; + dev_dbg(&host->pdev->dev, "set completed cmd ready\n"); host->cmd = NULL; atmci_set_completed(host, EVENT_CMD_RDY); atmci_command_complete(host, mrq->cmd); if (mrq->data) { + dev_dbg(&host->pdev->dev, + "command with data transfer"); /* * If there is a command error don't start * data transfer. @@ -1564,6 +1582,8 @@ static void atmci_tasklet_func(unsigned long priv) } else state = STATE_DATA_XFER; } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { + dev_dbg(&host->pdev->dev, + "command response need waiting notbusy"); atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); state = STATE_WAITING_NOTBUSY; } else @@ -1574,6 +1594,7 @@ static void atmci_tasklet_func(unsigned long priv) case STATE_DATA_XFER: if (atmci_test_and_clear_pending(host, EVENT_DATA_ERROR)) { + dev_dbg(&host->pdev->dev, "set completed data error\n"); atmci_set_completed(host, EVENT_DATA_ERROR); state = STATE_END_REQUEST; break; @@ -1586,10 +1607,14 @@ static void atmci_tasklet_func(unsigned long priv) * to the next step which is WAITING_NOTBUSY in write * case and directly SENDING_STOP in read case. */ + dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n"); if (!atmci_test_and_clear_pending(host, EVENT_XFER_COMPLETE)) break; + dev_dbg(&host->pdev->dev, + "(%s) set completed xfer complete\n", + __func__); atmci_set_completed(host, EVENT_XFER_COMPLETE); if (host->data->flags & MMC_DATA_WRITE) { @@ -1614,10 +1639,12 @@ static void atmci_tasklet_func(unsigned long priv) * included) or a write operation. In the latest case, * we need to send a stop command. */ + dev_dbg(&host->pdev->dev, "FSM: not busy?\n"); if (!atmci_test_and_clear_pending(host, EVENT_NOTBUSY)) break; + dev_dbg(&host->pdev->dev, "set completed not busy\n"); atmci_set_completed(host, EVENT_NOTBUSY); if (host->data) { @@ -1649,10 +1676,12 @@ static void atmci_tasklet_func(unsigned long priv) * in order to go to the end request state instead of * sending stop again. */ + dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); if (!atmci_test_and_clear_pending(host, EVENT_CMD_RDY)) break; + dev_dbg(&host->pdev->dev, "FSM: cmd ready\n"); host->cmd = NULL; host->data = NULL; data->bytes_xfered = data->blocks * data->blksz; @@ -1858,18 +1887,21 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) break; if (pending & ATMCI_DATA_ERROR_FLAGS) { + dev_dbg(&host->pdev->dev, "IRQ: data error\n"); atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS | ATMCI_RXRDY | ATMCI_TXRDY | ATMCI_ENDRX | ATMCI_ENDTX | ATMCI_RXBUFF | ATMCI_TXBUFE); host->data_status = status; + dev_dbg(&host->pdev->dev, "set pending data error\n"); smp_wmb(); atmci_set_pending(host, EVENT_DATA_ERROR); tasklet_schedule(&host->tasklet); } if (pending & ATMCI_TXBUFE) { + dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n"); atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE); atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); /* @@ -1885,6 +1917,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) atmci_pdc_complete(host); } } else if (pending & ATMCI_ENDTX) { + dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n"); atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); if (host->data_size) { @@ -1895,6 +1928,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) } if (pending & ATMCI_RXBUFF) { + dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n"); atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF); atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); /* @@ -1910,6 +1944,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) atmci_pdc_complete(host); } } else if (pending & ATMCI_ENDRX) { + dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n"); atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); if (host->data_size) { @@ -1926,15 +1961,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) * The appropriate workaround is to use the BLKE signal. */ if (pending & ATMCI_BLKE) { + dev_dbg(&host->pdev->dev, "IRQ: blke\n"); atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); smp_wmb(); + dev_dbg(&host->pdev->dev, "set pending notbusy\n"); atmci_set_pending(host, EVENT_NOTBUSY); tasklet_schedule(&host->tasklet); } if (pending & ATMCI_NOTBUSY) { + dev_dbg(&host->pdev->dev, "IRQ: not_busy\n"); atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); smp_wmb(); + dev_dbg(&host->pdev->dev, "set pending notbusy\n"); atmci_set_pending(host, EVENT_NOTBUSY); tasklet_schedule(&host->tasklet); } @@ -1945,9 +1984,11 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) atmci_write_data_pio(host); if (pending & ATMCI_CMDRDY) { + dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n"); atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); host->cmd_status = status; smp_wmb(); + dev_dbg(&host->pdev->dev, "set pending cmd rdy\n"); atmci_set_pending(host, EVENT_CMD_RDY); tasklet_schedule(&host->tasklet); } -- cgit v1.2.2 From a5075eb94837edde6833fd5e0277fc2370cf8b39 Mon Sep 17 00:00:00 2001 From: Saugata Das Date: Thu, 17 May 2012 16:32:21 +0530 Subject: mmc: block: Allow disabling 512B sector size emulation This patch adds support for large sector size of 4KB by disabling emulation. This patch passes eMMC DATA_SECTOR_SIZE as the logical block size during mmc_blk_alloc_req. In order to use this patch for 4KB sector size, ensure that USE_NATIVE_SECTOR is enabled, partition table is 4KB sector size aligned and file system block and sector size are 4KB multiples. Signed-off-by: Saugata Das Reviewed-by: Subhash Jadavani Reviewed-by: Namjae Jeon Reviewed-by: Subhash Jadavani Signed-off-by: Chris Ball --- drivers/mmc/card/block.c | 19 +++++++++++++++++-- drivers/mmc/core/mmc.c | 2 ++ 2 files changed, 19 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index 91cda7551a60..dd2d374dcc7a 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c @@ -1284,7 +1284,7 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc) int ret = 1, disable_multi = 0, retry = 0, type; enum mmc_blk_status status; struct mmc_queue_req *mq_rq; - struct request *req; + struct request *req = rqc; struct mmc_async_req *areq; if (!rqc && !mq->mqrq_prev->req) @@ -1292,6 +1292,16 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc) do { if (rqc) { + /* + * When 4KB native sector is enabled, only 8 blocks + * multiple read or write is allowed + */ + if ((brq->data.blocks & 0x07) && + (card->ext_csd.data_sector_size == 4096)) { + pr_err("%s: Transfer size is not 4KB sector size aligned\n", + req->rq_disk->disk_name); + goto cmd_abort; + } mmc_blk_rw_rq_prep(mq->mqrq_cur, card, 0, mq); areq = &mq->mqrq_cur->mmc_active; } else @@ -1539,7 +1549,12 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, snprintf(md->disk->disk_name, sizeof(md->disk->disk_name), "mmcblk%d%s", md->name_idx, subname ? subname : ""); - blk_queue_logical_block_size(md->queue.queue, 512); + if (mmc_card_mmc(card)) + blk_queue_logical_block_size(md->queue.queue, + card->ext_csd.data_sector_size); + else + blk_queue_logical_block_size(md->queue.queue, 512); + set_capacity(md->disk, size); if (mmc_host_cmd23(card->host)) { diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 2f0e11c9fd67..2d4a4b746750 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -516,6 +516,8 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) } else { card->ext_csd.data_tag_unit_size = 0; } + } else { + card->ext_csd.data_sector_size = 512; } out: -- cgit v1.2.2 From 2ee93ab67a73955018dff6ad76916e20a2ba10f7 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 9 May 2012 14:04:02 -0700 Subject: acpi, bgrd: Add missing to drivers/acpi/bgrt.c The ACPI BGRT driver uses ioremap() and memcpy_fromio(), which means it needs to #include . [ hpa: This was hidden because used to include , which then included ] Signed-off-by: H. Peter Anvin Link: http://lkml.kernel.org/r/1336597442-9399-1-git-send-email-hpa@linux.intel.com Cc: Matthew Garrett Cc: Len Brown --- drivers/acpi/bgrt.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/acpi/bgrt.c b/drivers/acpi/bgrt.c index 8cf6c46e99fb..6680df36b963 100644 --- a/drivers/acpi/bgrt.c +++ b/drivers/acpi/bgrt.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include -- cgit v1.2.2 From db35f83ef47b5f180f2670d11f5f93992314ea09 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Thu, 17 May 2012 10:27:12 +0800 Subject: mmc: omap_hsmmc: pass IRQF_ONESHOT to request_threaded_irq The flag of IRQF_ONESHOT should be passed to request_threaded_irq, otherwise the following failure message should be dumped because hardware handler is defined as NULL: [ 3.383483] genirq: Threaded irq requested with handler=NULL and !ONESHOT for irq 368 [ 3.392730] omap_hsmmc: probe of omap_hsmmc.0 failed with error -22 The patch fixes one kernel hang bug which is caused by mmc card probe failure and root device can't be brought up. Signed-off-by: Ming Lei Acked-by: Venkatraman S Cc: stable Signed-off-by: Chris Ball --- drivers/mmc/host/omap_hsmmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index d15b149649bf..a9fc714fb38d 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1981,7 +1981,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev) ret = request_threaded_irq(mmc_slot(host).card_detect_irq, NULL, omap_hsmmc_detect, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, mmc_hostname(mmc), host); if (ret) { dev_dbg(mmc_dev(host->mmc), -- cgit v1.2.2 From 323f90a60864f30fd6b7c99806584bb90ada1a29 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Thu, 17 May 2012 10:03:02 -0700 Subject: xen-acpi-processor: Add missing #include This file depends on , but the dependency was hidden due to: -> -> -> With the removal of , this exposed the missing Reported-by: Ingo Molnar Cc: Len Brown Cc: Konrad Rzeszutek Wilk Cc: Jeremy Fitzhardinge Cc: Jarkko Sakkinen Signed-off-by: H. Peter Anvin --- drivers/xen/xen-acpi-processor.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c index 0b48579a9cd6..7ff2569e17ae 100644 --- a/drivers/xen/xen-acpi-processor.c +++ b/drivers/xen/xen-acpi-processor.c @@ -29,6 +29,7 @@ #include #include +#include #include #include -- cgit v1.2.2 From 0caaa9539adcff38ce12e99f0ab25645e7eb3eea Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 16 May 2012 17:51:59 +0200 Subject: mmc: at91-mci: this driver is now deprecated at91-mci is deprecated since atmel-mci can deal with all chips. Signed-off-by: Ludovic Desroches Signed-off-by: Chris Ball --- drivers/mmc/host/Kconfig | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 9f1f5e2bbfef..aa131b32e3b2 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -278,10 +278,13 @@ choice Choose which driver to use for the Atmel MCI Silicon config MMC_AT91 - tristate "AT91 SD/MMC Card Interface support" + tristate "AT91 SD/MMC Card Interface support (DEPRECATED)" depends on ARCH_AT91 help - This selects the AT91 MCI controller. + This selects the AT91 MCI controller. This driver will + be removed soon (for more information have a look to + Documentation/feature-removal-schedule.txt). Please use + MMC_ATMEL_MCI. If unsure, say N. -- cgit v1.2.2 From 1526bf9ccf310f1d35c1275b8b477a249d25aaf2 Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Tue, 15 May 2012 14:15:25 +0200 Subject: KVM: s390: add capability indicating COW support Currently qemu/kvm on s390 uses a guest mapping that does not allow the guest backing page table to be write-protected to support older systems. On those older systems a host write protection fault will be delivered to the guest. Newer systems allow to write-protect the guest backing memory and let the fault be delivered to the host, thus allowing COW. Use a capability bit to tell qemu if that is possible. Signed-off-by: Christian Borntraeger Acked-by: Heiko Carstens Signed-off-by: Marcelo Tosatti --- drivers/s390/char/sclp_cmd.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c index 231a1d85127b..032171e335e9 100644 --- a/drivers/s390/char/sclp_cmd.c +++ b/drivers/s390/char/sclp_cmd.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -38,7 +39,8 @@ struct read_info_sccb { u64 facilities; /* 48-55 */ u8 _reserved2[84 - 56]; /* 56-83 */ u8 fac84; /* 84 */ - u8 _reserved3[91 - 85]; /* 85-90 */ + u8 fac85; /* 85 */ + u8 _reserved3[91 - 86]; /* 86-90 */ u8 flags; /* 91 */ u8 _reserved4[100 - 92]; /* 92-99 */ u32 rnsize2; /* 100-103 */ @@ -51,6 +53,7 @@ static int __initdata early_read_info_sccb_valid; u64 sclp_facilities; static u8 sclp_fac84; +static u8 sclp_fac85; static unsigned long long rzm; static unsigned long long rnmax; @@ -112,6 +115,7 @@ void __init sclp_facilities_detect(void) sccb = &early_read_info_sccb; sclp_facilities = sccb->facilities; sclp_fac84 = sccb->fac84; + sclp_fac85 = sccb->fac85; rnmax = sccb->rnmax ? sccb->rnmax : sccb->rnmax2; rzm = sccb->rnsize ? sccb->rnsize : sccb->rnsize2; rzm <<= 20; @@ -127,6 +131,12 @@ unsigned long long sclp_get_rzm(void) return rzm; } +u8 sclp_get_fac85(void) +{ + return sclp_fac85; +} +EXPORT_SYMBOL_GPL(sclp_get_fac85); + /* * This function will be called after sclp_facilities_detect(), which gets * called from early.c code. Therefore the sccb should have valid contents. -- cgit v1.2.2 From 3f7e82759c692df473675ed06fb90b20f1f225c3 Mon Sep 17 00:00:00 2001 From: Rhyland Klein Date: Tue, 8 May 2012 11:42:38 -0700 Subject: mfd: Commonize tps65910 regmap access through header This change removes the read/write callback functions in favor of common regmap accessors inside the header file. This change also makes use of regmap_read/write for single register access which maps better onto what this driver actually needs. Signed-off-by: Rhyland Klein Signed-off-by: Samuel Ortiz --- drivers/gpio/gpio-tps65910.c | 14 +++--- drivers/mfd/tps65910-irq.c | 34 ++++++------- drivers/mfd/tps65910.c | 40 ++++------------ drivers/regulator/tps65910-regulator.c | 88 ++++++++++++++++------------------ 4 files changed, 75 insertions(+), 101 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index 7eef648a3351..bc155f2509ba 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c @@ -23,9 +23,9 @@ static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) { struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); - uint8_t val; + unsigned int val; - tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val); + tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &val); if (val & GPIO_STS_MASK) return 1; @@ -39,10 +39,10 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); if (value) - tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, + tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset, GPIO_SET_MASK); else - tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, + tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, GPIO_SET_MASK); } @@ -54,7 +54,7 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, /* Set the initial value */ tps65910_gpio_set(gc, offset, value); - return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, + return tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset, GPIO_CFG_MASK); } @@ -62,7 +62,7 @@ static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) { struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); - return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, + return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, GPIO_CFG_MASK); } @@ -102,7 +102,7 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base) int i; for (i = 0; i < tps65910->gpio.ngpio; ++i) { if (board_data->en_gpio_sleep[i]) { - ret = tps65910_set_bits(tps65910, + ret = tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); if (ret < 0) dev_warn(tps65910->dev, diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c index c9ed5c00a621..0f1ff7fbdc74 100644 --- a/drivers/mfd/tps65910-irq.c +++ b/drivers/mfd/tps65910-irq.c @@ -41,28 +41,28 @@ static inline int irq_to_tps65910_irq(struct tps65910 *tps65910, static irqreturn_t tps65910_irq(int irq, void *irq_data) { struct tps65910 *tps65910 = irq_data; + unsigned int reg; u32 irq_sts; u32 irq_mask; - u8 reg; int i; - tps65910->read(tps65910, TPS65910_INT_STS, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_STS, ®); irq_sts = reg; - tps65910->read(tps65910, TPS65910_INT_STS2, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_STS2, ®); irq_sts |= reg << 8; switch (tps65910_chip_id(tps65910)) { case TPS65911: - tps65910->read(tps65910, TPS65910_INT_STS3, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_STS3, ®); irq_sts |= reg << 16; } - tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®); irq_mask = reg; - tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®); irq_mask |= reg << 8; switch (tps65910_chip_id(tps65910)) { case TPS65911: - tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®); irq_mask |= reg << 16; } @@ -82,13 +82,13 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data) /* Write the STS register back to clear IRQs we handled */ reg = irq_sts & 0xFF; irq_sts >>= 8; - tps65910->write(tps65910, TPS65910_INT_STS, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_STS, reg); reg = irq_sts & 0xFF; - tps65910->write(tps65910, TPS65910_INT_STS2, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg); switch (tps65910_chip_id(tps65910)) { case TPS65911: reg = irq_sts >> 8; - tps65910->write(tps65910, TPS65910_INT_STS3, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg); } return IRQ_HANDLED; @@ -105,27 +105,27 @@ static void tps65910_irq_sync_unlock(struct irq_data *data) { struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); u32 reg_mask; - u8 reg; + unsigned int reg; - tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®); reg_mask = reg; - tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®); reg_mask |= reg << 8; switch (tps65910_chip_id(tps65910)) { case TPS65911: - tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®); + tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®); reg_mask |= reg << 16; } if (tps65910->irq_mask != reg_mask) { reg = tps65910->irq_mask & 0xFF; - tps65910->write(tps65910, TPS65910_INT_MSK, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg); reg = tps65910->irq_mask >> 8 & 0xFF; - tps65910->write(tps65910, TPS65910_INT_MSK2, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg); switch (tps65910_chip_id(tps65910)) { case TPS65911: reg = tps65910->irq_mask >> 16; - tps65910->write(tps65910, TPS65910_INT_MSK3, 1, ®); + tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg); } } mutex_unlock(&tps65910->irq_lock); diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 7a55af921e25..7dffbe1a50c6 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -37,30 +37,6 @@ static struct mfd_cell tps65910s[] = { }; -static int tps65910_i2c_read(struct tps65910 *tps65910, u8 reg, - int bytes, void *dest) -{ - return regmap_bulk_read(tps65910->regmap, reg, dest, bytes); -} - -static int tps65910_i2c_write(struct tps65910 *tps65910, u8 reg, - int bytes, void *src) -{ - return regmap_bulk_write(tps65910->regmap, reg, src, bytes); -} - -int tps65910_set_bits(struct tps65910 *tps65910, u8 reg, u8 mask) -{ - return regmap_update_bits(tps65910->regmap, reg, mask, mask); -} -EXPORT_SYMBOL_GPL(tps65910_set_bits); - -int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask) -{ - return regmap_update_bits(tps65910->regmap, reg, mask, 0); -} -EXPORT_SYMBOL_GPL(tps65910_clear_bits); - static bool is_volatile_reg(struct device *dev, unsigned int reg) { struct tps65910 *tps65910 = dev_get_drvdata(dev); @@ -102,7 +78,7 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, return 0; /* enabling SLEEP device state */ - ret = tps65910_set_bits(tps65910, TPS65910_DEVCTRL, + ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL, DEVCTRL_DEV_SLP_MASK); if (ret < 0) { dev_err(dev, "set dev_slp failed: %d\n", ret); @@ -114,7 +90,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, return 0; if (pmic_pdata->slp_keepon->therm_keepon) { - ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + ret = tps65910_reg_set_bits(tps65910, + TPS65910_SLEEP_KEEP_RES_ON, SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK); if (ret < 0) { dev_err(dev, "set therm_keepon failed: %d\n", ret); @@ -123,7 +100,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, } if (pmic_pdata->slp_keepon->clkout32k_keepon) { - ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + ret = tps65910_reg_set_bits(tps65910, + TPS65910_SLEEP_KEEP_RES_ON, SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK); if (ret < 0) { dev_err(dev, "set clkout32k_keepon failed: %d\n", ret); @@ -132,7 +110,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, } if (pmic_pdata->slp_keepon->i2chs_keepon) { - ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, + ret = tps65910_reg_set_bits(tps65910, + TPS65910_SLEEP_KEEP_RES_ON, SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK); if (ret < 0) { dev_err(dev, "set i2chs_keepon failed: %d\n", ret); @@ -143,7 +122,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910, return 0; disable_dev_slp: - tps65910_clear_bits(tps65910, TPS65910_DEVCTRL, DEVCTRL_DEV_SLP_MASK); + tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL, + DEVCTRL_DEV_SLP_MASK); err_sleep_init: return ret; @@ -176,8 +156,6 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, tps65910->dev = &i2c->dev; tps65910->i2c_client = i2c; tps65910->id = id->driver_data; - tps65910->read = tps65910_i2c_read; - tps65910->write = tps65910_i2c_write; mutex_init(&tps65910->io_mutex); tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config); diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c index 4a37c2b6367f..852b05b20de9 100644 --- a/drivers/regulator/tps65910-regulator.c +++ b/drivers/regulator/tps65910-regulator.c @@ -331,21 +331,16 @@ struct tps65910_reg { static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) { - u8 val; + unsigned int val; int err; - err = pmic->mfd->read(pmic->mfd, reg, 1, &val); + err = tps65910_reg_read(pmic->mfd, reg, &val); if (err) return err; return val; } -static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val) -{ - return pmic->mfd->write(pmic->mfd, reg, 1, &val); -} - static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, u8 set_mask, u8 clear_mask) { @@ -362,7 +357,7 @@ static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, data &= ~clear_mask; data |= set_mask; - err = tps65910_write(pmic, reg, data); + err = tps65910_reg_write(pmic->mfd, reg, data); if (err) dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); @@ -371,7 +366,7 @@ out: return err; } -static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) +static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg) { int data; @@ -385,13 +380,13 @@ static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) return data; } -static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val) +static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val) { int err; mutex_lock(&pmic->mutex); - err = tps65910_write(pmic, reg, val); + err = tps65910_reg_write(pmic->mfd, reg, val); if (err < 0) dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); @@ -476,7 +471,7 @@ static int tps65910_is_enabled(struct regulator_dev *dev) if (reg < 0) return reg; - value = tps65910_reg_read(pmic, reg); + value = tps65910_reg_read_locked(pmic, reg); if (value < 0) return value; @@ -493,7 +488,7 @@ static int tps65910_enable(struct regulator_dev *dev) if (reg < 0) return reg; - return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); + return tps65910_reg_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); } static int tps65910_disable(struct regulator_dev *dev) @@ -506,7 +501,7 @@ static int tps65910_disable(struct regulator_dev *dev) if (reg < 0) return reg; - return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); + return tps65910_reg_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); } static int tps65910_enable_time(struct regulator_dev *dev) @@ -532,9 +527,9 @@ static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) LDO_ST_MODE_BIT); case REGULATOR_MODE_IDLE: value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; - return tps65910_set_bits(mfd, reg, value); + return tps65910_reg_set_bits(mfd, reg, value); case REGULATOR_MODE_STANDBY: - return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT); + return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT); } return -EINVAL; @@ -549,7 +544,7 @@ static unsigned int tps65910_get_mode(struct regulator_dev *dev) if (reg < 0) return reg; - value = tps65910_reg_read(pmic, reg); + value = tps65910_reg_read_locked(pmic, reg); if (value < 0) return value; @@ -569,28 +564,28 @@ static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) switch (id) { case TPS65910_REG_VDD1: - opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP); - mult = tps65910_reg_read(pmic, TPS65910_VDD1); + opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP); + mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1); mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; - srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR); + srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR); sr = opvsel & VDD1_OP_CMD_MASK; opvsel &= VDD1_OP_SEL_MASK; srvsel &= VDD1_SR_SEL_MASK; vselmax = 75; break; case TPS65910_REG_VDD2: - opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP); - mult = tps65910_reg_read(pmic, TPS65910_VDD2); + opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP); + mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2); mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; - srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR); + srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR); sr = opvsel & VDD2_OP_CMD_MASK; opvsel &= VDD2_OP_SEL_MASK; srvsel &= VDD2_SR_SEL_MASK; vselmax = 75; break; case TPS65911_REG_VDDCTRL: - opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP); - srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR); + opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP); + srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR); sr = opvsel & VDDCTRL_OP_CMD_MASK; opvsel &= VDDCTRL_OP_SEL_MASK; srvsel &= VDDCTRL_SR_SEL_MASK; @@ -630,7 +625,7 @@ static int tps65910_get_voltage(struct regulator_dev *dev) if (reg < 0) return reg; - value = tps65910_reg_read(pmic, reg); + value = tps65910_reg_read_locked(pmic, reg); if (value < 0) return value; @@ -669,7 +664,7 @@ static int tps65911_get_voltage(struct regulator_dev *dev) reg = pmic->get_ctrl_reg(id); - value = tps65910_reg_read(pmic, reg); + value = tps65910_reg_read_locked(pmic, reg); switch (id) { case TPS65911_REG_LDO1: @@ -728,7 +723,7 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, tps65910_modify_bits(pmic, TPS65910_VDD1, (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), VDD1_VGAIN_SEL_MASK); - tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel); + tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel); break; case TPS65910_REG_VDD2: dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; @@ -739,11 +734,11 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, tps65910_modify_bits(pmic, TPS65910_VDD2, (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), VDD1_VGAIN_SEL_MASK); - tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel); + tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel); break; case TPS65911_REG_VDDCTRL: vsel = selector + 3; - tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel); + tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel); } return 0; @@ -994,10 +989,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, /* External EN1 control */ if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) - ret = tps65910_set_bits(mfd, + ret = tps65910_reg_set_bits(mfd, TPS65910_EN1_LDO_ASS + regoffs, bit_pos); else - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_EN1_LDO_ASS + regoffs, bit_pos); if (ret < 0) { dev_err(mfd->dev, @@ -1007,10 +1002,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, /* External EN2 control */ if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) - ret = tps65910_set_bits(mfd, + ret = tps65910_reg_set_bits(mfd, TPS65910_EN2_LDO_ASS + regoffs, bit_pos); else - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_EN2_LDO_ASS + regoffs, bit_pos); if (ret < 0) { dev_err(mfd->dev, @@ -1022,10 +1017,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, if ((tps65910_chip_id(mfd) == TPS65910) && (id >= TPS65910_REG_VDIG1)) { if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) - ret = tps65910_set_bits(mfd, + ret = tps65910_reg_set_bits(mfd, TPS65910_EN3_LDO_ASS + regoffs, bit_pos); else - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_EN3_LDO_ASS + regoffs, bit_pos); if (ret < 0) { dev_err(mfd->dev, @@ -1037,10 +1032,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, /* Return if no external control is selected */ if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { /* Clear all sleep controls */ - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); if (!ret) - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); if (ret < 0) dev_err(mfd->dev, @@ -1059,32 +1054,33 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, (tps65910_chip_id(mfd) == TPS65911))) { int op_reg_add = pmic->get_ctrl_reg(id) + 1; int sr_reg_add = pmic->get_ctrl_reg(id) + 2; - int opvsel = tps65910_reg_read(pmic, op_reg_add); - int srvsel = tps65910_reg_read(pmic, sr_reg_add); + int opvsel = tps65910_reg_read_locked(pmic, op_reg_add); + int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add); if (opvsel & VDD1_OP_CMD_MASK) { u8 reg_val = srvsel & VDD1_OP_SEL_MASK; - ret = tps65910_reg_write(pmic, op_reg_add, reg_val); + ret = tps65910_reg_write_locked(pmic, op_reg_add, + reg_val); if (ret < 0) { dev_err(mfd->dev, "Error in configuring op register\n"); return ret; } } - ret = tps65910_reg_write(pmic, sr_reg_add, 0); + ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0); if (ret < 0) { dev_err(mfd->dev, "Error in settting sr register\n"); return ret; } } - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); if (!ret) { if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) - ret = tps65910_set_bits(mfd, + ret = tps65910_reg_set_bits(mfd, TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); else - ret = tps65910_clear_bits(mfd, + ret = tps65910_reg_clear_bits(mfd, TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); } if (ret < 0) @@ -1117,7 +1113,7 @@ static __devinit int tps65910_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pmic); /* Give control of all register to control port */ - tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL, + tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL, DEVCTRL_SR_CTL_I2C_SEL_MASK); switch(tps65910_chip_id(tps65910)) { -- cgit v1.2.2 From cd4209ced4d3936cfe51b7b8833260457e2d9995 Mon Sep 17 00:00:00 2001 From: Rhyland Klein Date: Fri, 11 May 2012 11:36:26 +0200 Subject: mfd: Add tps65910 device-tree support Add device tree based initialization support for TI's tps65910 pmic. Signed-off-by: Rhyland Klein Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 80 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 7dffbe1a50c6..a00c09ea0793 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -23,6 +23,7 @@ #include #include #include +#include static struct mfd_cell tps65910s[] = { { @@ -129,6 +130,77 @@ err_sleep_init: return ret; } +#ifdef CONFIG_OF +static struct of_device_id tps65910_of_match[] = { + { .compatible = "ti,tps65910", .data = (void *)TPS65910}, + { .compatible = "ti,tps65911", .data = (void *)TPS65911}, + { }, +}; +MODULE_DEVICE_TABLE(of, tps65910_of_match); + +static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, + int *chip_id) +{ + struct device_node *np = client->dev.of_node; + struct tps65910_board *board_info; + unsigned int prop; + const struct of_device_id *match; + unsigned int prop_array[TPS6591X_MAX_NUM_GPIO]; + int ret = 0; + int idx; + + match = of_match_device(tps65910_of_match, &client->dev); + if (!match) { + dev_err(&client->dev, "Failed to find matching dt id\n"); + return NULL; + } + + *chip_id = (int)match->data; + + board_info = devm_kzalloc(&client->dev, sizeof(*board_info), + GFP_KERNEL); + if (!board_info) { + dev_err(&client->dev, "Failed to allocate pdata\n"); + return NULL; + } + + ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop); + if (!ret) + board_info->vmbch_threshold = prop; + else if (*chip_id == TPS65911) + dev_warn(&client->dev, "VMBCH-Threshold not specified"); + + ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop); + if (!ret) + board_info->vmbch2_threshold = prop; + else if (*chip_id == TPS65911) + dev_warn(&client->dev, "VMBCH2-Threshold not specified"); + + ret = of_property_read_u32_array(np, "ti,en-gpio-sleep", + prop_array, TPS6591X_MAX_NUM_GPIO); + if (!ret) + for (idx = 0; idx < ARRAY_SIZE(prop_array); idx++) + board_info->en_gpio_sleep[idx] = (prop_array[idx] != 0); + else if (ret != -EINVAL) { + dev_err(&client->dev, + "error reading property ti,en-gpio-sleep: %d\n.", ret); + return NULL; + } + + + board_info->irq = client->irq; + board_info->irq_base = -1; + board_info->gpio_base = -1; + + return board_info; +} +#else +static inline struct tps65910_board *tps65910_parse_dt( + struct i2c_client *client) +{ + return NULL; +} +#endif static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) @@ -137,8 +209,13 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, struct tps65910_board *pmic_plat_data; struct tps65910_platform_data *init_data; int ret = 0; + int chip_id = id->driver_data; pmic_plat_data = dev_get_platdata(&i2c->dev); + + if (!pmic_plat_data && i2c->dev.of_node) + pmic_plat_data = tps65910_parse_dt(i2c, &chip_id); + if (!pmic_plat_data) return -EINVAL; @@ -155,7 +232,7 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, tps65910); tps65910->dev = &i2c->dev; tps65910->i2c_client = i2c; - tps65910->id = id->driver_data; + tps65910->id = chip_id; mutex_init(&tps65910->io_mutex); tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config); @@ -215,6 +292,7 @@ static struct i2c_driver tps65910_i2c_driver = { .driver = { .name = "tps65910", .owner = THIS_MODULE, + .of_match_table = of_match_ptr(tps65910_of_match), }, .probe = tps65910_i2c_probe, .remove = __devexit_p(tps65910_i2c_remove), -- cgit v1.2.2 From 9577e8c3fbc145b5d2a12d2fbc6a50031573c77d Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Wed, 9 May 2012 05:43:59 +1000 Subject: mfd: Define all twl-regulator feature flags in one place twl-regulator has a collection of feature flags, some defined in twl-core.c and one defined in i2c/twl.h. This is confusing for anyone adding a new feature flag. So collect them together and place them in twl.h immediately after the structure in which they are initially set. Signed-off-by: NeilBrown Signed-off-by: Samuel Ortiz --- drivers/mfd/twl-core.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 7c2267e71f8b..6fc90befa79e 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -224,13 +224,6 @@ #define HIGH_PERF_SQ (1 << 3) #define CK32K_LOWPWR_EN (1 << 7) - -/* chip-specific feature flags, for i2c_device_id.driver_data */ -#define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */ -#define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */ -#define TWL5031 BIT(2) /* twl5031 has different registers */ -#define TWL6030_CLASS BIT(3) /* TWL6030 class */ - /*----------------------------------------------------------------------*/ /* is driver active, bound to a chip? */ -- cgit v1.2.2 From 3bf6bf9be51a0195c6b1604454fdd28ed1cc1770 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Wed, 9 May 2012 18:40:54 +0530 Subject: mfd: Cache tps65910 register when we need it During regmap initialization, we do not provide the default value and hence in place of caching register during regmap_init(), cache it when actually we need it i.e. after reading of that register. Signed-off-by: Laxman Dewangan Reviewed-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index a00c09ea0793..01570a789cf1 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -62,8 +62,7 @@ static const struct regmap_config tps65910_regmap_config = { .reg_bits = 8, .val_bits = 8, .volatile_reg = is_volatile_reg, - .max_register = TPS65910_MAX_REGISTER, - .num_reg_defaults_raw = TPS65910_MAX_REGISTER, + .max_register = TPS65910_MAX_REGISTER - 1, .cache_type = REGCACHE_RBTREE, }; -- cgit v1.2.2 From 63fe7dee9183118716078a9f2503f5f805d37c12 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Fri, 11 May 2012 12:36:57 +0200 Subject: mfd: Convert all tps65910 allocation to devm_* Convert memory allocation and regmap initialization to use devm_* functions. Signed-off-by: Laxman Dewangan Reviewed-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 01570a789cf1..22fa43070659 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -218,15 +218,13 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, if (!pmic_plat_data) return -EINVAL; - init_data = kzalloc(sizeof(struct tps65910_platform_data), GFP_KERNEL); + init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL); if (init_data == NULL) return -ENOMEM; - tps65910 = kzalloc(sizeof(struct tps65910), GFP_KERNEL); - if (tps65910 == NULL) { - kfree(init_data); + tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL); + if (tps65910 == NULL) return -ENOMEM; - } i2c_set_clientdata(i2c, tps65910); tps65910->dev = &i2c->dev; @@ -234,18 +232,20 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, tps65910->id = chip_id; mutex_init(&tps65910->io_mutex); - tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config); + tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config); if (IS_ERR(tps65910->regmap)) { ret = PTR_ERR(tps65910->regmap); dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret); - goto regmap_err; + return ret; } ret = mfd_add_devices(tps65910->dev, -1, tps65910s, ARRAY_SIZE(tps65910s), NULL, 0); - if (ret < 0) - goto err; + if (ret < 0) { + dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret); + return ret; + } init_data->irq = pmic_plat_data->irq; init_data->irq_base = pmic_plat_data->irq_base; @@ -256,14 +256,6 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, tps65910_sleepinit(tps65910, pmic_plat_data); - kfree(init_data); - return ret; - -err: - regmap_exit(tps65910->regmap); -regmap_err: - kfree(tps65910); - kfree(init_data); return ret; } @@ -273,8 +265,6 @@ static __devexit int tps65910_i2c_remove(struct i2c_client *i2c) tps65910_irq_exit(tps65910); mfd_remove_devices(tps65910->dev); - regmap_exit(tps65910->regmap); - kfree(tps65910); return 0; } -- cgit v1.2.2 From 32df986e985921386b75b4bd1117102bf65fe095 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Fri, 11 May 2012 15:07:44 +0200 Subject: mfd: Register tps65910 gpios as an mfd device As gpio support for tps65910 is on gpio driver, registering gpio support as the mfd sub devices instead of calling gpio_init() from the core probe. Signed-off-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 1 - drivers/mfd/tps65910.c | 6 +++--- 2 files changed, 3 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 1e9a7d5ec919..b914483cd630 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -189,7 +189,6 @@ config MFD_TPS65910 bool "TPS65910 Power Management chip" depends on I2C=y && GPIOLIB select MFD_CORE - select GPIO_TPS65910 select REGMAP_I2C help if you say yes here you get support for the TPS65910 series of diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 22fa43070659..553574da3611 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -19,13 +19,15 @@ #include #include #include -#include #include #include #include #include static struct mfd_cell tps65910s[] = { + { + .name = "tps65910-gpio", + }, { .name = "tps65910-pmic", }, @@ -250,8 +252,6 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, init_data->irq = pmic_plat_data->irq; init_data->irq_base = pmic_plat_data->irq_base; - tps65910_gpio_init(tps65910, pmic_plat_data->gpio_base); - tps65910_irq_init(tps65910, init_data->irq, init_data); tps65910_sleepinit(tps65910, pmic_plat_data); -- cgit v1.2.2 From 7f65f74ccee15f6eb0009921a428e3c5d5d06ae0 Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Fri, 11 May 2012 15:10:28 +0200 Subject: mfd: Fix tps65910 build failure MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The tps65910_parse_dt() prototype for !CONFIG_OF was not correct, leading to: drivers/mfd/tps65910.c: In function ‘tps65910_i2c_probe’: drivers/mfd/tps65910.c:218:3: error: too many arguments to function ‘tps65910_parse_dt’ Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 553574da3611..18b30cf45e5b 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -196,8 +196,9 @@ static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, return board_info; } #else -static inline struct tps65910_board *tps65910_parse_dt( - struct i2c_client *client) +static inline +struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, + int *chip_id) { return NULL; } -- cgit v1.2.2 From 27757e8262669321b496c55f06f4844e827fd1c5 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 9 May 2012 21:18:05 +0100 Subject: mfd: Staticise non-exported tps65217_update_bits() Signed-off-by: Mark Brown Acked-by: AnilKumar Ch Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65217.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c index c064c0a05649..db194e433c08 100644 --- a/drivers/mfd/tps65217.c +++ b/drivers/mfd/tps65217.c @@ -96,7 +96,7 @@ EXPORT_SYMBOL_GPL(tps65217_reg_write); * @val: Value to write. * @level: Password protected level */ -int tps65217_update_bits(struct tps65217 *tps, unsigned int reg, +static int tps65217_update_bits(struct tps65217 *tps, unsigned int reg, unsigned int mask, unsigned int val, unsigned int level) { int ret; -- cgit v1.2.2 From 879eed68265c8dcb2f2856ec96820fc93b7038c9 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 9 May 2012 22:53:48 +0100 Subject: mfd: Remove wm8400 custom cache implementation Save a useful amount of code by removing the custom cache implementation for wm8400 and using the regmap cache. Also simplify things by not separately reseting the CODEC registers, this is a sufficiently infrequent operation that we can simply invalidate the entire cache when this happens. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8400-core.c | 251 +++++++--------------------------------------- 1 file changed, 35 insertions(+), 216 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c index 1189a17f0f25..9083b775e2b6 100644 --- a/drivers/mfd/wm8400-core.c +++ b/drivers/mfd/wm8400-core.c @@ -23,136 +23,16 @@ #include #include -static struct { - u16 readable; /* Mask of readable bits */ - u16 writable; /* Mask of writable bits */ - u16 vol; /* Mask of volatile bits */ - int is_codec; /* Register controlled by codec reset */ - u16 default_val; /* Value on reset */ -} reg_data[] = { - { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */ - { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */ - { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */ - { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */ - { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */ - { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */ - { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */ - { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */ - { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */ - { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */ - { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */ - { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */ - { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */ - { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */ - { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */ - { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */ - { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */ - { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */ - { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */ - { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */ - { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */ - { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */ - { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */ - { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */ - { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */ - { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */ - { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */ - { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */ - { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */ - { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */ - { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */ - { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */ - { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */ - { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */ - { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */ - { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */ - { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */ - { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */ - { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */ - { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */ - { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */ - { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */ - { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */ - { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */ - { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */ - { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */ - { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */ - { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */ - { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */ - { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */ - { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */ - { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */ - { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */ - { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */ - { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */ - { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */ - { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */ - { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */ - { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */ - { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */ - { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */ - { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */ - { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */ - { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */ - { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */ - { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */ - { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */ - { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */ -}; - -static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest) +static bool wm8400_volatile(struct device *dev, unsigned int reg) { - int i, ret = 0; - - BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache)); - - /* If there are any volatile reads then read back the entire block */ - for (i = reg; i < reg + num_regs; i++) - if (reg_data[i].vol) { - ret = regmap_bulk_read(wm8400->regmap, reg, dest, - num_regs); - return ret; - } - - /* Otherwise use the cache */ - memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16)); - - return 0; -} - -static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs, - u16 *src) -{ - int ret, i; - - BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache)); - - for (i = 0; i < num_regs; i++) { - BUG_ON(!reg_data[reg + i].writable); - wm8400->reg_cache[reg + i] = src[i]; - ret = regmap_write(wm8400->regmap, reg, src[i]); - if (ret != 0) - return ret; + switch (reg) { + case WM8400_INTERRUPT_STATUS_1: + case WM8400_INTERRUPT_LEVELS: + case WM8400_SHUTDOWN_REASON: + return true; + default: + return false; } - - return 0; } /** @@ -165,13 +45,12 @@ static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs, */ u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg) { - u16 val; - - mutex_lock(&wm8400->io_lock); - - wm8400_read(wm8400, reg, 1, &val); + unsigned int val; + int ret; - mutex_unlock(&wm8400->io_lock); + ret = regmap_read(wm8400->regmap, reg, &val); + if (ret < 0) + return ret; return val; } @@ -179,62 +58,8 @@ EXPORT_SYMBOL_GPL(wm8400_reg_read); int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data) { - int ret; - - mutex_lock(&wm8400->io_lock); - - ret = wm8400_read(wm8400, reg, count, data); - - mutex_unlock(&wm8400->io_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm8400_block_read); - -/** - * wm8400_set_bits - Bitmask write - * - * @wm8400: Pointer to wm8400 control structure - * @reg: Register to access - * @mask: Mask of bits to change - * @val: Value to set for masked bits - */ -int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val) -{ - u16 tmp; - int ret; - - mutex_lock(&wm8400->io_lock); - - ret = wm8400_read(wm8400, reg, 1, &tmp); - tmp = (tmp & ~mask) | val; - if (ret == 0) - ret = wm8400_write(wm8400, reg, 1, &tmp); - - mutex_unlock(&wm8400->io_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm8400_set_bits); - -/** - * wm8400_reset_codec_reg_cache - Reset cached codec registers to - * their default values. - */ -void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400) -{ - int i; - - mutex_lock(&wm8400->io_lock); - - /* Reset all codec registers to their initial value */ - for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) - if (reg_data[i].is_codec) - wm8400->reg_cache[i] = reg_data[i].default_val; - - mutex_unlock(&wm8400->io_lock); + return regmap_bulk_read(wm8400->regmap, reg, data, count); } -EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache); static int wm8400_register_codec(struct wm8400 *wm8400) { @@ -257,44 +82,24 @@ static int wm8400_register_codec(struct wm8400 *wm8400) static int wm8400_init(struct wm8400 *wm8400, struct wm8400_platform_data *pdata) { - u16 reg; - int ret, i; - - mutex_init(&wm8400->io_lock); + unsigned int reg; + int ret; dev_set_drvdata(wm8400->dev, wm8400); /* Check that this is actually a WM8400 */ - ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, &i); + ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, ®); if (ret != 0) { dev_err(wm8400->dev, "Chip ID register read failed\n"); return -EIO; } - if (i != reg_data[WM8400_RESET_ID].default_val) { - dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n", i); + if (reg != 0x6172) { + dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n", + reg); return -ENODEV; } - /* We don't know what state the hardware is in and since this - * is a PMIC we can't reset it safely so initialise the register - * cache from the hardware. - */ - ret = regmap_raw_read(wm8400->regmap, 0, wm8400->reg_cache, - ARRAY_SIZE(wm8400->reg_cache)); - if (ret != 0) { - dev_err(wm8400->dev, "Register cache read failed\n"); - return -EIO; - } - for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) - wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]); - - /* If the codec is in reset use hard coded values */ - if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA)) - for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) - if (reg_data[i].is_codec) - wm8400->reg_cache[i] = reg_data[i].default_val; - - ret = wm8400_read(wm8400, WM8400_ID, 1, ®); + ret = regmap_read(wm8400->regmap, WM8400_ID, ®); if (ret != 0) { dev_err(wm8400->dev, "ID register read failed: %d\n", ret); return ret; @@ -334,8 +139,22 @@ static const struct regmap_config wm8400_regmap_config = { .reg_bits = 8, .val_bits = 16, .max_register = WM8400_REGISTER_COUNT - 1, + + .volatile_reg = wm8400_volatile, + + .cache_type = REGCACHE_RBTREE, }; +/** + * wm8400_reset_codec_reg_cache - Reset cached codec registers to + * their default values. + */ +void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400) +{ + regmap_reinit_cache(wm8400->regmap, &wm8400_regmap_config); +} +EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache); + #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) static int wm8400_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) -- cgit v1.2.2 From d9055dc501da6734e3cfea1ef236173bd8b645b1 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Thu, 10 May 2012 14:11:28 +0200 Subject: mfd: Add boost frequency and ovp to lm3533 platform data Add boost-frequency and over-voltage-protection settings to platform data. Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index 75f4b7f5a4fd..053438cff10a 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -138,6 +138,35 @@ int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask) } EXPORT_SYMBOL_GPL(lm3533_update); +static int lm3533_set_boost_freq(struct lm3533 *lm3533, + enum lm3533_boost_freq freq) +{ + int ret; + + ret = lm3533_update(lm3533, LM3533_REG_BOOST_PWM, + freq << LM3533_BOOST_FREQ_SHIFT, + LM3533_BOOST_FREQ_MASK); + if (ret) + dev_err(lm3533->dev, "failed to set boost frequency\n"); + + return ret; +} + + +static int lm3533_set_boost_ovp(struct lm3533 *lm3533, + enum lm3533_boost_ovp ovp) +{ + int ret; + + ret = lm3533_update(lm3533, LM3533_REG_BOOST_PWM, + ovp << LM3533_BOOST_OVP_SHIFT, + LM3533_BOOST_OVP_MASK); + if (ret) + dev_err(lm3533->dev, "failed to set boost ovp\n"); + + return ret; +} + /* * HVLED output config -- output hvled controlled by backlight bl */ @@ -521,6 +550,22 @@ static int __devinit lm3533_device_led_init(struct lm3533 *lm3533) return 0; } +static int __devinit lm3533_device_setup(struct lm3533 *lm3533, + struct lm3533_platform_data *pdata) +{ + int ret; + + ret = lm3533_set_boost_freq(lm3533, pdata->boost_freq); + if (ret) + return ret; + + ret = lm3533_set_boost_ovp(lm3533, pdata->boost_ovp); + if (ret) + return ret; + + return 0; +} + static int __devinit lm3533_device_init(struct lm3533 *lm3533) { struct lm3533_platform_data *pdata = lm3533->dev->platform_data; @@ -550,6 +595,10 @@ static int __devinit lm3533_device_init(struct lm3533 *lm3533) lm3533_enable(lm3533); + ret = lm3533_device_setup(lm3533, pdata); + if (ret) + goto err_disable; + lm3533_device_als_init(lm3533); lm3533_device_bl_init(lm3533); lm3533_device_led_init(lm3533); @@ -564,6 +613,7 @@ static int __devinit lm3533_device_init(struct lm3533 *lm3533) err_unregister: mfd_remove_devices(lm3533->dev); +err_disable: lm3533_disable(lm3533); if (gpio_is_valid(lm3533->gpio_hwen)) gpio_free(lm3533->gpio_hwen); -- cgit v1.2.2 From f4cf18ca5914bc1edb03c9049198738255fa4a23 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Thu, 10 May 2012 14:11:29 +0200 Subject: mfd: Remove lm3533 boost attributes Remove boost-frequency and ovp attributes, which can be set through platform data, from sysfs. Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 88 ----------------------------------------------- 1 file changed, 88 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index 053438cff10a..d6705431c897 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -26,11 +26,9 @@ #include -#define LM3533_BOOST_OVP_MAX 0x03 #define LM3533_BOOST_OVP_MASK 0x06 #define LM3533_BOOST_OVP_SHIFT 1 -#define LM3533_BOOST_FREQ_MAX 0x01 #define LM3533_BOOST_FREQ_MASK 0x01 #define LM3533_BOOST_FREQ_SHIFT 0 @@ -253,96 +251,12 @@ struct lm3533_device_attribute { struct { u8 id; } output; - struct { - u8 reg; - u8 shift; - u8 mask; - u8 max; - } generic; } u; }; #define to_lm3533_dev_attr(_attr) \ container_of(_attr, struct lm3533_device_attribute, dev_attr) -static ssize_t show_lm3533_reg(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct lm3533 *lm3533 = dev_get_drvdata(dev); - struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); - u8 val; - int ret; - - ret = lm3533_read(lm3533, lattr->u.generic.reg, &val); - if (ret) - return ret; - - val = (val & lattr->u.generic.mask) >> lattr->u.generic.shift; - - return scnprintf(buf, PAGE_SIZE, "%u\n", val); -} - -static ssize_t store_lm3533_reg(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct lm3533 *lm3533 = dev_get_drvdata(dev); - struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr); - u8 val; - int ret; - - if (kstrtou8(buf, 0, &val) || val > lattr->u.generic.max) - return -EINVAL; - - val = val << lattr->u.generic.shift; - ret = lm3533_update(lm3533, lattr->u.generic.reg, val, - lattr->u.generic.mask); - if (ret) - return ret; - - return len; -} - -#define GENERIC_ATTR(_reg, _max, _mask, _shift) \ - { .reg = _reg, \ - .max = _max, \ - .mask = _mask, \ - .shift = _shift } - -#define LM3533_GENERIC_ATTR(_name, _mode, _show, _store, _type, \ - _reg, _max, _mask, _shift) \ - struct lm3533_device_attribute lm3533_dev_attr_##_name = { \ - .dev_attr = __ATTR(_name, _mode, _show, _store), \ - .type = _type, \ - .u.generic = GENERIC_ATTR(_reg, _max, _mask, _shift) } - -#define LM3533_GENERIC_ATTR_RW(_name, _type, _reg, _max, _mask, _shift) \ - LM3533_GENERIC_ATTR(_name, S_IRUGO | S_IWUSR, \ - show_lm3533_reg, store_lm3533_reg, \ - _type, _reg, _max, _mask, _shift) - -#define LM3533_BOOST_ATTR_RW(_name, _NAME) \ - LM3533_GENERIC_ATTR_RW(_name, LM3533_ATTR_TYPE_BACKLIGHT, \ - LM3533_REG_BOOST_PWM, LM3533_##_NAME##_MAX, \ - LM3533_##_NAME##_MASK, LM3533_##_NAME##_SHIFT) -/* - * Boost Over Voltage Protection Select - * - * 0 - 16 V (default) - * 1 - 24 V - * 2 - 32 V - * 3 - 40 V - */ -static LM3533_BOOST_ATTR_RW(boost_ovp, BOOST_OVP); - -/* - * Boost Frequency Select - * - * 0 - 500 kHz (default) - * 1 - 1 MHz - */ -static LM3533_BOOST_ATTR_RW(boost_freq, BOOST_FREQ); - static ssize_t show_output(struct device *dev, struct device_attribute *attr, char *buf) { @@ -432,8 +346,6 @@ static LM3533_OUTPUT_LVLED_ATTR_RW(4); static LM3533_OUTPUT_LVLED_ATTR_RW(5); static struct attribute *lm3533_attributes[] = { - &lm3533_dev_attr_boost_freq.dev_attr.attr, - &lm3533_dev_attr_boost_ovp.dev_attr.attr, &lm3533_dev_attr_output_hvled1.dev_attr.attr, &lm3533_dev_attr_output_hvled2.dev_attr.attr, &lm3533_dev_attr_output_lvled1.dev_attr.attr, -- cgit v1.2.2 From 7af5e87dc5e6b6f413ba95b06e06ebf810687858 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Thu, 10 May 2012 19:18:28 +0200 Subject: mfd: Remove unused max-current lm3533 function The max-current attributes of the subdrivers have been dropped so remove the no longer used lm3533_ctrlbank_get_max_current function. Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-ctrlbank.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-ctrlbank.c b/drivers/mfd/lm3533-ctrlbank.c index c2732a37c65a..adf4c1a542a9 100644 --- a/drivers/mfd/lm3533-ctrlbank.c +++ b/drivers/mfd/lm3533-ctrlbank.c @@ -113,7 +113,6 @@ lm3533_ctrlbank_get(brightness, BRIGHTNESS); * 31 - 29.8 mA */ lm3533_ctrlbank_set(max_current, MAX_CURRENT); -lm3533_ctrlbank_get(max_current, MAX_CURRENT); /* * PWM-input control mask: -- cgit v1.2.2 From 6fa4b9d802610116adf4b89c2f9bd155829aafd3 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Thu, 10 May 2012 19:18:29 +0200 Subject: mfd: Use SI-units for the lm3533 max-current interface Use SI-units (uA) for max-current interface (5000 - 29800 uA). Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-ctrlbank.c | 43 +++++++++++++++++++++++++++++-------------- 1 file changed, 29 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-ctrlbank.c b/drivers/mfd/lm3533-ctrlbank.c index adf4c1a542a9..a4cb7a5220a7 100644 --- a/drivers/mfd/lm3533-ctrlbank.c +++ b/drivers/mfd/lm3533-ctrlbank.c @@ -17,8 +17,11 @@ #include +#define LM3533_MAX_CURRENT_MIN 5000 +#define LM3533_MAX_CURRENT_MAX 29800 +#define LM3533_MAX_CURRENT_STEP 800 + #define LM3533_BRIGHTNESS_MAX 255 -#define LM3533_MAX_CURRENT_MAX 31 #define LM3533_PWM_MAX 0x3f #define LM3533_REG_PWM_BASE 0x14 @@ -65,6 +68,31 @@ int lm3533_ctrlbank_disable(struct lm3533_ctrlbank *cb) } EXPORT_SYMBOL_GPL(lm3533_ctrlbank_disable); +/* + * Full-scale current. + * + * imax 5000 - 29800 uA (800 uA step) + */ +int lm3533_ctrlbank_set_max_current(struct lm3533_ctrlbank *cb, u16 imax) +{ + u8 reg; + u8 val; + int ret; + + if (imax < LM3533_MAX_CURRENT_MIN || imax > LM3533_MAX_CURRENT_MAX) + return -EINVAL; + + val = (imax - LM3533_MAX_CURRENT_MIN) / LM3533_MAX_CURRENT_STEP; + + reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_MAX_CURRENT_BASE); + ret = lm3533_write(cb->lm3533, reg, val); + if (ret) + dev_err(cb->dev, "failed to set max current\n"); + + return ret; +} +EXPORT_SYMBOL_GPL(lm3533_ctrlbank_set_max_current); + #define lm3533_ctrlbank_set(_name, _NAME) \ int lm3533_ctrlbank_set_##_name(struct lm3533_ctrlbank *cb, u8 val) \ { \ @@ -101,19 +129,6 @@ EXPORT_SYMBOL_GPL(lm3533_ctrlbank_get_##_name); lm3533_ctrlbank_set(brightness, BRIGHTNESS); lm3533_ctrlbank_get(brightness, BRIGHTNESS); -/* - * Full scale current. - * - * Imax = 5 + val * 0.8 mA, e.g.: - * - * 0 - 5 mA - * ... - * 19 - 20.2 mA (default) - * ... - * 31 - 29.8 mA - */ -lm3533_ctrlbank_set(max_current, MAX_CURRENT); - /* * PWM-input control mask: * -- cgit v1.2.2 From 664dd0665ef18462b7fc62dd8bbb3ad5d6e5a7de Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 10 May 2012 23:35:02 +0800 Subject: mfd: Fix lm3533 regmap_update_bits() call Current code calls regmap_update_bits() with mask and val arguments swapped. Signed-off-by: Axel Lin Acked-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index d6705431c897..d11c891e4a4d 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -126,7 +126,7 @@ int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask) dev_dbg(lm3533->dev, "update [%02x]: %02x/%02x\n", reg, val, mask); - ret = regmap_update_bits(lm3533->regmap, reg, val, mask); + ret = regmap_update_bits(lm3533->regmap, reg, mask, val); if (ret < 0) { dev_err(lm3533->dev, "failed to update register %02x: %d\n", reg, ret); -- cgit v1.2.2 From 805b237a63f686f87870af000a5ac464633cb9c8 Mon Sep 17 00:00:00 2001 From: Wim Van Sebroeck Date: Thu, 10 May 2012 20:54:32 +0200 Subject: mfd: Change tunnelcreek watchdog name on the lpc_sch subdevices array The name of the tunnelcreek watchdog device is not tunnelcreek_wdt but ie6xx_wdt. Signed-off-by: Wim Van Sebroeck Signed-off-by: Samuel Ortiz --- drivers/mfd/lpc_sch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c index 9bf08393d747..9f20abc5e393 100644 --- a/drivers/mfd/lpc_sch.c +++ b/drivers/mfd/lpc_sch.c @@ -69,7 +69,7 @@ static struct resource wdt_sch_resource = { static struct mfd_cell tunnelcreek_cells[] = { { - .name = "tunnelcreek_wdt", + .name = "ie6xx_wdt", .num_resources = 1, .resources = &wdt_sch_resource, }, -- cgit v1.2.2 From 6608a5e2dd0dff73fe1bf912036349ad5ed78bdb Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 11 May 2012 09:29:51 +0800 Subject: mfd: Convert da9052 to use devm_* APIs Signed-off-by: Axel Lin Signed-off-by: Samuel Ortiz --- drivers/mfd/da9052-i2c.c | 24 +++++++----------------- drivers/mfd/da9052-spi.c | 18 +++++------------- 2 files changed, 12 insertions(+), 30 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index 8410065f135f..82c9d6450286 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -70,7 +70,7 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, struct da9052 *da9052; int ret; - da9052 = kzalloc(sizeof(struct da9052), GFP_KERNEL); + da9052 = devm_kzalloc(&client->dev, sizeof(struct da9052), GFP_KERNEL); if (!da9052) return -ENOMEM; @@ -78,8 +78,7 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, I2C_FUNC_SMBUS_BYTE_DATA)) { dev_info(&client->dev, "Error in %s:i2c_check_functionality\n", __func__); - ret = -ENODEV; - goto err; + return -ENODEV; } da9052->dev = &client->dev; @@ -87,17 +86,17 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, i2c_set_clientdata(client, da9052); - da9052->regmap = regmap_init_i2c(client, &da9052_regmap_config); + da9052->regmap = devm_regmap_init_i2c(client, &da9052_regmap_config); if (IS_ERR(da9052->regmap)) { ret = PTR_ERR(da9052->regmap); dev_err(&client->dev, "Failed to allocate register map: %d\n", ret); - goto err; + return ret; } ret = da9052_i2c_enable_multiwrite(da9052); if (ret < 0) - goto err_regmap; + return ret; #ifdef CONFIG_OF if (!id) { @@ -112,20 +111,14 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, if (!id) { ret = -ENODEV; dev_err(&client->dev, "id is null.\n"); - goto err_regmap; + return ret; } ret = da9052_device_init(da9052, id->driver_data); if (ret != 0) - goto err_regmap; + return ret; return 0; - -err_regmap: - regmap_exit(da9052->regmap); -err: - kfree(da9052); - return ret; } static int __devexit da9052_i2c_remove(struct i2c_client *client) @@ -133,9 +126,6 @@ static int __devexit da9052_i2c_remove(struct i2c_client *client) struct da9052 *da9052 = i2c_get_clientdata(client); da9052_device_exit(da9052); - regmap_exit(da9052->regmap); - kfree(da9052); - return 0; } diff --git a/drivers/mfd/da9052-spi.c b/drivers/mfd/da9052-spi.c index 6e09498c2c80..dbeadc5a6436 100644 --- a/drivers/mfd/da9052-spi.c +++ b/drivers/mfd/da9052-spi.c @@ -25,8 +25,9 @@ static int __devinit da9052_spi_probe(struct spi_device *spi) { int ret; const struct spi_device_id *id = spi_get_device_id(spi); - struct da9052 *da9052 = kzalloc(sizeof(struct da9052), GFP_KERNEL); + struct da9052 *da9052; + da9052 = devm_kzalloc(&spi->dev, sizeof(struct da9052), GFP_KERNEL); if (!da9052) return -ENOMEM; @@ -42,25 +43,19 @@ static int __devinit da9052_spi_probe(struct spi_device *spi) da9052_regmap_config.read_flag_mask = 1; da9052_regmap_config.write_flag_mask = 0; - da9052->regmap = regmap_init_spi(spi, &da9052_regmap_config); + da9052->regmap = devm_regmap_init_spi(spi, &da9052_regmap_config); if (IS_ERR(da9052->regmap)) { ret = PTR_ERR(da9052->regmap); dev_err(&spi->dev, "Failed to allocate register map: %d\n", ret); - goto err; + return ret; } ret = da9052_device_init(da9052, id->driver_data); if (ret != 0) - goto err_regmap; + return ret; return 0; - -err_regmap: - regmap_exit(da9052->regmap); -err: - kfree(da9052); - return ret; } static int __devexit da9052_spi_remove(struct spi_device *spi) @@ -68,9 +63,6 @@ static int __devexit da9052_spi_remove(struct spi_device *spi) struct da9052 *da9052 = dev_get_drvdata(&spi->dev); da9052_device_exit(da9052); - regmap_exit(da9052->regmap); - kfree(da9052); - return 0; } -- cgit v1.2.2 From aa4603a0a7663b10e645b32cc808aac00bc390a3 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 11 May 2012 09:31:29 +0800 Subject: mfd: Convert pcf50633-core to use devm_* APIs Signed-off-by: Axel Lin Signed-off-by: Samuel Ortiz --- drivers/mfd/pcf50633-core.c | 36 ++++++++++-------------------------- 1 file changed, 10 insertions(+), 26 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c index 189c2f07b83f..29c122bf28ea 100644 --- a/drivers/mfd/pcf50633-core.c +++ b/drivers/mfd/pcf50633-core.c @@ -204,7 +204,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client, return -ENOENT; } - pcf = kzalloc(sizeof(*pcf), GFP_KERNEL); + pcf = devm_kzalloc(&client->dev, sizeof(*pcf), GFP_KERNEL); if (!pcf) return -ENOMEM; @@ -212,12 +212,11 @@ static int __devinit pcf50633_probe(struct i2c_client *client, mutex_init(&pcf->lock); - pcf->regmap = regmap_init_i2c(client, &pcf50633_regmap_config); + pcf->regmap = devm_regmap_init_i2c(client, &pcf50633_regmap_config); if (IS_ERR(pcf->regmap)) { ret = PTR_ERR(pcf->regmap); - dev_err(pcf->dev, "Failed to allocate register map: %d\n", - ret); - goto err_free; + dev_err(pcf->dev, "Failed to allocate register map: %d\n", ret); + return ret; } i2c_set_clientdata(client, pcf); @@ -228,7 +227,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client, if (version < 0 || variant < 0) { dev_err(pcf->dev, "Unable to probe pcf50633\n"); ret = -ENODEV; - goto err_regmap; + return ret; } dev_info(pcf->dev, "Probed device version %d variant %d\n", @@ -237,16 +236,11 @@ static int __devinit pcf50633_probe(struct i2c_client *client, pcf50633_irq_init(pcf, client->irq); /* Create sub devices */ - pcf50633_client_dev_register(pcf, "pcf50633-input", - &pcf->input_pdev); - pcf50633_client_dev_register(pcf, "pcf50633-rtc", - &pcf->rtc_pdev); - pcf50633_client_dev_register(pcf, "pcf50633-mbc", - &pcf->mbc_pdev); - pcf50633_client_dev_register(pcf, "pcf50633-adc", - &pcf->adc_pdev); - pcf50633_client_dev_register(pcf, "pcf50633-backlight", - &pcf->bl_pdev); + pcf50633_client_dev_register(pcf, "pcf50633-input", &pcf->input_pdev); + pcf50633_client_dev_register(pcf, "pcf50633-rtc", &pcf->rtc_pdev); + pcf50633_client_dev_register(pcf, "pcf50633-mbc", &pcf->mbc_pdev); + pcf50633_client_dev_register(pcf, "pcf50633-adc", &pcf->adc_pdev); + pcf50633_client_dev_register(pcf, "pcf50633-backlight", &pcf->bl_pdev); for (i = 0; i < PCF50633_NUM_REGULATORS; i++) { @@ -274,13 +268,6 @@ static int __devinit pcf50633_probe(struct i2c_client *client, pdata->probe_done(pcf); return 0; - -err_regmap: - regmap_exit(pcf->regmap); -err_free: - kfree(pcf); - - return ret; } static int __devexit pcf50633_remove(struct i2c_client *client) @@ -300,9 +287,6 @@ static int __devexit pcf50633_remove(struct i2c_client *client) for (i = 0; i < PCF50633_NUM_REGULATORS; i++) platform_device_unregister(pcf->regulator_pdev[i]); - regmap_exit(pcf->regmap); - kfree(pcf); - return 0; } -- cgit v1.2.2 From 10bbc48d7a045c022a54f637c0c6b72f0e38b519 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Fri, 11 May 2012 21:48:27 +0530 Subject: gpio: Convert tps65910 to a platform driver Make the gpio-tps65910 as platform driver and register this from tps65910 core driver as mfd sub device. Signed-off-by: Laxman Dewangan Acked-by: Grant Likely Signed-off-by: Samuel Ortiz --- drivers/gpio/gpio-tps65910.c | 140 +++++++++++++++++++++++++++++++------------ 1 file changed, 102 insertions(+), 38 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index bc155f2509ba..af6dc837ffca 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c @@ -18,11 +18,23 @@ #include #include #include +#include #include +struct tps65910_gpio { + struct gpio_chip gpio_chip; + struct tps65910 *tps65910; +}; + +static inline struct tps65910_gpio *to_tps65910_gpio(struct gpio_chip *chip) +{ + return container_of(chip, struct tps65910_gpio, gpio_chip); +} + static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) { - struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); + struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); + struct tps65910 *tps65910 = tps65910_gpio->tps65910; unsigned int val; tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &val); @@ -36,7 +48,8 @@ static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, int value) { - struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); + struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); + struct tps65910 *tps65910 = tps65910_gpio->tps65910; if (value) tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset, @@ -49,7 +62,8 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, int value) { - struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); + struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); + struct tps65910 *tps65910 = tps65910_gpio->tps65910; /* Set the initial value */ tps65910_gpio_set(gc, offset, value); @@ -60,59 +74,109 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) { - struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); + struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); + struct tps65910 *tps65910 = tps65910_gpio->tps65910; return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, GPIO_CFG_MASK); } -void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base) +static int __devinit tps65910_gpio_probe(struct platform_device *pdev) { + struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); + struct tps65910_board *pdata = dev_get_platdata(tps65910->dev); + struct tps65910_gpio *tps65910_gpio; int ret; - struct tps65910_board *board_data; + int i; + + tps65910_gpio = devm_kzalloc(&pdev->dev, + sizeof(*tps65910_gpio), GFP_KERNEL); + if (!tps65910_gpio) { + dev_err(&pdev->dev, "Could not allocate tps65910_gpio\n"); + return -ENOMEM; + } - if (!gpio_base) - return; + tps65910_gpio->tps65910 = tps65910; - tps65910->gpio.owner = THIS_MODULE; - tps65910->gpio.label = tps65910->i2c_client->name; - tps65910->gpio.dev = tps65910->dev; - tps65910->gpio.base = gpio_base; + tps65910_gpio->gpio_chip.owner = THIS_MODULE; + tps65910_gpio->gpio_chip.label = tps65910->i2c_client->name; switch(tps65910_chip_id(tps65910)) { case TPS65910: - tps65910->gpio.ngpio = TPS65910_NUM_GPIO; + tps65910_gpio->gpio_chip.ngpio = TPS65910_NUM_GPIO; break; case TPS65911: - tps65910->gpio.ngpio = TPS65911_NUM_GPIO; + tps65910_gpio->gpio_chip.ngpio = TPS65911_NUM_GPIO; break; default: - return; + return -EINVAL; } - tps65910->gpio.can_sleep = 1; - - tps65910->gpio.direction_input = tps65910_gpio_input; - tps65910->gpio.direction_output = tps65910_gpio_output; - tps65910->gpio.set = tps65910_gpio_set; - tps65910->gpio.get = tps65910_gpio_get; - - /* Configure sleep control for gpios */ - board_data = dev_get_platdata(tps65910->dev); - if (board_data) { - int i; - for (i = 0; i < tps65910->gpio.ngpio; ++i) { - if (board_data->en_gpio_sleep[i]) { - ret = tps65910_reg_set_bits(tps65910, - TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); - if (ret < 0) - dev_warn(tps65910->dev, - "GPIO Sleep setting failed\n"); - } - } + tps65910_gpio->gpio_chip.can_sleep = 1; + tps65910_gpio->gpio_chip.direction_input = tps65910_gpio_input; + tps65910_gpio->gpio_chip.direction_output = tps65910_gpio_output; + tps65910_gpio->gpio_chip.set = tps65910_gpio_set; + tps65910_gpio->gpio_chip.get = tps65910_gpio_get; + tps65910_gpio->gpio_chip.dev = &pdev->dev; + if (pdata && pdata->gpio_base) + tps65910_gpio->gpio_chip.base = pdata->gpio_base; + else + tps65910_gpio->gpio_chip.base = -1; + + if (!pdata) + goto skip_init; + + /* Configure sleep control for gpios if provided */ + for (i = 0; i < tps65910_gpio->gpio_chip.ngpio; ++i) { + if (!pdata->en_gpio_sleep[i]) + continue; + + ret = tps65910_reg_set_bits(tps65910, + TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); + if (ret < 0) + dev_warn(tps65910->dev, + "GPIO Sleep setting failed with err %d\n", ret); + } + +skip_init: + ret = gpiochip_add(&tps65910_gpio->gpio_chip); + if (ret < 0) { + dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); + return ret; } - ret = gpiochip_add(&tps65910->gpio); + platform_set_drvdata(pdev, tps65910_gpio); - if (ret) - dev_warn(tps65910->dev, "GPIO registration failed: %d\n", ret); + return ret; } + +static int __devexit tps65910_gpio_remove(struct platform_device *pdev) +{ + struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev); + + return gpiochip_remove(&tps65910_gpio->gpio_chip); +} + +static struct platform_driver tps65910_gpio_driver = { + .driver.name = "tps65910-gpio", + .driver.owner = THIS_MODULE, + .probe = tps65910_gpio_probe, + .remove = __devexit_p(tps65910_gpio_remove), +}; + +static int __init tps65910_gpio_init(void) +{ + return platform_driver_register(&tps65910_gpio_driver); +} +subsys_initcall(tps65910_gpio_init); + +static void __exit tps65910_gpio_exit(void) +{ + platform_driver_unregister(&tps65910_gpio_driver); +} +module_exit(tps65910_gpio_exit); + +MODULE_AUTHOR("Graeme Gregory "); +MODULE_AUTHOR("Jorge Eduardo Candelaria jedu@slimlogic.co.uk>"); +MODULE_DESCRIPTION("GPIO interface for TPS65910/TPS6511 PMICs"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:tps65910-gpio"); -- cgit v1.2.2 From 168755ebb11e8bc17f2c12c42534adaf003a7d7e Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Sat, 12 May 2012 14:01:04 +0300 Subject: mfd: Silence an lm3533 gcc warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is supposed to be umode_t. It causes a GCC warning: drivers/mfd/lm3533-core.c:440:2: warning: initialization from incompatible pointer type [enabled by default] drivers/mfd/lm3533-core.c:440:2: warning: (near initialization for ‘lm3533_attribute_group.is_visible’) [enabled by default] Signed-off-by: Dan Carpenter Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index d11c891e4a4d..1627472ecc0d 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -359,7 +359,7 @@ static struct attribute *lm3533_attributes[] = { #define to_dev_attr(_attr) \ container_of(_attr, struct device_attribute, attr) -static mode_t lm3533_attr_is_visible(struct kobject *kobj, +static umode_t lm3533_attr_is_visible(struct kobject *kobj, struct attribute *attr, int n) { struct device *dev = container_of(kobj, struct device, kobj); -- cgit v1.2.2 From eee0e4b44f855f4a34c77137cb64d08c9fb484e9 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 14 May 2012 10:13:15 +0100 Subject: mfd: Don't support non-modular wm8400 build It's relying on non-exported symbols. Reported-by: Stephen Rothwell Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b914483cd630..af46ce019fc7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -465,7 +465,7 @@ config MFD_S5M_CORE of the device config MFD_WM8400 - tristate "Support Wolfson Microelectronics WM8400" + bool "Support Wolfson Microelectronics WM8400" select MFD_CORE depends on I2C select REGMAP_I2C -- cgit v1.2.2 From ebd29c6cc0b29b4bb041441fc251e0f400eea2cf Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 14 May 2012 10:13:16 +0100 Subject: mfd: Export wm8400_block_read() Used by the regulator driver. Reported-by: Stephen Rothwell Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8400-core.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c index 9083b775e2b6..4b7d378551d5 100644 --- a/drivers/mfd/wm8400-core.c +++ b/drivers/mfd/wm8400-core.c @@ -60,6 +60,7 @@ int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data) { return regmap_bulk_read(wm8400->regmap, reg, data, count); } +EXPORT_SYMBOL_GPL(wm8400_block_read); static int wm8400_register_codec(struct wm8400 *wm8400) { -- cgit v1.2.2 From 83871c00bb43f41d85dd15aba56a83bbb191eabc Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Mon, 14 May 2012 22:50:39 +0200 Subject: mfd: Add MAX77693 driver This patch adds MFD driver for MAX77693 to enable its sub devices. The MAX77693 is a multi-function devices. It includes PMIC, MUIC(Micro USB Interface Controller), flash LED control and haptic motor control. Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham Signed-off-by: Kyungmin Park Reviewed-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 12 +++ drivers/mfd/Makefile | 1 + drivers/mfd/max77693.c | 217 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 230 insertions(+) create mode 100644 drivers/mfd/max77693.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index af46ce019fc7..a0e1b834af61 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -420,6 +420,18 @@ config PMIC_ADP5520 individual components like LCD backlight, LEDs, GPIOs and Kepad under the corresponding menus. +config MFD_MAX77693 + bool "Maxim Semiconductor MAX77693 PMIC Support" + depends on I2C=y && GENERIC_HARDIRQS + select MFD_CORE + help + Say yes here to support for Maxim Semiconductor MAX77693. + This is a companion Power Management IC with Flash, Haptic, Charger, + and MUIC(Micro USB Interface Controller) controls on chip. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + config MFD_MAX8925 bool "Maxim Semiconductor MAX8925 PMIC Support" depends on I2C=y && GENERIC_HARDIRQS diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index d3dae9567800..db0262b34af6 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -78,6 +78,7 @@ obj-$(CONFIG_PMIC_DA9052) += da9052-core.o obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o +obj-$(CONFIG_MFD_MAX77693) += max77693.o max8925-objs := max8925-core.o max8925-i2c.o obj-$(CONFIG_MFD_MAX8925) += max8925.o obj-$(CONFIG_MFD_MAX8997) += max8997.o max8997-irq.o diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c new file mode 100644 index 000000000000..c852515e68c8 --- /dev/null +++ b/drivers/mfd/max77693.c @@ -0,0 +1,217 @@ +/* + * max77693.c - mfd core driver for the MAX 77693 + * + * Copyright (C) 2012 Samsung Electronics + * SangYoung Son + * + * This program is not provided / owned by Maxim Integrated Products. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This driver is based on max8997.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_ADDR_PMIC (0xCC >> 1) /* Charger, Flash LED */ +#define I2C_ADDR_MUIC (0x4A >> 1) +#define I2C_ADDR_HAPTIC (0x90 >> 1) + +static struct mfd_cell max77693_devs[] = { + { .name = "max77693-pmic", }, + { .name = "max77693-charger", }, + { .name = "max77693-flash", }, + { .name = "max77693-muic", }, + { .name = "max77693-haptic", }, +}; + +int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest) +{ + unsigned int val; + int ret; + + ret = regmap_read(map, reg, &val); + *dest = val; + + return ret; +} +EXPORT_SYMBOL_GPL(max77693_read_reg); + +int max77693_bulk_read(struct regmap *map, u8 reg, int count, u8 *buf) +{ + int ret; + + ret = regmap_bulk_read(map, reg, buf, count); + + return ret; +} +EXPORT_SYMBOL_GPL(max77693_bulk_read); + +int max77693_write_reg(struct regmap *map, u8 reg, u8 value) +{ + int ret; + + ret = regmap_write(map, reg, value); + + return ret; +} +EXPORT_SYMBOL_GPL(max77693_write_reg); + +int max77693_bulk_write(struct regmap *map, u8 reg, int count, u8 *buf) +{ + int ret; + + ret = regmap_bulk_write(map, reg, buf, count); + + return ret; +} +EXPORT_SYMBOL_GPL(max77693_bulk_write); + +int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask) +{ + int ret; + + ret = regmap_update_bits(map, reg, mask, val); + + return ret; +} +EXPORT_SYMBOL_GPL(max77693_update_reg); + +static const struct regmap_config max77693_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77693_PMIC_REG_END, +}; + +static int max77693_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct max77693_dev *max77693; + struct max77693_platform_data *pdata = i2c->dev.platform_data; + u8 reg_data; + int ret = 0; + + max77693 = devm_kzalloc(&i2c->dev, + sizeof(struct max77693_dev), GFP_KERNEL); + if (max77693 == NULL) + return -ENOMEM; + + max77693->regmap = devm_regmap_init_i2c(i2c, &max77693_regmap_config); + if (IS_ERR(max77693->regmap)) { + ret = PTR_ERR(max77693->regmap); + dev_err(max77693->dev,"failed to allocate register map: %d\n", + ret); + goto err_regmap; + } + + i2c_set_clientdata(i2c, max77693); + max77693->dev = &i2c->dev; + max77693->i2c = i2c; + max77693->irq = i2c->irq; + max77693->type = id->driver_data; + + if (!pdata) + goto err_regmap; + + max77693->wakeup = pdata->wakeup; + + mutex_init(&max77693->iolock); + + if (max77693_read_reg(max77693->regmap, + MAX77693_PMIC_REG_PMIC_ID2, ®_data) < 0) { + dev_err(max77693->dev, "device not found on this channel\n"); + ret = -ENODEV; + goto err_regmap; + } else + dev_info(max77693->dev, "device ID: 0x%x\n", reg_data); + + max77693->muic = i2c_new_dummy(i2c->adapter, I2C_ADDR_MUIC); + i2c_set_clientdata(max77693->muic, max77693); + + max77693->haptic = i2c_new_dummy(i2c->adapter, I2C_ADDR_HAPTIC); + i2c_set_clientdata(max77693->haptic, max77693); + + pm_runtime_set_active(max77693->dev); + + ret = mfd_add_devices(max77693->dev, -1, max77693_devs, + ARRAY_SIZE(max77693_devs), NULL, 0); + if (ret < 0) + goto err_mfd; + + return ret; + +err_mfd: + i2c_unregister_device(max77693->muic); + i2c_unregister_device(max77693->haptic); +err_regmap: + kfree(max77693); + + return ret; +} + +static int max77693_i2c_remove(struct i2c_client *i2c) +{ + struct max77693_dev *max77693 = i2c_get_clientdata(i2c); + + mfd_remove_devices(max77693->dev); + i2c_unregister_device(max77693->muic); + i2c_unregister_device(max77693->haptic); + + return 0; +} + +static const struct i2c_device_id max77693_i2c_id[] = { + { "max77693", TYPE_MAX77693 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max77693_i2c_id); + +static struct i2c_driver max77693_i2c_driver = { + .driver = { + .name = "max77693", + .owner = THIS_MODULE, + }, + .probe = max77693_i2c_probe, + .remove = max77693_i2c_remove, + .id_table = max77693_i2c_id, +}; + +static int __init max77693_i2c_init(void) +{ + return i2c_add_driver(&max77693_i2c_driver); +} +/* init early so consumer devices can complete system boot */ +subsys_initcall(max77693_i2c_init); + +static void __exit max77693_i2c_exit(void) +{ + i2c_del_driver(&max77693_i2c_driver); +} +module_exit(max77693_i2c_exit); + +MODULE_DESCRIPTION("MAXIM 77693 multi-function core driver"); +MODULE_AUTHOR("SangYoung, Son "); +MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 6592ebb3979c1ec0e37eb06553ef5ce9d6f5f025 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Mon, 14 May 2012 22:54:20 +0200 Subject: mfd: Add MAX77693 irq handler This patch supports IRQ handling for MAX77693. Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham Signed-off-by: Kyungmin Park Signed-off-by: Samuel Ortiz --- drivers/mfd/Makefile | 2 +- drivers/mfd/max77693-irq.c | 309 +++++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/max77693.c | 32 +++++ 3 files changed, 342 insertions(+), 1 deletion(-) create mode 100644 drivers/mfd/max77693-irq.c (limited to 'drivers') diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index db0262b34af6..d7138510c880 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -78,7 +78,7 @@ obj-$(CONFIG_PMIC_DA9052) += da9052-core.o obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o -obj-$(CONFIG_MFD_MAX77693) += max77693.o +obj-$(CONFIG_MFD_MAX77693) += max77693.o max77693-irq.o max8925-objs := max8925-core.o max8925-i2c.o obj-$(CONFIG_MFD_MAX8925) += max8925.o obj-$(CONFIG_MFD_MAX8997) += max8997.o max8997-irq.o diff --git a/drivers/mfd/max77693-irq.c b/drivers/mfd/max77693-irq.c new file mode 100644 index 000000000000..2b403569e0a6 --- /dev/null +++ b/drivers/mfd/max77693-irq.c @@ -0,0 +1,309 @@ +/* + * max77693-irq.c - Interrupt controller support for MAX77693 + * + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * SangYoung Son + * + * This program is not provided / owned by Maxim Integrated Products. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This driver is based on max8997-irq.c + */ + +#include +#include +#include +#include +#include +#include +#include + +static const u8 max77693_mask_reg[] = { + [LED_INT] = MAX77693_LED_REG_FLASH_INT_MASK, + [TOPSYS_INT] = MAX77693_PMIC_REG_TOPSYS_INT_MASK, + [CHG_INT] = MAX77693_CHG_REG_CHG_INT_MASK, + [MUIC_INT1] = MAX77693_MUIC_REG_INTMASK1, + [MUIC_INT2] = MAX77693_MUIC_REG_INTMASK2, + [MUIC_INT3] = MAX77693_MUIC_REG_INTMASK3, +}; + +static struct regmap *max77693_get_regmap(struct max77693_dev *max77693, + enum max77693_irq_source src) +{ + switch (src) { + case LED_INT ... CHG_INT: + return max77693->regmap; + case MUIC_INT1 ... MUIC_INT3: + return max77693->regmap_muic; + default: + return ERR_PTR(-EINVAL); + } +} + +struct max77693_irq_data { + int mask; + enum max77693_irq_source group; +}; + +#define DECLARE_IRQ(idx, _group, _mask) \ + [(idx)] = { .group = (_group), .mask = (_mask) } +static const struct max77693_irq_data max77693_irqs[] = { + DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_OPEN, LED_INT, 1 << 0), + DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_SHORT, LED_INT, 1 << 1), + DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_OPEN, LED_INT, 1 << 2), + DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_SHORT, LED_INT, 1 << 3), + DECLARE_IRQ(MAX77693_LED_IRQ_MAX_FLASH, LED_INT, 1 << 4), + + DECLARE_IRQ(MAX77693_TOPSYS_IRQ_T120C_INT, TOPSYS_INT, 1 << 0), + DECLARE_IRQ(MAX77693_TOPSYS_IRQ_T140C_INT, TOPSYS_INT, 1 << 1), + DECLARE_IRQ(MAX77693_TOPSYS_IRQ_LOWSYS_INT, TOPSYS_INT, 1 << 3), + + DECLARE_IRQ(MAX77693_CHG_IRQ_BYP_I, CHG_INT, 1 << 0), + DECLARE_IRQ(MAX77693_CHG_IRQ_THM_I, CHG_INT, 1 << 2), + DECLARE_IRQ(MAX77693_CHG_IRQ_BAT_I, CHG_INT, 1 << 3), + DECLARE_IRQ(MAX77693_CHG_IRQ_CHG_I, CHG_INT, 1 << 4), + DECLARE_IRQ(MAX77693_CHG_IRQ_CHGIN_I, CHG_INT, 1 << 6), + + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC, MUIC_INT1, 1 << 0), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC_LOW, MUIC_INT1, 1 << 1), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC_ERR, MUIC_INT1, 1 << 2), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC1K, MUIC_INT1, 1 << 3), + + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_CHGTYP, MUIC_INT2, 1 << 0), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_CHGDETREUN, MUIC_INT2, 1 << 1), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_DCDTMR, MUIC_INT2, 1 << 2), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_DXOVP, MUIC_INT2, 1 << 3), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_VBVOLT, MUIC_INT2, 1 << 4), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_VIDRM, MUIC_INT2, 1 << 5), + + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_EOC, MUIC_INT3, 1 << 0), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_CGMBC, MUIC_INT3, 1 << 1), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_OVP, MUIC_INT3, 1 << 2), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR, MUIC_INT3, 1 << 3), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_CHG_ENABLED, MUIC_INT3, 1 << 4), + DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_BAT_DET, MUIC_INT3, 1 << 5), +}; + +static void max77693_irq_lock(struct irq_data *data) +{ + struct max77693_dev *max77693 = irq_get_chip_data(data->irq); + + mutex_lock(&max77693->irqlock); +} + +static void max77693_irq_sync_unlock(struct irq_data *data) +{ + struct max77693_dev *max77693 = irq_get_chip_data(data->irq); + int i; + + for (i = 0; i < MAX77693_IRQ_GROUP_NR; i++) { + u8 mask_reg = max77693_mask_reg[i]; + struct regmap *map = max77693_get_regmap(max77693, i); + + if (mask_reg == MAX77693_REG_INVALID || + IS_ERR_OR_NULL(map)) + continue; + max77693->irq_masks_cache[i] = max77693->irq_masks_cur[i]; + + max77693_write_reg(map, max77693_mask_reg[i], + max77693->irq_masks_cur[i]); + } + + mutex_unlock(&max77693->irqlock); +} + +static const inline struct max77693_irq_data * +irq_to_max77693_irq(struct max77693_dev *max77693, int irq) +{ + return &max77693_irqs[irq]; +} + +static void max77693_irq_mask(struct irq_data *data) +{ + struct max77693_dev *max77693 = irq_get_chip_data(data->irq); + const struct max77693_irq_data *irq_data = + irq_to_max77693_irq(max77693, data->irq); + + if (irq_data->group >= MUIC_INT1 && irq_data->group <= MUIC_INT3) + max77693->irq_masks_cur[irq_data->group] &= ~irq_data->mask; + else + max77693->irq_masks_cur[irq_data->group] |= irq_data->mask; +} + +static void max77693_irq_unmask(struct irq_data *data) +{ + struct max77693_dev *max77693 = irq_get_chip_data(data->irq); + const struct max77693_irq_data *irq_data = + irq_to_max77693_irq(max77693, data->irq); + + if (irq_data->group >= MUIC_INT1 && irq_data->group <= MUIC_INT3) + max77693->irq_masks_cur[irq_data->group] |= irq_data->mask; + else + max77693->irq_masks_cur[irq_data->group] &= ~irq_data->mask; +} + +static struct irq_chip max77693_irq_chip = { + .name = "max77693", + .irq_bus_lock = max77693_irq_lock, + .irq_bus_sync_unlock = max77693_irq_sync_unlock, + .irq_mask = max77693_irq_mask, + .irq_unmask = max77693_irq_unmask, +}; + +#define MAX77693_IRQSRC_CHG (1 << 0) +#define MAX77693_IRQSRC_TOP (1 << 1) +#define MAX77693_IRQSRC_FLASH (1 << 2) +#define MAX77693_IRQSRC_MUIC (1 << 3) +static irqreturn_t max77693_irq_thread(int irq, void *data) +{ + struct max77693_dev *max77693 = data; + u8 irq_reg[MAX77693_IRQ_GROUP_NR] = {}; + u8 irq_src; + int ret; + int i, cur_irq; + + ret = max77693_read_reg(max77693->regmap, MAX77693_PMIC_REG_INTSRC, + &irq_src); + if (ret < 0) { + dev_err(max77693->dev, "Failed to read interrupt source: %d\n", + ret); + return IRQ_NONE; + } + + if (irq_src & MAX77693_IRQSRC_CHG) + /* CHG_INT */ + ret = max77693_read_reg(max77693->regmap, MAX77693_CHG_REG_CHG_INT, + &irq_reg[CHG_INT]); + + if (irq_src & MAX77693_IRQSRC_TOP) + /* TOPSYS_INT */ + ret = max77693_read_reg(max77693->regmap, + MAX77693_PMIC_REG_TOPSYS_INT, &irq_reg[TOPSYS_INT]); + + if (irq_src & MAX77693_IRQSRC_FLASH) + /* LED_INT */ + ret = max77693_read_reg(max77693->regmap, + MAX77693_LED_REG_FLASH_INT, &irq_reg[LED_INT]); + + if (irq_src & MAX77693_IRQSRC_MUIC) + /* MUIC INT1 ~ INT3 */ + max77693_bulk_read(max77693->regmap, MAX77693_MUIC_REG_INT1, + MAX77693_NUM_IRQ_MUIC_REGS, &irq_reg[MUIC_INT1]); + + /* Apply masking */ + for (i = 0; i < MAX77693_IRQ_GROUP_NR; i++) { + if (i >= MUIC_INT1 && i <= MUIC_INT3) + irq_reg[i] &= max77693->irq_masks_cur[i]; + else + irq_reg[i] &= ~max77693->irq_masks_cur[i]; + } + + /* Report */ + for (i = 0; i < MAX77693_IRQ_NR; i++) { + if (irq_reg[max77693_irqs[i].group] & max77693_irqs[i].mask) { + cur_irq = irq_find_mapping(max77693->irq_domain, i); + if (cur_irq) + handle_nested_irq(cur_irq); + } + } + + return IRQ_HANDLED; +} + +int max77693_irq_resume(struct max77693_dev *max77693) +{ + if (max77693->irq) + max77693_irq_thread(0, max77693); + + return 0; +} + +static int max77693_irq_domain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + struct max77693_dev *max77693 = d->host_data; + + irq_set_chip_data(irq, max77693); + irq_set_chip_and_handler(irq, &max77693_irq_chip, handle_edge_irq); + irq_set_nested_thread(irq, 1); +#ifdef CONFIG_ARM + set_irq_flags(irq, IRQF_VALID); +#else + irq_set_noprobe(irq); +#endif + return 0; +} + +static struct irq_domain_ops max77693_irq_domain_ops = { + .map = max77693_irq_domain_map, +}; + +int max77693_irq_init(struct max77693_dev *max77693) +{ + struct irq_domain *domain; + int i; + int ret; + + mutex_init(&max77693->irqlock); + + /* Mask individual interrupt sources */ + for (i = 0; i < MAX77693_IRQ_GROUP_NR; i++) { + struct regmap *map; + /* MUIC IRQ 0:MASK 1:NOT MASK */ + /* Other IRQ 1:MASK 0:NOT MASK */ + if (i >= MUIC_INT1 && i <= MUIC_INT3) { + max77693->irq_masks_cur[i] = 0x00; + max77693->irq_masks_cache[i] = 0x00; + } else { + max77693->irq_masks_cur[i] = 0xff; + max77693->irq_masks_cache[i] = 0xff; + } + map = max77693_get_regmap(max77693, i); + + if (IS_ERR_OR_NULL(map)) + continue; + if (max77693_mask_reg[i] == MAX77693_REG_INVALID) + continue; + if (i >= MUIC_INT1 && i <= MUIC_INT3) + max77693_write_reg(map, max77693_mask_reg[i], 0x00); + else + max77693_write_reg(map, max77693_mask_reg[i], 0xff); + } + + domain = irq_domain_add_linear(NULL, MAX77693_IRQ_NR, + &max77693_irq_domain_ops, max77693); + if (!domain) { + dev_err(max77693->dev, "could not create irq domain\n"); + return -ENODEV; + } + max77693->irq_domain = domain; + + ret = request_threaded_irq(max77693->irq, NULL, max77693_irq_thread, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + "max77693-irq", max77693); + + if (ret) + dev_err(max77693->dev, "Failed to request IRQ %d: %d\n", + max77693->irq, ret); + + return 0; +} + +void max77693_irq_exit(struct max77693_dev *max77693) +{ + if (max77693->irq) + free_irq(max77693->irq, max77693); +} diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c index c852515e68c8..e9e4278722f3 100644 --- a/drivers/mfd/max77693.c +++ b/drivers/mfd/max77693.c @@ -154,6 +154,10 @@ static int max77693_i2c_probe(struct i2c_client *i2c, max77693->haptic = i2c_new_dummy(i2c->adapter, I2C_ADDR_HAPTIC); i2c_set_clientdata(max77693->haptic, max77693); + ret = max77693_irq_init(max77693); + if (ret < 0) + goto err_mfd; + pm_runtime_set_active(max77693->dev); ret = mfd_add_devices(max77693->dev, -1, max77693_devs, @@ -161,6 +165,8 @@ static int max77693_i2c_probe(struct i2c_client *i2c, if (ret < 0) goto err_mfd; + device_init_wakeup(max77693->dev, pdata->wakeup); + return ret; err_mfd: @@ -189,10 +195,36 @@ static const struct i2c_device_id max77693_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, max77693_i2c_id); +static int max77693_suspend(struct device *dev) +{ + struct i2c_client *i2c = container_of(dev, struct i2c_client, dev); + struct max77693_dev *max77693 = i2c_get_clientdata(i2c); + + if (device_may_wakeup(dev)) + irq_set_irq_wake(max77693->irq, 1); + return 0; +} + +static int max77693_resume(struct device *dev) +{ + struct i2c_client *i2c = container_of(dev, struct i2c_client, dev); + struct max77693_dev *max77693 = i2c_get_clientdata(i2c); + + if (device_may_wakeup(dev)) + irq_set_irq_wake(max77693->irq, 0); + return max77693_irq_resume(max77693); +} + +const struct dev_pm_ops max77693_pm = { + .suspend = max77693_suspend, + .resume = max77693_resume, +}; + static struct i2c_driver max77693_i2c_driver = { .driver = { .name = "max77693", .owner = THIS_MODULE, + .pm = &max77693_pm, }, .probe = max77693_i2c_probe, .remove = max77693_i2c_remove, -- cgit v1.2.2 From 4492c4c3ff7bbb5fd400f021532643a3493f0723 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Sun, 13 May 2012 21:53:45 +0100 Subject: mfd: Don't try to flag IRQ 0 as a wm831x wake source If we've not got a primary IRQ we shouldn't be trying to flag IRQ 0 as a wake source. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm831x-irq.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c index bec4d0539160..2be9628074bd 100644 --- a/drivers/mfd/wm831x-irq.c +++ b/drivers/mfd/wm831x-irq.c @@ -565,17 +565,6 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) wm831x_set_bits(wm831x, WM831X_IRQ_CONFIG, WM831X_IRQ_OD, i); - /* Try to flag /IRQ as a wake source; there are a number of - * unconditional wake sources in the PMIC so this isn't - * conditional but we don't actually care *too* much if it - * fails. - */ - ret = enable_irq_wake(irq); - if (ret != 0) { - dev_warn(wm831x->dev, "Can't enable IRQ as wake source: %d\n", - ret); - } - wm831x->irq = irq; /* Register them with genirq */ @@ -597,6 +586,18 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) } if (irq) { + /* Try to flag /IRQ as a wake source; there are a number of + * unconditional wake sources in the PMIC so this isn't + * conditional but we don't actually care *too* much if it + * fails. + */ + ret = enable_irq_wake(irq); + if (ret != 0) { + dev_warn(wm831x->dev, + "Can't enable IRQ as wake source: %d\n", + ret); + } + ret = request_threaded_irq(irq, NULL, wm831x_irq_thread, IRQF_TRIGGER_LOW | IRQF_ONESHOT, "wm831x", wm831x); -- cgit v1.2.2 From cd99758ba3bde64347a8ece381cbae2fb5c745b2 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 14 May 2012 23:14:24 +0200 Subject: mfd: Convert wm831x to irq_domain The modern idiom is to use irq_domain to allocate interrupts. This is useful partly to allow further infrastructure to be based on the domains and partly because it makes it much easier to allocate virtual interrupts to devices as we don't need to allocate a contiguous range of interrupt numbers. Convert the wm831x driver over to this infrastructure, using a legacy IRQ mapping if an irq_base is specified in platform data and otherwise using a linear mapping, always registering the interrupts even if they won't ever be used. Only boards which need to use the GPIOs as interrupts should need to use an irq_base. This means that we can't use the MFD irq_base management since the unless we're using an explicit irq_base from platform data we can't rely on a linear mapping of interrupts. Instead we need to map things via the irq_domain - provide a conveniencem function wm831x_irq() to save a small amount of typing when doing so. Looking at this I couldn't clearly see anything the MFD core could do to make this nicer. Since we're not supporting device tree yet there's no meaningful advantage if we don't do this conversion in one, the fact that the interrupt resources are used for repeated IP blocks makes accessor functions for the irq_domain more trouble to do than they're worth. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/gpio/gpio-wm831x.c | 6 +- drivers/input/misc/wm831x-on.c | 2 +- drivers/input/touchscreen/wm831x-ts.c | 9 +-- drivers/mfd/Kconfig | 2 + drivers/mfd/wm831x-auxadc.c | 6 +- drivers/mfd/wm831x-core.c | 19 +++---- drivers/mfd/wm831x-irq.c | 101 +++++++++++++++++++++------------- drivers/power/wm831x_power.c | 21 ++++--- drivers/regulator/wm831x-dcdc.c | 24 +++++--- drivers/regulator/wm831x-isink.c | 4 +- drivers/regulator/wm831x-ldo.c | 10 ++-- drivers/rtc/rtc-wm831x.c | 2 +- 12 files changed, 123 insertions(+), 83 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c index deb949e75ec1..e56a2165641c 100644 --- a/drivers/gpio/gpio-wm831x.c +++ b/drivers/gpio/gpio-wm831x.c @@ -102,10 +102,8 @@ static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); struct wm831x *wm831x = wm831x_gpio->wm831x; - if (!wm831x->irq_base) - return -EINVAL; - - return wm831x->irq_base + WM831X_IRQ_GPIO_1 + offset; + return irq_create_mapping(wm831x->irq_domain, + WM831X_IRQ_GPIO_1 + offset); } static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, diff --git a/drivers/input/misc/wm831x-on.c b/drivers/input/misc/wm831x-on.c index 47f18d6bce46..6790a812a1db 100644 --- a/drivers/input/misc/wm831x-on.c +++ b/drivers/input/misc/wm831x-on.c @@ -73,7 +73,7 @@ static int __devinit wm831x_on_probe(struct platform_device *pdev) { struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); struct wm831x_on *wm831x_on; - int irq = platform_get_irq(pdev, 0); + int irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0)); int ret; wm831x_on = kzalloc(sizeof(struct wm831x_on), GFP_KERNEL); diff --git a/drivers/input/touchscreen/wm831x-ts.c b/drivers/input/touchscreen/wm831x-ts.c index 4bc851a9dc3d..e83410721e38 100644 --- a/drivers/input/touchscreen/wm831x-ts.c +++ b/drivers/input/touchscreen/wm831x-ts.c @@ -260,15 +260,16 @@ static __devinit int wm831x_ts_probe(struct platform_device *pdev) * If we have a direct IRQ use it, otherwise use the interrupt * from the WM831x IRQ controller. */ + wm831x_ts->data_irq = wm831x_irq(wm831x, + platform_get_irq_byname(pdev, + "TCHDATA")); if (pdata && pdata->data_irq) wm831x_ts->data_irq = pdata->data_irq; - else - wm831x_ts->data_irq = platform_get_irq_byname(pdev, "TCHDATA"); + wm831x_ts->pd_irq = wm831x_irq(wm831x, + platform_get_irq_byname(pdev, "TCHPD")); if (pdata && pdata->pd_irq) wm831x_ts->pd_irq = pdata->pd_irq; - else - wm831x_ts->pd_irq = platform_get_irq_byname(pdev, "TCHPD"); if (pdata) wm831x_ts->pressure = pdata->pressure; diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index a0e1b834af61..8325c44c04c6 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -496,6 +496,7 @@ config MFD_WM831X_I2C select MFD_CORE select MFD_WM831X select REGMAP_I2C + select IRQ_DOMAIN depends on I2C=y && GENERIC_HARDIRQS help Support for the Wolfson Microelecronics WM831x and WM832x PMICs @@ -508,6 +509,7 @@ config MFD_WM831X_SPI select MFD_CORE select MFD_WM831X select REGMAP_SPI + select IRQ_DOMAIN depends on SPI_MASTER && GENERIC_HARDIRQS help Support for the Wolfson Microelecronics WM831x and WM832x PMICs diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c index 87210954a066..6ee3018d8653 100644 --- a/drivers/mfd/wm831x-auxadc.c +++ b/drivers/mfd/wm831x-auxadc.c @@ -280,11 +280,11 @@ void wm831x_auxadc_init(struct wm831x *wm831x) mutex_init(&wm831x->auxadc_lock); INIT_LIST_HEAD(&wm831x->auxadc_pending); - if (wm831x->irq && wm831x->irq_base) { + if (wm831x->irq) { wm831x->auxadc_read = wm831x_auxadc_read_irq; - ret = request_threaded_irq(wm831x->irq_base + - WM831X_IRQ_AUXADC_DATA, + ret = request_threaded_irq(wm831x_irq(wm831x, + WM831X_IRQ_AUXADC_DATA), NULL, wm831x_auxadc_irq, 0, "auxadc", wm831x); if (ret < 0) { diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c index 476e4d31a823..946698fd2dc6 100644 --- a/drivers/mfd/wm831x-core.c +++ b/drivers/mfd/wm831x-core.c @@ -1813,27 +1813,27 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) case WM8310: ret = mfd_add_devices(wm831x->dev, wm831x_num, wm8310_devs, ARRAY_SIZE(wm8310_devs), - NULL, wm831x->irq_base); + NULL, 0); break; case WM8311: ret = mfd_add_devices(wm831x->dev, wm831x_num, wm8311_devs, ARRAY_SIZE(wm8311_devs), - NULL, wm831x->irq_base); + NULL, 0); if (!pdata || !pdata->disable_touch) mfd_add_devices(wm831x->dev, wm831x_num, touch_devs, ARRAY_SIZE(touch_devs), - NULL, wm831x->irq_base); + NULL, 0); break; case WM8312: ret = mfd_add_devices(wm831x->dev, wm831x_num, wm8312_devs, ARRAY_SIZE(wm8312_devs), - NULL, wm831x->irq_base); + NULL, 0); if (!pdata || !pdata->disable_touch) mfd_add_devices(wm831x->dev, wm831x_num, touch_devs, ARRAY_SIZE(touch_devs), - NULL, wm831x->irq_base); + NULL, 0); break; case WM8320: @@ -1842,7 +1842,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) case WM8326: ret = mfd_add_devices(wm831x->dev, wm831x_num, wm8320_devs, ARRAY_SIZE(wm8320_devs), - NULL, wm831x->irq_base); + NULL, 0); break; default: @@ -1867,7 +1867,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) if (ret & WM831X_XTAL_ENA) { ret = mfd_add_devices(wm831x->dev, wm831x_num, rtc_devs, ARRAY_SIZE(rtc_devs), - NULL, wm831x->irq_base); + NULL, 0); if (ret != 0) { dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret); goto err_irq; @@ -1880,7 +1880,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) /* Treat errors as non-critical */ ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs, ARRAY_SIZE(backlight_devs), NULL, - wm831x->irq_base); + 0); if (ret < 0) dev_err(wm831x->dev, "Failed to add backlight: %d\n", ret); @@ -1909,8 +1909,7 @@ void wm831x_device_exit(struct wm831x *wm831x) { wm831x_otp_exit(wm831x); mfd_remove_devices(wm831x->dev); - if (wm831x->irq_base) - free_irq(wm831x->irq_base + WM831X_IRQ_AUXADC_DATA, wm831x); + free_irq(wm831x_irq(wm831x, WM831X_IRQ_AUXADC_DATA), wm831x); wm831x_irq_exit(wm831x); } diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c index 2be9628074bd..ecc9d6d62fad 100644 --- a/drivers/mfd/wm831x-irq.c +++ b/drivers/mfd/wm831x-irq.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -328,7 +329,7 @@ static inline int irq_data_to_status_reg(struct wm831x_irq_data *irq_data) static inline struct wm831x_irq_data *irq_to_wm831x_irq(struct wm831x *wm831x, int irq) { - return &wm831x_irqs[irq - wm831x->irq_base]; + return &wm831x_irqs[irq]; } static void wm831x_irq_lock(struct irq_data *data) @@ -374,7 +375,7 @@ static void wm831x_irq_enable(struct irq_data *data) { struct wm831x *wm831x = irq_data_get_irq_chip_data(data); struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x, - data->irq); + data->hwirq); wm831x->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask; } @@ -383,7 +384,7 @@ static void wm831x_irq_disable(struct irq_data *data) { struct wm831x *wm831x = irq_data_get_irq_chip_data(data); struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x, - data->irq); + data->hwirq); wm831x->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask; } @@ -393,7 +394,7 @@ static int wm831x_irq_set_type(struct irq_data *data, unsigned int type) struct wm831x *wm831x = irq_data_get_irq_chip_data(data); int irq; - irq = data->irq - wm831x->irq_base; + irq = data->hwirq; if (irq < WM831X_IRQ_GPIO_1 || irq > WM831X_IRQ_GPIO_11) { /* Ignore internal-only IRQs */ @@ -469,9 +470,11 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data) * descriptors. */ if (primary & WM831X_TCHPD_INT) - handle_nested_irq(wm831x->irq_base + WM831X_IRQ_TCHPD); + handle_nested_irq(irq_find_mapping(wm831x->irq_domain, + WM831X_IRQ_TCHPD)); if (primary & WM831X_TCHDATA_INT) - handle_nested_irq(wm831x->irq_base + WM831X_IRQ_TCHDATA); + handle_nested_irq(irq_find_mapping(wm831x->irq_domain, + WM831X_IRQ_TCHDATA)); primary &= ~(WM831X_TCHDATA_EINT | WM831X_TCHPD_EINT); for (i = 0; i < ARRAY_SIZE(wm831x_irqs); i++) { @@ -507,7 +510,8 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data) } if (*status & wm831x_irqs[i].mask) - handle_nested_irq(wm831x->irq_base + i); + handle_nested_irq(irq_find_mapping(wm831x->irq_domain, + i)); /* Simulate an edge triggered IRQ by polling the input * status. This is sucky but improves interoperability. @@ -516,7 +520,8 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data) wm831x->gpio_level[i - WM831X_IRQ_GPIO_1]) { ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL); while (ret & 1 << (i - WM831X_IRQ_GPIO_1)) { - handle_nested_irq(wm831x->irq_base + i); + handle_nested_irq(irq_find_mapping(wm831x->irq_domain, + i)); ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL); } @@ -527,10 +532,34 @@ out: return IRQ_HANDLED; } +static int wm831x_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + irq_set_chip_data(virq, h->host_data); + irq_set_chip_and_handler(virq, &wm831x_irq_chip, handle_edge_irq); + irq_set_nested_thread(virq, 1); + + /* ARM needs us to explicitly flag the IRQ as valid + * and will set them noprobe when we do so. */ +#ifdef CONFIG_ARM + set_irq_flags(virq, IRQF_VALID); +#else + irq_set_noprobe(virq); +#endif + + return 0; +} + +static struct irq_domain_ops wm831x_irq_domain_ops = { + .map = wm831x_irq_map, + .xlate = irq_domain_xlate_twocell, +}; + int wm831x_irq_init(struct wm831x *wm831x, int irq) { struct wm831x_pdata *pdata = wm831x->dev->platform_data; - int i, cur_irq, ret; + struct irq_domain *domain; + int i, ret, irq_base; mutex_init(&wm831x->irq_lock); @@ -543,18 +572,33 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) } /* Try to dynamically allocate IRQs if no base is specified */ - if (!pdata || !pdata->irq_base) - wm831x->irq_base = -1; + if (pdata && pdata->irq_base) { + irq_base = irq_alloc_descs(pdata->irq_base, 0, + WM831X_NUM_IRQS, 0); + if (irq_base < 0) { + dev_warn(wm831x->dev, "Failed to allocate IRQs: %d\n", + irq_base); + irq_base = 0; + } + } else { + irq_base = 0; + } + + if (irq_base) + domain = irq_domain_add_legacy(wm831x->dev->of_node, + ARRAY_SIZE(wm831x_irqs), + irq_base, 0, + &wm831x_irq_domain_ops, + wm831x); else - wm831x->irq_base = pdata->irq_base; + domain = irq_domain_add_linear(wm831x->dev->of_node, + ARRAY_SIZE(wm831x_irqs), + &wm831x_irq_domain_ops, + wm831x); - wm831x->irq_base = irq_alloc_descs(wm831x->irq_base, 0, - WM831X_NUM_IRQS, 0); - if (wm831x->irq_base < 0) { - dev_warn(wm831x->dev, "Failed to allocate IRQs: %d\n", - wm831x->irq_base); - wm831x->irq_base = 0; - return 0; + if (!domain) { + dev_warn(wm831x->dev, "Failed to allocate IRQ domain\n"); + return -EINVAL; } if (pdata && pdata->irq_cmos) @@ -566,24 +610,7 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) WM831X_IRQ_OD, i); wm831x->irq = irq; - - /* Register them with genirq */ - for (cur_irq = wm831x->irq_base; - cur_irq < ARRAY_SIZE(wm831x_irqs) + wm831x->irq_base; - cur_irq++) { - irq_set_chip_data(cur_irq, wm831x); - irq_set_chip_and_handler(cur_irq, &wm831x_irq_chip, - handle_edge_irq); - irq_set_nested_thread(cur_irq, 1); - - /* ARM needs us to explicitly flag the IRQ as valid - * and will set them noprobe when we do so. */ -#ifdef CONFIG_ARM - set_irq_flags(cur_irq, IRQF_VALID); -#else - irq_set_noprobe(cur_irq); -#endif - } + wm831x->irq_domain = domain; if (irq) { /* Try to flag /IRQ as a wake source; there are a number of diff --git a/drivers/power/wm831x_power.c b/drivers/power/wm831x_power.c index 987332b71d8d..fc1ad9551182 100644 --- a/drivers/power/wm831x_power.c +++ b/drivers/power/wm831x_power.c @@ -565,7 +565,7 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev) goto err_usb; } - irq = platform_get_irq_byname(pdev, "SYSLO"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO")); ret = request_threaded_irq(irq, NULL, wm831x_syslo_irq, IRQF_TRIGGER_RISING, "System power low", power); @@ -575,7 +575,7 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev) goto err_battery; } - irq = platform_get_irq_byname(pdev, "PWR SRC"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC")); ret = request_threaded_irq(irq, NULL, wm831x_pwr_src_irq, IRQF_TRIGGER_RISING, "Power source", power); @@ -586,7 +586,9 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev) } for (i = 0; i < ARRAY_SIZE(wm831x_bat_irqs); i++) { - irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]); + irq = wm831x_irq(wm831x, + platform_get_irq_byname(pdev, + wm831x_bat_irqs[i])); ret = request_threaded_irq(irq, NULL, wm831x_bat_irq, IRQF_TRIGGER_RISING, wm831x_bat_irqs[i], @@ -606,10 +608,10 @@ err_bat_irq: irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]); free_irq(irq, power); } - irq = platform_get_irq_byname(pdev, "PWR SRC"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC")); free_irq(irq, power); err_syslo: - irq = platform_get_irq_byname(pdev, "SYSLO"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO")); free_irq(irq, power); err_battery: if (power->have_battery) @@ -626,17 +628,20 @@ err_kmalloc: static __devexit int wm831x_power_remove(struct platform_device *pdev) { struct wm831x_power *wm831x_power = platform_get_drvdata(pdev); + struct wm831x *wm831x = wm831x_power->wm831x; int irq, i; for (i = 0; i < ARRAY_SIZE(wm831x_bat_irqs); i++) { - irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]); + irq = wm831x_irq(wm831x, + platform_get_irq_byname(pdev, + wm831x_bat_irqs[i])); free_irq(irq, wm831x_power); } - irq = platform_get_irq_byname(pdev, "PWR SRC"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC")); free_irq(irq, wm831x_power); - irq = platform_get_irq_byname(pdev, "SYSLO"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO")); free_irq(irq, wm831x_power); if (wm831x_power->have_battery) diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c index ff810e787eac..33b2f20a2932 100644 --- a/drivers/regulator/wm831x-dcdc.c +++ b/drivers/regulator/wm831x-dcdc.c @@ -565,7 +565,7 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq_byname(pdev, "UV"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, IRQF_TRIGGER_RISING, dcdc->name, dcdc); if (ret != 0) { @@ -574,7 +574,7 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev) goto err_regulator; } - irq = platform_get_irq_byname(pdev, "HC"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")); ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq, IRQF_TRIGGER_RISING, dcdc->name, dcdc); if (ret != 0) { @@ -588,7 +588,8 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev) return 0; err_uv: - free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); + free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")), + dcdc); err_regulator: regulator_unregister(dcdc->regulator); err: @@ -600,11 +601,14 @@ err: static __devexit int wm831x_buckv_remove(struct platform_device *pdev) { struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); + struct wm831x *wm831x = dcdc->wm831x; platform_set_drvdata(pdev, NULL); - free_irq(platform_get_irq_byname(pdev, "HC"), dcdc); - free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); + free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")), + dcdc); + free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")), + dcdc); regulator_unregister(dcdc->regulator); if (dcdc->dvs_gpio) gpio_free(dcdc->dvs_gpio); @@ -758,7 +762,7 @@ static __devinit int wm831x_buckp_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq_byname(pdev, "UV"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, IRQF_TRIGGER_RISING, dcdc->name, dcdc); if (ret != 0) { @@ -783,7 +787,8 @@ static __devexit int wm831x_buckp_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); + free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")), + dcdc); regulator_unregister(dcdc->regulator); return 0; @@ -883,7 +888,7 @@ static __devinit int wm831x_boostp_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq_byname(pdev, "UV"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, IRQF_TRIGGER_RISING, dcdc->name, dcdc); @@ -910,7 +915,8 @@ static __devexit int wm831x_boostp_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); + free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")), + dcdc); regulator_unregister(dcdc->regulator); kfree(dcdc); diff --git a/drivers/regulator/wm831x-isink.c b/drivers/regulator/wm831x-isink.c index b414e09c5620..1596947f603f 100644 --- a/drivers/regulator/wm831x-isink.c +++ b/drivers/regulator/wm831x-isink.c @@ -198,7 +198,7 @@ static __devinit int wm831x_isink_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq(pdev, 0); + irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0)); ret = request_threaded_irq(irq, NULL, wm831x_isink_irq, IRQF_TRIGGER_RISING, isink->name, isink); if (ret != 0) { @@ -223,7 +223,7 @@ static __devexit int wm831x_isink_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - free_irq(platform_get_irq(pdev, 0), isink); + free_irq(wm831x_irq(isink->wm831x, platform_get_irq(pdev, 0)), isink); regulator_unregister(isink->regulator); diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c index 641e9f6499d1..b09ba05ada6d 100644 --- a/drivers/regulator/wm831x-ldo.c +++ b/drivers/regulator/wm831x-ldo.c @@ -359,7 +359,7 @@ static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq_byname(pdev, "UV"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); ret = request_threaded_irq(irq, NULL, wm831x_ldo_uv_irq, IRQF_TRIGGER_RISING, ldo->name, ldo); @@ -385,7 +385,8 @@ static __devexit int wm831x_gp_ldo_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - free_irq(platform_get_irq_byname(pdev, "UV"), ldo); + free_irq(wm831x_irq(ldo->wm831x, + platform_get_irq_byname(pdev, "UV")), ldo); regulator_unregister(ldo->regulator); return 0; @@ -624,7 +625,7 @@ static __devinit int wm831x_aldo_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq_byname(pdev, "UV"); + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); ret = request_threaded_irq(irq, NULL, wm831x_ldo_uv_irq, IRQF_TRIGGER_RISING, ldo->name, ldo); if (ret != 0) { @@ -647,7 +648,8 @@ static __devexit int wm831x_aldo_remove(struct platform_device *pdev) { struct wm831x_ldo *ldo = platform_get_drvdata(pdev); - free_irq(platform_get_irq_byname(pdev, "UV"), ldo); + free_irq(wm831x_irq(ldo->wm831x, platform_get_irq_byname(pdev, "UV")), + ldo); regulator_unregister(ldo->regulator); return 0; diff --git a/drivers/rtc/rtc-wm831x.c b/drivers/rtc/rtc-wm831x.c index 3b6e6a67e765..59c6245e0421 100644 --- a/drivers/rtc/rtc-wm831x.c +++ b/drivers/rtc/rtc-wm831x.c @@ -396,7 +396,7 @@ static int wm831x_rtc_probe(struct platform_device *pdev) { struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); struct wm831x_rtc *wm831x_rtc; - int alm_irq = platform_get_irq_byname(pdev, "ALM"); + int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM")); int ret = 0; wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL); -- cgit v1.2.2 From 08b4c118af35d4d67eca2052aaa8d4a5f7d0aecb Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 16 May 2012 09:05:54 +0100 Subject: mfd: wm8400 needs to depend on I2C=y Reported-by: Stephen Rothwell Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8325c44c04c6..6da82ded3371 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -479,7 +479,7 @@ config MFD_S5M_CORE config MFD_WM8400 bool "Support Wolfson Microelectronics WM8400" select MFD_CORE - depends on I2C + depends on I2C=y select REGMAP_I2C help Support for the Wolfson Microelecronics WM8400 PMIC and audio -- cgit v1.2.2 From b09530ef844f0bf29ed3677080c02b179be84818 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Sun, 13 May 2012 09:18:02 +0800 Subject: mfd: Make anatop register accessor more flexible and rename meaningfully - rename to anatop_read_reg and anatop_write_reg - anatop_read_reg directly return reg value - anatop_write_reg write reg with mask Signed-off-by: Richard Zhao Reviewed-by: Ying-Chun Liu (PaulLiu) Signed-off-by: Samuel Ortiz --- drivers/mfd/anatop-mfd.c | 35 +++++++++++------------------------ drivers/regulator/anatop-regulator.c | 18 ++++++++---------- 2 files changed, 19 insertions(+), 34 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/anatop-mfd.c b/drivers/mfd/anatop-mfd.c index 2af42480635e..6da06341f6c9 100644 --- a/drivers/mfd/anatop-mfd.c +++ b/drivers/mfd/anatop-mfd.c @@ -41,39 +41,26 @@ #include #include -u32 anatop_get_bits(struct anatop *adata, u32 addr, int bit_shift, - int bit_width) +u32 anatop_read_reg(struct anatop *adata, u32 addr) { - u32 val, mask; - - if (bit_width == 32) - mask = ~0; - else - mask = (1 << bit_width) - 1; - - val = readl(adata->ioreg + addr); - val = (val >> bit_shift) & mask; - - return val; + return readl(adata->ioreg + addr); } -EXPORT_SYMBOL_GPL(anatop_get_bits); +EXPORT_SYMBOL_GPL(anatop_read_reg); -void anatop_set_bits(struct anatop *adata, u32 addr, int bit_shift, - int bit_width, u32 data) +void anatop_write_reg(struct anatop *adata, u32 addr, u32 data, u32 mask) { - u32 val, mask; + u32 val; - if (bit_width == 32) - mask = ~0; - else - mask = (1 << bit_width) - 1; + data &= mask; spin_lock(&adata->reglock); - val = readl(adata->ioreg + addr) & ~(mask << bit_shift); - writel((data << bit_shift) | val, adata->ioreg + addr); + val = readl(adata->ioreg + addr); + val &= ~mask; + val |= data; + writel(val, adata->ioreg + addr); spin_unlock(&adata->reglock); } -EXPORT_SYMBOL_GPL(anatop_set_bits); +EXPORT_SYMBOL_GPL(anatop_write_reg); static const struct of_device_id of_anatop_match[] = { { .compatible = "fsl,imx6q-anatop", }, diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c index 81fd606e47bc..0a3408570d0a 100644 --- a/drivers/regulator/anatop-regulator.c +++ b/drivers/regulator/anatop-regulator.c @@ -47,7 +47,7 @@ static int anatop_set_voltage(struct regulator_dev *reg, int min_uV, int max_uV, unsigned *selector) { struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); - u32 val, sel; + u32 val, sel, mask; int uv; uv = min_uV; @@ -71,11 +71,10 @@ static int anatop_set_voltage(struct regulator_dev *reg, int min_uV, val = anatop_reg->min_bit_val + sel; *selector = sel; dev_dbg(®->dev, "%s: calculated val %d\n", __func__, val); - anatop_set_bits(anatop_reg->mfd, - anatop_reg->control_reg, - anatop_reg->vol_bit_shift, - anatop_reg->vol_bit_width, - val); + mask = ((1 << anatop_reg->vol_bit_width) - 1) << + anatop_reg->vol_bit_shift; + val <<= anatop_reg->vol_bit_shift; + anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask); return 0; } @@ -88,10 +87,9 @@ static int anatop_get_voltage_sel(struct regulator_dev *reg) if (!anatop_reg->control_reg) return -ENOTSUPP; - val = anatop_get_bits(anatop_reg->mfd, - anatop_reg->control_reg, - anatop_reg->vol_bit_shift, - anatop_reg->vol_bit_width); + val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg); + val = (val & ((1 << anatop_reg->vol_bit_width) - 1)) >> + anatop_reg->vol_bit_shift; return val - anatop_reg->min_bit_val; } -- cgit v1.2.2 From 21f7541d8861fdcdff663c68903e961ca1b06dc6 Mon Sep 17 00:00:00 2001 From: Rhyland Klein Date: Fri, 18 May 2012 11:52:19 +0200 Subject: mfd: Add tps65910-irq devicetree init and irqdomain support This change changes the tps65910-irq code to use irqdomain, and support initialization from devicetree. This assumes that the irq_base in the platform data is -1 if devicetree is used. Signed-off-by: Rhyland Klein Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 1 + drivers/mfd/tps65910-irq.c | 96 ++++++++++++++++++++++++++++++---------------- 2 files changed, 63 insertions(+), 34 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6da82ded3371..b819eea1775a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -190,6 +190,7 @@ config MFD_TPS65910 depends on I2C=y && GPIOLIB select MFD_CORE select REGMAP_I2C + select IRQ_DOMAIN help if you say yes here you get support for the TPS65910 series of Power Management chips. diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c index 0f1ff7fbdc74..09aab3e4776d 100644 --- a/drivers/mfd/tps65910-irq.c +++ b/drivers/mfd/tps65910-irq.c @@ -20,15 +20,10 @@ #include #include #include +#include #include #include -static inline int irq_to_tps65910_irq(struct tps65910 *tps65910, - int irq) -{ - return (irq - tps65910->irq_base); -} - /* * This is a threaded IRQ handler so can access I2C/SPI. Since all * interrupts are clear on read the IRQ line will be reasserted and @@ -76,7 +71,7 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data) if (!(irq_sts & (1 << i))) continue; - handle_nested_irq(tps65910->irq_base + i); + handle_nested_irq(irq_find_mapping(tps65910->domain, i)); } /* Write the STS register back to clear IRQs we handled */ @@ -135,14 +130,14 @@ static void tps65910_irq_enable(struct irq_data *data) { struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); - tps65910->irq_mask &= ~( 1 << irq_to_tps65910_irq(tps65910, data->irq)); + tps65910->irq_mask &= ~(1 << data->hwirq); } static void tps65910_irq_disable(struct irq_data *data) { struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); - tps65910->irq_mask |= ( 1 << irq_to_tps65910_irq(tps65910, data->irq)); + tps65910->irq_mask |= (1 << data->hwirq); } #ifdef CONFIG_PM_SLEEP @@ -164,10 +159,35 @@ static struct irq_chip tps65910_irq_chip = { .irq_set_wake = tps65910_irq_set_wake, }; +static int tps65910_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct tps65910 *tps65910 = h->host_data; + + irq_set_chip_data(virq, tps65910); + irq_set_chip_and_handler(virq, &tps65910_irq_chip, handle_edge_irq); + irq_set_nested_thread(virq, 1); + + /* ARM needs us to explicitly flag the IRQ as valid + * and will set them noprobe when we do so. */ +#ifdef CONFIG_ARM + set_irq_flags(virq, IRQF_VALID); +#else + irq_set_noprobe(virq); +#endif + + return 0; +} + +static struct irq_domain_ops tps65910_domain_ops = { + .map = tps65910_irq_map, + .xlate = irq_domain_xlate_twocell, +}; + int tps65910_irq_init(struct tps65910 *tps65910, int irq, struct tps65910_platform_data *pdata) { - int ret, cur_irq; + int ret; int flags = IRQF_ONESHOT; if (!irq) { @@ -175,17 +195,11 @@ int tps65910_irq_init(struct tps65910 *tps65910, int irq, return -EINVAL; } - if (!pdata || !pdata->irq_base) { - dev_warn(tps65910->dev, "No interrupt support, no IRQ base\n"); + if (!pdata) { + dev_warn(tps65910->dev, "No interrupt support, no pdata\n"); return -EINVAL; } - tps65910->irq_mask = 0xFFFFFF; - - mutex_init(&tps65910->irq_lock); - tps65910->chip_irq = irq; - tps65910->irq_base = pdata->irq_base; - switch (tps65910_chip_id(tps65910)) { case TPS65910: tps65910->irq_num = TPS65910_NUM_IRQ; @@ -195,22 +209,36 @@ int tps65910_irq_init(struct tps65910 *tps65910, int irq, break; } - /* Register with genirq */ - for (cur_irq = tps65910->irq_base; - cur_irq < tps65910->irq_num + tps65910->irq_base; - cur_irq++) { - irq_set_chip_data(cur_irq, tps65910); - irq_set_chip_and_handler(cur_irq, &tps65910_irq_chip, - handle_edge_irq); - irq_set_nested_thread(cur_irq, 1); - - /* ARM needs us to explicitly flag the IRQ as valid - * and will set them noprobe when we do so. */ -#ifdef CONFIG_ARM - set_irq_flags(cur_irq, IRQF_VALID); -#else - irq_set_noprobe(cur_irq); -#endif + if (pdata->irq_base > 0) { + pdata->irq_base = irq_alloc_descs(pdata->irq_base, 0, + tps65910->irq_num, -1); + if (pdata->irq_base < 0) { + dev_warn(tps65910->dev, "Failed to alloc IRQs: %d\n", + pdata->irq_base); + return pdata->irq_base; + } + } + + tps65910->irq_mask = 0xFFFFFF; + + mutex_init(&tps65910->irq_lock); + tps65910->chip_irq = irq; + tps65910->irq_base = pdata->irq_base; + + if (pdata->irq_base > 0) + tps65910->domain = irq_domain_add_legacy(tps65910->dev->of_node, + tps65910->irq_num, + pdata->irq_base, + 0, + &tps65910_domain_ops, tps65910); + else + tps65910->domain = irq_domain_add_linear(tps65910->dev->of_node, + tps65910->irq_num, + &tps65910_domain_ops, tps65910); + + if (!tps65910->domain) { + dev_err(tps65910->dev, "Failed to create IRQ domain\n"); + return -ENOMEM; } ret = request_threaded_irq(irq, NULL, tps65910_irq, flags, -- cgit v1.2.2 From 16e5e204c92800aad4e7db52d289565cc82240ce Mon Sep 17 00:00:00 2001 From: Ashish Jangam Date: Fri, 18 May 2012 12:19:18 +0200 Subject: mfd: Add ADC support to the DA9052/53 core This patch adds ADC support to the DA9052/53 core. Tested on smdkv6410 and i.mx53 QS boards. Signed-off-by: Ashish Jangam Signed-off-by: Samuel Ortiz --- drivers/mfd/da9052-core.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c index 7ff313fe9fb1..5036cf5fc077 100644 --- a/drivers/mfd/da9052-core.c +++ b/drivers/mfd/da9052-core.c @@ -318,6 +318,135 @@ static bool da9052_reg_volatile(struct device *dev, unsigned int reg) } } +/* + * TBAT look-up table is computed from the R90 reg (8 bit register) + * reading as below. The battery temperature is in milliCentigrade + * TBAT = (1/(t1+1/298) - 273) * 1000 mC + * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255)) + * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6 + * Example: + * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates + * TBAT = 20015 mili degrees Centrigrade + * +*/ +static const int32_t tbat_lookup[255] = { + 183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257, + 78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001, + 570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285, + 45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838, + 36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588, + 30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664, + 26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624, + 22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211, + 18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266, + 15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681, + 13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382, + 11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315, + 9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440, + 7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726, + 5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149, + 3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690, + 2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334, + 1171, 1009, 849, 690, 532, 376, 221, 67, + -84, -236, -386, -535, -683, -830, -975, -1119, + -1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237, + -2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291, + -3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288, + -4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235, + -5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134, + -6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992, + -7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810, + -7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593, + -8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343, + -9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063, + -10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090, + -11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744, + -11823, -11903, -11982 +}; + +static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = { + [DA9052_ADC_VDDOUT] = DA9052_ADC_MAN_MUXSEL_VDDOUT, + [DA9052_ADC_ICH] = DA9052_ADC_MAN_MUXSEL_ICH, + [DA9052_ADC_TBAT] = DA9052_ADC_MAN_MUXSEL_TBAT, + [DA9052_ADC_VBAT] = DA9052_ADC_MAN_MUXSEL_VBAT, + [DA9052_ADC_IN4] = DA9052_ADC_MAN_MUXSEL_AD4, + [DA9052_ADC_IN5] = DA9052_ADC_MAN_MUXSEL_AD5, + [DA9052_ADC_IN6] = DA9052_ADC_MAN_MUXSEL_AD6, + [DA9052_ADC_VBBAT] = DA9052_ADC_MAN_MUXSEL_VBBAT +}; + +int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel) +{ + int ret; + unsigned short calc_data; + unsigned short data; + unsigned char mux_sel; + + if (channel > DA9052_ADC_VBBAT) + return -EINVAL; + + mutex_lock(&da9052->auxadc_lock); + + /* Channel gets activated on enabling the Conversion bit */ + mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV; + + ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel); + if (ret < 0) + goto err; + + /* Wait for an interrupt */ + if (!wait_for_completion_timeout(&da9052->done, + msecs_to_jiffies(500))) { + dev_err(da9052->dev, + "timeout waiting for ADC conversion interrupt\n"); + ret = -ETIMEDOUT; + goto err; + } + + ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG); + if (ret < 0) + goto err; + + calc_data = (unsigned short)ret; + data = calc_data << 2; + + ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG); + if (ret < 0) + goto err; + + calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB); + data |= calc_data; + + ret = data; + +err: + mutex_unlock(&da9052->auxadc_lock); + return ret; +} +EXPORT_SYMBOL_GPL(da9052_adc_manual_read); + +static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data) +{ + struct da9052 *da9052 = irq_data; + + complete(&da9052->done); + + return IRQ_HANDLED; +} + +int da9052_adc_read_temp(struct da9052 *da9052) +{ + int tbat; + + tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG); + if (tbat <= 0) + return tbat; + + /* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */ + return tbat_lookup[tbat - 1]; +} +EXPORT_SYMBOL_GPL(da9052_adc_read_temp); + static struct resource da9052_rtc_resource = { .name = "ALM", .start = DA9052_IRQ_ALARM, @@ -646,6 +775,9 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id) struct irq_desc *desc; int ret; + mutex_init(&da9052->auxadc_lock); + init_completion(&da9052->done); + if (pdata && pdata->init != NULL) pdata->init(da9052); @@ -666,6 +798,12 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id) desc = irq_to_desc(da9052->chip_irq); da9052->irq_base = regmap_irq_chip_get_base(desc->action->dev_id); + ret = request_threaded_irq(DA9052_IRQ_ADC_EOM, NULL, da9052_auxadc_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "adc irq", da9052); + if (ret != 0) + dev_err(da9052->dev, "DA9052 ADC IRQ failed ret=%d\n", ret); + ret = mfd_add_devices(da9052->dev, -1, da9052_subdev_info, ARRAY_SIZE(da9052_subdev_info), NULL, 0); if (ret) @@ -674,6 +812,7 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id) return 0; err: + free_irq(DA9052_IRQ_ADC_EOM, da9052); mfd_remove_devices(da9052->dev); regmap_err: return ret; @@ -681,6 +820,7 @@ regmap_err: void da9052_device_exit(struct da9052 *da9052) { + free_irq(DA9052_IRQ_ADC_EOM, da9052); regmap_del_irq_chip(da9052->chip_irq, irq_get_irq_data(da9052->irq_base)->chip_data); mfd_remove_devices(da9052->dev); -- cgit v1.2.2 From fa648e51f84d060ef991eeee4d7bacec45d7fbfd Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 15 May 2012 19:24:53 +0200 Subject: mfd: Convert lm3533 to use devres Use devres to manage core driver data and regmap. Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index 1627472ecc0d..09019c65da1c 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -603,33 +603,24 @@ static int __devinit lm3533_i2c_probe(struct i2c_client *i2c, dev_dbg(&i2c->dev, "%s\n", __func__); - lm3533 = kzalloc(sizeof(*lm3533), GFP_KERNEL); + lm3533 = devm_kzalloc(&i2c->dev, sizeof(*lm3533), GFP_KERNEL); if (!lm3533) return -ENOMEM; i2c_set_clientdata(i2c, lm3533); - lm3533->regmap = regmap_init_i2c(i2c, ®map_config); - if (IS_ERR(lm3533->regmap)) { - ret = PTR_ERR(lm3533->regmap); - goto err_regmap; - } + lm3533->regmap = devm_regmap_init_i2c(i2c, ®map_config); + if (IS_ERR(lm3533->regmap)) + return PTR_ERR(lm3533->regmap); lm3533->dev = &i2c->dev; lm3533->irq = i2c->irq; ret = lm3533_device_init(lm3533); if (ret) - goto err_dev; + return ret; return 0; - -err_dev: - regmap_exit(lm3533->regmap); -err_regmap: - kfree(lm3533); - - return ret; } static int __devexit lm3533_i2c_remove(struct i2c_client *i2c) @@ -639,9 +630,6 @@ static int __devexit lm3533_i2c_remove(struct i2c_client *i2c) dev_dbg(&i2c->dev, "%s\n", __func__); lm3533_device_exit(lm3533); - regmap_exit(lm3533->regmap); - - kfree(lm3533); return 0; } -- cgit v1.2.2 From 65ee362cb2c13bd164ade0eda66919a2e16d8a89 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 15 May 2012 19:45:40 +0200 Subject: mfd: Fix double free in wm8350 error path Fix double free in probe error path introduced by the recent conversion of wm8350 to use regmap. Signed-off-by: Johan Hovold Acked-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm8350-i2c.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c index 271589f8e8e3..a68aceb4e48c 100644 --- a/drivers/mfd/wm8350-i2c.c +++ b/drivers/mfd/wm8350-i2c.c @@ -49,15 +49,7 @@ static int wm8350_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, wm8350); wm8350->dev = &i2c->dev; - ret = wm8350_device_init(wm8350, i2c->irq, i2c->dev.platform_data); - if (ret < 0) - goto err; - - return ret; - -err: - regmap_exit(wm8350->regmap); - return ret; + return wm8350_device_init(wm8350, i2c->irq, i2c->dev.platform_data); } static int wm8350_i2c_remove(struct i2c_client *i2c) -- cgit v1.2.2 From 1cb3642a68c983ada0f4090a4dac1d70a96126ca Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 18 May 2012 13:01:19 +0200 Subject: mfd: mc13xxx core should not be user visible Since the core is not usable without one of the bus modules it should not be presented in the UI but should instead be selected by the bus modules. Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b819eea1775a..094bf4eb4d86 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -623,7 +623,7 @@ config MFD_MC13783 tristate config MFD_MC13XXX - tristate "Support Freescale MC13783 and MC13892" + tristate depends on SPI_MASTER || I2C select MFD_CORE select MFD_MC13783 @@ -633,24 +633,22 @@ config MFD_MC13XXX additional drivers must be enabled in order to use the functionality of the device. -if MFD_MC13XXX - config MFD_MC13XXX_SPI - tristate "MC13xxx SPI interface" if SPI_MASTER - default SPI_MASTER + tristate "Freescale MC13783 and MC13892 SPI interface" + depends on SPI_MASTER select REGMAP_SPI + select MFD_MC13XXX help Select this if your MC13xxx is connected via an SPI bus. config MFD_MC13XXX_I2C - tristate "MC13xxx I2C interface" if I2C - default I2C + tristate "Freescale MC13892 I2C interface" + depends on I2C select REGMAP_I2C + select MFD_MC13XXX help Select this if your MC13xxx is connected via an I2C bus. -endif - config ABX500_CORE bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions" default y if ARCH_U300 || ARCH_U8500 -- cgit v1.2.2 From d28f1db8187dd1ddc1fa6f380ff0402cf8e4d44d Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Sat, 19 May 2012 17:21:37 +0200 Subject: mfd: Remove confusing ab8500-i2c file and merge into ab8500-core ab8500-i2c is used as core code to register the ab8500 device. After allocating ab8500 memory, it immediately calls into ab8500-core where the real initialisation takes place. This patch moves all core registration and memory allocation into the true ab8500-core file and removes ab8500-i2c completely. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/Makefile | 5 +- drivers/mfd/ab8500-core.c | 105 ++++++++++++++++++++++++++++-- drivers/mfd/ab8500-i2c.c | 160 ---------------------------------------------- 3 files changed, 102 insertions(+), 168 deletions(-) delete mode 100644 drivers/mfd/ab8500-i2c.c (limited to 'drivers') diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index d7138510c880..afe96b2e95e4 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -93,12 +93,11 @@ obj-$(CONFIG_AB3100_CORE) += ab3100-core.o obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o obj-$(CONFIG_AB5500_CORE) += ab5500-core.o obj-$(CONFIG_AB5500_DEBUG) += ab5500-debugfs.o -obj-$(CONFIG_AB8500_CORE) += ab8500-core.o ab8500-sysctrl.o obj-$(CONFIG_AB8500_DEBUG) += ab8500-debugfs.o obj-$(CONFIG_AB8500_GPADC) += ab8500-gpadc.o obj-$(CONFIG_MFD_DB8500_PRCMU) += db8500-prcmu.o -# ab8500-i2c need to come after db8500-prcmu (which provides the channel) -obj-$(CONFIG_AB8500_I2C_CORE) += ab8500-i2c.o +# ab8500-core need to come after db8500-prcmu (which provides the channel) +obj-$(CONFIG_AB8500_CORE) += ab8500-core.o ab8500-sysctrl.o obj-$(CONFIG_MFD_DB5500_PRCMU) += db5500-prcmu.o obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o obj-$(CONFIG_PMIC_ADP5520) += adp5520.o diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 6a59919fc331..fb807ab8a2c7 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -18,6 +18,7 @@ #include #include #include +#include #include /* @@ -137,6 +138,41 @@ static const char ab8500_version_str[][7] = { [AB8500_VERSION_AB8540] = "AB8540", }; +static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data) +{ + int ret; + + ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); + if (ret < 0) + dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); + return ret; +} + +static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, + u8 data) +{ + int ret; + + ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, + &mask, 1); + if (ret < 0) + dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); + return ret; +} + +static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr) +{ + int ret; + u8 data; + + ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); + if (ret < 0) { + dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); + return ret; + } + return (int)data; +} + static int ab8500_get_chip_id(struct device *dev) { struct ab8500 *ab8500; @@ -1169,27 +1205,51 @@ static struct attribute_group ab9540_attr_group = { .attrs = ab9540_sysfs_entries, }; -int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) +static int __devinit ab8500_probe(struct platform_device *pdev) { - struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); + struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); + const struct platform_device_id *platid = platform_get_device_id(pdev); + enum ab8500_version version = platid->driver_data; + struct ab8500 *ab8500; + struct resource *resource; int ret; int i; u8 value; + ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL); + if (!ab8500) + return -ENOMEM; + if (plat) ab8500->irq_base = plat->irq_base; + ab8500->dev = &pdev->dev; + + resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!resource) { + ret = -ENODEV; + goto out_free_ab8500; + } + + ab8500->irq = resource->start; + + ab8500->read = ab8500_i2c_read; + ab8500->write = ab8500_i2c_write; + ab8500->write_masked = ab8500_i2c_write_masked; + mutex_init(&ab8500->lock); mutex_init(&ab8500->irq_lock); atomic_set(&ab8500->transfer_ongoing, 0); + platform_set_drvdata(pdev, ab8500); + if (version != AB8500_VERSION_UNDEFINED) ab8500->version = version; else { ret = get_register_interruptible(ab8500, AB8500_MISC, AB8500_IC_NAME_REG, &value); if (ret < 0) - return ret; + goto out_free_ab8500; ab8500->version = value; } @@ -1197,7 +1257,7 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) ret = get_register_interruptible(ab8500, AB8500_MISC, AB8500_REV_REG, &value); if (ret < 0) - return ret; + goto out_free_ab8500; ab8500->chip_id = value; @@ -1342,12 +1402,16 @@ out_freeoldmask: kfree(ab8500->oldmask); out_freemask: kfree(ab8500->mask); +out_free_ab8500: + kfree(ab8500); return ret; } -int __devexit ab8500_exit(struct ab8500 *ab8500) +static int __devexit ab8500_remove(struct platform_device *pdev) { + struct ab8500 *ab8500 = platform_get_drvdata(pdev); + if (is_ab9540(ab8500)) sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); else @@ -1359,10 +1423,41 @@ int __devexit ab8500_exit(struct ab8500 *ab8500) } kfree(ab8500->oldmask); kfree(ab8500->mask); + kfree(ab8500); return 0; } +static const struct platform_device_id ab8500_id[] = { + { "ab8500-core", AB8500_VERSION_AB8500 }, + { "ab8505-i2c", AB8500_VERSION_AB8505 }, + { "ab9540-i2c", AB8500_VERSION_AB9540 }, + { "ab8540-i2c", AB8500_VERSION_AB8540 }, + { } +}; + +static struct platform_driver ab8500_core_driver = { + .driver = { + .name = "ab8500-core", + .owner = THIS_MODULE, + }, + .probe = ab8500_probe, + .remove = __devexit_p(ab8500_remove), + .id_table = ab8500_id, +}; + +static int __init ab8500_core_init(void) +{ + return platform_driver_register(&ab8500_core_driver); +} + +static void __exit ab8500_core_exit(void) +{ + platform_driver_unregister(&ab8500_core_driver); +} +arch_initcall(ab8500_core_init); +module_exit(ab8500_core_exit); + MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); MODULE_DESCRIPTION("AB8500 MFD core"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/ab8500-i2c.c b/drivers/mfd/ab8500-i2c.c deleted file mode 100644 index 89b31a3409cd..000000000000 --- a/drivers/mfd/ab8500-i2c.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * Author: Mattias Wallin for ST-Ericsson. - * License Terms: GNU General Public License v2 - * This file was based on drivers/mfd/ab8500-spi.c - */ - -#include -#include -#include -#include -#include -#include -#include - -static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data) -{ - int ret; - - ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); - if (ret < 0) - dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); - return ret; -} - -static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, - u8 data) -{ - int ret; - - ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, - &mask, 1); - if (ret < 0) - dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); - return ret; -} - -static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr) -{ - int ret; - u8 data; - - ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); - if (ret < 0) { - dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); - return ret; - } - return (int)data; -} - -static int __devinit ab8500_i2c_probe(struct platform_device *plf) -{ - const struct platform_device_id *platid = platform_get_device_id(plf); - struct ab8500 *ab8500; - struct resource *resource; - int ret; - - ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL); - if (!ab8500) - return -ENOMEM; - - ab8500->dev = &plf->dev; - - resource = platform_get_resource(plf, IORESOURCE_IRQ, 0); - if (!resource) { - kfree(ab8500); - return -ENODEV; - } - - ab8500->irq = resource->start; - - ab8500->read = ab8500_i2c_read; - ab8500->write = ab8500_i2c_write; - ab8500->write_masked = ab8500_i2c_write_masked; - - platform_set_drvdata(plf, ab8500); - - ret = ab8500_init(ab8500, platid->driver_data); - if (ret) - kfree(ab8500); - - - return ret; -} - -static int __devexit ab8500_i2c_remove(struct platform_device *plf) -{ - struct ab8500 *ab8500 = platform_get_drvdata(plf); - - ab8500_exit(ab8500); - kfree(ab8500); - - return 0; -} - -static const struct platform_device_id ab8500_id[] = { - { "ab8500-i2c", AB8500_VERSION_AB8500 }, - { "ab8505-i2c", AB8500_VERSION_AB8505 }, - { "ab9540-i2c", AB8500_VERSION_AB9540 }, - { "ab8540-i2c", AB8500_VERSION_AB8540 }, - { } -}; - -#ifdef CONFIG_PM -static int ab8500_i2c_suspend(struct device *dev) -{ - struct ab8500 *ab = dev_get_drvdata(dev); - - disable_irq(ab->irq); - enable_irq_wake(ab->irq); - - return 0; -} - -static int ab8500_i2c_resume(struct device *dev) -{ - struct ab8500 *ab = dev_get_drvdata(dev); - - disable_irq_wake(ab->irq); - enable_irq(ab->irq); - - return 0; -} - -static const struct dev_pm_ops ab8500_i2c_pm_ops = { - .suspend = ab8500_i2c_suspend, - .resume = ab8500_i2c_resume, -}; - -#define AB8500_I2C_PM_OPS (&ab8500_i2c_pm_ops) -#else -#define AB8500_I2C_PM_OPS NULL -#endif - -static struct platform_driver ab8500_i2c_driver = { - .driver = { - .name = "ab8500-i2c", - .owner = THIS_MODULE, - .pm = AB8500_I2C_PM_OPS, - }, - .probe = ab8500_i2c_probe, - .remove = __devexit_p(ab8500_i2c_remove), - .id_table = ab8500_id, -}; - -static int __init ab8500_i2c_init(void) -{ - return platform_driver_register(&ab8500_i2c_driver); -} - -static void __exit ab8500_i2c_exit(void) -{ - platform_driver_unregister(&ab8500_i2c_driver); -} -arch_initcall(ab8500_i2c_init); -module_exit(ab8500_i2c_exit); - -MODULE_AUTHOR("Mattias WALLIN Date: Thu, 17 May 2012 14:45:13 +0100 Subject: mfd: Enable Device Tree for ab8500-core driver This patch will allow the ab8500-core driver to be probed and set up when booting when Device Tree is enabled. This includes platform ID look-up which identifies the machine it is currently running on. If we are undergoing a DT enabled boot, we will refuse to setup each of the other ab8500-* devices, as they will be probed individually by DT. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-core.c | 71 +++++++++++++++++++++++++++++++++-------------- 1 file changed, 50 insertions(+), 21 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index fb807ab8a2c7..dac0e2998603 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include /* * Interrupt register offsets @@ -1205,11 +1207,20 @@ static struct attribute_group ab9540_attr_group = { .attrs = ab9540_sysfs_entries, }; +static const struct of_device_id ab8500_match[] = { + { + .compatible = "stericsson,ab8500", + .data = (void *)AB8500_VERSION_AB8500, + }, + {}, +}; + static int __devinit ab8500_probe(struct platform_device *pdev) { struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); const struct platform_device_id *platid = platform_get_device_id(pdev); - enum ab8500_version version = platid->driver_data; + enum ab8500_version version = AB8500_VERSION_UNDEFINED; + struct device_node *np = pdev->dev.of_node; struct ab8500 *ab8500; struct resource *resource; int ret; @@ -1222,6 +1233,14 @@ static int __devinit ab8500_probe(struct platform_device *pdev) if (plat) ab8500->irq_base = plat->irq_base; + else if (np) + ret = of_property_read_u32(np, "stericsson,irq-base", &ab8500->irq_base); + + if (!ab8500->irq_base) { + dev_info(&pdev->dev, "couldn't find irq-base\n"); + ret = -EINVAL; + goto out_free_ab8500; + } ab8500->dev = &pdev->dev; @@ -1243,6 +1262,12 @@ static int __devinit ab8500_probe(struct platform_device *pdev) platform_set_drvdata(pdev, ab8500); + if (platid) + version = platid->driver_data; + else if (np) + version = (unsigned int) + of_match_device(ab8500_match, &pdev->dev)->data; + if (version != AB8500_VERSION_UNDEFINED) ab8500->version = version; else { @@ -1348,29 +1373,32 @@ static int __devinit ab8500_probe(struct platform_device *pdev) goto out_removeirq; } - ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, - ARRAY_SIZE(abx500_common_devs), NULL, - ab8500->irq_base); - - if (ret) - goto out_freeirq; + if (!np) { + ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, + ARRAY_SIZE(abx500_common_devs), NULL, + ab8500->irq_base); - if (is_ab9540(ab8500)) - ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, - ARRAY_SIZE(ab9540_devs), NULL, - ab8500->irq_base); - else - ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, - ARRAY_SIZE(ab8500_devs), NULL, - ab8500->irq_base); + if (ret) + goto out_freeirq; - if (is_ab9540(ab8500) || is_ab8505(ab8500)) - ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, - ARRAY_SIZE(ab9540_ab8505_devs), NULL, - ab8500->irq_base); + if (is_ab9540(ab8500)) + ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, + ARRAY_SIZE(ab9540_devs), NULL, + ab8500->irq_base); + else + ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, + ARRAY_SIZE(ab8500_devs), NULL, + ab8500->irq_base); + if (ret) + goto out_freeirq; - if (ret) - goto out_freeirq; + if (is_ab9540(ab8500) || is_ab8505(ab8500)) + ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, + ARRAY_SIZE(ab9540_ab8505_devs), NULL, + ab8500->irq_base); + if (ret) + goto out_freeirq; + } if (!no_bm) { /* Add battery management devices */ @@ -1440,6 +1468,7 @@ static struct platform_driver ab8500_core_driver = { .driver = { .name = "ab8500-core", .owner = THIS_MODULE, + .of_match_table = ab8500_match, }, .probe = ab8500_probe, .remove = __devexit_p(ab8500_remove), -- cgit v1.2.2 From 5a8fea031ed5462b63877e0f6d29e0fc0fb82f14 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 17 May 2012 14:45:19 +0100 Subject: mfd: Enable ab8500-debug when Device Tree is enabled Allow the ab8500-debugfs driver to be probed during DT start-up. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-debugfs.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c index 9a0211aa8897..50c4c89ab220 100644 --- a/drivers/mfd/ab8500-debugfs.c +++ b/drivers/mfd/ab8500-debugfs.c @@ -608,10 +608,16 @@ static int __devexit ab8500_debug_remove(struct platform_device *plf) return 0; } +static const struct of_device_id ab8500_debug_match[] = { + { .compatible = "stericsson,ab8500-debug", }, + {} +}; + static struct platform_driver ab8500_debug_driver = { .driver = { .name = "ab8500-debug", .owner = THIS_MODULE, + .of_match_table = ab8500_debug_match, }, .probe = ab8500_debug_probe, .remove = __devexit_p(ab8500_debug_remove) -- cgit v1.2.2 From 6dff11e5ab2f752ad75d0b506fcc981fef9999c5 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 17 May 2012 14:45:20 +0100 Subject: mfd: Prevent unassigned pointer from being used in ab8500-gpadc driver Before this patch if probe failed to find the platform IRQ it would attempt to print a message out using dev_err, which in turn was being passed an unassigned pointer. This patch ensures the information passed to dev_err is correct. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-gpadc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c index c39fc716e1dc..c1656ab34c34 100644 --- a/drivers/mfd/ab8500-gpadc.c +++ b/drivers/mfd/ab8500-gpadc.c @@ -584,7 +584,7 @@ static int __devinit ab8500_gpadc_probe(struct platform_device *pdev) gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END"); if (gpadc->irq < 0) { - dev_err(gpadc->dev, "failed to get platform irq-%d\n", + dev_err(&pdev->dev, "failed to get platform irq-%d\n", gpadc->irq); ret = gpadc->irq; goto fail; -- cgit v1.2.2 From 3690fb2ca5f4ecb9424d02598cb55d300f48d844 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 17 May 2012 14:45:22 +0100 Subject: mfd: Enable ab8500-gpadc driver for Device Tree This patch will allow the ab8500-gpadc driver to be probed during Device Tree enabled boot. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-gpadc.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c index c1656ab34c34..b86fd8e1ec3f 100644 --- a/drivers/mfd/ab8500-gpadc.c +++ b/drivers/mfd/ab8500-gpadc.c @@ -648,12 +648,18 @@ static int __devexit ab8500_gpadc_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id ab8500_gpadc_match[] = { + { .compatible = "stericsson,ab8500-gpadc", }, + {} +}; + static struct platform_driver ab8500_gpadc_driver = { .probe = ab8500_gpadc_probe, .remove = __devexit_p(ab8500_gpadc_remove), .driver = { .name = "ab8500-gpadc", .owner = THIS_MODULE, + .of_match_table = ab8500_gpadc_match, }, }; -- cgit v1.2.2 From 68029c6cf9750ff0d4ed5c812a3755cbd855862a Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 16 May 2012 14:11:55 +0300 Subject: mfd: twl6040 code cleanup in interrupt initialization part No functional change, just to make the code a bit more uniform and remove wrapped lines. Signed-off-by: Peter Ujfalusi Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-irq.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-irq.c b/drivers/mfd/twl6040-irq.c index b3f8ddaa28a8..008022cdb06d 100644 --- a/drivers/mfd/twl6040-irq.c +++ b/drivers/mfd/twl6040-irq.c @@ -138,7 +138,7 @@ static irqreturn_t twl6040_irq_thread(int irq, void *data) int twl6040_irq_init(struct twl6040 *twl6040) { - int cur_irq, ret; + int i, nr_irqs, ret; u8 val; mutex_init(&twl6040->irq_mutex); @@ -148,21 +148,20 @@ int twl6040_irq_init(struct twl6040 *twl6040) twl6040->irq_masks_cache = TWL6040_ALLINT_MSK; twl6040_reg_write(twl6040, TWL6040_REG_INTMR, TWL6040_ALLINT_MSK); + nr_irqs = ARRAY_SIZE(twl6040_irqs); /* Register them with genirq */ - for (cur_irq = twl6040->irq_base; - cur_irq < twl6040->irq_base + ARRAY_SIZE(twl6040_irqs); - cur_irq++) { - irq_set_chip_data(cur_irq, twl6040); - irq_set_chip_and_handler(cur_irq, &twl6040_irq_chip, + for (i = twl6040->irq_base; i < twl6040->irq_base + nr_irqs; i++) { + irq_set_chip_data(i, twl6040); + irq_set_chip_and_handler(i, &twl6040_irq_chip, handle_level_irq); - irq_set_nested_thread(cur_irq, 1); + irq_set_nested_thread(i, 1); /* ARM needs us to explicitly flag the IRQ as valid * and will set them noprobe when we do so. */ #ifdef CONFIG_ARM - set_irq_flags(cur_irq, IRQF_VALID); + set_irq_flags(i, IRQF_VALID); #else - irq_set_noprobe(cur_irq); + irq_set_noprobe(i); #endif } -- cgit v1.2.2 From 6712419d697851c4472cdfd2111c844d777472e8 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 16 May 2012 14:11:56 +0300 Subject: mfd: Allocate twl6040 IRQ numbers dynamically Use irq_alloc_descs() to get the IRQ number range dynamically instead of the hardwired use if pdata->irq_base. The twl6040 only provides interrupts for it's internal components which means that it is not working as an IRQ expander type of device. The client drivers will receive their interrupt numbers as resource which is configured based on the received IRQ range we got from irq_alloc_descs() Signed-off-by: Peter Ujfalusi Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 3 +-- drivers/mfd/twl6040-irq.c | 13 +++++++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 7a92d95bfb60..c50fba7be778 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -515,7 +515,7 @@ static int __devinit twl6040_probe(struct i2c_client *client, } /* In order to operate correctly we need valid interrupt config */ - if (!client->irq || !pdata->irq_base) { + if (!client->irq) { dev_err(&client->dev, "Invalid IRQ configuration\n"); return -EINVAL; } @@ -552,7 +552,6 @@ static int __devinit twl6040_probe(struct i2c_client *client, twl6040->dev = &client->dev; twl6040->irq = client->irq; - twl6040->irq_base = pdata->irq_base; mutex_init(&twl6040->mutex); mutex_init(&twl6040->io_mutex); diff --git a/drivers/mfd/twl6040-irq.c b/drivers/mfd/twl6040-irq.c index 008022cdb06d..914978e1b62e 100644 --- a/drivers/mfd/twl6040-irq.c +++ b/drivers/mfd/twl6040-irq.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include @@ -138,7 +139,7 @@ static irqreturn_t twl6040_irq_thread(int irq, void *data) int twl6040_irq_init(struct twl6040 *twl6040) { - int i, nr_irqs, ret; + int i, nr_irqs, irq_base, ret; u8 val; mutex_init(&twl6040->irq_mutex); @@ -149,8 +150,16 @@ int twl6040_irq_init(struct twl6040 *twl6040) twl6040_reg_write(twl6040, TWL6040_REG_INTMR, TWL6040_ALLINT_MSK); nr_irqs = ARRAY_SIZE(twl6040_irqs); + + irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0); + if (IS_ERR_VALUE(irq_base)) { + dev_err(twl6040->dev, "Fail to allocate IRQ descs\n"); + return irq_base; + } + twl6040->irq_base = irq_base; + /* Register them with genirq */ - for (i = twl6040->irq_base; i < twl6040->irq_base + nr_irqs; i++) { + for (i = irq_base; i < irq_base + nr_irqs; i++) { irq_set_chip_data(i, twl6040); irq_set_chip_and_handler(i, &twl6040_irq_chip, handle_level_irq); -- cgit v1.2.2 From 1f01d60e4c0cae3416071680635f227df0020dd8 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 16 May 2012 14:11:57 +0300 Subject: mfd: Register the twl6040 child for the ASoC codec unconditionally The main function of the twl6040 is to provide audio on OMAP4+ platforms. Since the ASoC codec driver can work without the pdata we can register the child to load the codec driver whenever the twl6040 MFD driver is loaded. Signed-off-by: Peter Ujfalusi Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 39 +++++++++++++++++++-------------------- 1 file changed, 19 insertions(+), 20 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index c50fba7be778..9765dc2b0ca3 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -507,7 +507,7 @@ static int __devinit twl6040_probe(struct i2c_client *client, struct twl6040_platform_data *pdata = client->dev.platform_data; struct twl6040 *twl6040; struct mfd_cell *cell = NULL; - int ret, children = 0; + int irq, ret, children = 0; if (!pdata) { dev_err(&client->dev, "Platform data is missing\n"); @@ -589,22 +589,27 @@ static int __devinit twl6040_probe(struct i2c_client *client, /* dual-access registers controlled by I2C only */ twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL); + /* + * The main functionality of twl6040 to provide audio on OMAP4+ systems. + * We can add the ASoC codec child whenever this driver has been loaded. + * The ASoC codec can work without pdata, pass the platform_data only if + * it has been provided. + */ + irq = twl6040->irq_base + TWL6040_IRQ_PLUG; + cell = &twl6040->cells[children]; + cell->name = "twl6040-codec"; + twl6040_codec_rsrc[0].start = irq; + twl6040_codec_rsrc[0].end = irq; + cell->resources = twl6040_codec_rsrc; + cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); if (pdata->codec) { - int irq = twl6040->irq_base + TWL6040_IRQ_PLUG; - - cell = &twl6040->cells[children]; - cell->name = "twl6040-codec"; - twl6040_codec_rsrc[0].start = irq; - twl6040_codec_rsrc[0].end = irq; - cell->resources = twl6040_codec_rsrc; - cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); cell->platform_data = pdata->codec; cell->pdata_size = sizeof(*pdata->codec); - children++; } + children++; if (pdata->vibra) { - int irq = twl6040->irq_base + TWL6040_IRQ_VIB; + irq = twl6040->irq_base + TWL6040_IRQ_VIB; cell = &twl6040->cells[children]; cell->name = "twl6040-vibra"; @@ -618,16 +623,10 @@ static int __devinit twl6040_probe(struct i2c_client *client, children++; } - if (children) { - ret = mfd_add_devices(&client->dev, -1, twl6040->cells, - children, NULL, 0); - if (ret) - goto mfd_err; - } else { - dev_err(&client->dev, "No platform data found for children\n"); - ret = -ENODEV; + ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, + NULL, 0); + if (ret) goto mfd_err; - } return 0; -- cgit v1.2.2 From 37e13cecaa141eccce705843f5d2f7509e29bd3a Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 16 May 2012 14:11:58 +0300 Subject: mfd: Add support for Device Tree to twl6040 Device tree based probing support for the core twl6040 driver. Child devices will be created as MFD devices: - ASoC codec is always created - Vibra child is only created if the vibra section present in the DT blob. Signed-off-by: Peter Ujfalusi Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 27 +++++++++++++++++++-------- drivers/mfd/twl6040-irq.c | 6 ++++++ 2 files changed, 25 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 9765dc2b0ca3..450a28fe8fc2 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -29,6 +29,10 @@ #include #include #include +#include +#include +#include +#include #include #include #include @@ -505,11 +509,12 @@ static int __devinit twl6040_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct twl6040_platform_data *pdata = client->dev.platform_data; + struct device_node *node = client->dev.of_node; struct twl6040 *twl6040; struct mfd_cell *cell = NULL; int irq, ret, children = 0; - if (!pdata) { + if (!pdata && !node) { dev_err(&client->dev, "Platform data is missing\n"); return -EINVAL; } @@ -560,9 +565,13 @@ static int __devinit twl6040_probe(struct i2c_client *client, twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV); /* ERRATA: Automatic power-up is not possible in ES1.0 */ - if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0) - twl6040->audpwron = pdata->audpwron_gpio; - else + if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0) { + if (pdata) + twl6040->audpwron = pdata->audpwron_gpio; + else + twl6040->audpwron = of_get_named_gpio(node, + "ti,audpwron-gpio", 0); + } else twl6040->audpwron = -EINVAL; if (gpio_is_valid(twl6040->audpwron)) { @@ -602,13 +611,13 @@ static int __devinit twl6040_probe(struct i2c_client *client, twl6040_codec_rsrc[0].end = irq; cell->resources = twl6040_codec_rsrc; cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); - if (pdata->codec) { + if (pdata && pdata->codec) { cell->platform_data = pdata->codec; cell->pdata_size = sizeof(*pdata->codec); } children++; - if (pdata->vibra) { + if ((pdata && pdata->vibra) || of_find_node_by_name(node, "vibra")) { irq = twl6040->irq_base + TWL6040_IRQ_VIB; cell = &twl6040->cells[children]; @@ -618,8 +627,10 @@ static int __devinit twl6040_probe(struct i2c_client *client, cell->resources = twl6040_vibra_rsrc; cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc); - cell->platform_data = pdata->vibra; - cell->pdata_size = sizeof(*pdata->vibra); + if (pdata && pdata->vibra) { + cell->platform_data = pdata->vibra; + cell->pdata_size = sizeof(*pdata->vibra); + } children++; } diff --git a/drivers/mfd/twl6040-irq.c b/drivers/mfd/twl6040-irq.c index 914978e1b62e..4b42543da228 100644 --- a/drivers/mfd/twl6040-irq.c +++ b/drivers/mfd/twl6040-irq.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include #include @@ -139,6 +141,7 @@ static irqreturn_t twl6040_irq_thread(int irq, void *data) int twl6040_irq_init(struct twl6040 *twl6040) { + struct device_node *node = twl6040->dev->of_node; int i, nr_irqs, irq_base, ret; u8 val; @@ -158,6 +161,9 @@ int twl6040_irq_init(struct twl6040 *twl6040) } twl6040->irq_base = irq_base; + irq_domain_add_legacy(node, ARRAY_SIZE(twl6040_irqs), irq_base, 0, + &irq_domain_simple_ops, NULL); + /* Register them with genirq */ for (i = irq_base; i < irq_base + nr_irqs; i++) { irq_set_chip_data(i, twl6040); -- cgit v1.2.2 From 01247ef7ecbf36515a1cc3c2b34e4738aab1bd40 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 18 May 2012 09:39:10 +0100 Subject: mfd: Enable Device Tree support in the ab8500-sysctrl driver This patch ensures probing of the ab8500-sysctrl driver during a DT enabled boot, so long as the associated nodes are present in the Device Tree binary. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/ab8500-sysctrl.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c index c28d4eb1eff0..5a3e51ccf258 100644 --- a/drivers/mfd/ab8500-sysctrl.c +++ b/drivers/mfd/ab8500-sysctrl.c @@ -61,10 +61,16 @@ static int __devexit ab8500_sysctrl_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id ab8500_sysctrl_match[] = { + { .compatible = "stericsson,ab8500-sysctrl", }, + {} +}; + static struct platform_driver ab8500_sysctrl_driver = { .driver = { .name = "ab8500-sysctrl", .owner = THIS_MODULE, + .of_match_table = ab8500_sysctrl_match, }, .probe = ab8500_sysctrl_probe, .remove = __devexit_p(ab8500_sysctrl_remove), -- cgit v1.2.2 From 3770c75a6852a87afc66cd514c13899f8a288cef Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 18 May 2012 09:39:12 +0100 Subject: mfd: Enable Device Tree support in the ab8500-pwm driver This patch ensures probing of the ab8500-pwm driver during a DT enabled boot, so long as the associated nodes are present in the Device Tree binary. Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/misc/ab8500-pwm.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/misc/ab8500-pwm.c b/drivers/misc/ab8500-pwm.c index d7a9aa14e5d5..042a8fe4efaa 100644 --- a/drivers/misc/ab8500-pwm.c +++ b/drivers/misc/ab8500-pwm.c @@ -142,10 +142,16 @@ static int __devexit ab8500_pwm_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id ab8500_pwm_match[] = { + { .compatible = "stericsson,ab8500-pwm", }, + {} +}; + static struct platform_driver ab8500_pwm_driver = { .driver = { .name = "ab8500-pwm", .owner = THIS_MODULE, + .of_match_table = ab8500_pwm_match, }, .probe = ab8500_pwm_probe, .remove = __devexit_p(ab8500_pwm_remove), -- cgit v1.2.2 From 6090885597e6500f6671a0f7bab9e82dfa6f38be Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sun, 20 May 2012 15:16:10 +0200 Subject: mfd: Fix return type of lm533 attribute is_visible Since commit 587a1f1659 ("switch ->is_visible() to returning umode_t") the return type of is_visible is umode_t rather than mode_t. This silences a compiler warning on some architectures where these types are not compatible. Reported-by: Andrew Morton Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index 09019c65da1c..104faba494c9 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -367,7 +367,7 @@ static umode_t lm3533_attr_is_visible(struct kobject *kobj, struct device_attribute *dattr = to_dev_attr(attr); struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(dattr); enum lm3533_attribute_type type = lattr->type; - mode_t mode = attr->mode; + umode_t mode = attr->mode; if (!lm3533->have_backlights && type == LM3533_ATTR_TYPE_BACKLIGHT) mode = 0; -- cgit v1.2.2 From c48bf153f293894d232ee44f5bff99c523a06585 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 18 May 2012 20:22:46 +0200 Subject: mfd: Mark two lm3533 zone registers as volatile Mark the two currently unused zone registers as volatile in regmap for completeness. Signed-off-by: Johan Hovold Signed-off-by: Samuel Ortiz --- drivers/mfd/lm3533-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index 104faba494c9..0b2879b87fd9 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -567,7 +567,7 @@ static bool lm3533_readable_register(struct device *dev, unsigned int reg) static bool lm3533_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { - case 0x34: /* zone */ + case 0x34 ... 0x36: /* zone */ case 0x37 ... 0x38: /* adc */ case 0xb0 ... 0xb1: /* fault */ return true; -- cgit v1.2.2 From 1fe17a24e2fe0a9554d19a4249eb2d80050ecb8c Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 18 May 2012 17:02:02 +0100 Subject: mfd: Emulate active low IRQs as well as active high IRQs for wm831x As with the existing emulation this should not be used in production systems but is useful for test purposes. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- drivers/mfd/wm831x-irq.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c index ecc9d6d62fad..804e56ec99eb 100644 --- a/drivers/mfd/wm831x-irq.c +++ b/drivers/mfd/wm831x-irq.c @@ -413,22 +413,25 @@ static int wm831x_irq_set_type(struct irq_data *data, unsigned int type) * do the update here as we can be called with the bus lock * held. */ + wm831x->gpio_level_low[irq] = false; + wm831x->gpio_level_high[irq] = false; switch (type) { case IRQ_TYPE_EDGE_BOTH: wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_INT_MODE; - wm831x->gpio_level[irq] = false; break; case IRQ_TYPE_EDGE_RISING: wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL; - wm831x->gpio_level[irq] = false; break; case IRQ_TYPE_EDGE_FALLING: wm831x->gpio_update[irq] = 0x10000; - wm831x->gpio_level[irq] = false; break; case IRQ_TYPE_LEVEL_HIGH: wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL; - wm831x->gpio_level[irq] = true; + wm831x->gpio_level_high[irq] = true; + break; + case IRQ_TYPE_LEVEL_LOW: + wm831x->gpio_update[irq] = 0x10000; + wm831x->gpio_level_low[irq] = true; break; default: return -EINVAL; @@ -517,7 +520,7 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data) * status. This is sucky but improves interoperability. */ if (primary == WM831X_GP_INT && - wm831x->gpio_level[i - WM831X_IRQ_GPIO_1]) { + wm831x->gpio_level_high[i - WM831X_IRQ_GPIO_1]) { ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL); while (ret & 1 << (i - WM831X_IRQ_GPIO_1)) { handle_nested_irq(irq_find_mapping(wm831x->irq_domain, @@ -526,6 +529,17 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data) WM831X_GPIO_LEVEL); } } + + if (primary == WM831X_GP_INT && + wm831x->gpio_level_low[i - WM831X_IRQ_GPIO_1]) { + ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL); + while (!(ret & 1 << (i - WM831X_IRQ_GPIO_1))) { + handle_nested_irq(irq_find_mapping(wm831x->irq_domain, + i)); + ret = wm831x_reg_read(wm831x, + WM831X_GPIO_LEVEL); + } + } } out: -- cgit v1.2.2 From bca0fa5f12a6744a2b2e53154af65a51402b3426 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Fri, 23 Mar 2012 13:05:14 +0100 Subject: common: add dma_mmap_from_coherent() function Add a common helper for dma-mapping core for mapping a coherent buffer to userspace. Reported-by: Subash Patel Signed-off-by: Marek Szyprowski Acked-by: Kyungmin Park Tested-By: Subash Patel --- drivers/base/dma-coherent.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'drivers') diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c index bb0025c510b3..1b85949e3d2f 100644 --- a/drivers/base/dma-coherent.c +++ b/drivers/base/dma-coherent.c @@ -10,6 +10,7 @@ struct dma_coherent_mem { void *virt_base; dma_addr_t device_base; + phys_addr_t pfn_base; int size; int flags; unsigned long *bitmap; @@ -44,6 +45,7 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, dev->dma_mem->virt_base = mem_base; dev->dma_mem->device_base = device_addr; + dev->dma_mem->pfn_base = PFN_DOWN(bus_addr); dev->dma_mem->size = pages; dev->dma_mem->flags = flags; @@ -176,3 +178,43 @@ int dma_release_from_coherent(struct device *dev, int order, void *vaddr) return 0; } EXPORT_SYMBOL(dma_release_from_coherent); + +/** + * dma_mmap_from_coherent() - try to mmap the memory allocated from + * per-device coherent memory pool to userspace + * @dev: device from which the memory was allocated + * @vma: vm_area for the userspace memory + * @vaddr: cpu address returned by dma_alloc_from_coherent + * @size: size of the memory buffer allocated by dma_alloc_from_coherent + * + * This checks whether the memory was allocated from the per-device + * coherent memory pool and if so, maps that memory to the provided vma. + * + * Returns 1 if we correctly mapped the memory, or 0 if + * dma_release_coherent() should proceed with mapping memory from + * generic pools. + */ +int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma, + void *vaddr, size_t size, int *ret) +{ + struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; + + if (mem && vaddr >= mem->virt_base && vaddr + size <= + (mem->virt_base + (mem->size << PAGE_SHIFT))) { + unsigned long off = vma->vm_pgoff; + int start = (vaddr - mem->virt_base) >> PAGE_SHIFT; + int user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; + int count = size >> PAGE_SHIFT; + + *ret = -ENXIO; + if (off < count && user_count <= count - off) { + unsigned pfn = mem->pfn_base + start + off; + *ret = remap_pfn_range(vma, vma->vm_start, pfn, + user_count << PAGE_SHIFT, + vma->vm_page_prot); + } + return 1; + } + return 0; +} +EXPORT_SYMBOL(dma_mmap_from_coherent); -- cgit v1.2.2 From c64be2bb1c6eb43c838b2c6d57b074078be208dd Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 29 Dec 2011 13:09:51 +0100 Subject: drivers: add Contiguous Memory Allocator The Contiguous Memory Allocator is a set of helper functions for DMA mapping framework that improves allocations of contiguous memory chunks. CMA grabs memory on system boot, marks it with MIGRATE_CMA migrate type and gives back to the system. Kernel is allowed to allocate only movable pages within CMA's managed memory so that it can be used for example for page cache when DMA mapping do not use it. On dma_alloc_from_contiguous() request such pages are migrated out of CMA area to free required contiguous block and fulfill the request. This allows to allocate large contiguous chunks of memory at any time assuming that there is enough free memory available in the system. This code is heavily based on earlier works by Michal Nazarewicz. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park Signed-off-by: Michal Nazarewicz Acked-by: Arnd Bergmann Tested-by: Rob Clark Tested-by: Ohad Ben-Cohen Tested-by: Benjamin Gaignard Tested-by: Robert Nelson Tested-by: Barry Song --- drivers/base/Kconfig | 89 ++++++++++ drivers/base/Makefile | 1 + drivers/base/dma-contiguous.c | 401 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 491 insertions(+) create mode 100644 drivers/base/dma-contiguous.c (limited to 'drivers') diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig index 9aa618acfe97..9b21469482ae 100644 --- a/drivers/base/Kconfig +++ b/drivers/base/Kconfig @@ -192,4 +192,93 @@ config DMA_SHARED_BUFFER APIs extension; the file's descriptor can then be passed on to other driver. +config CMA + bool "Contiguous Memory Allocator (EXPERIMENTAL)" + depends on HAVE_DMA_CONTIGUOUS && HAVE_MEMBLOCK && EXPERIMENTAL + select MIGRATION + help + This enables the Contiguous Memory Allocator which allows drivers + to allocate big physically-contiguous blocks of memory for use with + hardware components that do not support I/O map nor scatter-gather. + + For more information see . + If unsure, say "n". + +if CMA + +config CMA_DEBUG + bool "CMA debug messages (DEVELOPMENT)" + depends on DEBUG_KERNEL + help + Turns on debug messages in CMA. This produces KERN_DEBUG + messages for every CMA call as well as various messages while + processing calls such as dma_alloc_from_contiguous(). + This option does not affect warning and error messages. + +comment "Default contiguous memory area size:" + +config CMA_SIZE_MBYTES + int "Size in Mega Bytes" + depends on !CMA_SIZE_SEL_PERCENTAGE + default 16 + help + Defines the size (in MiB) of the default memory area for Contiguous + Memory Allocator. + +config CMA_SIZE_PERCENTAGE + int "Percentage of total memory" + depends on !CMA_SIZE_SEL_MBYTES + default 10 + help + Defines the size of the default memory area for Contiguous Memory + Allocator as a percentage of the total memory in the system. + +choice + prompt "Selected region size" + default CMA_SIZE_SEL_ABSOLUTE + +config CMA_SIZE_SEL_MBYTES + bool "Use mega bytes value only" + +config CMA_SIZE_SEL_PERCENTAGE + bool "Use percentage value only" + +config CMA_SIZE_SEL_MIN + bool "Use lower value (minimum)" + +config CMA_SIZE_SEL_MAX + bool "Use higher value (maximum)" + +endchoice + +config CMA_ALIGNMENT + int "Maximum PAGE_SIZE order of alignment for contiguous buffers" + range 4 9 + default 8 + help + DMA mapping framework by default aligns all buffers to the smallest + PAGE_SIZE order which is greater than or equal to the requested buffer + size. This works well for buffers up to a few hundreds kilobytes, but + for larger buffers it just a memory waste. With this parameter you can + specify the maximum PAGE_SIZE order for contiguous buffers. Larger + buffers will be aligned only to this specified order. The order is + expressed as a power of two multiplied by the PAGE_SIZE. + + For example, if your system defaults to 4KiB pages, the order value + of 8 means that the buffers will be aligned up to 1MiB only. + + If unsure, leave the default value "8". + +config CMA_AREAS + int "Maximum count of the CMA device-private areas" + default 7 + help + CMA allows to create CMA areas for particular devices. This parameter + sets the maximum number of such device private CMA areas in the + system. + + If unsure, leave the default value "7". + +endif + endmenu diff --git a/drivers/base/Makefile b/drivers/base/Makefile index b6d1b9c4200c..5aa2d703d19f 100644 --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -6,6 +6,7 @@ obj-y := core.o bus.o dd.o syscore.o \ attribute_container.o transport_class.o \ topology.o obj-$(CONFIG_DEVTMPFS) += devtmpfs.o +obj-$(CONFIG_CMA) += dma-contiguous.o obj-y += power/ obj-$(CONFIG_HAS_DMA) += dma-mapping.o obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o diff --git a/drivers/base/dma-contiguous.c b/drivers/base/dma-contiguous.c new file mode 100644 index 000000000000..78efb0306a44 --- /dev/null +++ b/drivers/base/dma-contiguous.c @@ -0,0 +1,401 @@ +/* + * Contiguous Memory Allocator for DMA mapping framework + * Copyright (c) 2010-2011 by Samsung Electronics. + * Written by: + * Marek Szyprowski + * Michal Nazarewicz + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License or (at your optional) any later version of the license. + */ + +#define pr_fmt(fmt) "cma: " fmt + +#ifdef CONFIG_CMA_DEBUG +#ifndef DEBUG +# define DEBUG +#endif +#endif + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef SZ_1M +#define SZ_1M (1 << 20) +#endif + +struct cma { + unsigned long base_pfn; + unsigned long count; + unsigned long *bitmap; +}; + +struct cma *dma_contiguous_default_area; + +#ifdef CONFIG_CMA_SIZE_MBYTES +#define CMA_SIZE_MBYTES CONFIG_CMA_SIZE_MBYTES +#else +#define CMA_SIZE_MBYTES 0 +#endif + +/* + * Default global CMA area size can be defined in kernel's .config. + * This is usefull mainly for distro maintainers to create a kernel + * that works correctly for most supported systems. + * The size can be set in bytes or as a percentage of the total memory + * in the system. + * + * Users, who want to set the size of global CMA area for their system + * should use cma= kernel parameter. + */ +static const unsigned long size_bytes = CMA_SIZE_MBYTES * SZ_1M; +static long size_cmdline = -1; + +static int __init early_cma(char *p) +{ + pr_debug("%s(%s)\n", __func__, p); + size_cmdline = memparse(p, &p); + return 0; +} +early_param("cma", early_cma); + +#ifdef CONFIG_CMA_SIZE_PERCENTAGE + +static unsigned long __init __maybe_unused cma_early_percent_memory(void) +{ + struct memblock_region *reg; + unsigned long total_pages = 0; + + /* + * We cannot use memblock_phys_mem_size() here, because + * memblock_analyze() has not been called yet. + */ + for_each_memblock(memory, reg) + total_pages += memblock_region_memory_end_pfn(reg) - + memblock_region_memory_base_pfn(reg); + + return (total_pages * CONFIG_CMA_SIZE_PERCENTAGE / 100) << PAGE_SHIFT; +} + +#else + +static inline __maybe_unused unsigned long cma_early_percent_memory(void) +{ + return 0; +} + +#endif + +/** + * dma_contiguous_reserve() - reserve area for contiguous memory handling + * @limit: End address of the reserved memory (optional, 0 for any). + * + * This function reserves memory from early allocator. It should be + * called by arch specific code once the early allocator (memblock or bootmem) + * has been activated and all other subsystems have already allocated/reserved + * memory. + */ +void __init dma_contiguous_reserve(phys_addr_t limit) +{ + unsigned long selected_size = 0; + + pr_debug("%s(limit %08lx)\n", __func__, (unsigned long)limit); + + if (size_cmdline != -1) { + selected_size = size_cmdline; + } else { +#ifdef CONFIG_CMA_SIZE_SEL_MBYTES + selected_size = size_bytes; +#elif defined(CONFIG_CMA_SIZE_SEL_PERCENTAGE) + selected_size = cma_early_percent_memory(); +#elif defined(CONFIG_CMA_SIZE_SEL_MIN) + selected_size = min(size_bytes, cma_early_percent_memory()); +#elif defined(CONFIG_CMA_SIZE_SEL_MAX) + selected_size = max(size_bytes, cma_early_percent_memory()); +#endif + } + + if (selected_size) { + pr_debug("%s: reserving %ld MiB for global area\n", __func__, + selected_size / SZ_1M); + + dma_declare_contiguous(NULL, selected_size, 0, limit); + } +}; + +static DEFINE_MUTEX(cma_mutex); + +static __init int cma_activate_area(unsigned long base_pfn, unsigned long count) +{ + unsigned long pfn = base_pfn; + unsigned i = count >> pageblock_order; + struct zone *zone; + + WARN_ON_ONCE(!pfn_valid(pfn)); + zone = page_zone(pfn_to_page(pfn)); + + do { + unsigned j; + base_pfn = pfn; + for (j = pageblock_nr_pages; j; --j, pfn++) { + WARN_ON_ONCE(!pfn_valid(pfn)); + if (page_zone(pfn_to_page(pfn)) != zone) + return -EINVAL; + } + init_cma_reserved_pageblock(pfn_to_page(base_pfn)); + } while (--i); + return 0; +} + +static __init struct cma *cma_create_area(unsigned long base_pfn, + unsigned long count) +{ + int bitmap_size = BITS_TO_LONGS(count) * sizeof(long); + struct cma *cma; + int ret = -ENOMEM; + + pr_debug("%s(base %08lx, count %lx)\n", __func__, base_pfn, count); + + cma = kmalloc(sizeof *cma, GFP_KERNEL); + if (!cma) + return ERR_PTR(-ENOMEM); + + cma->base_pfn = base_pfn; + cma->count = count; + cma->bitmap = kzalloc(bitmap_size, GFP_KERNEL); + + if (!cma->bitmap) + goto no_mem; + + ret = cma_activate_area(base_pfn, count); + if (ret) + goto error; + + pr_debug("%s: returned %p\n", __func__, (void *)cma); + return cma; + +error: + kfree(cma->bitmap); +no_mem: + kfree(cma); + return ERR_PTR(ret); +} + +static struct cma_reserved { + phys_addr_t start; + unsigned long size; + struct device *dev; +} cma_reserved[MAX_CMA_AREAS] __initdata; +static unsigned cma_reserved_count __initdata; + +static int __init cma_init_reserved_areas(void) +{ + struct cma_reserved *r = cma_reserved; + unsigned i = cma_reserved_count; + + pr_debug("%s()\n", __func__); + + for (; i; --i, ++r) { + struct cma *cma; + cma = cma_create_area(PFN_DOWN(r->start), + r->size >> PAGE_SHIFT); + if (!IS_ERR(cma)) + dev_set_cma_area(r->dev, cma); + } + return 0; +} +core_initcall(cma_init_reserved_areas); + +/** + * dma_declare_contiguous() - reserve area for contiguous memory handling + * for particular device + * @dev: Pointer to device structure. + * @size: Size of the reserved memory. + * @base: Start address of the reserved memory (optional, 0 for any). + * @limit: End address of the reserved memory (optional, 0 for any). + * + * This function reserves memory for specified device. It should be + * called by board specific code when early allocator (memblock or bootmem) + * is still activate. + */ +int __init dma_declare_contiguous(struct device *dev, unsigned long size, + phys_addr_t base, phys_addr_t limit) +{ + struct cma_reserved *r = &cma_reserved[cma_reserved_count]; + unsigned long alignment; + + pr_debug("%s(size %lx, base %08lx, limit %08lx)\n", __func__, + (unsigned long)size, (unsigned long)base, + (unsigned long)limit); + + /* Sanity checks */ + if (cma_reserved_count == ARRAY_SIZE(cma_reserved)) { + pr_err("Not enough slots for CMA reserved regions!\n"); + return -ENOSPC; + } + + if (!size) + return -EINVAL; + + /* Sanitise input arguments */ + alignment = PAGE_SIZE << max(MAX_ORDER, pageblock_order); + base = ALIGN(base, alignment); + size = ALIGN(size, alignment); + limit &= ~(alignment - 1); + + /* Reserve memory */ + if (base) { + if (memblock_is_region_reserved(base, size) || + memblock_reserve(base, size) < 0) { + base = -EBUSY; + goto err; + } + } else { + /* + * Use __memblock_alloc_base() since + * memblock_alloc_base() panic()s. + */ + phys_addr_t addr = __memblock_alloc_base(size, alignment, limit); + if (!addr) { + base = -ENOMEM; + goto err; + } else if (addr + size > ~(unsigned long)0) { + memblock_free(addr, size); + base = -EINVAL; + goto err; + } else { + base = addr; + } + } + + /* + * Each reserved area must be initialised later, when more kernel + * subsystems (like slab allocator) are available. + */ + r->start = base; + r->size = size; + r->dev = dev; + cma_reserved_count++; + pr_info("CMA: reserved %ld MiB at %08lx\n", size / SZ_1M, + (unsigned long)base); + + /* Architecture specific contiguous memory fixup. */ + dma_contiguous_early_fixup(base, size); + return 0; +err: + pr_err("CMA: failed to reserve %ld MiB\n", size / SZ_1M); + return base; +} + +/** + * dma_alloc_from_contiguous() - allocate pages from contiguous area + * @dev: Pointer to device for which the allocation is performed. + * @count: Requested number of pages. + * @align: Requested alignment of pages (in PAGE_SIZE order). + * + * This function allocates memory buffer for specified device. It uses + * device specific contiguous memory area if available or the default + * global one. Requires architecture specific get_dev_cma_area() helper + * function. + */ +struct page *dma_alloc_from_contiguous(struct device *dev, int count, + unsigned int align) +{ + unsigned long mask, pfn, pageno, start = 0; + struct cma *cma = dev_get_cma_area(dev); + int ret; + + if (!cma || !cma->count) + return NULL; + + if (align > CONFIG_CMA_ALIGNMENT) + align = CONFIG_CMA_ALIGNMENT; + + pr_debug("%s(cma %p, count %d, align %d)\n", __func__, (void *)cma, + count, align); + + if (!count) + return NULL; + + mask = (1 << align) - 1; + + mutex_lock(&cma_mutex); + + for (;;) { + pageno = bitmap_find_next_zero_area(cma->bitmap, cma->count, + start, count, mask); + if (pageno >= cma->count) { + ret = -ENOMEM; + goto error; + } + + pfn = cma->base_pfn + pageno; + ret = alloc_contig_range(pfn, pfn + count, MIGRATE_CMA); + if (ret == 0) { + bitmap_set(cma->bitmap, pageno, count); + break; + } else if (ret != -EBUSY) { + goto error; + } + pr_debug("%s(): memory range at %p is busy, retrying\n", + __func__, pfn_to_page(pfn)); + /* try again with a bit different memory target */ + start = pageno + mask + 1; + } + + mutex_unlock(&cma_mutex); + + pr_debug("%s(): returned %p\n", __func__, pfn_to_page(pfn)); + return pfn_to_page(pfn); +error: + mutex_unlock(&cma_mutex); + return NULL; +} + +/** + * dma_release_from_contiguous() - release allocated pages + * @dev: Pointer to device for which the pages were allocated. + * @pages: Allocated pages. + * @count: Number of allocated pages. + * + * This function releases memory allocated by dma_alloc_from_contiguous(). + * It returns false when provided pages do not belong to contiguous area and + * true otherwise. + */ +bool dma_release_from_contiguous(struct device *dev, struct page *pages, + int count) +{ + struct cma *cma = dev_get_cma_area(dev); + unsigned long pfn; + + if (!cma || !pages) + return false; + + pr_debug("%s(page %p)\n", __func__, (void *)pages); + + pfn = page_to_pfn(pages); + + if (pfn < cma->base_pfn || pfn >= cma->base_pfn + cma->count) + return false; + + VM_BUG_ON(pfn + count > cma->base_pfn + cma->count); + + mutex_lock(&cma_mutex); + bitmap_clear(cma->bitmap, pfn - cma->base_pfn, count); + free_contig_range(pfn, count); + mutex_unlock(&cma_mutex); + + return true; +} -- cgit v1.2.2 From 3df425f316fb5c5e90236ff22b6e6616b3516af0 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Thu, 12 Apr 2012 17:33:07 +0200 Subject: OF: PCI: const usage needed by MIPS On MIPS we want to call of_irq_map_pci from inside arch/mips/include/asm/pci.h:extern int pcibios_map_irq( const struct pci_dev *dev, u8 slot, u8 pin); For this to work we need to change several functions to const usage. Signed-off-by: John Crispin Cc: linux-pci@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Acked-by: Bjorn Helgaas Acked-by: Grant Likely Patchwork: https://patchwork.linux-mips.org/patch/3710/ Signed-off-by: Ralf Baechle --- drivers/of/of_pci_irq.c | 2 +- drivers/pci/pci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c index 93125163dea2..677053813211 100644 --- a/drivers/of/of_pci_irq.c +++ b/drivers/of/of_pci_irq.c @@ -15,7 +15,7 @@ * PCI tree until an device-node is found, at which point it will finish * resolving using the OF tree walking. */ -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) +int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq) { struct device_node *dn, *ppnode; struct pci_dev *ppdev; diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 111569ccab43..8b91fe741f6a 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2369,7 +2369,7 @@ void pci_enable_acs(struct pci_dev *dev) * number is always 0 (see the Implementation Note in section 2.2.8.1 of * the PCI Express Base Specification, Revision 2.1) */ -u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin) +u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin) { int slot; -- cgit v1.2.2 From 5238f7bc356670ba702057c7de7f07909133f788 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 11 May 2012 18:48:39 +0200 Subject: GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 patches will convert the drivers to OF. Signed-off-by: John Crispin Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely Patchwork: https://patchwork.linux-mips.org/patch/3838/ Signed-off-by: Ralf Baechle --- drivers/gpio/Kconfig | 18 +++++ drivers/gpio/Makefile | 2 + drivers/gpio/gpio-mm-lantiq.c | 126 ++++++++++++++++++++++++++++++++++ drivers/gpio/gpio-stp-xway.c | 152 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 298 insertions(+) create mode 100644 drivers/gpio/gpio-mm-lantiq.c create mode 100644 drivers/gpio/gpio-stp-xway.c (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e03653d69357..8fae07935cd1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -96,6 +96,14 @@ config GPIO_EP93XX depends on ARCH_EP93XX select GPIO_GENERIC +config GPIO_MM_LANTIQ + bool "Lantiq Memory mapped GPIOs" + depends on LANTIQ && SOC_XWAY + help + This enables support for memory mapped GPIOs on the External Bus Unit + (EBU) found on Lantiq SoCs. The gpios are output only as they are + created by attaching a 16bit latch to the bus. + config GPIO_MPC5200 def_bool y depends on PPC_MPC52xx @@ -306,6 +314,16 @@ config GPIO_STMPE This enables support for the GPIOs found on the STMPE I/O Expanders. +config GPIO_STP_XWAY + bool "XWAY STP GPIOs" + depends on SOC_XWAY + help + This enables support for the Serial To Parallel (STP) unit found on + XWAY SoC. The STP allows the SoC to drive a shift registers cascade, + that can be up to 24 bit. This peripheral is aimed at driving leds. + Some of the gpios/leds can be auto updated by the soc with dsl and + phy status. + config GPIO_TC3589X bool "TC3589X GPIOs" depends on MFD_TC3589X diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 007f54bd0081..ed1c96db404b 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o obj-$(CONFIG_GPIO_MCP23S08) += gpio-mcp23s08.o obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o +obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o obj-$(CONFIG_GPIO_MSM_V1) += gpio-msm-v1.o @@ -49,6 +50,7 @@ obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o +obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c new file mode 100644 index 000000000000..b91c7f17f10f --- /dev/null +++ b/drivers/gpio/gpio-mm-lantiq.c @@ -0,0 +1,126 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2010 John Crispin + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * By attaching hardware latches to the EBU it is possible to create output + * only gpios. This driver configures a special memory address, which when + * written to outputs 16 bit to the latches. + */ + +#define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ +#define LTQ_EBU_WP 0x80000000 /* write protect bit */ + +/* we keep a shadow value of the last value written to the ebu */ +static int ltq_ebu_gpio_shadow = 0x0; +static void __iomem *ltq_ebu_gpio_membase; + +static void ltq_ebu_apply(void) +{ + unsigned long flags; + + spin_lock_irqsave(&ebu_lock, flags); + ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); + *((__u16 *)ltq_ebu_gpio_membase) = ltq_ebu_gpio_shadow; + ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); + spin_unlock_irqrestore(&ebu_lock, flags); +} + +static void ltq_ebu_set(struct gpio_chip *chip, unsigned offset, int value) +{ + if (value) + ltq_ebu_gpio_shadow |= (1 << offset); + else + ltq_ebu_gpio_shadow &= ~(1 << offset); + ltq_ebu_apply(); +} + +static int ltq_ebu_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + ltq_ebu_set(chip, offset, value); + + return 0; +} + +static struct gpio_chip ltq_ebu_chip = { + .label = "ltq_ebu", + .direction_output = ltq_ebu_direction_output, + .set = ltq_ebu_set, + .base = 72, + .ngpio = 16, + .can_sleep = 1, + .owner = THIS_MODULE, +}; + +static int ltq_ebu_probe(struct platform_device *pdev) +{ + int ret = 0; + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (!res) { + dev_err(&pdev->dev, "failed to get memory resource\n"); + return -ENOENT; + } + + res = devm_request_mem_region(&pdev->dev, res->start, + resource_size(res), dev_name(&pdev->dev)); + if (!res) { + dev_err(&pdev->dev, "failed to request memory resource\n"); + return -EBUSY; + } + + ltq_ebu_gpio_membase = devm_ioremap_nocache(&pdev->dev, res->start, + resource_size(res)); + if (!ltq_ebu_gpio_membase) { + dev_err(&pdev->dev, "Failed to ioremap mem region\n"); + return -ENOMEM; + } + + /* grab the default shadow value passed form the platform code */ + ltq_ebu_gpio_shadow = (unsigned int) pdev->dev.platform_data; + + /* tell the ebu controller which memory address we will be using */ + ltq_ebu_w32(pdev->resource->start | 0x1, LTQ_EBU_ADDRSEL1); + + /* write protect the region */ + ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); + + ret = gpiochip_add(<q_ebu_chip); + if (!ret) + ltq_ebu_apply(); + return ret; +} + +static struct platform_driver ltq_ebu_driver = { + .probe = ltq_ebu_probe, + .driver = { + .name = "ltq_ebu", + .owner = THIS_MODULE, + }, +}; + +static int __init ltq_ebu_init(void) +{ + int ret = platform_driver_register(<q_ebu_driver); + + if (ret) + pr_info("ltq_ebu : Error registering platfom driver!"); + return ret; +} + +postcore_initcall(ltq_ebu_init); diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c new file mode 100644 index 000000000000..d674f1be237d --- /dev/null +++ b/drivers/gpio/gpio-stp-xway.c @@ -0,0 +1,152 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2007 John Crispin + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define LTQ_STP_CON0 0x00 +#define LTQ_STP_CON1 0x04 +#define LTQ_STP_CPU0 0x08 +#define LTQ_STP_CPU1 0x0C +#define LTQ_STP_AR 0x10 + +#define LTQ_STP_CON_SWU (1 << 31) +#define LTQ_STP_2HZ 0 +#define LTQ_STP_4HZ (1 << 23) +#define LTQ_STP_8HZ (2 << 23) +#define LTQ_STP_10HZ (3 << 23) +#define LTQ_STP_SPEED_MASK (0xf << 23) +#define LTQ_STP_UPD_FPI (1 << 31) +#define LTQ_STP_UPD_MASK (3 << 30) +#define LTQ_STP_ADSL_SRC (3 << 24) + +#define LTQ_STP_GROUP0 (1 << 0) + +#define LTQ_STP_RISING 0 +#define LTQ_STP_FALLING (1 << 26) +#define LTQ_STP_EDGE_MASK (1 << 26) + +#define ltq_stp_r32(reg) __raw_readl(ltq_stp_membase + reg) +#define ltq_stp_w32(val, reg) __raw_writel(val, ltq_stp_membase + reg) +#define ltq_stp_w32_mask(clear, set, reg) \ + ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \ + ltq_stp_membase + (reg)) + +static int ltq_stp_shadow = 0xffff; +static void __iomem *ltq_stp_membase; + +static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value) +{ + if (value) + ltq_stp_shadow |= (1 << offset); + else + ltq_stp_shadow &= ~(1 << offset); + ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0); +} + +static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + ltq_stp_set(chip, offset, value); + + return 0; +} + +static struct gpio_chip ltq_stp_chip = { + .label = "ltq_stp", + .direction_output = ltq_stp_direction_output, + .set = ltq_stp_set, + .base = 48, + .ngpio = 24, + .can_sleep = 1, + .owner = THIS_MODULE, +}; + +static int ltq_stp_hw_init(void) +{ + /* sane defaults */ + ltq_stp_w32(0, LTQ_STP_AR); + ltq_stp_w32(0, LTQ_STP_CPU0); + ltq_stp_w32(0, LTQ_STP_CPU1); + ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0); + ltq_stp_w32(0, LTQ_STP_CON1); + + /* rising or falling edge */ + ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0); + + /* per default stp 15-0 are set */ + ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1); + + /* stp are update periodically by the FPI bus */ + ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); + + /* set stp update speed */ + ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1); + + /* tell the hardware that pin (led) 0 and 1 are controlled + * by the dsl arc + */ + ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0); + + ltq_pmu_enable(PMU_LED); + return 0; +} + +static int __devinit ltq_stp_probe(struct platform_device *pdev) +{ + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + int ret = 0; + + if (!res) + return -ENOENT; + res = devm_request_mem_region(&pdev->dev, res->start, + resource_size(res), dev_name(&pdev->dev)); + if (!res) { + dev_err(&pdev->dev, "failed to request STP memory\n"); + return -EBUSY; + } + ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start, + resource_size(res)); + if (!ltq_stp_membase) { + dev_err(&pdev->dev, "failed to remap STP memory\n"); + return -ENOMEM; + } + ret = gpiochip_add(<q_stp_chip); + if (!ret) + ret = ltq_stp_hw_init(); + + return ret; +} + +static struct platform_driver ltq_stp_driver = { + .probe = ltq_stp_probe, + .driver = { + .name = "ltq_stp", + .owner = THIS_MODULE, + }, +}; + +int __init ltq_stp_init(void) +{ + int ret = platform_driver_register(<q_stp_driver); + + if (ret) + pr_info("ltq_stp: error registering platfom driver"); + return ret; +} + +postcore_initcall(ltq_stp_init); -- cgit v1.2.2 From a36e9a1c5fa67cdc965fe011f1d04317adb35953 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 16 May 2012 22:17:38 +0200 Subject: GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio Implements OF support and convert to of_mm_gpio. By attaching hardware latches to the External Bus Unit (EBU) on Lantiq SoC, it is possible to create output only gpios. This driver configures a special memory address, which when written to, outputs 16 bit to the latches. Signed-off-by: John Crispin Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely Patchwork: https://patchwork.linux-mips.org/patch/3840/ Signed-off-by: Ralf Baechle --- drivers/gpio/gpio-mm-lantiq.c | 146 +++++++++++++++++++++++++----------------- 1 file changed, 89 insertions(+), 57 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c index b91c7f17f10f..2983dfbd0668 100644 --- a/drivers/gpio/gpio-mm-lantiq.c +++ b/drivers/gpio/gpio-mm-lantiq.c @@ -3,16 +3,19 @@ * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. * - * Copyright (C) 2010 John Crispin + * Copyright (C) 2012 John Crispin */ #include -#include +#include #include #include #include #include +#include +#include #include +#include #include @@ -25,102 +28,131 @@ #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ #define LTQ_EBU_WP 0x80000000 /* write protect bit */ -/* we keep a shadow value of the last value written to the ebu */ -static int ltq_ebu_gpio_shadow = 0x0; -static void __iomem *ltq_ebu_gpio_membase; +struct ltq_mm { + struct of_mm_gpio_chip mmchip; + u16 shadow; /* shadow the latches state */ +}; -static void ltq_ebu_apply(void) +/** + * ltq_mm_apply() - write the shadow value to the ebu address. + * @chip: Pointer to our private data structure. + * + * Write the shadow value to the EBU to set the gpios. We need to set the + * global EBU lock to make sure that PCI/MTD dont break. + */ +static void ltq_mm_apply(struct ltq_mm *chip) { unsigned long flags; spin_lock_irqsave(&ebu_lock, flags); ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); - *((__u16 *)ltq_ebu_gpio_membase) = ltq_ebu_gpio_shadow; + __raw_writew(chip->shadow, chip->mmchip.regs); ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); spin_unlock_irqrestore(&ebu_lock, flags); } -static void ltq_ebu_set(struct gpio_chip *chip, unsigned offset, int value) +/** + * ltq_mm_set() - gpio_chip->set - set gpios. + * @gc: Pointer to gpio_chip device structure. + * @gpio: GPIO signal number. + * @val: Value to be written to specified signal. + * + * Set the shadow value and call ltq_mm_apply. + */ +static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) { + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct ltq_mm *chip = + container_of(mm_gc, struct ltq_mm, mmchip); + if (value) - ltq_ebu_gpio_shadow |= (1 << offset); + chip->shadow |= (1 << offset); else - ltq_ebu_gpio_shadow &= ~(1 << offset); - ltq_ebu_apply(); + chip->shadow &= ~(1 << offset); + ltq_mm_apply(chip); } -static int ltq_ebu_direction_output(struct gpio_chip *chip, unsigned offset, - int value) +/** + * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. + * @gc: Pointer to gpio_chip device structure. + * @gpio: GPIO signal number. + * @val: Value to be written to specified signal. + * + * Same as ltq_mm_set, always returns 0. + */ +static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) { - ltq_ebu_set(chip, offset, value); + ltq_mm_set(gc, offset, value); return 0; } -static struct gpio_chip ltq_ebu_chip = { - .label = "ltq_ebu", - .direction_output = ltq_ebu_direction_output, - .set = ltq_ebu_set, - .base = 72, - .ngpio = 16, - .can_sleep = 1, - .owner = THIS_MODULE, -}; +/** + * ltq_mm_save_regs() - Set initial values of GPIO pins + * @mm_gc: pointer to memory mapped GPIO chip structure + */ +static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) +{ + struct ltq_mm *chip = + container_of(mm_gc, struct ltq_mm, mmchip); + + /* tell the ebu controller which memory address we will be using */ + ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); + + ltq_mm_apply(chip); +} -static int ltq_ebu_probe(struct platform_device *pdev) +static int ltq_mm_probe(struct platform_device *pdev) { - int ret = 0; struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + struct ltq_mm *chip; + const __be32 *shadow; + int ret = 0; if (!res) { dev_err(&pdev->dev, "failed to get memory resource\n"); return -ENOENT; } - res = devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), dev_name(&pdev->dev)); - if (!res) { - dev_err(&pdev->dev, "failed to request memory resource\n"); - return -EBUSY; - } - - ltq_ebu_gpio_membase = devm_ioremap_nocache(&pdev->dev, res->start, - resource_size(res)); - if (!ltq_ebu_gpio_membase) { - dev_err(&pdev->dev, "Failed to ioremap mem region\n"); + chip = kzalloc(sizeof(*chip), GFP_KERNEL); + if (!chip) return -ENOMEM; - } - /* grab the default shadow value passed form the platform code */ - ltq_ebu_gpio_shadow = (unsigned int) pdev->dev.platform_data; + chip->mmchip.gc.ngpio = 16; + chip->mmchip.gc.label = "gpio-mm-ltq"; + chip->mmchip.gc.direction_output = ltq_mm_dir_out; + chip->mmchip.gc.set = ltq_mm_set; + chip->mmchip.save_regs = ltq_mm_save_regs; - /* tell the ebu controller which memory address we will be using */ - ltq_ebu_w32(pdev->resource->start | 0x1, LTQ_EBU_ADDRSEL1); + /* store the shadow value if one was passed by the devicetree */ + shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL); + if (shadow) + chip->shadow = be32_to_cpu(*shadow); - /* write protect the region */ - ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); - - ret = gpiochip_add(<q_ebu_chip); - if (!ret) - ltq_ebu_apply(); + ret = of_mm_gpiochip_add(pdev->dev.of_node, &chip->mmchip); + if (ret) + kfree(chip); return ret; } -static struct platform_driver ltq_ebu_driver = { - .probe = ltq_ebu_probe, +static const struct of_device_id ltq_mm_match[] = { + { .compatible = "lantiq,gpio-mm" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ltq_mm_match); + +static struct platform_driver ltq_mm_driver = { + .probe = ltq_mm_probe, .driver = { - .name = "ltq_ebu", + .name = "gpio-mm-ltq", .owner = THIS_MODULE, + .of_match_table = ltq_mm_match, }, }; -static int __init ltq_ebu_init(void) +static int __init ltq_mm_init(void) { - int ret = platform_driver_register(<q_ebu_driver); - - if (ret) - pr_info("ltq_ebu : Error registering platfom driver!"); - return ret; + return platform_driver_register(<q_mm_driver); } -postcore_initcall(ltq_ebu_init); +subsys_initcall(ltq_mm_init); -- cgit v1.2.2 From 54f30066178d4ff2da8e62427975736131cdbf96 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 16 May 2012 22:22:47 +0200 Subject: GPIO: MIPS: lantiq: convert gpio-stp-xway to OF Implements OF support and add code to load custom properties from the DT. The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a peripheral controller used to drive external shift register cascades. At most 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem to drive the 2 LSBs of the cascade automatically. Newer socs are also able to automatically drive some pins via the internal PHYs. The driver currently only supports output functionality. Patches for the input feature found on newer generations of the soc will be provided in a later series. Signed-off-by: John Crispin Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely Patchwork: https://patchwork.linux-mips.org/patch/3839/ Signed-off-by: Ralf Baechle --- drivers/gpio/gpio-stp-xway.c | 333 +++++++++++++++++++++++++++++++------------ 1 file changed, 241 insertions(+), 92 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index d674f1be237d..e35096bf3cfb 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -3,150 +3,299 @@ * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. * - * Copyright (C) 2007 John Crispin + * Copyright (C) 2012 John Crispin * */ #include #include -#include +#include #include -#include +#include #include -#include #include +#include +#include +#include +#include #include -#define LTQ_STP_CON0 0x00 -#define LTQ_STP_CON1 0x04 -#define LTQ_STP_CPU0 0x08 -#define LTQ_STP_CPU1 0x0C -#define LTQ_STP_AR 0x10 - -#define LTQ_STP_CON_SWU (1 << 31) -#define LTQ_STP_2HZ 0 -#define LTQ_STP_4HZ (1 << 23) -#define LTQ_STP_8HZ (2 << 23) -#define LTQ_STP_10HZ (3 << 23) -#define LTQ_STP_SPEED_MASK (0xf << 23) -#define LTQ_STP_UPD_FPI (1 << 31) -#define LTQ_STP_UPD_MASK (3 << 30) -#define LTQ_STP_ADSL_SRC (3 << 24) - -#define LTQ_STP_GROUP0 (1 << 0) - -#define LTQ_STP_RISING 0 -#define LTQ_STP_FALLING (1 << 26) -#define LTQ_STP_EDGE_MASK (1 << 26) - -#define ltq_stp_r32(reg) __raw_readl(ltq_stp_membase + reg) -#define ltq_stp_w32(val, reg) __raw_writel(val, ltq_stp_membase + reg) -#define ltq_stp_w32_mask(clear, set, reg) \ - ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \ - ltq_stp_membase + (reg)) - -static int ltq_stp_shadow = 0xffff; -static void __iomem *ltq_stp_membase; - -static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value) +/* + * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a + * peripheral controller used to drive external shift register cascades. At most + * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem + * to drive the 2 LSBs of the cascade automatically. + */ + +/* control register 0 */ +#define XWAY_STP_CON0 0x00 +/* control register 1 */ +#define XWAY_STP_CON1 0x04 +/* data register 0 */ +#define XWAY_STP_CPU0 0x08 +/* data register 1 */ +#define XWAY_STP_CPU1 0x0C +/* access register */ +#define XWAY_STP_AR 0x10 + +/* software or hardware update select bit */ +#define XWAY_STP_CON_SWU BIT(31) + +/* automatic update rates */ +#define XWAY_STP_2HZ 0 +#define XWAY_STP_4HZ BIT(23) +#define XWAY_STP_8HZ BIT(24) +#define XWAY_STP_10HZ (BIT(24) | BIT(23)) +#define XWAY_STP_SPEED_MASK (0xf << 23) + +/* clock source for automatic update */ +#define XWAY_STP_UPD_FPI BIT(31) +#define XWAY_STP_UPD_MASK (BIT(31) | BIT(30)) + +/* let the adsl core drive the 2 LSBs */ +#define XWAY_STP_ADSL_SHIFT 24 +#define XWAY_STP_ADSL_MASK 0x3 + +/* 2 groups of 3 bits can be driven by the phys */ +#define XWAY_STP_PHY_MASK 0x3 +#define XWAY_STP_PHY1_SHIFT 27 +#define XWAY_STP_PHY2_SHIFT 15 + +/* STP has 3 groups of 8 bits */ +#define XWAY_STP_GROUP0 BIT(0) +#define XWAY_STP_GROUP1 BIT(1) +#define XWAY_STP_GROUP2 BIT(2) +#define XWAY_STP_GROUP_MASK (0x7) + +/* Edge configuration bits */ +#define XWAY_STP_FALLING BIT(26) +#define XWAY_STP_EDGE_MASK BIT(26) + +#define xway_stp_r32(m, reg) __raw_readl(m + reg) +#define xway_stp_w32(m, val, reg) __raw_writel(val, m + reg) +#define xway_stp_w32_mask(m, clear, set, reg) \ + ltq_w32((ltq_r32(m + reg) & ~(clear)) | (set), \ + m + reg) + +struct xway_stp { + struct gpio_chip gc; + void __iomem *virt; + u32 edge; /* rising or falling edge triggered shift register */ + u16 shadow; /* shadow the shift registers state */ + u8 groups; /* we can drive 1-3 groups of 8bit each */ + u8 dsl; /* the 2 LSBs can be driven by the dsl core */ + u8 phy1; /* 3 bits can be driven by phy1 */ + u8 phy2; /* 3 bits can be driven by phy2 */ + u8 reserved; /* mask out the hw driven bits in gpio_request */ +}; + +/** + * xway_stp_set() - gpio_chip->set - set gpios. + * @gc: Pointer to gpio_chip device structure. + * @gpio: GPIO signal number. + * @val: Value to be written to specified signal. + * + * Set the shadow value and call ltq_ebu_apply. + */ +static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val) { - if (value) - ltq_stp_shadow |= (1 << offset); + struct xway_stp *chip = + container_of(gc, struct xway_stp, gc); + + if (val) + chip->shadow |= BIT(gpio); else - ltq_stp_shadow &= ~(1 << offset); - ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0); + chip->shadow &= ~BIT(gpio); + xway_stp_w32(chip->virt, chip->shadow, XWAY_STP_CPU0); + xway_stp_w32_mask(chip->virt, 0, XWAY_STP_CON_SWU, XWAY_STP_CON0); } -static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset, - int value) +/** + * xway_stp_dir_out() - gpio_chip->dir_out - set gpio direction. + * @gc: Pointer to gpio_chip device structure. + * @gpio: GPIO signal number. + * @val: Value to be written to specified signal. + * + * Same as xway_stp_set, always returns 0. + */ +static int xway_stp_dir_out(struct gpio_chip *gc, unsigned gpio, int val) { - ltq_stp_set(chip, offset, value); + xway_stp_set(gc, gpio, val); return 0; } -static struct gpio_chip ltq_stp_chip = { - .label = "ltq_stp", - .direction_output = ltq_stp_direction_output, - .set = ltq_stp_set, - .base = 48, - .ngpio = 24, - .can_sleep = 1, - .owner = THIS_MODULE, -}; +/** + * xway_stp_request() - gpio_chip->request + * @gc: Pointer to gpio_chip device structure. + * @gpio: GPIO signal number. + * + * We mask out the HW driven pins + */ +static int xway_stp_request(struct gpio_chip *gc, unsigned gpio) +{ + struct xway_stp *chip = + container_of(gc, struct xway_stp, gc); + + if ((gpio < 8) && (chip->reserved & BIT(gpio))) { + dev_err(gc->dev, "GPIO %d is driven by hardware\n", gpio); + return -ENODEV; + } -static int ltq_stp_hw_init(void) + return 0; +} + +/** + * xway_stp_hw_init() - Configure the STP unit and enable the clock gate + * @virt: pointer to the remapped register range + */ +static int xway_stp_hw_init(struct xway_stp *chip) { /* sane defaults */ - ltq_stp_w32(0, LTQ_STP_AR); - ltq_stp_w32(0, LTQ_STP_CPU0); - ltq_stp_w32(0, LTQ_STP_CPU1); - ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0); - ltq_stp_w32(0, LTQ_STP_CON1); + xway_stp_w32(chip->virt, 0, XWAY_STP_AR); + xway_stp_w32(chip->virt, 0, XWAY_STP_CPU0); + xway_stp_w32(chip->virt, 0, XWAY_STP_CPU1); + xway_stp_w32(chip->virt, XWAY_STP_CON_SWU, XWAY_STP_CON0); + xway_stp_w32(chip->virt, 0, XWAY_STP_CON1); - /* rising or falling edge */ - ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0); + /* apply edge trigger settings for the shift register */ + xway_stp_w32_mask(chip->virt, XWAY_STP_EDGE_MASK, + chip->edge, XWAY_STP_CON0); - /* per default stp 15-0 are set */ - ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1); + /* apply led group settings */ + xway_stp_w32_mask(chip->virt, XWAY_STP_GROUP_MASK, + chip->groups, XWAY_STP_CON1); - /* stp are update periodically by the FPI bus */ - ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); + /* tell the hardware which pins are controlled by the dsl modem */ + xway_stp_w32_mask(chip->virt, + XWAY_STP_ADSL_MASK << XWAY_STP_ADSL_SHIFT, + chip->dsl << XWAY_STP_ADSL_SHIFT, + XWAY_STP_CON0); - /* set stp update speed */ - ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1); + /* tell the hardware which pins are controlled by the phys */ + xway_stp_w32_mask(chip->virt, + XWAY_STP_PHY_MASK << XWAY_STP_PHY1_SHIFT, + chip->phy1 << XWAY_STP_PHY1_SHIFT, + XWAY_STP_CON0); + xway_stp_w32_mask(chip->virt, + XWAY_STP_PHY_MASK << XWAY_STP_PHY2_SHIFT, + chip->phy2 << XWAY_STP_PHY2_SHIFT, + XWAY_STP_CON1); - /* tell the hardware that pin (led) 0 and 1 are controlled - * by the dsl arc + /* mask out the hw driven bits in gpio_request */ + chip->reserved = (chip->phy2 << 5) | (chip->phy1 << 2) | chip->dsl; + + /* + * if we have pins that are driven by hw, we need to tell the stp what + * clock to use as a timer. */ - ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0); + if (chip->reserved) + xway_stp_w32_mask(chip->virt, XWAY_STP_UPD_MASK, + XWAY_STP_UPD_FPI, XWAY_STP_CON1); - ltq_pmu_enable(PMU_LED); return 0; } -static int __devinit ltq_stp_probe(struct platform_device *pdev) +static int __devinit xway_stp_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + const __be32 *shadow, *groups, *dsl, *phy; + struct xway_stp *chip; + struct clk *clk; int ret = 0; - if (!res) - return -ENOENT; - res = devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), dev_name(&pdev->dev)); if (!res) { - dev_err(&pdev->dev, "failed to request STP memory\n"); - return -EBUSY; + dev_err(&pdev->dev, "failed to request STP resource\n"); + return -ENOENT; } - ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start, - resource_size(res)); - if (!ltq_stp_membase) { + + chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->virt = devm_request_and_ioremap(&pdev->dev, res); + if (!chip->virt) { dev_err(&pdev->dev, "failed to remap STP memory\n"); return -ENOMEM; } - ret = gpiochip_add(<q_stp_chip); + chip->gc.dev = &pdev->dev; + chip->gc.label = "stp-xway"; + chip->gc.direction_output = xway_stp_dir_out; + chip->gc.set = xway_stp_set; + chip->gc.request = xway_stp_request; + chip->gc.base = -1; + chip->gc.owner = THIS_MODULE; + + /* store the shadow value if one was passed by the devicetree */ + shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL); + if (shadow) + chip->shadow = be32_to_cpu(*shadow); + + /* find out which gpio groups should be enabled */ + groups = of_get_property(pdev->dev.of_node, "lantiq,groups", NULL); + if (groups) + chip->groups = be32_to_cpu(*groups) & XWAY_STP_GROUP_MASK; + else + chip->groups = XWAY_STP_GROUP0; + chip->gc.ngpio = fls(chip->groups) * 8; + + /* find out which gpios are controlled by the dsl core */ + dsl = of_get_property(pdev->dev.of_node, "lantiq,dsl", NULL); + if (dsl) + chip->dsl = be32_to_cpu(*dsl) & XWAY_STP_ADSL_MASK; + + /* find out which gpios are controlled by the phys */ + if (of_machine_is_compatible("lantiq,ar9") || + of_machine_is_compatible("lantiq,gr9") || + of_machine_is_compatible("lantiq,vr9")) { + phy = of_get_property(pdev->dev.of_node, "lantiq,phy1", NULL); + if (phy) + chip->phy1 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; + phy = of_get_property(pdev->dev.of_node, "lantiq,phy2", NULL); + if (phy) + chip->phy2 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; + } + + /* check which edge trigger we should use, default to a falling edge */ + if (!of_find_property(pdev->dev.of_node, "lantiq,rising", NULL)) + chip->edge = XWAY_STP_FALLING; + + clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Failed to get clock\n"); + return PTR_ERR(clk); + } + clk_enable(clk); + + ret = xway_stp_hw_init(chip); if (!ret) - ret = ltq_stp_hw_init(); + ret = gpiochip_add(&chip->gc); + + if (!ret) + dev_info(&pdev->dev, "Init done\n"); return ret; } -static struct platform_driver ltq_stp_driver = { - .probe = ltq_stp_probe, +static const struct of_device_id xway_stp_match[] = { + { .compatible = "lantiq,gpio-stp-xway" }, + {}, +}; +MODULE_DEVICE_TABLE(of, xway_stp_match); + +static struct platform_driver xway_stp_driver = { + .probe = xway_stp_probe, .driver = { - .name = "ltq_stp", + .name = "gpio-stp-xway", .owner = THIS_MODULE, + .of_match_table = xway_stp_match, }, }; -int __init ltq_stp_init(void) +int __init xway_stp_init(void) { - int ret = platform_driver_register(<q_stp_driver); - - if (ret) - pr_info("ltq_stp: error registering platfom driver"); - return ret; + return platform_driver_register(&xway_stp_driver); } -postcore_initcall(ltq_stp_init); +subsys_initcall(xway_stp_init); -- cgit v1.2.2 From ceff2676b04943638c6f599ffe4e99efb89aa625 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 13 Apr 2012 09:37:09 +0200 Subject: SERIAL: MIPS: lantiq: implement OF support Add devicetree and handling for our new clkdev clocks. The patch is rather straightforward. .of_match_table is set and the 3 irqs are now loaded from the devicetree. This series converts the lantiq target to clkdev amongst other things. The driver needs to handle two clocks now. The fpi bus clock used to derive the divider and the clock gate needed on some socs to make the secondary port work. Signed-off-by: John Crispin Acked-by: Greg Kroah-Hartman Cc: Alan Cox Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3809/ Signed-off-by: Ralf Baechle --- drivers/tty/serial/lantiq.c | 83 ++++++++++++++++++++++++++++----------------- 1 file changed, 51 insertions(+), 32 deletions(-) (limited to 'drivers') diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c index 96c1cacc7360..02da071fe1e7 100644 --- a/drivers/tty/serial/lantiq.c +++ b/drivers/tty/serial/lantiq.c @@ -31,16 +31,19 @@ #include #include #include -#include +#include +#include +#include #include #include +#include #include #define PORT_LTQ_ASC 111 #define MAXPORTS 2 #define UART_DUMMY_UER_RX 1 -#define DRVNAME "ltq_asc" +#define DRVNAME "lantiq,asc" #ifdef __BIG_ENDIAN #define LTQ_ASC_TBUF (0x0020 + 3) #define LTQ_ASC_RBUF (0x0024 + 3) @@ -114,6 +117,9 @@ static DEFINE_SPINLOCK(ltq_asc_lock); struct ltq_uart_port { struct uart_port port; + /* clock used to derive divider */ + struct clk *fpiclk; + /* clock gating of the ASC core */ struct clk *clk; unsigned int tx_irq; unsigned int rx_irq; @@ -316,7 +322,9 @@ lqasc_startup(struct uart_port *port) struct ltq_uart_port *ltq_port = to_ltq_uart_port(port); int retval; - port->uartclk = clk_get_rate(ltq_port->clk); + if (ltq_port->clk) + clk_enable(ltq_port->clk); + port->uartclk = clk_get_rate(ltq_port->fpiclk); ltq_w32_mask(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET), port->membase + LTQ_ASC_CLC); @@ -382,6 +390,8 @@ lqasc_shutdown(struct uart_port *port) port->membase + LTQ_ASC_RXFCON); ltq_w32_mask(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU, port->membase + LTQ_ASC_TXFCON); + if (ltq_port->clk) + clk_disable(ltq_port->clk); } static void @@ -630,7 +640,7 @@ lqasc_console_setup(struct console *co, char *options) port = <q_port->port; - port->uartclk = clk_get_rate(ltq_port->clk); + port->uartclk = clk_get_rate(ltq_port->fpiclk); if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); @@ -668,37 +678,32 @@ static struct uart_driver lqasc_reg = { static int __init lqasc_probe(struct platform_device *pdev) { + struct device_node *node = pdev->dev.of_node; struct ltq_uart_port *ltq_port; struct uart_port *port; - struct resource *mmres, *irqres; - int tx_irq, rx_irq, err_irq; - struct clk *clk; + struct resource *mmres, irqres[3]; + int line = 0; int ret; mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); - irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!mmres || !irqres) + ret = of_irq_to_resource_table(node, irqres, 3); + if (!mmres || (ret != 3)) { + dev_err(&pdev->dev, + "failed to get memory/irq for serial port\n"); return -ENODEV; + } - if (pdev->id >= MAXPORTS) - return -EBUSY; + /* check if this is the console port */ + if (mmres->start != CPHYSADDR(LTQ_EARLY_ASC)) + line = 1; - if (lqasc_port[pdev->id] != NULL) + if (lqasc_port[line]) { + dev_err(&pdev->dev, "port %d already allocated\n", line); return -EBUSY; - - clk = clk_get(&pdev->dev, "fpi"); - if (IS_ERR(clk)) { - pr_err("failed to get fpi clk\n"); - return -ENOENT; } - tx_irq = platform_get_irq_byname(pdev, "tx"); - rx_irq = platform_get_irq_byname(pdev, "rx"); - err_irq = platform_get_irq_byname(pdev, "err"); - if ((tx_irq < 0) | (rx_irq < 0) | (err_irq < 0)) - return -ENODEV; - - ltq_port = kzalloc(sizeof(struct ltq_uart_port), GFP_KERNEL); + ltq_port = devm_kzalloc(&pdev->dev, sizeof(struct ltq_uart_port), + GFP_KERNEL); if (!ltq_port) return -ENOMEM; @@ -709,19 +714,26 @@ lqasc_probe(struct platform_device *pdev) port->ops = &lqasc_pops; port->fifosize = 16; port->type = PORT_LTQ_ASC, - port->line = pdev->id; + port->line = line; port->dev = &pdev->dev; - - port->irq = tx_irq; /* unused, just to be backward-compatibe */ + /* unused, just to be backward-compatible */ + port->irq = irqres[0].start; port->mapbase = mmres->start; - ltq_port->clk = clk; + ltq_port->fpiclk = clk_get_fpi(); + if (IS_ERR(ltq_port->fpiclk)) { + pr_err("failed to get fpi clk\n"); + return -ENOENT; + } - ltq_port->tx_irq = tx_irq; - ltq_port->rx_irq = rx_irq; - ltq_port->err_irq = err_irq; + /* not all asc ports have clock gates, lets ignore the return code */ + ltq_port->clk = clk_get(&pdev->dev, NULL); - lqasc_port[pdev->id] = ltq_port; + ltq_port->tx_irq = irqres[0].start; + ltq_port->rx_irq = irqres[1].start; + ltq_port->err_irq = irqres[2].start; + + lqasc_port[line] = ltq_port; platform_set_drvdata(pdev, ltq_port); ret = uart_add_one_port(&lqasc_reg, port); @@ -729,10 +741,17 @@ lqasc_probe(struct platform_device *pdev) return ret; } +static const struct of_device_id ltq_asc_match[] = { + { .compatible = DRVNAME }, + {}, +}; +MODULE_DEVICE_TABLE(of, ltq_asc_match); + static struct platform_driver lqasc_driver = { .driver = { .name = DRVNAME, .owner = THIS_MODULE, + .of_match_table = ltq_asc_match, }, }; -- cgit v1.2.2 From cdb8612147b7fba751e6fa193f32b09937a7e16b Mon Sep 17 00:00:00 2001 From: John Crispin Date: Thu, 12 Apr 2012 21:21:56 +0200 Subject: watchdog: MIPS: lantiq: implement OF support and minor fixes Add support for OF. We also apply the following small fixes * reduce boiler plate by using devm_request_and_ioremap * sane error path for the clock * move LTQ_RST_CAUSE_WDTRST to a soc specific header file * add a message to show that the driver loaded Signed-off-by: John Crispin Acked-by: Wim Van Sebroeck Cc: linux-watchdog@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3810/ Signed-off-by: Ralf Baechle --- drivers/watchdog/lantiq_wdt.c | 56 +++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 31 deletions(-) (limited to 'drivers') diff --git a/drivers/watchdog/lantiq_wdt.c b/drivers/watchdog/lantiq_wdt.c index a9593a3a32a0..2e74c3a8ee58 100644 --- a/drivers/watchdog/lantiq_wdt.c +++ b/drivers/watchdog/lantiq_wdt.c @@ -13,14 +13,15 @@ #include #include #include -#include +#include #include #include #include -#include +#include -/* Section 3.4 of the datasheet +/* + * Section 3.4 of the datasheet * The password sequence protects the WDT control register from unintended * write actions, which might cause malfunction of the WDT. * @@ -70,7 +71,8 @@ ltq_wdt_disable(void) { /* write the first password magic */ ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR); - /* write the second password magic with no config + /* + * write the second password magic with no config * this turns the watchdog off */ ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR); @@ -184,7 +186,7 @@ static struct miscdevice ltq_wdt_miscdev = { .fops = <q_wdt_fops, }; -static int __init +static int __devinit ltq_wdt_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -194,28 +196,27 @@ ltq_wdt_probe(struct platform_device *pdev) dev_err(&pdev->dev, "cannot obtain I/O memory region"); return -ENOENT; } - res = devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), dev_name(&pdev->dev)); - if (!res) { - dev_err(&pdev->dev, "cannot request I/O memory region"); - return -EBUSY; - } - ltq_wdt_membase = devm_ioremap_nocache(&pdev->dev, res->start, - resource_size(res)); + + ltq_wdt_membase = devm_request_and_ioremap(&pdev->dev, res); if (!ltq_wdt_membase) { dev_err(&pdev->dev, "cannot remap I/O memory region\n"); return -ENOMEM; } /* we do not need to enable the clock as it is always running */ - clk = clk_get(&pdev->dev, "io"); - WARN_ON(!clk); + clk = clk_get_io(); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Failed to get clock\n"); + return -ENOENT; + } ltq_io_region_clk_rate = clk_get_rate(clk); clk_put(clk); + /* find out if the watchdog caused the last reboot */ if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST) ltq_wdt_bootstatus = WDIOF_CARDRESET; + dev_info(&pdev->dev, "Init done\n"); return misc_register(<q_wdt_miscdev); } @@ -227,33 +228,26 @@ ltq_wdt_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id ltq_wdt_match[] = { + { .compatible = "lantiq,wdt" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ltq_wdt_match); static struct platform_driver ltq_wdt_driver = { + .probe = ltq_wdt_probe, .remove = __devexit_p(ltq_wdt_remove), .driver = { - .name = "ltq_wdt", + .name = "wdt", .owner = THIS_MODULE, + .of_match_table = ltq_wdt_match, }, }; -static int __init -init_ltq_wdt(void) -{ - return platform_driver_probe(<q_wdt_driver, ltq_wdt_probe); -} - -static void __exit -exit_ltq_wdt(void) -{ - return platform_driver_unregister(<q_wdt_driver); -} - -module_init(init_ltq_wdt); -module_exit(exit_ltq_wdt); +module_platform_driver(ltq_wdt_driver); module_param(nowayout, bool, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"); - MODULE_AUTHOR("John Crispin "); MODULE_DESCRIPTION("Lantiq SoC Watchdog"); MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 02fa961fbf1c79783781cb8967b80ceaa8be4832 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 13 Apr 2012 09:36:46 +0200 Subject: MTD: MIPS: lantiq: implement OF support Adds bindings for OF and make use of module_platform_driver for lantiq based socs. Signed-off-by: John Crispin Acked-by: Artem Bityutskiy Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3811/ Signed-off-by: Ralf Baechle --- drivers/mtd/maps/lantiq-flash.c | 69 +++++++++++++++-------------------------- 1 file changed, 25 insertions(+), 44 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/maps/lantiq-flash.c b/drivers/mtd/maps/lantiq-flash.c index b5401e355745..aefa11121674 100644 --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c @@ -21,7 +21,6 @@ #include #include -#include /* * The NOR flash is connected to the same external bus unit (EBU) as PCI. @@ -44,8 +43,9 @@ struct ltq_mtd { struct map_info *map; }; -static char ltq_map_name[] = "ltq_nor"; -static const char *ltq_probe_types[] __devinitconst = { "cmdlinepart", NULL }; +static const char ltq_map_name[] = "ltq_nor"; +static const char *ltq_probe_types[] __devinitconst = { + "cmdlinepart", "ofpart", NULL }; static map_word ltq_read16(struct map_info *map, unsigned long adr) @@ -108,12 +108,11 @@ ltq_copy_to(struct map_info *map, unsigned long to, spin_unlock_irqrestore(&ebu_lock, flags); } -static int __init +static int __devinit ltq_mtd_probe(struct platform_device *pdev) { - struct physmap_flash_data *ltq_mtd_data = dev_get_platdata(&pdev->dev); + struct mtd_part_parser_data ppdata; struct ltq_mtd *ltq_mtd; - struct resource *res; struct cfi_private *cfi; int err; @@ -122,28 +121,19 @@ ltq_mtd_probe(struct platform_device *pdev) ltq_mtd->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!ltq_mtd->res) { - dev_err(&pdev->dev, "failed to get memory resource"); + dev_err(&pdev->dev, "failed to get memory resource\n"); err = -ENOENT; goto err_out; } - res = devm_request_mem_region(&pdev->dev, ltq_mtd->res->start, - resource_size(ltq_mtd->res), dev_name(&pdev->dev)); - if (!ltq_mtd->res) { - dev_err(&pdev->dev, "failed to request mem resource"); - err = -EBUSY; - goto err_out; - } - ltq_mtd->map = kzalloc(sizeof(struct map_info), GFP_KERNEL); - ltq_mtd->map->phys = res->start; - ltq_mtd->map->size = resource_size(res); - ltq_mtd->map->virt = devm_ioremap_nocache(&pdev->dev, - ltq_mtd->map->phys, ltq_mtd->map->size); + ltq_mtd->map->phys = ltq_mtd->res->start; + ltq_mtd->map->size = resource_size(ltq_mtd->res); + ltq_mtd->map->virt = devm_request_and_ioremap(&pdev->dev, ltq_mtd->res); if (!ltq_mtd->map->virt) { - dev_err(&pdev->dev, "failed to ioremap!\n"); - err = -ENOMEM; - goto err_free; + dev_err(&pdev->dev, "failed to remap mem resource\n"); + err = -EBUSY; + goto err_out; } ltq_mtd->map->name = ltq_map_name; @@ -169,9 +159,9 @@ ltq_mtd_probe(struct platform_device *pdev) cfi->addr_unlock1 ^= 1; cfi->addr_unlock2 ^= 1; - err = mtd_device_parse_register(ltq_mtd->mtd, ltq_probe_types, NULL, - ltq_mtd_data->parts, - ltq_mtd_data->nr_parts); + ppdata.of_node = pdev->dev.of_node; + err = mtd_device_parse_register(ltq_mtd->mtd, ltq_probe_types, + &ppdata, NULL, 0); if (err) { dev_err(&pdev->dev, "failed to add partitions\n"); goto err_destroy; @@ -204,32 +194,23 @@ ltq_mtd_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id ltq_mtd_match[] = { + { .compatible = "lantiq,nor" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ltq_mtd_match); + static struct platform_driver ltq_mtd_driver = { + .probe = ltq_mtd_probe, .remove = __devexit_p(ltq_mtd_remove), .driver = { - .name = "ltq_nor", + .name = "ltq-nor", .owner = THIS_MODULE, + .of_match_table = ltq_mtd_match, }, }; -static int __init -init_ltq_mtd(void) -{ - int ret = platform_driver_probe(<q_mtd_driver, ltq_mtd_probe); - - if (ret) - pr_err("ltq_nor: error registering platform driver"); - return ret; -} - -static void __exit -exit_ltq_mtd(void) -{ - platform_driver_unregister(<q_mtd_driver); -} - -module_init(init_ltq_mtd); -module_exit(exit_ltq_mtd); +module_platform_driver(ltq_mtd_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("John Crispin "); -- cgit v1.2.2 From fa09eded0e3764ddb8a97440f5b5c5e65e413b6a Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sat, 5 May 2012 15:41:42 +0200 Subject: MTD: MIPS: lantiq: verify that the NOR interface is available on falcon soc When running on a FALC-ON SoC, we need to check the bootstrap options to see if NOR is available. Signed-off-by: John Crispin Acked-by: Artem Bityutskiy Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3815/ Signed-off-by: Ralf Baechle --- drivers/mtd/maps/lantiq-flash.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/maps/lantiq-flash.c b/drivers/mtd/maps/lantiq-flash.c index aefa11121674..c03456f17004 100644 --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -116,6 +117,12 @@ ltq_mtd_probe(struct platform_device *pdev) struct cfi_private *cfi; int err; + if (of_machine_is_compatible("lantiq,falcon") && + (ltq_boot_select() != BS_FLASH)) { + dev_err(&pdev->dev, "invalid bootstrap options\n"); + return -ENODEV; + } + ltq_mtd = kzalloc(sizeof(struct ltq_mtd), GFP_KERNEL); platform_set_drvdata(pdev, ltq_mtd); -- cgit v1.2.2 From d2fb4c51c7471a23f0a95526b624c14cec62603d Mon Sep 17 00:00:00 2001 From: Daniel De Graaf Date: Tue, 8 May 2012 09:46:57 -0400 Subject: xenbus: Add support for xenbus backend in stub domain Add an ioctl to the /dev/xen/xenbus_backend device allowing the xenbus backend to be started after the kernel has booted. This allows xenstore to run in a different domain from the dom0. Signed-off-by: Daniel De Graaf Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/xenbus/xenbus_comms.c | 6 ++++ drivers/xen/xenbus/xenbus_comms.h | 1 + drivers/xen/xenbus/xenbus_dev_backend.c | 51 +++++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+) (limited to 'drivers') diff --git a/drivers/xen/xenbus/xenbus_comms.c b/drivers/xen/xenbus/xenbus_comms.c index 2eff7a6aaa20..52fe7ad07666 100644 --- a/drivers/xen/xenbus/xenbus_comms.c +++ b/drivers/xen/xenbus/xenbus_comms.c @@ -234,3 +234,9 @@ int xb_init_comms(void) return 0; } + +void xb_deinit_comms(void) +{ + unbind_from_irqhandler(xenbus_irq, &xb_waitq); + xenbus_irq = 0; +} diff --git a/drivers/xen/xenbus/xenbus_comms.h b/drivers/xen/xenbus/xenbus_comms.h index 6e42800fa499..c8abd3b8a6c4 100644 --- a/drivers/xen/xenbus/xenbus_comms.h +++ b/drivers/xen/xenbus/xenbus_comms.h @@ -35,6 +35,7 @@ int xs_init(void); int xb_init_comms(void); +void xb_deinit_comms(void); /* Low level routines. */ int xb_write(const void *data, unsigned len); diff --git a/drivers/xen/xenbus/xenbus_dev_backend.c b/drivers/xen/xenbus/xenbus_dev_backend.c index 3d3be78c1093..be738c43104b 100644 --- a/drivers/xen/xenbus/xenbus_dev_backend.c +++ b/drivers/xen/xenbus/xenbus_dev_backend.c @@ -8,7 +8,11 @@ #include #include +#include #include +#include +#include +#include #include "xenbus_comms.h" @@ -22,6 +26,50 @@ static int xenbus_backend_open(struct inode *inode, struct file *filp) return nonseekable_open(inode, filp); } +static long xenbus_alloc(domid_t domid) +{ + struct evtchn_alloc_unbound arg; + int err = -EEXIST; + + xs_suspend(); + + /* If xenstored_ready is nonzero, that means we have already talked to + * xenstore and set up watches. These watches will be restored by + * xs_resume, but that requires communication over the port established + * below that is not visible to anyone until the ioctl returns. + * + * This can be resolved by splitting the ioctl into two parts + * (postponing the resume until xenstored is active) but this is + * unnecessarily complex for the intended use where xenstored is only + * started once - so return -EEXIST if it's already running. + */ + if (xenstored_ready) + goto out_err; + + gnttab_grant_foreign_access_ref(GNTTAB_RESERVED_XENSTORE, domid, + virt_to_mfn(xen_store_interface), 0 /* writable */); + + arg.dom = DOMID_SELF; + arg.remote_dom = domid; + + err = HYPERVISOR_event_channel_op(EVTCHNOP_alloc_unbound, &arg); + if (err) + goto out_err; + + if (xen_store_evtchn > 0) + xb_deinit_comms(); + + xen_store_evtchn = arg.port; + + xs_resume(); + + return arg.port; + + out_err: + xs_suspend_cancel(); + return err; +} + static long xenbus_backend_ioctl(struct file *file, unsigned int cmd, unsigned long data) { if (!capable(CAP_SYS_ADMIN)) @@ -33,6 +81,9 @@ static long xenbus_backend_ioctl(struct file *file, unsigned int cmd, unsigned l return xen_store_evtchn; return -ENODEV; + case IOCTL_XENBUS_BACKEND_SETUP: + return xenbus_alloc(data); + default: return -ENOTTY; } -- cgit v1.2.2 From d79d5959a023fd637e90ed1ff6547ff09d19396b Mon Sep 17 00:00:00 2001 From: Jana Saout Date: Tue, 15 May 2012 12:34:46 +0200 Subject: xen: Add selfballoning memory reservation tunable. Currently, the memory target in the Xen selfballooning driver is mainly driven by the value of "Committed_AS". However, there are cases in which it is desirable to assign additional memory to be available for the kernel, e.g. for local caches (which are not covered by cleancache), e.g. dcache and inode caches. This adds an additional tunable in the selfballooning driver (accessible via sysfs) which allows the user to specify an additional constant amount of memory to be reserved by the selfballoning driver for the local domain. Signed-off-by: Jana Saout Acked-by: Dan Magenheimer Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/xen-selfballoon.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/xen/xen-selfballoon.c b/drivers/xen/xen-selfballoon.c index 146c94897016..7d041cb6da26 100644 --- a/drivers/xen/xen-selfballoon.c +++ b/drivers/xen/xen-selfballoon.c @@ -105,6 +105,12 @@ static unsigned int selfballoon_interval __read_mostly = 5; */ static unsigned int selfballoon_min_usable_mb; +/* + * Amount of RAM in MB to add to the target number of pages. + * Can be used to reserve some more room for caches and the like. + */ +static unsigned int selfballoon_reserved_mb; + static void selfballoon_process(struct work_struct *work); static DECLARE_DELAYED_WORK(selfballoon_worker, selfballoon_process); @@ -217,7 +223,8 @@ static void selfballoon_process(struct work_struct *work) cur_pages = totalram_pages; tgt_pages = cur_pages; /* default is no change */ goal_pages = percpu_counter_read_positive(&vm_committed_as) + - totalreserve_pages; + totalreserve_pages + + MB2PAGES(selfballoon_reserved_mb); #ifdef CONFIG_FRONTSWAP /* allow space for frontswap pages to be repatriated */ if (frontswap_selfshrinking && frontswap_enabled) @@ -397,6 +404,30 @@ static DEVICE_ATTR(selfballoon_min_usable_mb, S_IRUGO | S_IWUSR, show_selfballoon_min_usable_mb, store_selfballoon_min_usable_mb); +SELFBALLOON_SHOW(selfballoon_reserved_mb, "%d\n", + selfballoon_reserved_mb); + +static ssize_t store_selfballoon_reserved_mb(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t count) +{ + unsigned long val; + int err; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + err = strict_strtoul(buf, 10, &val); + if (err || val == 0) + return -EINVAL; + selfballoon_reserved_mb = val; + return count; +} + +static DEVICE_ATTR(selfballoon_reserved_mb, S_IRUGO | S_IWUSR, + show_selfballoon_reserved_mb, + store_selfballoon_reserved_mb); + #ifdef CONFIG_FRONTSWAP SELFBALLOON_SHOW(frontswap_selfshrinking, "%d\n", frontswap_selfshrinking); @@ -480,6 +511,7 @@ static struct attribute *selfballoon_attrs[] = { &dev_attr_selfballoon_downhysteresis.attr, &dev_attr_selfballoon_uphysteresis.attr, &dev_attr_selfballoon_min_usable_mb.attr, + &dev_attr_selfballoon_reserved_mb.attr, #ifdef CONFIG_FRONTSWAP &dev_attr_frontswap_selfshrinking.attr, &dev_attr_frontswap_hysteresis.attr, -- cgit v1.2.2 From 201a52bea928687b7557728b176ac4f8a37d5cbd Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 15 May 2012 11:47:47 +0300 Subject: hvc_xen: NULL dereference on allocation failure If kzalloc() returns a NULL here, we pass a NULL to xencons_disconnect_backend() which will cause an Oops. Also I removed the __GFP_ZERO while I was at it since kzalloc() implies __GFP_ZERO. CC: stable@kernel.org Acked-by: Stefano Stabellini Signed-off-by: Dan Carpenter Signed-off-by: Konrad Rzeszutek Wilk --- drivers/tty/hvc/hvc_xen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/tty/hvc/hvc_xen.c b/drivers/tty/hvc/hvc_xen.c index 83d5c88e7165..d3d91dae065c 100644 --- a/drivers/tty/hvc/hvc_xen.c +++ b/drivers/tty/hvc/hvc_xen.c @@ -430,9 +430,9 @@ static int __devinit xencons_probe(struct xenbus_device *dev, if (devid == 0) return -ENODEV; - info = kzalloc(sizeof(struct xencons_info), GFP_KERNEL | __GFP_ZERO); + info = kzalloc(sizeof(struct xencons_info), GFP_KERNEL); if (!info) - goto error_nomem; + return -ENOMEM; dev_set_drvdata(&dev->dev, info); info->xbdev = dev; info->vtermno = xenbus_devid_to_vtermno(devid); -- cgit v1.2.2 From 68c2c39a76b094e9b2773e5846424ea674bf2c46 Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Mon, 21 May 2012 16:54:10 +0100 Subject: xen: do not map the same GSI twice in PVHVM guests. PV on HVM guests map GSIs into event channels. At restore time the event channels are resumed by restore_pirqs. Device drivers might try to register the same GSI again through ACPI at restore time, but the GSI has already been mapped and bound by restore_pirqs. This patch detects these situations and avoids mapping the same GSI multiple times. Without this patch we get: (XEN) irq.c:2235: dom4: pirq 23 or emuirq 28 already mapped and waste a pirq. CC: stable@kernel.org Signed-off-by: Stefano Stabellini Signed-off-by: Konrad Rzeszutek Wilk --- drivers/xen/events.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 4b33acd8ed4e..faae2f910ad2 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -611,7 +611,7 @@ static void disable_pirq(struct irq_data *data) disable_dynirq(data); } -static int find_irq_by_gsi(unsigned gsi) +int xen_irq_from_gsi(unsigned gsi) { struct irq_info *info; @@ -625,6 +625,7 @@ static int find_irq_by_gsi(unsigned gsi) return -1; } +EXPORT_SYMBOL_GPL(xen_irq_from_gsi); /* * Do not make any assumptions regarding the relationship between the @@ -644,7 +645,7 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, mutex_lock(&irq_mapping_update_lock); - irq = find_irq_by_gsi(gsi); + irq = xen_irq_from_gsi(gsi); if (irq != -1) { printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n", irq, gsi); -- cgit v1.2.2 From 77820ffae678fa7ff6cc155354825b6b1a023afb Mon Sep 17 00:00:00 2001 From: Seth Heasley Date: Tue, 22 May 2012 22:54:20 +0200 Subject: gpio: Add Intel Centerton support to gpio-sch This patch adds the Intel Centerton processor device ID for GPIO. The device ID is defined in include/linux/pci_ids.h Signed-off-by: Seth Heasley Acked-by: Linus Walleij Signed-off-by: Samuel Ortiz --- drivers/gpio/Kconfig | 9 ++++++--- drivers/gpio/gpio-sch.c | 8 ++++++++ 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 09ac540daade..6da36a58332d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -170,13 +170,13 @@ config GPIO_VR41XX Say yes here to support the NEC VR4100 series General-purpose I/O Uint config GPIO_SCH - tristate "Intel SCH/TunnelCreek GPIO" + tristate "Intel SCH/TunnelCreek/Centerton GPIO" depends on PCI && X86 select MFD_CORE select LPC_SCH help - Say yes here to support GPIO interface on Intel Poulsbo SCH - or Intel Tunnel Creek processor. + Say yes here to support GPIO interface on Intel Poulsbo SCH, + Intel Tunnel Creek processor or Intel Centerton processor. The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are powered by the core power rail and are turned off during sleep modes (S3 and higher). The remaining four GPIOs are powered by @@ -185,6 +185,9 @@ config GPIO_SCH system from the Suspend-to-RAM state. The Intel Tunnel Creek processor has 5 GPIOs powered by the core power rail and 9 from suspend power supply. + The Intel Centerton processor has a total of 30 GPIO pins. + Twenty-one are powered by the core power rail and 9 from the + suspend power supply. config GPIO_ICH tristate "Intel ICH GPIO" diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index 8cadf4d683a8..424dce8e3f30 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -232,6 +232,14 @@ static int __devinit sch_gpio_probe(struct platform_device *pdev) sch_gpio_resume.ngpio = 9; break; + case PCI_DEVICE_ID_INTEL_CENTERTON_ILB: + sch_gpio_core.base = 0; + sch_gpio_core.ngpio = 21; + + sch_gpio_resume.base = 21; + sch_gpio_resume.ngpio = 9; + break; + default: return -ENODEV; } -- cgit v1.2.2 From cb8d8654570c257d2ec5f7fa089e18b338314317 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Sat, 19 May 2012 02:01:41 +0530 Subject: mfd: Save device node parsed platform data for tps65910 sub devices Save the allocated memory to store the parsed device node information to the global device structure so that sub devices can directly use this pointer. In this way, the sub devices does not require to re-allocate the memory for storing the sub-devices specific device node information. Signed-off-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 18b30cf45e5b..05d449b33693 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -209,14 +209,17 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, { struct tps65910 *tps65910; struct tps65910_board *pmic_plat_data; + struct tps65910_board *of_pmic_plat_data = NULL; struct tps65910_platform_data *init_data; int ret = 0; int chip_id = id->driver_data; pmic_plat_data = dev_get_platdata(&i2c->dev); - if (!pmic_plat_data && i2c->dev.of_node) + if (!pmic_plat_data && i2c->dev.of_node) { pmic_plat_data = tps65910_parse_dt(i2c, &chip_id); + of_pmic_plat_data = pmic_plat_data; + } if (!pmic_plat_data) return -EINVAL; @@ -229,6 +232,7 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, if (tps65910 == NULL) return -ENOMEM; + tps65910->of_plat_data = of_pmic_plat_data; i2c_set_clientdata(i2c, tps65910); tps65910->dev = &i2c->dev; tps65910->i2c_client = i2c; -- cgit v1.2.2 From dcc7dabd8eb13e968ee3ec52a1bb9829a3bc904e Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Sat, 19 May 2012 02:01:42 +0530 Subject: mfd: Remove the parsing of dt info for tps65910 gpio Remove the parsing of device node information for sub devices from core file. The sub devices will parse the information as per the sub-devices specific information. Signed-off-by: Laxman Dewangan Signed-off-by: Samuel Ortiz --- drivers/mfd/tps65910.c | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 05d449b33693..be9e07b77325 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -146,9 +146,7 @@ static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, struct tps65910_board *board_info; unsigned int prop; const struct of_device_id *match; - unsigned int prop_array[TPS6591X_MAX_NUM_GPIO]; int ret = 0; - int idx; match = of_match_device(tps65910_of_match, &client->dev); if (!match) { @@ -177,21 +175,8 @@ static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, else if (*chip_id == TPS65911) dev_warn(&client->dev, "VMBCH2-Threshold not specified"); - ret = of_property_read_u32_array(np, "ti,en-gpio-sleep", - prop_array, TPS6591X_MAX_NUM_GPIO); - if (!ret) - for (idx = 0; idx < ARRAY_SIZE(prop_array); idx++) - board_info->en_gpio_sleep[idx] = (prop_array[idx] != 0); - else if (ret != -EINVAL) { - dev_err(&client->dev, - "error reading property ti,en-gpio-sleep: %d\n.", ret); - return NULL; - } - - board_info->irq = client->irq; board_info->irq_base = -1; - board_info->gpio_base = -1; return board_info; } -- cgit v1.2.2 From 6fe02e9f46fda7c33e48e4f9812663516cd25a4b Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Sat, 19 May 2012 02:01:43 +0530 Subject: gpio: tps65910: dt: process gpio specific device node info Parse the gpio specific device node information locally. Signed-off-by: Laxman Dewangan Acked-by: Grant Likely Signed-off-by: Samuel Ortiz --- drivers/gpio/gpio-tps65910.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'drivers') diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index af6dc837ffca..c1ad2884f2ed 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c @@ -20,6 +20,7 @@ #include #include #include +#include struct tps65910_gpio { struct gpio_chip gpio_chip; @@ -81,6 +82,37 @@ static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) GPIO_CFG_MASK); } +#ifdef CONFIG_OF +static struct tps65910_board *tps65910_parse_dt_for_gpio(struct device *dev, + struct tps65910 *tps65910, int chip_ngpio) +{ + struct tps65910_board *tps65910_board = tps65910->of_plat_data; + unsigned int prop_array[TPS6591X_MAX_NUM_GPIO]; + int ngpio = min(chip_ngpio, TPS6591X_MAX_NUM_GPIO); + int ret; + int idx; + + tps65910_board->gpio_base = -1; + ret = of_property_read_u32_array(tps65910->dev->of_node, + "ti,en-gpio-sleep", prop_array, ngpio); + if (ret < 0) { + dev_dbg(dev, "ti,en-gpio-sleep not specified\n"); + return tps65910_board; + } + + for (idx = 0; idx < ngpio; idx++) + tps65910_board->en_gpio_sleep[idx] = (prop_array[idx] != 0); + + return tps65910_board; +} +#else +static struct tps65910_board *tps65910_parse_dt_for_gpio(struct device *dev, + struct tps65910 *tps65910, int chip_ngpio) +{ + return NULL; +} +#endif + static int __devinit tps65910_gpio_probe(struct platform_device *pdev) { struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); @@ -122,6 +154,10 @@ static int __devinit tps65910_gpio_probe(struct platform_device *pdev) else tps65910_gpio->gpio_chip.base = -1; + if (!pdata && tps65910->dev->of_node) + pdata = tps65910_parse_dt_for_gpio(&pdev->dev, tps65910, + tps65910_gpio->gpio_chip.ngpio); + if (!pdata) goto skip_init; -- cgit v1.2.2 From 21f082a66177852365df0c955ecaef50fba9a691 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 23 May 2012 10:22:10 +0100 Subject: mfd: ab8500-core should depend on MFD_DB8500_PRCMU A recent move to eliminate excess historical baggage from ab8500 core code resulting in errors when building with x86_64 allmodconfig: In file included from drivers/mfd/ab8500-core.c:21:0: include/linux/mfd/dbx500-prcmu.h:614:19: error: redefinition of 'prcmu_abb_read' include/linux/mfd/db8500-prcmu.h:673:19: note: previous definition of 'prcmu_abb_read' was here include/linux/mfd/dbx500-prcmu.h:619:19: error: redefinition of 'prcmu_abb_write' include/linux/mfd/db8500-prcmu.h:678:19: note: previous definition of 'prcmu_abb_write' was here include/linux/mfd/dbx500-prcmu.h:630:19: error: redefinition of 'prcmu_config_clkout' include/linux/mfd/db8500-prcmu.h:643:19: note: previous definition of 'prcmu_config_clkout' was here include/linux/mfd/dbx500-prcmu.h:692:20: error: redefinition of 'prcmu_ac_wake_req' include/linux/mfd/db8500-prcmu.h:683:20: note: previous definition of 'prcmu_ac_wake_req' was here include/linux/mfd/dbx500-prcmu.h:694:20: error: redefinition of 'prcmu_ac_sleep_req' include/linux/mfd/db8500-prcmu.h:685:20: note: previous definition of 'prcmu_ac_sleep_req' was here Problem: When CONFIG_AB8500_CORE is set, building ab8500-core.c and !(CONFIG_UX500_SOC_DB8500 | CONFIG_MFD_DB8500_PRCMU), both db8500-prcmu.h and dbx500-prcmu.h take it upon themselves to _both_ create 'return 0' inline functions for the following: prcmu_abb_read() prcmu_abb_write() prcmu_config_clkout() prcmu_ac_wake_req() prcmu_ac_sleep_req() Solution: Depend on MFD_DB8500_PRCMU, which in turn depends on UX500_SOC_DB8500. Reported-By: Stephen Rothwell Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 094bf4eb4d86..0c3f5de775b6 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -709,7 +709,7 @@ config AB5500_DEBUG config AB8500_CORE bool "ST-Ericsson AB8500 Mixed Signal Power Management chip" - depends on GENERIC_HARDIRQS && ABX500_CORE + depends on GENERIC_HARDIRQS && ABX500_CORE && MFD_DB8500_PRCMU select MFD_CORE help Select this option to enable access to AB8500 power management -- cgit v1.2.2 From ca2cad6ae38ea0ff27a7a7a00bfaa571fbe9051f Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Wed, 23 May 2012 16:23:21 +0200 Subject: mfd: Fix twl6040 build failure MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Without it we get: CC drivers/mfd/twl6040-core.o drivers/mfd/twl6040-core.c: In function ‘twl6040_has_vibra’: drivers/mfd/twl6040-core.c:55:2: error: implicit declaration of function ‘of_find_node_by_name’ [-Werror=implicit-function-declaration] Signed-off-by: Samuel Ortiz --- drivers/mfd/twl6040-core.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 450a28fe8fc2..4ded9e7aa246 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -45,6 +45,20 @@ #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) #define TWL6040_NUM_SUPPLIES (2) +static bool twl6040_has_vibra(struct twl6040_platform_data *pdata, + struct device_node *node) +{ + if (pdata && pdata->vibra) + return true; + +#ifdef CONFIG_OF + if (of_find_node_by_name(node, "vibra")) + return true; +#endif + + return false; +} + int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) { int ret; @@ -617,7 +631,7 @@ static int __devinit twl6040_probe(struct i2c_client *client, } children++; - if ((pdata && pdata->vibra) || of_find_node_by_name(node, "vibra")) { + if (twl6040_has_vibra(pdata, node)) { irq = twl6040->irq_base + TWL6040_IRQ_VIB; cell = &twl6040->cells[children]; -- cgit v1.2.2 From 29f772d41c01ad6b72c3de705e79779857badcde Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Thu, 24 May 2012 15:08:58 +0900 Subject: mfd: Fix build break of max77693 by adding REGMAP_I2C option This patch add REGMAP_I2C config option to fix build break of max77693 mfd driver because max77693 use regmap interface for i2c communication. drivers/mfd/max77693.c:103: error: variable 'max77693_regmap_config' has initializer but incomplete type drivers/mfd/max77693.c:104: error: unknown field 'reg_bits' specified in initializer drivers/mfd/max77693.c:104: warning: excess elements in struct initializer drivers/mfd/max77693.c:104: warning: (near initialization for 'max77693_regmap_config') drivers/mfd/max77693.c:105: error: unknown field 'val_bits' specified in initializer drivers/mfd/max77693.c:105: warning: excess elements in struct initializer drivers/mfd/max77693.c:105: warning: (near initialization for 'max77693_regmap_config') drivers/mfd/max77693.c:106: error: unknown field 'max_register' specified in initializer drivers/mfd/max77693.c:106: warning: excess elements in struct initializer drivers/mfd/max77693.c:106: warning: (near initialization for 'max77693_regmap_config') drivers/mfd/max77693.c: In function 'max77693_i2c_probe': drivers/mfd/max77693.c:122: error: implicit declaration of function 'devm_regmap_init_i2c' drivers/mfd/max77693.c:122: warning: assignment makes pointer from integer without a cast Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham Signed-off-by: Kyungmin Park Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 0c3f5de775b6..5b58be48bfef 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -425,6 +425,7 @@ config MFD_MAX77693 bool "Maxim Semiconductor MAX77693 PMIC Support" depends on I2C=y && GENERIC_HARDIRQS select MFD_CORE + select REGMAP_I2C help Say yes here to support for Maxim Semiconductor MAX77693. This is a companion Power Management IC with Flash, Haptic, Charger, -- cgit v1.2.2 From 4c78513e457f72d5554a0f6e2eabfad7b98e4f19 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Tue, 24 Apr 2012 14:38:52 +0530 Subject: dma-buf: mmap support Compared to Rob Clark's RFC I've ditched the prepare/finish hooks and corresponding ioctls on the dma_buf file. The major reason for that is that many people seem to be under the impression that this is also for synchronization with outstanding asynchronous processsing. I'm pretty massively opposed to this because: - It boils down reinventing a new rather general-purpose userspace synchronization interface. If we look at things like futexes, this is hard to get right. - Furthermore a lot of kernel code has to interact with this synchronization primitive. This smells a look like the dri1 hw_lock, a horror show I prefer not to reinvent. - Even more fun is that multiple different subsystems would interact here, so we have plenty of opportunities to create funny deadlock scenarios. I think synchronization is a wholesale different problem from data sharing and should be tackled as an orthogonal problem. Now we could demand that prepare/finish may only ensure cache coherency (as Rob intended), but that runs up into the next problem: We not only need mmap support to facilitate sw-only processing nodes in a pipeline (without jumping through hoops by importing the dma_buf into some sw-access only importer), which allows for a nicer ION->dma-buf upgrade path for existing Android userspace. We also need mmap support for existing importing subsystems to support existing userspace libraries. And a loot of these subsystems are expected to export coherent userspace mappings. So prepare/finish can only ever be optional and the exporter /needs/ to support coherent mappings. Given that mmap access is always somewhat fallback-y in nature I've decided to drop this optimization, instead of just making it optional. If we demonstrate a clear need for this, supported by benchmark results, we can always add it in again later as an optional extension. Other differences compared to Rob's RFC is the above mentioned support for mapping a dma-buf through facilities provided by the importer. Which results in mmap support no longer being optional. Note that this dma-buf mmap patch does _not_ support every possible insanity an existing subsystem could pull of with mmap: Because it does not allow to intercept pagefaults and shoot down ptes importing subsystems can't add some magic of their own at these points (e.g. to automatically synchronize with outstanding rendering or set up some special resources). I've done a cursory read through a few mmap implementions of various subsytems and I'm hopeful that we can avoid this (and the complexity it'd bring with it). Additonally I've extended the documentation a bit to explain the hows and whys of this mmap extension. In case we ever want to add support for explicitly cache maneged userspace mmap with a prepare/finish ioctl pair, we could specify that userspace needs to mmap a different part of the dma_buf, e.g. the range starting at dma_buf->size up to dma_buf->size*2. This works because the size of a dma_buf is invariant over it's lifetime. The exporter would obviously need to fall back to coherent mappings for both ranges if a legacy clients maps the coherent range and the architecture cannot suppor conflicting caching policies. Also, this would obviously be optional and userspace needs to be able to fall back to coherent mappings. v2: - Spelling fixes from Rob Clark. - Compile fix for !DMA_BUF from Rob Clark. - Extend commit message to explain how explicitly cache managed mmap support could be added later. - Extend the documentation with implementations notes for exporters that need to manually fake coherency. v3: - dma_buf pointer initialization goof-up noticed by Rebecca Schultz Zavin. Cc: Rob Clark Cc: Rebecca Schultz Zavin Acked-by: Rob Clark Signed-Off-by: Daniel Vetter Signed-off-by: Sumit Semwal --- drivers/base/dma-buf.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 07cbbc6fddb4..7cfb405b1ad5 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -44,8 +44,26 @@ static int dma_buf_release(struct inode *inode, struct file *file) return 0; } +static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma) +{ + struct dma_buf *dmabuf; + + if (!is_dma_buf_file(file)) + return -EINVAL; + + dmabuf = file->private_data; + + /* check for overflowing the buffer's size */ + if (vma->vm_pgoff + ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT) > + dmabuf->size >> PAGE_SHIFT) + return -EINVAL; + + return dmabuf->ops->mmap(dmabuf, vma); +} + static const struct file_operations dma_buf_fops = { .release = dma_buf_release, + .mmap = dma_buf_mmap_internal, }; /* @@ -82,7 +100,8 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, || !ops->unmap_dma_buf || !ops->release || !ops->kmap_atomic - || !ops->kmap)) { + || !ops->kmap + || !ops->mmap)) { return ERR_PTR(-EINVAL); } @@ -406,3 +425,46 @@ void dma_buf_kunmap(struct dma_buf *dmabuf, unsigned long page_num, dmabuf->ops->kunmap(dmabuf, page_num, vaddr); } EXPORT_SYMBOL_GPL(dma_buf_kunmap); + + +/** + * dma_buf_mmap - Setup up a userspace mmap with the given vma + * @dma_buf: [in] buffer that should back the vma + * @vma: [in] vma for the mmap + * @pgoff: [in] offset in pages where this mmap should start within the + * dma-buf buffer. + * + * This function adjusts the passed in vma so that it points at the file of the + * dma_buf operation. It alsog adjusts the starting pgoff and does bounds + * checking on the size of the vma. Then it calls the exporters mmap function to + * set up the mapping. + * + * Can return negative error values, returns 0 on success. + */ +int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, + unsigned long pgoff) +{ + if (WARN_ON(!dmabuf || !vma)) + return -EINVAL; + + /* check for offset overflow */ + if (pgoff + ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT) < pgoff) + return -EOVERFLOW; + + /* check for overflowing the buffer's size */ + if (pgoff + ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT) > + dmabuf->size >> PAGE_SHIFT) + return -EINVAL; + + /* readjust the vma */ + if (vma->vm_file) + fput(vma->vm_file); + + vma->vm_file = dmabuf->file; + get_file(vma->vm_file); + + vma->vm_pgoff = pgoff; + + return dmabuf->ops->mmap(dmabuf, vma); +} +EXPORT_SYMBOL_GPL(dma_buf_mmap); -- cgit v1.2.2 From 98f86c9e4ae3205e4c85c535691a5d36426360ee Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 20 May 2012 12:33:56 +0530 Subject: dma-buf: add vmap interface The main requirement I have for this interface is for scanning out using the USB gpu devices. Since these devices have to read the framebuffer on updates and linearly compress it, using kmaps is a major overhead for every update. v2: fix warn issues pointed out by Sylwester Nawrocki. v3: fix compile !CONFIG_DMA_SHARED_BUFFER and add _GPL for now Signed-off-by: Dave Airlie Reviewed-by: Rob Clark Signed-off-by: Sumit Semwal --- drivers/base/dma-buf.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'drivers') diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 7cfb405b1ad5..d43d80256fda 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -468,3 +468,37 @@ int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, return dmabuf->ops->mmap(dmabuf, vma); } EXPORT_SYMBOL_GPL(dma_buf_mmap); + +/** + * dma_buf_vmap - Create virtual mapping for the buffer object into kernel address space. Same restrictions as for vmap and friends apply. + * @dma_buf: [in] buffer to vmap + * + * This call may fail due to lack of virtual mapping address space. + * These calls are optional in drivers. The intended use for them + * is for mapping objects linear in kernel space for high use objects. + * Please attempt to use kmap/kunmap before thinking about these interfaces. + */ +void *dma_buf_vmap(struct dma_buf *dmabuf) +{ + if (WARN_ON(!dmabuf)) + return NULL; + + if (dmabuf->ops->vmap) + return dmabuf->ops->vmap(dmabuf); + return NULL; +} +EXPORT_SYMBOL_GPL(dma_buf_vmap); + +/** + * dma_buf_vunmap - Unmap a vmap obtained by dma_buf_vmap. + * @dma_buf: [in] buffer to vmap + */ +void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr) +{ + if (WARN_ON(!dmabuf)) + return; + + if (dmabuf->ops->vunmap) + dmabuf->ops->vunmap(dmabuf, vaddr); +} +EXPORT_SYMBOL_GPL(dma_buf_vunmap); -- cgit v1.2.2 From 12c4727e1d5370270a7df781d2ba0a76e05c1137 Mon Sep 17 00:00:00 2001 From: Sumit Semwal Date: Wed, 23 May 2012 15:27:40 +0530 Subject: dma-buf: minor documentation fixes. Some minor inline documentation fixes for gaps resulting from new patches. Signed-off-by: Sumit Semwal Signed-off-by: Sumit Semwal --- drivers/base/dma-buf.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index d43d80256fda..20258e179211 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -429,7 +429,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kunmap); /** * dma_buf_mmap - Setup up a userspace mmap with the given vma - * @dma_buf: [in] buffer that should back the vma + * @dmabuf: [in] buffer that should back the vma * @vma: [in] vma for the mmap * @pgoff: [in] offset in pages where this mmap should start within the * dma-buf buffer. @@ -470,8 +470,9 @@ int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, EXPORT_SYMBOL_GPL(dma_buf_mmap); /** - * dma_buf_vmap - Create virtual mapping for the buffer object into kernel address space. Same restrictions as for vmap and friends apply. - * @dma_buf: [in] buffer to vmap + * dma_buf_vmap - Create virtual mapping for the buffer object into kernel + * address space. Same restrictions as for vmap and friends apply. + * @dmabuf: [in] buffer to vmap * * This call may fail due to lack of virtual mapping address space. * These calls are optional in drivers. The intended use for them @@ -491,7 +492,7 @@ EXPORT_SYMBOL_GPL(dma_buf_vmap); /** * dma_buf_vunmap - Unmap a vmap obtained by dma_buf_vmap. - * @dma_buf: [in] buffer to vmap + * @dmabuf: [in] buffer to vunmap */ void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr) { -- cgit v1.2.2 From e2ad23d04c1304431ab5176c89b7b476ded2d995 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Fri, 25 May 2012 17:42:54 +0100 Subject: intel-iommu: Add device info into list before doing context mapping Add device info into list before doing context mapping, because device info will be used by iommu_enable_dev_iotlb(). Without it, ATS won't get enabled as it should be. ATS, while a dubious decision from a security point of view, can be very important for performance. Signed-off-by: Xudong Hao Signed-off-by: Xiantao Zhang Acked-by: Chris Wright Signed-off-by: David Woodhouse Cc: stable@kernel.org Signed-off-by: Linus Torvalds --- drivers/iommu/intel-iommu.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index bf2fbaad5e22..abab245371ee 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -2287,12 +2287,6 @@ static int domain_add_dev_info(struct dmar_domain *domain, if (!info) return -ENOMEM; - ret = domain_context_mapping(domain, pdev, translation); - if (ret) { - free_devinfo_mem(info); - return ret; - } - info->segment = pci_domain_nr(pdev->bus); info->bus = pdev->bus->number; info->devfn = pdev->devfn; @@ -2305,6 +2299,17 @@ static int domain_add_dev_info(struct dmar_domain *domain, pdev->dev.archdata.iommu = info; spin_unlock_irqrestore(&device_domain_lock, flags); + ret = domain_context_mapping(domain, pdev, translation); + if (ret) { + spin_lock_irqsave(&device_domain_lock, flags); + list_del(&info->link); + list_del(&info->global); + pdev->dev.archdata.iommu = NULL; + spin_unlock_irqrestore(&device_domain_lock, flags); + free_devinfo_mem(info); + return ret; + } + return 0; } -- cgit v1.2.2 From 109b9b0408e5f1dd327a44f446841a9fbe0bcd83 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Fri, 25 May 2012 17:43:02 +0100 Subject: intel-iommu: Move duplicate list-mangling code into unlink_domain_info() helper Now we have four copies of this code, Linus "suggested" it was about time we stopped copying it and turned it into a helper. Signed-off-by: David Woodhouse Signed-off-by: Linus Torvalds --- drivers/iommu/intel-iommu.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index abab245371ee..b12af2ff8c54 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1907,6 +1907,15 @@ static void iommu_detach_dev(struct intel_iommu *iommu, u8 bus, u8 devfn) iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH); } +static inline void unlink_domain_info(struct device_domain_info *info) +{ + assert_spin_locked(&device_domain_lock); + list_del(&info->link); + list_del(&info->global); + if (info->dev) + info->dev->dev.archdata.iommu = NULL; +} + static void domain_remove_dev_info(struct dmar_domain *domain) { struct device_domain_info *info; @@ -1917,10 +1926,7 @@ static void domain_remove_dev_info(struct dmar_domain *domain) while (!list_empty(&domain->devices)) { info = list_entry(domain->devices.next, struct device_domain_info, link); - list_del(&info->link); - list_del(&info->global); - if (info->dev) - info->dev->dev.archdata.iommu = NULL; + unlink_domain_info(info); spin_unlock_irqrestore(&device_domain_lock, flags); iommu_disable_dev_iotlb(info); @@ -2302,9 +2308,7 @@ static int domain_add_dev_info(struct dmar_domain *domain, ret = domain_context_mapping(domain, pdev, translation); if (ret) { spin_lock_irqsave(&device_domain_lock, flags); - list_del(&info->link); - list_del(&info->global); - pdev->dev.archdata.iommu = NULL; + unlink_domain_info(info); spin_unlock_irqrestore(&device_domain_lock, flags); free_devinfo_mem(info); return ret; @@ -3733,10 +3737,7 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain, if (info->segment == pci_domain_nr(pdev->bus) && info->bus == pdev->bus->number && info->devfn == pdev->devfn) { - list_del(&info->link); - list_del(&info->global); - if (info->dev) - info->dev->dev.archdata.iommu = NULL; + unlink_domain_info(info); spin_unlock_irqrestore(&device_domain_lock, flags); iommu_disable_dev_iotlb(info); @@ -3791,11 +3792,7 @@ static void vm_domain_remove_all_dev_info(struct dmar_domain *domain) while (!list_empty(&domain->devices)) { info = list_entry(domain->devices.next, struct device_domain_info, link); - list_del(&info->link); - list_del(&info->global); - if (info->dev) - info->dev->dev.archdata.iommu = NULL; - + unlink_domain_info(info); spin_unlock_irqrestore(&device_domain_lock, flags1); iommu_disable_dev_iotlb(info); -- cgit v1.2.2 From a7d7d2e1a07e3811dc49af2962c940fd8bbb6c8f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 27 Jan 2012 14:12:32 -0300 Subject: edac: Create a dimm struct and move the labels into it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The way a DIMM is currently represented implies that they're linked into a per-csrow struct. However, some drivers don't see csrows, as they're ridden behind some chip like the AMB's on FBDIMM's, for example. This forced drivers to fake^Wvirtualize a csrow struct, and to create a mess under csrow/channel original's concept. Move the DIMM labels into a per-DIMM struct, and add there the real location of the socket, in terms of csrow/channel. Latter patches will modify the location to properly represent the memory architecture. All other drivers will use a per-csrow type of location. Some of those drivers will require a latter conversion, as they also fake the csrows internally. TODO: While this patch doesn't change the existing behavior, on csrows-based memory controllers, a csrow/channel pair points to a memory rank. There's a known bug at the EDAC core that allows having different labels for the same DIMM, if it has more than one rank. A latter patch is need to merge the several ranks for a DIMM into the same dimm_info struct, in order to avoid having different labels for the same DIMM. The edac_mc_alloc() will now contain a per-dimm initialization loop that will be changed by latter patches in order to match other types of memory architectures. Reviewed-by: Aristeu Rozanski Reviewed-by: Borislav Petkov Cc: Doug Thompson Cc: Ranganathan Desikan Cc: "Arvind R." Cc: "Niklas Söderlund" Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/edac_mc.c | 47 +++++++++++++++++++++++++++++++++----------- drivers/edac/edac_mc_sysfs.c | 11 +++++------ drivers/edac/i5100_edac.c | 8 ++++---- drivers/edac/i7core_edac.c | 4 ++-- drivers/edac/i82975x_edac.c | 2 +- drivers/edac/sb_edac.c | 4 ++-- 6 files changed, 49 insertions(+), 27 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index feef7733fae7..c1aae7233022 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -44,7 +44,7 @@ static void edac_mc_dump_channel(struct rank_info *chan) debugf4("\tchannel = %p\n", chan); debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); debugf4("\tchannel->ce_count = %d\n", chan->ce_count); - debugf4("\tchannel->label = '%s'\n", chan->label); + debugf4("\tchannel->label = '%s'\n", chan->dimm->label); debugf4("\tchannel->csrow = %p\n\n", chan->csrow); } @@ -157,6 +157,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, struct mem_ctl_info *mci; struct csrow_info *csi, *csrow; struct rank_info *chi, *chp, *chan; + struct dimm_info *dimm; void *pvt; unsigned size; int row, chn; @@ -170,7 +171,8 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, mci = (struct mem_ctl_info *)0; csi = edac_align_ptr(&mci[1], sizeof(*csi)); chi = edac_align_ptr(&csi[nr_csrows], sizeof(*chi)); - pvt = edac_align_ptr(&chi[nr_chans * nr_csrows], sz_pvt); + dimm = edac_align_ptr(&chi[nr_chans * nr_csrows], sizeof(*dimm)); + pvt = edac_align_ptr(&dimm[nr_chans * nr_csrows], sz_pvt); size = ((unsigned long)pvt) + sz_pvt; mci = kzalloc(size, GFP_KERNEL); @@ -182,14 +184,22 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, */ csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi)); chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi)); + dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm)); pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL; /* setup index and various internal pointers */ mci->mc_idx = edac_index; mci->csrows = csi; + mci->dimms = dimm; mci->pvt_info = pvt; mci->nr_csrows = nr_csrows; + /* + * For now, assumes that a per-csrow arrangement for dimms. + * This will be latter changed. + */ + dimm = mci->dimms; + for (row = 0; row < nr_csrows; row++) { csrow = &csi[row]; csrow->csrow_idx = row; @@ -202,6 +212,12 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, chan = &chp[chn]; chan->chan_idx = chn; chan->csrow = csrow; + + mci->csrows[row].channels[chn].dimm = dimm; + dimm->csrow = row; + dimm->csrow_channel = chn; + dimm++; + mci->nr_dimms++; } } @@ -678,6 +694,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, int row, int channel, const char *msg) { unsigned long remapped_page; + char *label = NULL; debugf3("MC%d: %s()\n", mci->mc_idx, __func__); @@ -701,6 +718,8 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, return; } + label = mci->csrows[row].channels[channel].dimm->label; + if (edac_mc_get_log_ce()) /* FIXME - put in DIMM location */ edac_mc_printk(mci, KERN_WARNING, @@ -708,7 +727,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, "0x%lx, row %d, channel %d, label \"%s\": %s\n", page_frame_number, offset_in_page, mci->csrows[row].grain, syndrome, row, channel, - mci->csrows[row].channels[channel].label, msg); + label, msg); mci->ce_count++; mci->csrows[row].ce_count++; @@ -754,6 +773,7 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci, char *pos = labels; int chan; int chars; + char *label = NULL; debugf3("MC%d: %s()\n", mci->mc_idx, __func__); @@ -767,15 +787,15 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci, return; } - chars = snprintf(pos, len + 1, "%s", - mci->csrows[row].channels[0].label); + label = mci->csrows[row].channels[0].dimm->label; + chars = snprintf(pos, len + 1, "%s", label); len -= chars; pos += chars; for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); chan++) { - chars = snprintf(pos, len + 1, ":%s", - mci->csrows[row].channels[chan].label); + label = mci->csrows[row].channels[chan].dimm->label; + chars = snprintf(pos, len + 1, ":%s", label); len -= chars; pos += chars; } @@ -824,6 +844,7 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, char labels[len + 1]; char *pos = labels; int chars; + char *label; if (csrow >= mci->nr_csrows) { /* something is wrong */ @@ -858,12 +879,12 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, mci->csrows[csrow].ue_count++; /* Generate the DIMM labels from the specified channels */ - chars = snprintf(pos, len + 1, "%s", - mci->csrows[csrow].channels[channela].label); + label = mci->csrows[csrow].channels[channela].dimm->label; + chars = snprintf(pos, len + 1, "%s", label); len -= chars; pos += chars; chars = snprintf(pos, len + 1, "-%s", - mci->csrows[csrow].channels[channelb].label); + mci->csrows[csrow].channels[channelb].dimm->label); if (edac_mc_get_log_ue()) edac_mc_printk(mci, KERN_EMERG, @@ -885,6 +906,7 @@ EXPORT_SYMBOL(edac_mc_handle_fbd_ue); void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow, unsigned int channel, char *msg) { + char *label = NULL; /* Ensure boundary values */ if (csrow >= mci->nr_csrows) { @@ -904,12 +926,13 @@ void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, return; } + label = mci->csrows[csrow].channels[channel].dimm->label; + if (edac_mc_get_log_ce()) /* FIXME - put in DIMM location */ edac_mc_printk(mci, KERN_WARNING, "CE row %d, channel %d, label \"%s\": %s\n", - csrow, channel, - mci->csrows[csrow].channels[channel].label, msg); + csrow, channel, label, msg); mci->ce_count++; mci->csrows[csrow].ce_count++; diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index e9a28f576d14..af66b2256640 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -170,11 +170,11 @@ static ssize_t channel_dimm_label_show(struct csrow_info *csrow, char *data, int channel) { /* if field has not been initialized, there is nothing to send */ - if (!csrow->channels[channel].label[0]) + if (!csrow->channels[channel].dimm->label[0]) return 0; return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", - csrow->channels[channel].label); + csrow->channels[channel].dimm->label); } static ssize_t channel_dimm_label_store(struct csrow_info *csrow, @@ -184,8 +184,8 @@ static ssize_t channel_dimm_label_store(struct csrow_info *csrow, ssize_t max_size = 0; max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); - strncpy(csrow->channels[channel].label, data, max_size); - csrow->channels[channel].label[max_size] = '\0'; + strncpy(csrow->channels[channel].dimm->label, data, max_size); + csrow->channels[channel].dimm->label[max_size] = '\0'; return max_size; } @@ -952,9 +952,8 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) /* CSROW error: backout what has already been registered, */ fail1: for (i--; i >= 0; i--) { - if (csrow->nr_pages > 0) { + if (mci->csrows[i].nr_pages > 0) kobject_put(&mci->csrows[i].kobj); - } } /* remove the mci instance's attributes, if any */ diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index d500749464ea..d55e5529734c 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -433,7 +433,7 @@ static void i5100_handle_ce(struct mem_ctl_info *mci, "CE chan %d, bank %u, rank %u, syndrome 0x%lx, " "cas %u, ras %u, csrow %u, label \"%s\": %s\n", chan, bank, rank, syndrome, cas, ras, - csrow, mci->csrows[csrow].channels[0].label, msg); + csrow, mci->csrows[csrow].channels[0].dimm->label, msg); mci->ce_count++; mci->csrows[csrow].ce_count++; @@ -455,7 +455,7 @@ static void i5100_handle_ue(struct mem_ctl_info *mci, "UE chan %d, bank %u, rank %u, syndrome 0x%lx, " "cas %u, ras %u, csrow %u, label \"%s\": %s\n", chan, bank, rank, syndrome, cas, ras, - csrow, mci->csrows[csrow].channels[0].label, msg); + csrow, mci->csrows[csrow].channels[0].dimm->label, msg); mci->ue_count++; mci->csrows[csrow].ue_count++; @@ -868,8 +868,8 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) mci->csrows[i].channels[0].chan_idx = 0; mci->csrows[i].channels[0].ce_count = 0; mci->csrows[i].channels[0].csrow = mci->csrows + i; - snprintf(mci->csrows[i].channels[0].label, - sizeof(mci->csrows[i].channels[0].label), + snprintf(mci->csrows[i].channels[0].dimm->label, + sizeof(mci->csrows[i].channels[0].dimm->label), "DIMM%u", i5100_rank_to_slot(mci, chan, rank)); total_pages += npages; diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 85226ccf5290..df0acf02667a 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -746,8 +746,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci) csr->edac_mode = mode; csr->mtype = mtype; - snprintf(csr->channels[0].label, - sizeof(csr->channels[0].label), + snprintf(csr->channels[0].dimm->label, + sizeof(csr->channels[0].dimm->label), "CPU#%uChannel#%u_DIMM#%u", pvt->i7core_dev->socket, i, j); diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 0cd8368f88f8..b7aca58bf9eb 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -407,7 +407,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, * [0-3] for dual-channel; i.e. csrow->nr_channels = 2 */ for (chan = 0; chan < csrow->nr_channels; chan++) - strncpy(csrow->channels[chan].label, + strncpy(csrow->channels[chan].dimm->label, labels[(index >> 1) + (chan * 2)], EDAC_MC_LABEL_LEN); diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index a203536d90dd..95901c21d5dc 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -651,8 +651,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci) csr->channels[0].chan_idx = i; csr->channels[0].ce_count = 0; pvt->csrow_map[i][j] = csrow; - snprintf(csr->channels[0].label, - sizeof(csr->channels[0].label), + snprintf(csr->channels[0].dimm->label, + sizeof(csr->channels[0].dimm->label), "CPU_SrcID#%u_Channel#%u_DIMM#%u", pvt->sbridge_dev->source_id, i, j); last_page += npages; -- cgit v1.2.2 From 084a4fccef39ac7abb039511f32380f28d0b67e6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 27 Jan 2012 18:38:08 -0300 Subject: edac: move dimm properties to struct dimm_info MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On systems based on chip select rows, all channels need to use memories with the same properties, otherwise the memories on channels A and B won't be recognized. However, such assumption is not true for all types of memory controllers. Controllers for FB-DIMM's don't have such requirements. Also, modern Intel controllers seem to be capable of handling such differences. So, we need to get rid of storing the DIMM information into a per-csrow data, storing it, instead at the right place. The first step is to move grain, mtype, dtype and edac_mode to the per-dimm struct. Reviewed-by: Aristeu Rozanski Reviewed-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Borislav Petkov Cc: Mark Gross Cc: Jason Uhlenkott Cc: Tim Small Cc: Ranganathan Desikan Cc: "Arvind R." Cc: Olof Johansson Cc: Egor Martovetsky Cc: Michal Marek Cc: Jiri Kosina Cc: Joe Perches Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Hitoshi Mitake Cc: Andrew Morton Cc: James Bottomley Cc: "Niklas Söderlund" Cc: Shaohui Xie Cc: Josh Boyer Cc: Mike Williams Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 18 ++++++++---- drivers/edac/amd76x_edac.c | 10 ++++--- drivers/edac/cell_edac.c | 10 +++++-- drivers/edac/cpc925_edac.c | 62 ++++++++++++++++++++++-------------------- drivers/edac/e752x_edac.c | 44 ++++++++++++++++-------------- drivers/edac/e7xxx_edac.c | 44 +++++++++++++++++------------- drivers/edac/edac_mc.c | 19 ++++++++----- drivers/edac/edac_mc_sysfs.c | 6 ++-- drivers/edac/i3000_edac.c | 18 ++++++------ drivers/edac/i3200_edac.c | 18 ++++++------ drivers/edac/i5000_edac.c | 24 ++++++++-------- drivers/edac/i5100_edac.c | 38 ++++++++++++++------------ drivers/edac/i5400_edac.c | 24 ++++++---------- drivers/edac/i7300_edac.c | 25 ++++++++++------- drivers/edac/i7core_edac.c | 27 +++++++++--------- drivers/edac/i82443bxgx_edac.c | 13 +++++---- drivers/edac/i82860_edac.c | 11 +++++--- drivers/edac/i82875p_edac.c | 17 ++++++++---- drivers/edac/i82975x_edac.c | 17 ++++++++---- drivers/edac/mpc85xx_edac.c | 13 +++++---- drivers/edac/mv64x60_edac.c | 18 ++++++------ drivers/edac/pasemi_edac.c | 10 ++++--- drivers/edac/ppc4xx_edac.c | 13 +++++---- drivers/edac/r82600_edac.c | 10 ++++--- drivers/edac/sb_edac.c | 31 +++++++++++---------- drivers/edac/tile_edac.c | 13 +++++---- drivers/edac/x38_edac.c | 17 ++++++------ 27 files changed, 321 insertions(+), 249 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 7ef73c919c5d..8126db0c8987 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2187,7 +2187,9 @@ static int init_csrows(struct mem_ctl_info *mci) struct amd64_pvt *pvt = mci->pvt_info; u64 input_addr_min, input_addr_max, sys_addr, base, mask; u32 val; - int i, empty = 1; + int i, j, empty = 1; + enum mem_type mtype; + enum edac_type edac_mode; amd64_read_pci_cfg(pvt->F3, NBCFG, &val); @@ -2224,7 +2226,7 @@ static int init_csrows(struct mem_ctl_info *mci) csrow->page_mask = ~mask; /* 8 bytes of resolution */ - csrow->mtype = amd64_determine_memory_type(pvt, i); + mtype = amd64_determine_memory_type(pvt, i); debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); debugf1(" input_addr_min: 0x%lx input_addr_max: 0x%lx\n", @@ -2241,11 +2243,15 @@ static int init_csrows(struct mem_ctl_info *mci) * determine whether CHIPKILL or JUST ECC or NO ECC is operating */ if (pvt->nbcfg & NBCFG_ECC_ENABLE) - csrow->edac_mode = - (pvt->nbcfg & NBCFG_CHIPKILL) ? - EDAC_S4ECD4ED : EDAC_SECDED; + edac_mode = (pvt->nbcfg & NBCFG_CHIPKILL) ? + EDAC_S4ECD4ED : EDAC_SECDED; else - csrow->edac_mode = EDAC_NONE; + edac_mode = EDAC_NONE; + + for (j = 0; j < pvt->channel_count; j++) { + csrow->channels[j].dimm->mtype = mtype; + csrow->channels[j].dimm->edac_mode = edac_mode; + } } return empty; diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index f8fd3c807bde..fcfe359f7be5 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -186,11 +186,13 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, enum edac_type edac_mode) { struct csrow_info *csrow; + struct dimm_info *dimm; u32 mba, mba_base, mba_mask, dms; int index; for (index = 0; index < mci->nr_csrows; index++) { csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; /* find the DRAM Chip Select Base address and mask */ pci_read_config_dword(pdev, @@ -206,10 +208,10 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; csrow->last_page = csrow->first_page + csrow->nr_pages - 1; csrow->page_mask = mba_mask >> PAGE_SHIFT; - csrow->grain = csrow->nr_pages << PAGE_SHIFT; - csrow->mtype = MEM_RDDR; - csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; - csrow->edac_mode = edac_mode; + dimm->grain = csrow->nr_pages << PAGE_SHIFT; + dimm->mtype = MEM_RDDR; + dimm->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; + dimm->edac_mode = edac_mode; } } diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 9a6a274e6925..94fbb127215a 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -124,8 +124,10 @@ static void cell_edac_check(struct mem_ctl_info *mci) static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) { struct csrow_info *csrow = &mci->csrows[0]; + struct dimm_info *dimm; struct cell_edac_priv *priv = mci->pvt_info; struct device_node *np; + int j; for (np = NULL; (np = of_find_node_by_name(np, "memory")) != NULL;) { @@ -142,8 +144,12 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) csrow->first_page = r.start >> PAGE_SHIFT; csrow->nr_pages = resource_size(&r) >> PAGE_SHIFT; csrow->last_page = csrow->first_page + csrow->nr_pages - 1; - csrow->mtype = MEM_XDR; - csrow->edac_mode = EDAC_SECDED; + + for (j = 0; j < csrow->nr_channels; j++) { + dimm = csrow->channels[j].dimm; + dimm->mtype = MEM_XDR; + dimm->edac_mode = EDAC_SECDED; + } dev_dbg(mci->dev, "Initialized on node %d, chanmask=0x%x," " first_page=0x%lx, nr_pages=0x%x\n", diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index a774c0ddaf5b..ee90f3da8f3a 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -329,7 +329,8 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) { struct cpc925_mc_pdata *pdata = mci->pvt_info; struct csrow_info *csrow; - int index; + struct dimm_info *dimm; + int index, j; u32 mbmr, mbbar, bba; unsigned long row_size, last_nr_pages = 0; @@ -354,32 +355,35 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) csrow->last_page = csrow->first_page + csrow->nr_pages - 1; last_nr_pages = csrow->last_page + 1; - csrow->mtype = MEM_RDDR; - csrow->edac_mode = EDAC_SECDED; - - switch (csrow->nr_channels) { - case 1: /* Single channel */ - csrow->grain = 32; /* four-beat burst of 32 bytes */ - break; - case 2: /* Dual channel */ - default: - csrow->grain = 64; /* four-beat burst of 64 bytes */ - break; - } - - switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { - case 6: /* 0110, no way to differentiate X8 VS X16 */ - case 5: /* 0101 */ - case 8: /* 1000 */ - csrow->dtype = DEV_X16; - break; - case 7: /* 0111 */ - case 9: /* 1001 */ - csrow->dtype = DEV_X8; - break; - default: - csrow->dtype = DEV_UNKNOWN; - break; + for (j = 0; j < csrow->nr_channels; j++) { + dimm = csrow->channels[j].dimm; + dimm->mtype = MEM_RDDR; + dimm->edac_mode = EDAC_SECDED; + + switch (csrow->nr_channels) { + case 1: /* Single channel */ + dimm->grain = 32; /* four-beat burst of 32 bytes */ + break; + case 2: /* Dual channel */ + default: + dimm->grain = 64; /* four-beat burst of 64 bytes */ + break; + } + + switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { + case 6: /* 0110, no way to differentiate X8 VS X16 */ + case 5: /* 0101 */ + case 8: /* 1000 */ + dimm->dtype = DEV_X16; + break; + case 7: /* 0111 */ + case 9: /* 1001 */ + dimm->dtype = DEV_X8; + break; + default: + dimm->dtype = DEV_UNKNOWN; + break; + } } } } @@ -962,9 +966,9 @@ static int __devinit cpc925_probe(struct platform_device *pdev) goto err2; } - nr_channels = cpc925_mc_get_channels(vbase); + nr_channels = cpc925_mc_get_channels(vbase) + 1; mci = edac_mc_alloc(sizeof(struct cpc925_mc_pdata), - CPC925_NR_CSROWS, nr_channels + 1, edac_mc_idx); + CPC925_NR_CSROWS, nr_channels, edac_mc_idx); if (!mci) { cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n"); res = -ENOMEM; diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 41223261ede9..6cf6ec6bc71e 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1044,7 +1044,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ u8 value; - u32 dra, drc, cumul_size; + u32 dra, drc, cumul_size, i; dra = 0; for (index = 0; index < 4; index++) { @@ -1053,7 +1053,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, dra |= dra_reg << (index * 8); } pci_read_config_dword(pdev, E752X_DRC, &drc); - drc_chan = dual_channel_active(ddrcsr); + drc_chan = dual_channel_active(ddrcsr) ? 1 : 0; drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ drc_ddim = (drc >> 20) & 0x3; @@ -1080,24 +1080,28 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */ - csrow->mtype = MEM_RDDR; /* only one type supported */ - csrow->dtype = mem_dev ? DEV_X4 : DEV_X8; - - /* - * if single channel or x8 devices then SECDED - * if dual channel and x4 then S4ECD4ED - */ - if (drc_ddim) { - if (drc_chan && mem_dev) { - csrow->edac_mode = EDAC_S4ECD4ED; - mci->edac_cap |= EDAC_FLAG_S4ECD4ED; - } else { - csrow->edac_mode = EDAC_SECDED; - mci->edac_cap |= EDAC_FLAG_SECDED; - } - } else - csrow->edac_mode = EDAC_NONE; + + for (i = 0; i < drc_chan + 1; i++) { + struct dimm_info *dimm = csrow->channels[i].dimm; + dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ + dimm->mtype = MEM_RDDR; /* only one type supported */ + dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; + + /* + * if single channel or x8 devices then SECDED + * if dual channel and x4 then S4ECD4ED + */ + if (drc_ddim) { + if (drc_chan && mem_dev) { + dimm->edac_mode = EDAC_S4ECD4ED; + mci->edac_cap |= EDAC_FLAG_S4ECD4ED; + } else { + dimm->edac_mode = EDAC_SECDED; + mci->edac_cap |= EDAC_FLAG_SECDED; + } + } else + dimm->edac_mode = EDAC_NONE; + } } } diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 68dea87b72e6..5ed97f6eb346 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -347,11 +347,12 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, int dev_idx, u32 drc) { unsigned long last_cumul_size; - int index; + int index, j; u8 value; u32 dra, cumul_size; int drc_chan, drc_drbg, drc_ddim, mem_dev; struct csrow_info *csrow; + struct dimm_info *dimm; pci_read_config_dword(pdev, E7XXX_DRA, &dra); drc_chan = dual_channel_active(drc, dev_idx); @@ -381,24 +382,29 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */ - csrow->mtype = MEM_RDDR; /* only one type supported */ - csrow->dtype = mem_dev ? DEV_X4 : DEV_X8; - - /* - * if single channel or x8 devices then SECDED - * if dual channel and x4 then S4ECD4ED - */ - if (drc_ddim) { - if (drc_chan && mem_dev) { - csrow->edac_mode = EDAC_S4ECD4ED; - mci->edac_cap |= EDAC_FLAG_S4ECD4ED; - } else { - csrow->edac_mode = EDAC_SECDED; - mci->edac_cap |= EDAC_FLAG_SECDED; - } - } else - csrow->edac_mode = EDAC_NONE; + + for (j = 0; j < drc_chan + 1; j++) { + dimm = csrow->channels[j].dimm; + + dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ + dimm->mtype = MEM_RDDR; /* only one type supported */ + dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; + + /* + * if single channel or x8 devices then SECDED + * if dual channel and x4 then S4ECD4ED + */ + if (drc_ddim) { + if (drc_chan && mem_dev) { + dimm->edac_mode = EDAC_S4ECD4ED; + mci->edac_cap |= EDAC_FLAG_S4ECD4ED; + } else { + dimm->edac_mode = EDAC_SECDED; + mci->edac_cap |= EDAC_FLAG_SECDED; + } + } else + dimm->edac_mode = EDAC_NONE; + } } } diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index c1aae7233022..0942efad55c1 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -43,7 +43,7 @@ static void edac_mc_dump_channel(struct rank_info *chan) { debugf4("\tchannel = %p\n", chan); debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); - debugf4("\tchannel->ce_count = %d\n", chan->ce_count); + debugf4("\tchannel->ce_count = %d\n", chan->dimm->ce_count); debugf4("\tchannel->label = '%s'\n", chan->dimm->label); debugf4("\tchannel->csrow = %p\n\n", chan->csrow); } @@ -695,6 +695,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, { unsigned long remapped_page; char *label = NULL; + u32 grain; debugf3("MC%d: %s()\n", mci->mc_idx, __func__); @@ -719,6 +720,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, } label = mci->csrows[row].channels[channel].dimm->label; + grain = mci->csrows[row].channels[channel].dimm->grain; if (edac_mc_get_log_ce()) /* FIXME - put in DIMM location */ @@ -726,11 +728,12 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " "0x%lx, row %d, channel %d, label \"%s\": %s\n", page_frame_number, offset_in_page, - mci->csrows[row].grain, syndrome, row, channel, + grain, syndrome, row, channel, label, msg); mci->ce_count++; mci->csrows[row].ce_count++; + mci->csrows[row].channels[channel].dimm->ce_count++; mci->csrows[row].channels[channel].ce_count++; if (mci->scrub_mode & SCRUB_SW_SRC) { @@ -747,8 +750,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci, mci->ctl_page_to_phys(mci, page_frame_number) : page_frame_number; - edac_mc_scrub_block(remapped_page, offset_in_page, - mci->csrows[row].grain); + edac_mc_scrub_block(remapped_page, offset_in_page, grain); } } EXPORT_SYMBOL_GPL(edac_mc_handle_ce); @@ -774,6 +776,7 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci, int chan; int chars; char *label = NULL; + u32 grain; debugf3("MC%d: %s()\n", mci->mc_idx, __func__); @@ -787,6 +790,7 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci, return; } + grain = mci->csrows[row].channels[0].dimm->grain; label = mci->csrows[row].channels[0].dimm->label; chars = snprintf(pos, len + 1, "%s", label); len -= chars; @@ -804,14 +808,13 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci, edac_mc_printk(mci, KERN_EMERG, "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " "labels \"%s\": %s\n", page_frame_number, - offset_in_page, mci->csrows[row].grain, row, - labels, msg); + offset_in_page, grain, row, labels, msg); if (edac_mc_get_panic_on_ue()) panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, " "row %d, labels \"%s\": %s\n", mci->mc_idx, page_frame_number, offset_in_page, - mci->csrows[row].grain, row, labels, msg); + grain, row, labels, msg); mci->ue_count++; mci->csrows[row].ue_count++; @@ -883,6 +886,7 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, chars = snprintf(pos, len + 1, "%s", label); len -= chars; pos += chars; + chars = snprintf(pos, len + 1, "-%s", mci->csrows[csrow].channels[channelb].dimm->label); @@ -936,6 +940,7 @@ void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, mci->ce_count++; mci->csrows[csrow].ce_count++; + mci->csrows[csrow].channels[channel].dimm->ce_count++; mci->csrows[csrow].channels[channel].ce_count++; } EXPORT_SYMBOL(edac_mc_handle_fbd_ce); diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index af66b2256640..487e03eeed26 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -150,19 +150,19 @@ static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private) { - return sprintf(data, "%s\n", mem_types[csrow->mtype]); + return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]); } static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private) { - return sprintf(data, "%s\n", dev_types[csrow->dtype]); + return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]); } static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private) { - return sprintf(data, "%s\n", edac_caps[csrow->edac_mode]); + return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]); } /* show/store functions for DIMM Label attributes */ diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 277689a68841..8fe60ee37826 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -304,7 +304,7 @@ static int i3000_is_interleaved(const unsigned char *c0dra, static int i3000_probe1(struct pci_dev *pdev, int dev_idx) { int rc; - int i; + int i, j; struct mem_ctl_info *mci = NULL; unsigned long last_cumul_size; int interleaved, nr_channels; @@ -386,19 +386,21 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) cumul_size <<= 1; debugf3("MC: %s(): (%d) cumul_size 0x%x\n", __func__, i, cumul_size); - if (cumul_size == last_cumul_size) { - csrow->mtype = MEM_EMPTY; + if (cumul_size == last_cumul_size) continue; - } csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = I3000_DEAP_GRAIN; - csrow->mtype = MEM_DDR2; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = EDAC_UNKNOWN; + + for (j = 0; j < nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; + dimm->grain = I3000_DEAP_GRAIN; + dimm->mtype = MEM_DDR2; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = EDAC_UNKNOWN; + } } /* diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 046808c6357d..6ae30176aef5 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -319,7 +319,7 @@ static unsigned long drb_to_nr_pages( static int i3200_probe1(struct pci_dev *pdev, int dev_idx) { int rc; - int i; + int i, j; struct mem_ctl_info *mci = NULL; unsigned long last_page; u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL]; @@ -375,20 +375,22 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) i / I3200_RANKS_PER_CHANNEL, i % I3200_RANKS_PER_CHANNEL); - if (nr_pages == 0) { - csrow->mtype = MEM_EMPTY; + if (nr_pages == 0) continue; - } csrow->first_page = last_page + 1; last_page += nr_pages; csrow->last_page = last_page; csrow->nr_pages = nr_pages; - csrow->grain = nr_pages << PAGE_SHIFT; - csrow->mtype = MEM_DDR2; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = EDAC_UNKNOWN; + for (j = 0; j < nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; + + dimm->grain = nr_pages << PAGE_SHIFT; + dimm->mtype = MEM_DDR2; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = EDAC_UNKNOWN; + } } i3200_clear_error_info(mci); diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index a2680d8e744b..95966ba9c5ca 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1268,25 +1268,23 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) p_csrow->last_page = 9 + csrow * 20; p_csrow->page_mask = 0xFFF; - p_csrow->grain = 8; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; - } + p_csrow->channels[channel].dimm->grain = 8; - p_csrow->nr_pages = csrow_megs << 8; + /* Assume DDR2 for now */ + p_csrow->channels[channel].dimm->mtype = MEM_FB_DDR2; - /* Assume DDR2 for now */ - p_csrow->mtype = MEM_FB_DDR2; + /* ask what device type on this row */ + if (MTR_DRAM_WIDTH(mtr)) + p_csrow->channels[channel].dimm->dtype = DEV_X8; + else + p_csrow->channels[channel].dimm->dtype = DEV_X4; - /* ask what device type on this row */ - if (MTR_DRAM_WIDTH(mtr)) - p_csrow->dtype = DEV_X8; - else - p_csrow->dtype = DEV_X4; - - p_csrow->edac_mode = EDAC_S8ECD8ED; + p_csrow->channels[channel].dimm->edac_mode = EDAC_S8ECD8ED; + } + p_csrow->nr_pages = csrow_megs << 8; empty = 0; } diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index d55e5529734c..6c0dafa3f67b 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -428,12 +428,16 @@ static void i5100_handle_ce(struct mem_ctl_info *mci, const char *msg) { const int csrow = i5100_rank_to_csrow(mci, chan, rank); + char *label = NULL; + + if (mci->csrows[csrow].channels[0].dimm) + label = mci->csrows[csrow].channels[0].dimm->label; printk(KERN_ERR "CE chan %d, bank %u, rank %u, syndrome 0x%lx, " "cas %u, ras %u, csrow %u, label \"%s\": %s\n", chan, bank, rank, syndrome, cas, ras, - csrow, mci->csrows[csrow].channels[0].dimm->label, msg); + csrow, label, msg); mci->ce_count++; mci->csrows[csrow].ce_count++; @@ -450,12 +454,16 @@ static void i5100_handle_ue(struct mem_ctl_info *mci, const char *msg) { const int csrow = i5100_rank_to_csrow(mci, chan, rank); + char *label = NULL; + + if (mci->csrows[csrow].channels[0].dimm) + label = mci->csrows[csrow].channels[0].dimm->label; printk(KERN_ERR "UE chan %d, bank %u, rank %u, syndrome 0x%lx, " "cas %u, ras %u, csrow %u, label \"%s\": %s\n", chan, bank, rank, syndrome, cas, ras, - csrow, mci->csrows[csrow].channels[0].dimm->label, msg); + csrow, label, msg); mci->ue_count++; mci->csrows[csrow].ue_count++; @@ -837,6 +845,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) int i; unsigned long total_pages = 0UL; struct i5100_priv *priv = mci->pvt_info; + struct dimm_info *dimm; for (i = 0; i < mci->nr_csrows; i++) { const unsigned long npages = i5100_npages(mci, i); @@ -852,27 +861,22 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) */ mci->csrows[i].first_page = total_pages; mci->csrows[i].last_page = total_pages + npages - 1; - mci->csrows[i].page_mask = 0UL; - mci->csrows[i].nr_pages = npages; - mci->csrows[i].grain = 32; mci->csrows[i].csrow_idx = i; - mci->csrows[i].dtype = - (priv->mtr[chan][rank].width == 4) ? DEV_X4 : DEV_X8; - mci->csrows[i].ue_count = 0; - mci->csrows[i].ce_count = 0; - mci->csrows[i].mtype = MEM_RDDR2; - mci->csrows[i].edac_mode = EDAC_SECDED; mci->csrows[i].mci = mci; mci->csrows[i].nr_channels = 1; - mci->csrows[i].channels[0].chan_idx = 0; - mci->csrows[i].channels[0].ce_count = 0; mci->csrows[i].channels[0].csrow = mci->csrows + i; - snprintf(mci->csrows[i].channels[0].dimm->label, - sizeof(mci->csrows[i].channels[0].dimm->label), - "DIMM%u", i5100_rank_to_slot(mci, chan, rank)); - total_pages += npages; + + dimm = mci->csrows[i].channels[0].dimm; + dimm->grain = 32; + dimm->dtype = (priv->mtr[chan][rank].width == 4) ? + DEV_X4 : DEV_X8; + dimm->mtype = MEM_RDDR2; + dimm->edac_mode = EDAC_SECDED; + snprintf(dimm->label, sizeof(dimm->label), + "DIMM%u", + i5100_rank_to_slot(mci, chan, rank)); } } diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 1869a1018fb5..c2379ba95c5a 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1159,6 +1159,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) int csrow_megs; int channel; int csrow; + struct dimm_info *dimm; pvt = mci->pvt_info; @@ -1184,24 +1185,17 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) p_csrow->last_page = 9 + csrow * 20; p_csrow->page_mask = 0xFFF; - p_csrow->grain = 8; - csrow_megs = 0; - for (channel = 0; channel < pvt->maxch; channel++) + for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; - p_csrow->nr_pages = csrow_megs << 8; - - /* Assume DDR2 for now */ - p_csrow->mtype = MEM_FB_DDR2; - - /* ask what device type on this row */ - if (MTR_DRAM_WIDTH(mtr)) - p_csrow->dtype = DEV_X8; - else - p_csrow->dtype = DEV_X4; - - p_csrow->edac_mode = EDAC_S8ECD8ED; + p_csrow->nr_pages = csrow_megs << 8; + dimm = p_csrow->channels[channel].dimm; + dimm->grain = 8; + dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; + dimm->mtype = MEM_RDDR2; + dimm->edac_mode = EDAC_SECDED; + } empty = 0; } diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index 3bafa3bca148..4bfcb3da3f01 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -618,6 +618,7 @@ static int decode_mtr(struct i7300_pvt *pvt, int slot, int ch, int branch, struct i7300_dimm_info *dinfo, struct csrow_info *p_csrow, + struct dimm_info *dimm, u32 *nr_pages) { int mtr, ans, addrBits, channel; @@ -663,10 +664,7 @@ static int decode_mtr(struct i7300_pvt *pvt, debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); - p_csrow->grain = 8; - p_csrow->mtype = MEM_FB_DDR2; p_csrow->csrow_idx = slot; - p_csrow->page_mask = 0; /* * The type of error detection actually depends of the @@ -677,15 +675,17 @@ static int decode_mtr(struct i7300_pvt *pvt, * See datasheet Sections 7.3.6 to 7.3.8 */ + dimm->grain = 8; + dimm->mtype = MEM_FB_DDR2; if (IS_SINGLE_MODE(pvt->mc_settings_a)) { - p_csrow->edac_mode = EDAC_SECDED; + dimm->edac_mode = EDAC_SECDED; debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); } else { debugf2("\t\tECC code is on Lockstep mode\n"); if (MTR_DRAM_WIDTH(mtr) == 8) - p_csrow->edac_mode = EDAC_S8ECD8ED; + dimm->edac_mode = EDAC_S8ECD8ED; else - p_csrow->edac_mode = EDAC_S4ECD4ED; + dimm->edac_mode = EDAC_S4ECD4ED; } /* ask what device type on this row */ @@ -694,9 +694,9 @@ static int decode_mtr(struct i7300_pvt *pvt, IS_SCRBALGO_ENHANCED(pvt->mc_settings) ? "enhanced" : "normal"); - p_csrow->dtype = DEV_X8; + dimm->dtype = DEV_X8; } else - p_csrow->dtype = DEV_X4; + dimm->dtype = DEV_X4; return mtr; } @@ -779,6 +779,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) int mtr; int ch, branch, slot, channel; u32 last_page = 0, nr_pages; + struct dimm_info *dimm; pvt = mci->pvt_info; @@ -803,20 +804,24 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) } /* Get the set of MTR[0-7] regs by each branch */ + nr_pages = 0; for (slot = 0; slot < MAX_SLOTS; slot++) { int where = mtr_regs[slot]; for (branch = 0; branch < MAX_BRANCHES; branch++) { pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch], where, &pvt->mtr[slot][branch]); - for (ch = 0; ch < MAX_BRANCHES; ch++) { + for (ch = 0; ch < MAX_CH_PER_BRANCH; ch++) { int channel = to_channel(ch, branch); dinfo = &pvt->dimm_info[slot][channel]; p_csrow = &mci->csrows[slot]; + dimm = p_csrow->channels[branch * MAX_CH_PER_BRANCH + ch].dimm; + mtr = decode_mtr(pvt, slot, ch, branch, - dinfo, p_csrow, &nr_pages); + dinfo, p_csrow, dimm, + &nr_pages); /* if no DIMMS on this row, continue */ if (!MTR_DIMMS_PRESENT(mtr)) continue; diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index df0acf02667a..5449bd40a739 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -592,7 +592,7 @@ static int i7core_get_active_channels(const u8 socket, unsigned *channels, return 0; } -static int get_dimm_config(const struct mem_ctl_info *mci) +static int get_dimm_config(struct mem_ctl_info *mci) { struct i7core_pvt *pvt = mci->pvt_info; struct csrow_info *csr; @@ -602,6 +602,7 @@ static int get_dimm_config(const struct mem_ctl_info *mci) unsigned long last_page = 0; enum edac_type mode; enum mem_type mtype; + struct dimm_info *dimm; /* Get data from the MC register, function 0 */ pdev = pvt->pci_mcr[0]; @@ -721,7 +722,6 @@ static int get_dimm_config(const struct mem_ctl_info *mci) csr->nr_pages = npages; csr->page_mask = 0; - csr->grain = 8; csr->csrow_idx = csrow; csr->nr_channels = 1; @@ -730,28 +730,27 @@ static int get_dimm_config(const struct mem_ctl_info *mci) pvt->csrow_map[i][j] = csrow; + dimm = csr->channels[0].dimm; switch (banks) { case 4: - csr->dtype = DEV_X4; + dimm->dtype = DEV_X4; break; case 8: - csr->dtype = DEV_X8; + dimm->dtype = DEV_X8; break; case 16: - csr->dtype = DEV_X16; + dimm->dtype = DEV_X16; break; default: - csr->dtype = DEV_UNKNOWN; + dimm->dtype = DEV_UNKNOWN; } - csr->edac_mode = mode; - csr->mtype = mtype; - snprintf(csr->channels[0].dimm->label, - sizeof(csr->channels[0].dimm->label), - "CPU#%uChannel#%u_DIMM#%u", - pvt->i7core_dev->socket, i, j); - - csrow++; + snprintf(dimm->label, sizeof(dimm->label), + "CPU#%uChannel#%u_DIMM#%u", + pvt->i7core_dev->socket, i, j); + dimm->grain = 8; + dimm->edac_mode = mode; + dimm->mtype = mtype; } pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 3bf2b2f490e7..0b98dd3408b9 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -12,7 +12,7 @@ * 440GX fix by Jason Uhlenkott . * * Written with reference to 82443BX Host Bridge Datasheet: - * http://download.intel.com/design/chipsets/datashts/29063301.pdf + * http://download.intel.com/design/chipsets/datashts/29063301.pdf * references to this document given in []. * * This module doesn't support the 440LX, but it may be possible to @@ -189,6 +189,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, enum mem_type mtype) { struct csrow_info *csrow; + struct dimm_info *dimm; int index; u8 drbar, dramc; u32 row_base, row_high_limit, row_high_limit_last; @@ -197,6 +198,8 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, row_high_limit_last = 0; for (index = 0; index < mci->nr_csrows; index++) { csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; + pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar); debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n", mci->mc_idx, __FILE__, __func__, index, drbar); @@ -219,12 +222,12 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; csrow->nr_pages = csrow->last_page - csrow->first_page + 1; /* EAP reports in 4kilobyte granularity [61] */ - csrow->grain = 1 << 12; - csrow->mtype = mtype; + dimm->grain = 1 << 12; + dimm->mtype = mtype; /* I don't think 440BX can tell you device type? FIXME? */ - csrow->dtype = DEV_UNKNOWN; + dimm->dtype = DEV_UNKNOWN; /* Mode is global to all rows on 440BX */ - csrow->edac_mode = edac_mode; + dimm->edac_mode = edac_mode; row_high_limit_last = row_high_limit; } } diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index c779092d18d1..3eb77845cfca 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -140,6 +140,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) u16 value; u32 cumul_size; struct csrow_info *csrow; + struct dimm_info *dimm; int index; pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim); @@ -153,6 +154,8 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) */ for (index = 0; index < mci->nr_csrows; index++) { csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; + pci_read_config_word(pdev, I82860_GBA + index * 2, &value); cumul_size = (value & I82860_GBA_MASK) << (I82860_GBA_SHIFT - PAGE_SHIFT); @@ -166,10 +169,10 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ - csrow->mtype = MEM_RMBS; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE; + dimm->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ + dimm->mtype = MEM_RMBS; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE; } } diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index 10f15d85fb5e..eac574285da8 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -342,11 +342,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, void __iomem * ovrfl_window, u32 drc) { struct csrow_info *csrow; + struct dimm_info *dimm; + unsigned nr_chans = dual_channel_active(drc) + 1; unsigned long last_cumul_size; u8 value; u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ u32 cumul_size; - int index; + int index, j; drc_ddim = (drc >> 18) & 0x1; last_cumul_size = 0; @@ -371,10 +373,15 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ - csrow->mtype = MEM_DDR; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; + + for (j = 0; j < nr_chans; j++) { + dimm = csrow->channels[j].dimm; + + dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ + dimm->mtype = MEM_DDR; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; + } } } diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index b7aca58bf9eb..b8ec8719e2f5 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -309,7 +309,7 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci, chan = (mci->csrows[row].nr_channels == 1) ? 0 : info->eap & 1; offst = info->eap & ((1 << PAGE_SHIFT) - - (1 << mci->csrows[row].grain)); + (1 << mci->csrows[row].channels[chan].dimm->grain)); if (info->errsts & 0x0002) edac_mc_handle_ue(mci, page, offst , row, "i82975x UE"); @@ -372,6 +372,8 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, u8 value; u32 cumul_size; int index, chan; + struct dimm_info *dimm; + enum dev_type dtype; last_cumul_size = 0; @@ -406,10 +408,17 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, * [0-7] for single-channel; i.e. csrow->nr_channels = 1 * [0-3] for dual-channel; i.e. csrow->nr_channels = 2 */ - for (chan = 0; chan < csrow->nr_channels; chan++) + dtype = i82975x_dram_type(mch_window, index); + for (chan = 0; chan < csrow->nr_channels; chan++) { + dimm = mci->csrows[index].channels[chan].dimm; strncpy(csrow->channels[chan].dimm->label, labels[(index >> 1) + (chan * 2)], EDAC_MC_LABEL_LEN); + dimm->grain = 1 << 7; /* 128Byte cache-line resolution */ + dimm->dtype = i82975x_dram_type(mch_window, index); + dimm->mtype = MEM_DDR2; /* I82975x supports only DDR2 */ + dimm->edac_mode = EDAC_SECDED; /* only supported */ + } if (cumul_size == last_cumul_size) continue; /* not populated */ @@ -418,10 +427,6 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, csrow->last_page = cumul_size - 1; csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - csrow->grain = 1 << 7; /* 128Byte cache-line resolution */ - csrow->mtype = MEM_DDR2; /* I82975x supports only DDR2 */ - csrow->dtype = i82975x_dram_type(mch_window, index); - csrow->edac_mode = EDAC_SECDED; /* only supported */ } } diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 73464a62adf7..fb92916d0872 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -883,6 +883,7 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) { struct mpc85xx_mc_pdata *pdata = mci->pvt_info; struct csrow_info *csrow; + struct dimm_info *dimm; u32 sdram_ctl; u32 sdtype; enum mem_type mtype; @@ -929,6 +930,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) u32 end; csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; + cs_bnds = in_be32(pdata->mc_vbase + MPC85XX_MC_CS_BNDS_0 + (index * MPC85XX_MC_CS_BNDS_OFS)); @@ -945,12 +948,12 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) csrow->first_page = start; csrow->last_page = end; csrow->nr_pages = end + 1 - start; - csrow->grain = 8; - csrow->mtype = mtype; - csrow->dtype = DEV_UNKNOWN; + dimm->grain = 8; + dimm->mtype = mtype; + dimm->dtype = DEV_UNKNOWN; if (sdram_ctl & DSC_X32_EN) - csrow->dtype = DEV_X32; - csrow->edac_mode = EDAC_SECDED; + dimm->dtype = DEV_X32; + dimm->edac_mode = EDAC_SECDED; } } diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 7e5ff367705c..12d7fe04454c 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -656,6 +656,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, struct mv64x60_mc_pdata *pdata) { struct csrow_info *csrow; + struct dimm_info *dimm; + u32 devtype; u32 ctl; @@ -664,30 +666,30 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); csrow = &mci->csrows[0]; - csrow->first_page = 0; + dimm = csrow->channels[0].dimm; csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; csrow->last_page = csrow->first_page + csrow->nr_pages - 1; - csrow->grain = 8; + dimm->grain = 8; - csrow->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; + dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; devtype = (ctl >> 20) & 0x3; switch (devtype) { case 0x0: - csrow->dtype = DEV_X32; + dimm->dtype = DEV_X32; break; case 0x2: /* could be X8 too, but no way to tell */ - csrow->dtype = DEV_X16; + dimm->dtype = DEV_X16; break; case 0x3: - csrow->dtype = DEV_X4; + dimm->dtype = DEV_X4; break; default: - csrow->dtype = DEV_UNKNOWN; + dimm->dtype = DEV_UNKNOWN; break; } - csrow->edac_mode = EDAC_SECDED; + dimm->edac_mode = EDAC_SECDED; } static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 7f71ee436744..4e53270bc336 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -135,11 +135,13 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, enum edac_type edac_mode) { struct csrow_info *csrow; + struct dimm_info *dimm; u32 rankcfg; int index; for (index = 0; index < mci->nr_csrows; index++) { csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; pci_read_config_dword(pdev, MCDRAM_RANKCFG + (index * 12), @@ -177,10 +179,10 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, csrow->last_page = csrow->first_page + csrow->nr_pages - 1; last_page_in_mmc += csrow->nr_pages; csrow->page_mask = 0; - csrow->grain = PASEMI_EDAC_ERROR_GRAIN; - csrow->mtype = MEM_DDR; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = edac_mode; + dimm->grain = PASEMI_EDAC_ERROR_GRAIN; + dimm->mtype = MEM_DDR; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = edac_mode; } return 0; } diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index d427c69bb8b1..a75e56788b29 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -895,7 +895,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) enum mem_type mtype; enum dev_type dtype; enum edac_type edac_mode; - int row; + int row, j; u32 mbxcf, size; static u32 ppc4xx_last_page; @@ -975,15 +975,18 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) * possible values would be the PLB width (16), the * page size (PAGE_SIZE) or the memory width (2 or 4). */ + for (j = 0; j < csi->nr_channels; j++) { + struct dimm_info *dimm = csi->channels[j].dimm; - csi->grain = 1; + dimm->grain = 1; - csi->mtype = mtype; - csi->dtype = dtype; + dimm->mtype = mtype; + dimm->dtype = dtype; - csi->edac_mode = edac_mode; + dimm->edac_mode = edac_mode; ppc4xx_last_page += csi->nr_pages; + } } done: diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 6d908ad72d64..70b0dfa81db4 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -216,6 +216,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, u8 dramcr) { struct csrow_info *csrow; + struct dimm_info *dimm; int index; u8 drbar; /* SDRAM Row Boundary Address Register */ u32 row_high_limit, row_high_limit_last; @@ -227,6 +228,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, for (index = 0; index < mci->nr_csrows; index++) { csrow = &mci->csrows[index]; + dimm = csrow->channels[0].dimm; /* find the DRAM Chip Select Base address and mask */ pci_read_config_byte(pdev, R82600_DRBA + index, &drbar); @@ -250,13 +252,13 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->nr_pages = csrow->last_page - csrow->first_page + 1; /* Error address is top 19 bits - so granularity is * * 14 bits */ - csrow->grain = 1 << 14; - csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR; + dimm->grain = 1 << 14; + dimm->mtype = reg_sdram ? MEM_RDDR : MEM_DDR; /* FIXME - check that this is unknowable with this chipset */ - csrow->dtype = DEV_UNKNOWN; + dimm->dtype = DEV_UNKNOWN; /* Mode is global on 82600 */ - csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE; + dimm->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE; row_high_limit_last = row_high_limit; } } diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 95901c21d5dc..21147ac38c4d 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -551,7 +551,7 @@ static int sbridge_get_active_channels(const u8 bus, unsigned *channels, return 0; } -static int get_dimm_config(const struct mem_ctl_info *mci) +static int get_dimm_config(struct mem_ctl_info *mci) { struct sbridge_pvt *pvt = mci->pvt_info; struct csrow_info *csr; @@ -561,6 +561,7 @@ static int get_dimm_config(const struct mem_ctl_info *mci) u32 reg; enum edac_type mode; enum mem_type mtype; + struct dimm_info *dimm; pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); pvt->sbridge_dev->source_id = SOURCE_ID(reg); @@ -612,6 +613,7 @@ static int get_dimm_config(const struct mem_ctl_info *mci) /* On all supported DDR3 DIMM types, there are 8 banks available */ banks = 8; + dimm = mci->dimms; for (i = 0; i < NUM_CHANNELS; i++) { u32 mtr; @@ -634,29 +636,30 @@ static int get_dimm_config(const struct mem_ctl_info *mci) pvt->sbridge_dev->mc, i, j, size, npages, banks, ranks, rows, cols); - csr = &mci->csrows[csrow]; + /* + * Fake stuff. This controller doesn't see + * csrows. + */ + csr = &mci->csrows[csrow]; csr->first_page = last_page; csr->last_page = last_page + npages - 1; - csr->page_mask = 0UL; /* Unused */ csr->nr_pages = npages; - csr->grain = 32; csr->csrow_idx = csrow; - csr->dtype = (banks == 8) ? DEV_X8 : DEV_X4; - csr->ce_count = 0; - csr->ue_count = 0; - csr->mtype = mtype; - csr->edac_mode = mode; csr->nr_channels = 1; csr->channels[0].chan_idx = i; - csr->channels[0].ce_count = 0; pvt->csrow_map[i][j] = csrow; - snprintf(csr->channels[0].dimm->label, - sizeof(csr->channels[0].dimm->label), - "CPU_SrcID#%u_Channel#%u_DIMM#%u", - pvt->sbridge_dev->source_id, i, j); last_page += npages; csrow++; + + csr->channels[0].dimm = dimm; + dimm->grain = 32; + dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; + dimm->mtype = mtype; + dimm->edac_mode = mode; + snprintf(dimm->label, sizeof(dimm->label), + "CPU_SrcID#%u_Channel#%u_DIMM#%u", + pvt->sbridge_dev->source_id, i, j); } } } diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index e99d00976189..c870f68ae8f1 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -84,6 +84,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) struct csrow_info *csrow = &mci->csrows[0]; struct tile_edac_priv *priv = mci->pvt_info; struct mshim_mem_info mem_info; + struct dimm_info *dimm = csrow->channels[0].dimm; if (hv_dev_pread(priv->hv_devhdl, 0, (HV_VirtAddr)&mem_info, sizeof(struct mshim_mem_info), MSHIM_MEM_INFO_OFF) != @@ -93,16 +94,16 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) } if (mem_info.mem_ecc) - csrow->edac_mode = EDAC_SECDED; + dimm->edac_mode = EDAC_SECDED; else - csrow->edac_mode = EDAC_NONE; + dimm->edac_mode = EDAC_NONE; switch (mem_info.mem_type) { case DDR2: - csrow->mtype = MEM_DDR2; + dimm->mtype = MEM_DDR2; break; case DDR3: - csrow->mtype = MEM_DDR3; + dimm->mtype = MEM_DDR3; break; default: @@ -112,8 +113,8 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) csrow->first_page = 0; csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; csrow->last_page = csrow->first_page + csrow->nr_pages - 1; - csrow->grain = TILE_EDAC_ERROR_GRAIN; - csrow->dtype = DEV_UNKNOWN; + dimm->grain = TILE_EDAC_ERROR_GRAIN; + dimm->dtype = DEV_UNKNOWN; return 0; } diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index a438297389e5..f7cc4d214949 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -317,7 +317,7 @@ static unsigned long drb_to_nr_pages( static int x38_probe1(struct pci_dev *pdev, int dev_idx) { int rc; - int i; + int i, j; struct mem_ctl_info *mci = NULL; unsigned long last_page; u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL]; @@ -372,20 +372,21 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) i / X38_RANKS_PER_CHANNEL, i % X38_RANKS_PER_CHANNEL); - if (nr_pages == 0) { - csrow->mtype = MEM_EMPTY; + if (nr_pages == 0) continue; - } csrow->first_page = last_page + 1; last_page += nr_pages; csrow->last_page = last_page; csrow->nr_pages = nr_pages; - csrow->grain = nr_pages << PAGE_SHIFT; - csrow->mtype = MEM_DDR2; - csrow->dtype = DEV_UNKNOWN; - csrow->edac_mode = EDAC_UNKNOWN; + for (j = 0; j < x38_channel_num; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; + dimm->grain = nr_pages << PAGE_SHIFT; + dimm->mtype = MEM_DDR2; + dimm->dtype = DEV_UNKNOWN; + dimm->edac_mode = EDAC_UNKNOWN; + } } x38_clear_error_info(mci); -- cgit v1.2.2 From 5e2af0c09e60d11dd8297e259a9ca2b3d92d2cf4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 27 Jan 2012 21:20:32 -0300 Subject: edac: Don't initialize csrow's first_page & friends when not needed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Almost all edac drivers initialize csrow_info->first_page, csrow_info->last_page and csrow_info->page_mask. Those vars are used inside the EDAC core, in order to calculate the csrow affected by an error, by using the routine edac_mc_find_csrow_by_page(). However, very few drivers actually use it: e752x_edac.c e7xxx_edac.c i3000_edac.c i82443bxgx_edac.c i82860_edac.c i82875p_edac.c i82975x_edac.c r82600_edac.c There also a few other drivers that have their own calculus formula internally using those vars. All the others are just wasting time by initializing those data. While initializing data without using them won't cause any troubles, as those information is stored at the wrong place (at csrows structure), it is better to remove what is unused, in order to simplify the next patch. Reviewed-by: Aristeu Rozanski Acked-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Hitoshi Mitake Cc: Andrew Morton Cc: "Niklas Söderlund" Cc: Josh Boyer Cc: Jiri Kosina Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 37 ++----------------------------------- drivers/edac/i3200_edac.c | 5 ----- drivers/edac/i5000_edac.c | 5 ----- drivers/edac/i5100_edac.c | 2 -- drivers/edac/i5400_edac.c | 5 ----- drivers/edac/i7300_edac.c | 5 +---- drivers/edac/i7core_edac.c | 5 ----- drivers/edac/mv64x60_edac.c | 1 - drivers/edac/ppc4xx_edac.c | 7 ------- drivers/edac/sb_edac.c | 2 -- drivers/edac/tile_edac.c | 2 -- drivers/edac/x38_edac.c | 5 ----- 12 files changed, 3 insertions(+), 78 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 8126db0c8987..e2c5a94f683c 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -715,25 +715,6 @@ static inline u64 input_addr_to_sys_addr(struct mem_ctl_info *mci, input_addr_to_dram_addr(mci, input_addr)); } -/* - * Find the minimum and maximum InputAddr values that map to the given @csrow. - * Pass back these values in *input_addr_min and *input_addr_max. - */ -static void find_csrow_limits(struct mem_ctl_info *mci, int csrow, - u64 *input_addr_min, u64 *input_addr_max) -{ - struct amd64_pvt *pvt; - u64 base, mask; - - pvt = mci->pvt_info; - BUG_ON((csrow < 0) || (csrow >= pvt->csels[0].b_cnt)); - - get_cs_base_and_mask(pvt, csrow, 0, &base, &mask); - - *input_addr_min = base & ~mask; - *input_addr_max = base | mask; -} - /* Map the Error address to a PAGE and PAGE OFFSET. */ static inline void error_address_to_page_and_offset(u64 error_address, u32 *page, u32 *offset) @@ -2185,7 +2166,7 @@ static int init_csrows(struct mem_ctl_info *mci) { struct csrow_info *csrow; struct amd64_pvt *pvt = mci->pvt_info; - u64 input_addr_min, input_addr_max, sys_addr, base, mask; + u64 base, mask; u32 val; int i, j, empty = 1; enum mem_type mtype; @@ -2216,28 +2197,14 @@ static int init_csrows(struct mem_ctl_info *mci) csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); if (csrow_enabled(i, 1, pvt)) csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i); - find_csrow_limits(mci, i, &input_addr_min, &input_addr_max); - sys_addr = input_addr_to_sys_addr(mci, input_addr_min); - csrow->first_page = (u32) (sys_addr >> PAGE_SHIFT); - sys_addr = input_addr_to_sys_addr(mci, input_addr_max); - csrow->last_page = (u32) (sys_addr >> PAGE_SHIFT); get_cs_base_and_mask(pvt, i, 0, &base, &mask); - csrow->page_mask = ~mask; /* 8 bytes of resolution */ mtype = amd64_determine_memory_type(pvt, i); debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); - debugf1(" input_addr_min: 0x%lx input_addr_max: 0x%lx\n", - (unsigned long)input_addr_min, - (unsigned long)input_addr_max); - debugf1(" sys_addr: 0x%lx page_mask: 0x%lx\n", - (unsigned long)sys_addr, csrow->page_mask); - debugf1(" nr_pages: %u first_page: 0x%lx " - "last_page: 0x%lx\n", - (unsigned)csrow->nr_pages, - csrow->first_page, csrow->last_page); + debugf1(" nr_pages: %u\n", csrow->nr_pages); /* * determine whether CHIPKILL or JUST ECC or NO ECC is operating diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 6ae30176aef5..93c4d5a6a623 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -321,7 +321,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_page; u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -366,7 +365,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) * cumulative; the last one will contain the total memory * contained in all ranks. */ - last_page = -1UL; for (i = 0; i < mci->nr_csrows; i++) { unsigned long nr_pages; struct csrow_info *csrow = &mci->csrows[i]; @@ -378,9 +376,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->first_page = last_page + 1; - last_page += nr_pages; - csrow->last_page = last_page; csrow->nr_pages = nr_pages; for (j = 0; j < nr_channels; j++) { diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 95966ba9c5ca..26b40556958e 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1263,11 +1263,6 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) continue; - /* FAKE OUT VALUES, FIXME */ - p_csrow->first_page = 0 + csrow * 20; - p_csrow->last_page = 9 + csrow * 20; - p_csrow->page_mask = 0xFFF; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 6c0dafa3f67b..5338c7968f78 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -859,8 +859,6 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) * FIXME: these two are totally bogus -- I don't see how to * map them correctly to this structure... */ - mci->csrows[i].first_page = total_pages; - mci->csrows[i].last_page = total_pages + npages - 1; mci->csrows[i].nr_pages = npages; mci->csrows[i].csrow_idx = i; mci->csrows[i].mci = mci; diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index c2379ba95c5a..6f85dcb34019 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1180,11 +1180,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - /* FAKE OUT VALUES, FIXME */ - p_csrow->first_page = 0 + csrow * 20; - p_csrow->last_page = 9 + csrow * 20; - p_csrow->page_mask = 0xFFF; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index 4bfcb3da3f01..d4153d6cfe30 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -778,7 +778,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) int rc = -ENODEV; int mtr; int ch, branch, slot, channel; - u32 last_page = 0, nr_pages; + u32 nr_pages; struct dimm_info *dimm; pvt = mci->pvt_info; @@ -828,9 +828,6 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) /* Update per_csrow memory count */ p_csrow->nr_pages += nr_pages; - p_csrow->first_page = last_page; - last_page += nr_pages; - p_csrow->last_page = last_page; rc = 0; } diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 5449bd40a739..76c957c525fb 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -599,7 +599,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) struct pci_dev *pdev; int i, j; int csrow = 0; - unsigned long last_page = 0; enum edac_type mode; enum mem_type mtype; struct dimm_info *dimm; @@ -716,12 +715,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) npages = MiB_TO_PAGES(size); csr = &mci->csrows[csrow]; - csr->first_page = last_page + 1; - last_page += npages; - csr->last_page = last_page; csr->nr_pages = npages; - csr->page_mask = 0; csr->csrow_idx = csrow; csr->nr_channels = 1; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 12d7fe04454c..d2e3c39ede9f 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -668,7 +668,6 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, csrow = &mci->csrows[0]; dimm = csrow->channels[0].dimm; csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; dimm->grain = 8; dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index a75e56788b29..ec5e529e33f6 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -897,7 +897,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) enum edac_type edac_mode; int row, j; u32 mbxcf, size; - static u32 ppc4xx_last_page; /* Establish the memory type and width */ @@ -959,10 +958,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) goto done; } - csi->first_page = ppc4xx_last_page; - csi->last_page = csi->first_page + csi->nr_pages - 1; - csi->page_mask = 0; - /* * It's unclear exactly what grain should be set to * here. The SDRAM_ECCES register allows resolution of @@ -984,8 +979,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) dimm->dtype = dtype; dimm->edac_mode = edac_mode; - - ppc4xx_last_page += csi->nr_pages; } } diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 21147ac38c4d..d5892c052bf4 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -642,8 +642,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) * csrows. */ csr = &mci->csrows[csrow]; - csr->first_page = last_page; - csr->last_page = last_page + npages - 1; csr->nr_pages = npages; csr->csrow_idx = csrow; csr->nr_channels = 1; diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index c870f68ae8f1..54067c4b0cc1 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -110,9 +110,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) return -1; } - csrow->first_page = 0; csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; dimm->grain = TILE_EDAC_ERROR_GRAIN; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index f7cc4d214949..bc7f880a4eed 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -319,7 +319,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_page; u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -363,7 +362,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) * cumulative; the last one will contain the total memory * contained in all ranks. */ - last_page = -1UL; for (i = 0; i < mci->nr_csrows; i++) { unsigned long nr_pages; struct csrow_info *csrow = &mci->csrows[i]; @@ -375,9 +373,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->first_page = last_page + 1; - last_page += nr_pages; - csrow->last_page = last_page; csrow->nr_pages = nr_pages; for (j = 0; j < x38_channel_num; j++) { -- cgit v1.2.2 From a895bf8b1e1ea4c032a8fa8a09475a2ce09fe77a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 28 Jan 2012 09:09:38 -0300 Subject: edac: move nr_pages to dimm struct MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The number of pages is a dimm property. Move it to the dimm struct. After this change, it is possible to add sysfs nodes for the DIMM's that will properly represent the DIMM stick properties, including its size. A TODO fix here is to properly represent dual-rank/quad-rank DIMMs when the memory controller represents the memory via chip select rows. Reviewed-by: Aristeu Rozanski Acked-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Mark Gross Cc: Jason Uhlenkott Cc: Tim Small Cc: Ranganathan Desikan Cc: "Arvind R." Cc: Olof Johansson Cc: Egor Martovetsky Cc: Michal Marek Cc: Jiri Kosina Cc: Joe Perches Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Hitoshi Mitake Cc: Andrew Morton Cc: "Niklas Söderlund" Cc: Shaohui Xie Cc: Josh Boyer Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 10 +++++---- drivers/edac/amd76x_edac.c | 6 +++--- drivers/edac/cell_edac.c | 8 ++++--- drivers/edac/cpc925_edac.c | 8 ++++--- drivers/edac/e752x_edac.c | 6 ++++-- drivers/edac/e7xxx_edac.c | 5 +++-- drivers/edac/edac_mc.c | 16 ++++++++------ drivers/edac/edac_mc_sysfs.c | 47 +++++++++++++++++++++++++++++------------- drivers/edac/i3000_edac.c | 6 ++++-- drivers/edac/i3200_edac.c | 3 +-- drivers/edac/i5000_edac.c | 14 +++++++------ drivers/edac/i5100_edac.c | 22 ++++++++++++-------- drivers/edac/i5400_edac.c | 9 +++----- drivers/edac/i7300_edac.c | 22 ++++++-------------- drivers/edac/i7core_edac.c | 10 +++------ drivers/edac/i82443bxgx_edac.c | 2 +- drivers/edac/i82860_edac.c | 2 +- drivers/edac/i82875p_edac.c | 5 +++-- drivers/edac/i82975x_edac.c | 11 +++++++--- drivers/edac/mpc85xx_edac.c | 3 ++- drivers/edac/mv64x60_edac.c | 3 ++- drivers/edac/pasemi_edac.c | 14 ++++++------- drivers/edac/ppc4xx_edac.c | 5 +++-- drivers/edac/r82600_edac.c | 3 ++- drivers/edac/sb_edac.c | 8 ++----- drivers/edac/tile_edac.c | 2 +- drivers/edac/x38_edac.c | 4 ++-- 27 files changed, 141 insertions(+), 113 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index e2c5a94f683c..1ceb8e276376 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2152,7 +2152,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr) nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT); debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode); - debugf0(" nr_pages= %u channel-count = %d\n", + debugf0(" nr_pages/channel= %u channel-count = %d\n", nr_pages, pvt->channel_count); return nr_pages; @@ -2171,6 +2171,7 @@ static int init_csrows(struct mem_ctl_info *mci) int i, j, empty = 1; enum mem_type mtype; enum edac_type edac_mode; + int nr_pages = 0; amd64_read_pci_cfg(pvt->F3, NBCFG, &val); @@ -2194,9 +2195,9 @@ static int init_csrows(struct mem_ctl_info *mci) empty = 0; if (csrow_enabled(i, 0, pvt)) - csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); + nr_pages = amd64_csrow_nr_pages(pvt, 0, i); if (csrow_enabled(i, 1, pvt)) - csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i); + nr_pages += amd64_csrow_nr_pages(pvt, 1, i); get_cs_base_and_mask(pvt, i, 0, &base, &mask); /* 8 bytes of resolution */ @@ -2204,7 +2205,7 @@ static int init_csrows(struct mem_ctl_info *mci) mtype = amd64_determine_memory_type(pvt, i); debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); - debugf1(" nr_pages: %u\n", csrow->nr_pages); + debugf1(" nr_pages: %u\n", nr_pages * pvt->channel_count); /* * determine whether CHIPKILL or JUST ECC or NO ECC is operating @@ -2218,6 +2219,7 @@ static int init_csrows(struct mem_ctl_info *mci) for (j = 0; j < pvt->channel_count; j++) { csrow->channels[j].dimm->mtype = mtype; csrow->channels[j].dimm->edac_mode = edac_mode; + csrow->channels[j].dimm->nr_pages = nr_pages; } } diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index fcfe359f7be5..a2dde205f651 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -205,10 +205,10 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL; pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms); csrow->first_page = mba_base >> PAGE_SHIFT; - csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + dimm->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + dimm->nr_pages - 1; csrow->page_mask = mba_mask >> PAGE_SHIFT; - dimm->grain = csrow->nr_pages << PAGE_SHIFT; + dimm->grain = dimm->nr_pages << PAGE_SHIFT; dimm->mtype = MEM_RDDR; dimm->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; dimm->edac_mode = edac_mode; diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 94fbb127215a..09e1b5d3df70 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -128,6 +128,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) struct cell_edac_priv *priv = mci->pvt_info; struct device_node *np; int j; + u32 nr_pages; for (np = NULL; (np = of_find_node_by_name(np, "memory")) != NULL;) { @@ -142,19 +143,20 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) if (of_node_to_nid(np) != priv->node) continue; csrow->first_page = r.start >> PAGE_SHIFT; - csrow->nr_pages = resource_size(&r) >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + nr_pages = resource_size(&r) >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + nr_pages - 1; for (j = 0; j < csrow->nr_channels; j++) { dimm = csrow->channels[j].dimm; dimm->mtype = MEM_XDR; dimm->edac_mode = EDAC_SECDED; + dimm->nr_pages = nr_pages / csrow->nr_channels; } dev_dbg(mci->dev, "Initialized on node %d, chanmask=0x%x," " first_page=0x%lx, nr_pages=0x%x\n", priv->node, priv->chanmask, - csrow->first_page, csrow->nr_pages); + csrow->first_page, dimm->nr_pages); break; } } diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index ee90f3da8f3a..7b764a882dae 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -332,7 +332,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) struct dimm_info *dimm; int index, j; u32 mbmr, mbbar, bba; - unsigned long row_size, last_nr_pages = 0; + unsigned long row_size, nr_pages, last_nr_pages = 0; get_total_mem(pdata); @@ -351,12 +351,14 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) row_size = bba * (1UL << 28); /* 256M */ csrow->first_page = last_nr_pages; - csrow->nr_pages = row_size >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + nr_pages = row_size >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + nr_pages - 1; last_nr_pages = csrow->last_page + 1; for (j = 0; j < csrow->nr_channels; j++) { dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / csrow->nr_channels; dimm->mtype = MEM_RDDR; dimm->edac_mode = EDAC_SECDED; diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 6cf6ec6bc71e..cf17579ebc6d 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1044,7 +1044,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ u8 value; - u32 dra, drc, cumul_size, i; + u32 dra, drc, cumul_size, i, nr_pages; dra = 0; for (index = 0; index < 4; index++) { @@ -1078,11 +1078,13 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (i = 0; i < drc_chan + 1; i++) { struct dimm_info *dimm = csrow->channels[i].dimm; + + dimm->nr_pages = nr_pages / (drc_chan + 1); dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ dimm->mtype = MEM_RDDR; /* only one type supported */ dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 5ed97f6eb346..709aca216639 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -349,7 +349,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, unsigned long last_cumul_size; int index, j; u8 value; - u32 dra, cumul_size; + u32 dra, cumul_size, nr_pages; int drc_chan, drc_drbg, drc_ddim, mem_dev; struct csrow_info *csrow; struct dimm_info *dimm; @@ -380,12 +380,13 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < drc_chan + 1; j++) { dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / (drc_chan + 1); dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ dimm->mtype = MEM_RDDR; /* only one type supported */ dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 0942efad55c1..072aa81b4a70 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -43,9 +43,10 @@ static void edac_mc_dump_channel(struct rank_info *chan) { debugf4("\tchannel = %p\n", chan); debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); - debugf4("\tchannel->ce_count = %d\n", chan->dimm->ce_count); - debugf4("\tchannel->label = '%s'\n", chan->dimm->label); debugf4("\tchannel->csrow = %p\n\n", chan->csrow); + debugf4("\tdimm->ce_count = %d\n", chan->dimm->ce_count); + debugf4("\tdimm->label = '%s'\n", chan->dimm->label); + debugf4("\tdimm->nr_pages = 0x%x\n", chan->dimm->nr_pages); } static void edac_mc_dump_csrow(struct csrow_info *csrow) @@ -55,7 +56,6 @@ static void edac_mc_dump_csrow(struct csrow_info *csrow) debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page); debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); - debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels); debugf4("\tcsrow->channels = %p\n", csrow->channels); debugf4("\tcsrow->mci = %p\n\n", csrow->mci); @@ -652,15 +652,19 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset, int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) { struct csrow_info *csrows = mci->csrows; - int row, i; + int row, i, j, n; debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); row = -1; for (i = 0; i < mci->nr_csrows; i++) { struct csrow_info *csrow = &csrows[i]; - - if (csrow->nr_pages == 0) + n = 0; + for (j = 0; j < csrow->nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; + n += dimm->nr_pages; + } + if (n == 0) continue; debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 487e03eeed26..1dc1c6ca4308 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -144,7 +144,13 @@ static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private) { - return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages)); + int i; + u32 nr_pages = 0; + + for (i = 0; i < csrow->nr_channels; i++) + nr_pages += csrow->channels[i].dimm->nr_pages; + + return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); } static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, @@ -519,16 +525,16 @@ static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) { - int total_pages, csrow_idx; + int total_pages = 0, csrow_idx, j; - for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; - csrow_idx++) { + for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { struct csrow_info *csrow = &mci->csrows[csrow_idx]; - if (!csrow->nr_pages) - continue; + for (j = 0; j < csrow->nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; - total_pages += csrow->nr_pages; + total_pages += dimm->nr_pages; + } } return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); @@ -900,7 +906,7 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci, */ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) { - int i; + int i, j; int err; struct csrow_info *csrow; struct kobject *kobj_mci = &mci->edac_mci_kobj; @@ -934,10 +940,13 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) /* Make directories for each CSROW object under the mc kobject */ for (i = 0; i < mci->nr_csrows; i++) { + int nr_pages = 0; + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; - /* Only expose populated CSROWs */ - if (csrow->nr_pages > 0) { + if (nr_pages > 0) { err = edac_create_csrow_object(mci, csrow, i); if (err) { debugf1("%s() failure: create csrow %d obj\n", @@ -949,10 +958,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) return 0; - /* CSROW error: backout what has already been registered, */ fail1: for (i--; i >= 0; i--) { - if (mci->csrows[i].nr_pages > 0) + int nr_pages = 0; + + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; + if (nr_pages > 0) kobject_put(&mci->csrows[i].kobj); } @@ -972,14 +985,20 @@ fail0: */ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) { - int i; + struct csrow_info *csrow; + int i, j; debugf0("%s()\n", __func__); /* remove all csrow kobjects */ debugf4("%s() unregister this mci kobj\n", __func__); for (i = 0; i < mci->nr_csrows; i++) { - if (mci->csrows[i].nr_pages > 0) { + int nr_pages = 0; + + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; + if (nr_pages > 0) { debugf0("%s() unreg csrow-%d\n", __func__, i); kobject_put(&mci->csrows[i].kobj); } diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 8fe60ee37826..719ccbed7435 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -306,7 +306,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_cumul_size; + unsigned long last_cumul_size, nr_pages; int interleaved, nr_channels; unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS]; unsigned char *c0dra = dra, *c1dra = &dra[I3000_RANKS_PER_CHANNEL / 2]; @@ -391,11 +391,13 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < nr_channels; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / nr_channels; dimm->grain = I3000_DEAP_GRAIN; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 93c4d5a6a623..3b3622209f3e 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -376,11 +376,10 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->nr_pages = nr_pages; - for (j = 0; j < nr_channels; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / nr_channels; dimm->grain = nr_pages << PAGE_SHIFT; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 26b40556958e..f3a1a3e1e4e1 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1236,6 +1236,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) { struct i5000_pvt *pvt; struct csrow_info *p_csrow; + struct dimm_info *dimm; int empty, channel_count; int max_csrows; int mtr, mtr1; @@ -1265,21 +1266,22 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { + dimm = p_csrow->channels[channel].dimm; csrow_megs += pvt->dimm_info[csrow][channel].megabytes; - p_csrow->channels[channel].dimm->grain = 8; + dimm->grain = 8; /* Assume DDR2 for now */ - p_csrow->channels[channel].dimm->mtype = MEM_FB_DDR2; + dimm->mtype = MEM_FB_DDR2; /* ask what device type on this row */ if (MTR_DRAM_WIDTH(mtr)) - p_csrow->channels[channel].dimm->dtype = DEV_X8; + dimm->dtype = DEV_X8; else - p_csrow->channels[channel].dimm->dtype = DEV_X4; + dimm->dtype = DEV_X4; - p_csrow->channels[channel].dimm->edac_mode = EDAC_S8ECD8ED; + dimm->edac_mode = EDAC_S8ECD8ED; + dimm->nr_pages = (csrow_megs << 8) / pvt->maxch; } - p_csrow->nr_pages = csrow_megs << 8; empty = 0; } diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 5338c7968f78..c08e94064ef6 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -859,7 +859,6 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) * FIXME: these two are totally bogus -- I don't see how to * map them correctly to this structure... */ - mci->csrows[i].nr_pages = npages; mci->csrows[i].csrow_idx = i; mci->csrows[i].mci = mci; mci->csrows[i].nr_channels = 1; @@ -867,14 +866,19 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) total_pages += npages; dimm = mci->csrows[i].channels[0].dimm; - dimm->grain = 32; - dimm->dtype = (priv->mtr[chan][rank].width == 4) ? - DEV_X4 : DEV_X8; - dimm->mtype = MEM_RDDR2; - dimm->edac_mode = EDAC_SECDED; - snprintf(dimm->label, sizeof(dimm->label), - "DIMM%u", - i5100_rank_to_slot(mci, chan, rank)); + dimm->nr_pages = npages; + if (npages) { + total_pages += npages; + + dimm->grain = 32; + dimm->dtype = (priv->mtr[chan][rank].width == 4) ? + DEV_X4 : DEV_X8; + dimm->mtype = MEM_RDDR2; + dimm->edac_mode = EDAC_SECDED; + snprintf(dimm->label, sizeof(dimm->label), + "DIMM%u", + i5100_rank_to_slot(mci, chan, rank)); + } } } diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 6f85dcb34019..6543f4a8367b 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1156,7 +1156,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) int empty, channel_count; int max_csrows; int mtr; - int csrow_megs; + int size_mb; int channel; int csrow; struct dimm_info *dimm; @@ -1171,8 +1171,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) for (csrow = 0; csrow < max_csrows; csrow++) { p_csrow = &mci->csrows[csrow]; - p_csrow->csrow_idx = csrow; - /* use branch 0 for the basis */ mtr = determine_mtr(pvt, csrow, 0); @@ -1180,12 +1178,11 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { - csrow_megs += pvt->dimm_info[csrow][channel].megabytes; + size_mb = pvt->dimm_info[csrow][channel].megabytes; - p_csrow->nr_pages = csrow_megs << 8; dimm = p_csrow->channels[channel].dimm; + dimm->nr_pages = size_mb << 8; dimm->grain = 8; dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; dimm->mtype = MEM_RDDR2; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index d4153d6cfe30..d6f3a2d0f70a 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -617,9 +617,7 @@ static void i7300_enable_error_reporting(struct mem_ctl_info *mci) static int decode_mtr(struct i7300_pvt *pvt, int slot, int ch, int branch, struct i7300_dimm_info *dinfo, - struct csrow_info *p_csrow, - struct dimm_info *dimm, - u32 *nr_pages) + struct dimm_info *dimm) { int mtr, ans, addrBits, channel; @@ -651,7 +649,6 @@ static int decode_mtr(struct i7300_pvt *pvt, addrBits -= 3; /* 8 bits per bytes */ dinfo->megabytes = 1 << addrBits; - *nr_pages = dinfo->megabytes << 8; debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); @@ -664,8 +661,6 @@ static int decode_mtr(struct i7300_pvt *pvt, debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); - p_csrow->csrow_idx = slot; - /* * The type of error detection actually depends of the * mode of operation. When it is just one single memory chip, at @@ -675,6 +670,7 @@ static int decode_mtr(struct i7300_pvt *pvt, * See datasheet Sections 7.3.6 to 7.3.8 */ + dimm->nr_pages = MiB_TO_PAGES(dinfo->megabytes); dimm->grain = 8; dimm->mtype = MEM_FB_DDR2; if (IS_SINGLE_MODE(pvt->mc_settings_a)) { @@ -774,11 +770,9 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) { struct i7300_pvt *pvt; struct i7300_dimm_info *dinfo; - struct csrow_info *p_csrow; int rc = -ENODEV; int mtr; int ch, branch, slot, channel; - u32 nr_pages; struct dimm_info *dimm; pvt = mci->pvt_info; @@ -804,7 +798,6 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) } /* Get the set of MTR[0-7] regs by each branch */ - nr_pages = 0; for (slot = 0; slot < MAX_SLOTS; slot++) { int where = mtr_regs[slot]; for (branch = 0; branch < MAX_BRANCHES; branch++) { @@ -815,21 +808,18 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) int channel = to_channel(ch, branch); dinfo = &pvt->dimm_info[slot][channel]; - p_csrow = &mci->csrows[slot]; - dimm = p_csrow->channels[branch * MAX_CH_PER_BRANCH + ch].dimm; + dimm = mci->csrows[slot].channels[branch * MAX_CH_PER_BRANCH + ch].dimm; mtr = decode_mtr(pvt, slot, ch, branch, - dinfo, p_csrow, dimm, - &nr_pages); + dinfo, dimm); + /* if no DIMMS on this row, continue */ if (!MTR_DIMMS_PRESENT(mtr)) continue; - /* Update per_csrow memory count */ - p_csrow->nr_pages += nr_pages; - rc = 0; + } } } diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 76c957c525fb..0e3cc34bcc22 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -715,17 +715,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) npages = MiB_TO_PAGES(size); csr = &mci->csrows[csrow]; - csr->nr_pages = npages; - - csr->csrow_idx = csrow; - csr->nr_channels = 1; - - csr->channels[0].chan_idx = i; - csr->channels[0].ce_count = 0; pvt->csrow_map[i][j] = csrow; dimm = csr->channels[0].dimm; + dimm->nr_pages = npages; + switch (banks) { case 4: dimm->dtype = DEV_X4; @@ -746,6 +741,7 @@ static int get_dimm_config(struct mem_ctl_info *mci) dimm->grain = 8; dimm->edac_mode = mode; dimm->mtype = mtype; + csrow++; } pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 0b98dd3408b9..02b252acd999 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -220,7 +220,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, row_base = row_high_limit_last; csrow->first_page = row_base >> PAGE_SHIFT; csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; - csrow->nr_pages = csrow->last_page - csrow->first_page + 1; + dimm->nr_pages = csrow->last_page - csrow->first_page + 1; /* EAP reports in 4kilobyte granularity [61] */ dimm->grain = 1 << 12; dimm->mtype = mtype; diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 3eb77845cfca..8485bbf4379f 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -167,7 +167,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + dimm->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; dimm->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ dimm->mtype = MEM_RMBS; diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index eac574285da8..e16281b41f3b 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -347,7 +347,7 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, unsigned long last_cumul_size; u8 value; u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ - u32 cumul_size; + u32 cumul_size, nr_pages; int index, j; drc_ddim = (drc >> 18) & 0x1; @@ -371,12 +371,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < nr_chans; j++) { dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / nr_chans; dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ dimm->mtype = MEM_DDR; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index b8ec8719e2f5..014a9483fccc 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -370,7 +370,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, struct csrow_info *csrow; unsigned long last_cumul_size; u8 value; - u32 cumul_size; + u32 cumul_size, nr_pages; int index, chan; struct dimm_info *dimm; enum dev_type dtype; @@ -402,6 +402,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, cumul_size); + nr_pages = cumul_size - last_cumul_size; /* * Initialise dram labels * index values: @@ -411,6 +412,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, dtype = i82975x_dram_type(mch_window, index); for (chan = 0; chan < csrow->nr_channels; chan++) { dimm = mci->csrows[index].channels[chan].dimm; + + if (!nr_pages) + continue; + + dimm->nr_pages = nr_pages / csrow->nr_channels; strncpy(csrow->channels[chan].dimm->label, labels[(index >> 1) + (chan * 2)], EDAC_MC_LABEL_LEN); @@ -420,12 +426,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, dimm->edac_mode = EDAC_SECDED; /* only supported */ } - if (cumul_size == last_cumul_size) + if (!nr_pages) continue; /* not populated */ csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; } } diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index fb92916d0872..c1d9e158972c 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -947,7 +947,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) csrow->first_page = start; csrow->last_page = end; - csrow->nr_pages = end + 1 - start; + + dimm->nr_pages = end + 1 - start; dimm->grain = 8; dimm->mtype = mtype; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index d2e3c39ede9f..281e24528599 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -667,7 +667,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, csrow = &mci->csrows[0]; dimm = csrow->channels[0].dimm; - csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; + + dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT; dimm->grain = 8; dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 4e53270bc336..3fcefda653fd 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -153,20 +153,20 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> MCDRAM_RANKCFG_TYPE_SIZE_S) { case 0: - csrow->nr_pages = 128 << (20 - PAGE_SHIFT); + dimm->nr_pages = 128 << (20 - PAGE_SHIFT); break; case 1: - csrow->nr_pages = 256 << (20 - PAGE_SHIFT); + dimm->nr_pages = 256 << (20 - PAGE_SHIFT); break; case 2: case 3: - csrow->nr_pages = 512 << (20 - PAGE_SHIFT); + dimm->nr_pages = 512 << (20 - PAGE_SHIFT); break; case 4: - csrow->nr_pages = 1024 << (20 - PAGE_SHIFT); + dimm->nr_pages = 1024 << (20 - PAGE_SHIFT); break; case 5: - csrow->nr_pages = 2048 << (20 - PAGE_SHIFT); + dimm->nr_pages = 2048 << (20 - PAGE_SHIFT); break; default: edac_mc_printk(mci, KERN_ERR, @@ -176,8 +176,8 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, } csrow->first_page = last_page_in_mmc; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; - last_page_in_mmc += csrow->nr_pages; + csrow->last_page = csrow->first_page + dimm->nr_pages - 1; + last_page_in_mmc += dimm->nr_pages; csrow->page_mask = 0; dimm->grain = PASEMI_EDAC_ERROR_GRAIN; dimm->mtype = MEM_DDR; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index ec5e529e33f6..95cfc0f8d46d 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -896,7 +896,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) enum dev_type dtype; enum edac_type edac_mode; int row, j; - u32 mbxcf, size; + u32 mbxcf, size, nr_pages; /* Establish the memory type and width */ @@ -947,7 +947,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) case SDRAM_MBCF_SZ_2GB: case SDRAM_MBCF_SZ_4GB: case SDRAM_MBCF_SZ_8GB: - csi->nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); + nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); break; default: ppc4xx_edac_mc_printk(KERN_ERR, mci, @@ -973,6 +973,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) for (j = 0; j < csi->nr_channels; j++) { struct dimm_info *dimm = csi->channels[j].dimm; + dimm->nr_pages = nr_pages / csi->nr_channels; dimm->grain = 1; dimm->mtype = mtype; diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 70b0dfa81db4..c41b375e1f38 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -249,7 +249,8 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = row_base >> PAGE_SHIFT; csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; - csrow->nr_pages = csrow->last_page - csrow->first_page + 1; + + dimm->nr_pages = csrow->last_page - csrow->first_page + 1; /* Error address is top 19 bits - so granularity is * * 14 bits */ dimm->grain = 1 << 14; diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index d5892c052bf4..2ce9bf5e354b 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -561,7 +561,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) u32 reg; enum edac_type mode; enum mem_type mtype; - struct dimm_info *dimm; pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); pvt->sbridge_dev->source_id = SOURCE_ID(reg); @@ -613,11 +612,11 @@ static int get_dimm_config(struct mem_ctl_info *mci) /* On all supported DDR3 DIMM types, there are 8 banks available */ banks = 8; - dimm = mci->dimms; for (i = 0; i < NUM_CHANNELS; i++) { u32 mtr; for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { + struct dimm_info *dimm = &mci->dimms[j]; pci_read_config_dword(pvt->pci_tad[i], mtr_regs[j], &mtr); debugf4("Channel #%d MTR%d = %x\n", i, j, mtr); @@ -642,15 +641,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) * csrows. */ csr = &mci->csrows[csrow]; - csr->nr_pages = npages; - csr->csrow_idx = csrow; - csr->nr_channels = 1; - csr->channels[0].chan_idx = i; pvt->csrow_map[i][j] = csrow; last_page += npages; csrow++; csr->channels[0].dimm = dimm; + dimm->nr_pages = npages; dimm->grain = 32; dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; dimm->mtype = mtype; diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index 54067c4b0cc1..054c9bb3a5dc 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -110,7 +110,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) return -1; } - csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; + dimm->nr_pages = mem_info.mem_size >> PAGE_SHIFT; dimm->grain = TILE_EDAC_ERROR_GRAIN; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index bc7f880a4eed..e3247997aa00 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -373,10 +373,10 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->nr_pages = nr_pages; - for (j = 0; j < x38_channel_num; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / x38_channel_num; dimm->grain = nr_pages << PAGE_SHIFT; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; -- cgit v1.2.2 From 93e4fe64ece4eccf0ff4ac69bceb389290b8ab7c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 10:18:12 -0300 Subject: edac: rewrite edac_align_ptr() The edac_align_ptr() function is used to prepare data for a single memory allocation kzalloc() call. It counts how many bytes are needed by some data structure. Using it as-is is not that trivial, as the quantity of memory elements reserved is not there, but, instead, it is on a next call. In order to avoid mistakes when using it, move the number of allocated elements into it, making easier to use it. Reviewed-by: Borislav Petkov Cc: Aristeu Rozanski Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/edac_device.c | 27 +++++++++++---------------- drivers/edac/edac_mc.c | 44 +++++++++++++++++++++++++++++++++----------- drivers/edac/edac_module.h | 2 +- drivers/edac/edac_pci.c | 6 +++--- 4 files changed, 48 insertions(+), 31 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c index 4b154593343a..cb397d9437d1 100644 --- a/drivers/edac/edac_device.c +++ b/drivers/edac/edac_device.c @@ -79,7 +79,7 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info( unsigned total_size; unsigned count; unsigned instance, block, attr; - void *pvt; + void *pvt, *p; int err; debugf4("%s() instances=%d blocks=%d\n", @@ -92,35 +92,30 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info( * to be at least as stringent as what the compiler would * provide if we could simply hardcode everything into a single struct. */ - dev_ctl = (struct edac_device_ctl_info *)NULL; + p = NULL; + dev_ctl = edac_align_ptr(&p, sizeof(*dev_ctl), 1); /* Calc the 'end' offset past end of ONE ctl_info structure * which will become the start of the 'instance' array */ - dev_inst = edac_align_ptr(&dev_ctl[1], sizeof(*dev_inst)); + dev_inst = edac_align_ptr(&p, sizeof(*dev_inst), nr_instances); /* Calc the 'end' offset past the instance array within the ctl_info * which will become the start of the block array */ - dev_blk = edac_align_ptr(&dev_inst[nr_instances], sizeof(*dev_blk)); + count = nr_instances * nr_blocks; + dev_blk = edac_align_ptr(&p, sizeof(*dev_blk), count); /* Calc the 'end' offset past the dev_blk array * which will become the start of the attrib array, if any. */ - count = nr_instances * nr_blocks; - dev_attrib = edac_align_ptr(&dev_blk[count], sizeof(*dev_attrib)); - - /* Check for case of when an attribute array is specified */ - if (nr_attrib > 0) { - /* calc how many nr_attrib we need */ + /* calc how many nr_attrib we need */ + if (nr_attrib > 0) count *= nr_attrib; + dev_attrib = edac_align_ptr(&p, sizeof(*dev_attrib), count); - /* Calc the 'end' offset past the attributes array */ - pvt = edac_align_ptr(&dev_attrib[count], sz_private); - } else { - /* no attribute array specificed */ - pvt = edac_align_ptr(dev_attrib, sz_private); - } + /* Calc the 'end' offset past the attributes array */ + pvt = edac_align_ptr(&p, sz_private, 1); /* 'pvt' now points to where the private data area is. * At this point 'pvt' (like dev_inst,dev_blk and dev_attrib) diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 072aa81b4a70..ff8c0020649c 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -101,18 +101,37 @@ const char *edac_mem_types[] = { }; EXPORT_SYMBOL_GPL(edac_mem_types); -/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'. - * Adjust 'ptr' so that its alignment is at least as stringent as what the - * compiler would provide for X and return the aligned result. +/** + * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation + * @p: pointer to a pointer with the memory offset to be used. At + * return, this will be incremented to point to the next offset + * @size: Size of the data structure to be reserved + * @n_elems: Number of elements that should be reserved * * If 'size' is a constant, the compiler will optimize this whole function - * down to either a no-op or the addition of a constant to the value of 'ptr'. + * down to either a no-op or the addition of a constant to the value of '*p'. + * + * The 'p' pointer is absolutely needed to keep the proper advancing + * further in memory to the proper offsets when allocating the struct along + * with its embedded structs, as edac_device_alloc_ctl_info() does it + * above, for example. + * + * At return, the pointer 'p' will be incremented to be used on a next call + * to this function. */ -void *edac_align_ptr(void *ptr, unsigned size) +void *edac_align_ptr(void **p, unsigned size, int n_elems) { unsigned align, r; + void *ptr = *p; - /* Here we assume that the alignment of a "long long" is the most + *p += size * n_elems; + + /* + * 'p' can possibly be an unaligned item X such that sizeof(X) is + * 'size'. Adjust 'p' so that its alignment is at least as + * stringent as what the compiler would provide for X and return + * the aligned result. + * Here we assume that the alignment of a "long long" is the most * stringent alignment that the compiler will ever provide by default. * As far as I know, this is a reasonable assumption. */ @@ -132,6 +151,8 @@ void *edac_align_ptr(void *ptr, unsigned size) if (r == 0) return (char *)ptr; + *p += align - r; + return (void *)(((unsigned long)ptr) + align - r); } @@ -154,6 +175,7 @@ void *edac_align_ptr(void *ptr, unsigned size) struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, unsigned nr_chans, int edac_index) { + void *ptr = NULL; struct mem_ctl_info *mci; struct csrow_info *csi, *csrow; struct rank_info *chi, *chp, *chan; @@ -168,11 +190,11 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, * stringent as what the compiler would provide if we could simply * hardcode everything into a single struct. */ - mci = (struct mem_ctl_info *)0; - csi = edac_align_ptr(&mci[1], sizeof(*csi)); - chi = edac_align_ptr(&csi[nr_csrows], sizeof(*chi)); - dimm = edac_align_ptr(&chi[nr_chans * nr_csrows], sizeof(*dimm)); - pvt = edac_align_ptr(&dimm[nr_chans * nr_csrows], sz_pvt); + mci = edac_align_ptr(&ptr, sizeof(*mci), 1); + csi = edac_align_ptr(&ptr, sizeof(*csi), nr_csrows); + chi = edac_align_ptr(&ptr, sizeof(*chi), nr_csrows * nr_chans); + dimm = edac_align_ptr(&ptr, sizeof(*dimm), nr_csrows * nr_chans); + pvt = edac_align_ptr(&ptr, sz_pvt, 1); size = ((unsigned long)pvt) + sz_pvt; mci = kzalloc(size, GFP_KERNEL); diff --git a/drivers/edac/edac_module.h b/drivers/edac/edac_module.h index 00f81b47a51f..0ea7d14cb930 100644 --- a/drivers/edac/edac_module.h +++ b/drivers/edac/edac_module.h @@ -50,7 +50,7 @@ extern void edac_device_reset_delay_period(struct edac_device_ctl_info *edac_dev, unsigned long value); extern void edac_mc_reset_delay_period(int value); -extern void *edac_align_ptr(void *ptr, unsigned size); +extern void *edac_align_ptr(void **p, unsigned size, int n_elems); /* * EDAC PCI functions diff --git a/drivers/edac/edac_pci.c b/drivers/edac/edac_pci.c index 63af1c5673d1..f1ac86649886 100644 --- a/drivers/edac/edac_pci.c +++ b/drivers/edac/edac_pci.c @@ -42,13 +42,13 @@ struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, const char *edac_pci_name) { struct edac_pci_ctl_info *pci; - void *pvt; + void *p = NULL, *pvt; unsigned int size; debugf1("%s()\n", __func__); - pci = (struct edac_pci_ctl_info *)0; - pvt = edac_align_ptr(&pci[1], sz_pvt); + pci = edac_align_ptr(&p, sizeof(*pci), 1); + pvt = edac_align_ptr(&p, 1, sz_pvt); size = ((unsigned long)pvt) + sz_pvt; /* Alloc the needed control struct memory */ -- cgit v1.2.2 From 4275be63559719c3149b19751029f1b0f1b26775 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 18 Apr 2012 15:20:50 -0300 Subject: edac: Change internal representation to work with layers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change the EDAC internal representation to work with non-csrow based memory controllers. There are lots of those memory controllers nowadays, and more are coming. So, the EDAC internal representation needs to be changed, in order to work with those memory controllers, while preserving backward compatibility with the old ones. The edac core was written with the idea that memory controllers are able to directly access csrows. This is not true for FB-DIMM and RAMBUS memory controllers. Also, some recent advanced memory controllers don't present a per-csrows view. Instead, they view memories as DIMMs, instead of ranks. So, change the allocation and error report routines to allow them to work with all types of architectures. This will allow the removal of several hacks with FB-DIMM and RAMBUS memory controllers. Also, several tests were done on different platforms using different x86 drivers. TODO: a multi-rank DIMMs are currently represented by multiple DIMM entries in struct dimm_info. That means that changing a label for one rank won't change the same label for the other ranks at the same DIMM. This bug is present since the beginning of the EDAC, so it is not a big deal. However, on several drivers, it is possible to fix this issue, but it should be a per-driver fix, as the csrow => DIMM arrangement may not be equal for all. So, don't try to fix it here yet. I tried to make this patch as short as possible, preceding it with several other patches that simplified the logic here. Yet, as the internal API changes, all drivers need changes. The changes are generally bigger in the drivers for FB-DIMMs. Cc: Aristeu Rozanski Cc: Doug Thompson Cc: Borislav Petkov Cc: Mark Gross Cc: Jason Uhlenkott Cc: Tim Small Cc: Ranganathan Desikan Cc: "Arvind R." Cc: Olof Johansson Cc: Egor Martovetsky Cc: Chris Metcalf Cc: Michal Marek Cc: Jiri Kosina Cc: Joe Perches Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Hitoshi Mitake Cc: Andrew Morton Cc: "Niklas Söderlund" Cc: Shaohui Xie Cc: Josh Boyer Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/edac_core.h | 99 +++++-- drivers/edac/edac_mc.c | 702 ++++++++++++++++++++++++++++++----------------- 2 files changed, 527 insertions(+), 274 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h index e48ab3108ad8..1286c5e1bdc0 100644 --- a/drivers/edac/edac_core.h +++ b/drivers/edac/edac_core.h @@ -447,8 +447,12 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset, #endif /* CONFIG_PCI */ -extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int edac_index); +struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, + unsigned nr_chans, int edac_index); +struct mem_ctl_info *new_edac_mc_alloc(unsigned edac_index, + unsigned n_layers, + struct edac_mc_layer *layers, + unsigned sz_pvt); extern int edac_mc_add_mc(struct mem_ctl_info *mci); extern void edac_mc_free(struct mem_ctl_info *mci); extern struct mem_ctl_info *edac_mc_find(int idx); @@ -467,24 +471,78 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, * reporting logic and function interface - reduces conditional * statement clutter and extra function arguments. */ -extern void edac_mc_handle_ce(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, - unsigned long syndrome, int row, int channel, - const char *msg); -extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, - const char *msg); -extern void edac_mc_handle_ue(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, int row, - const char *msg); -extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, - const char *msg); -extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, unsigned int csrow, - unsigned int channel0, unsigned int channel1, - char *msg); -extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow, - unsigned int channel, char *msg); + +void edac_mc_handle_error(const enum hw_event_mc_err_type type, + struct mem_ctl_info *mci, + const unsigned long page_frame_number, + const unsigned long offset_in_page, + const unsigned long syndrome, + const int layer0, + const int layer1, + const int layer2, + const char *msg, + const char *other_detail, + const void *mcelog); + +static inline void edac_mc_handle_ce(struct mem_ctl_info *mci, + unsigned long page_frame_number, + unsigned long offset_in_page, + unsigned long syndrome, int row, int channel, + const char *msg) +{ + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page_frame_number, offset_in_page, syndrome, + row, channel, -1, msg, NULL, NULL); +} + +static inline void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, + const char *msg) +{ + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, 0, -1, -1, -1, msg, NULL, NULL); +} + +static inline void edac_mc_handle_ue(struct mem_ctl_info *mci, + unsigned long page_frame_number, + unsigned long offset_in_page, int row, + const char *msg) +{ + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page_frame_number, offset_in_page, 0, + row, -1, -1, msg, NULL, NULL); +} + +static inline void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, + const char *msg) +{ + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, 0, -1, -1, -1, msg, NULL, NULL); +} + +static inline void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, + unsigned int csrow, + unsigned int channel0, + unsigned int channel1, + char *msg) +{ + /* + *FIXME: The error can also be at channel1 (e. g. at the second + * channel of the same branch). The fix is to push + * edac_mc_handle_error() call into each driver + */ + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, 0, + csrow, channel0, -1, msg, NULL, NULL); +} + +static inline void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, + unsigned int csrow, + unsigned int channel, char *msg) +{ + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, 0, + csrow, channel, -1, msg, NULL, NULL); +} /* * edac_device APIs @@ -496,6 +554,7 @@ extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev, extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg); extern int edac_device_alloc_index(void); +extern const char *edac_layer_name[]; /* * edac_pci APIs diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index ff8c0020649c..1bd237ee4ca7 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -44,9 +44,25 @@ static void edac_mc_dump_channel(struct rank_info *chan) debugf4("\tchannel = %p\n", chan); debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); debugf4("\tchannel->csrow = %p\n\n", chan->csrow); - debugf4("\tdimm->ce_count = %d\n", chan->dimm->ce_count); - debugf4("\tdimm->label = '%s'\n", chan->dimm->label); - debugf4("\tdimm->nr_pages = 0x%x\n", chan->dimm->nr_pages); + debugf4("\tchannel->dimm = %p\n", chan->dimm); +} + +static void edac_mc_dump_dimm(struct dimm_info *dimm) +{ + int i; + + debugf4("\tdimm = %p\n", dimm); + debugf4("\tdimm->label = '%s'\n", dimm->label); + debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages); + debugf4("\tdimm location "); + for (i = 0; i < dimm->mci->n_layers; i++) { + printk(KERN_CONT "%d", dimm->location[i]); + if (i < dimm->mci->n_layers - 1) + printk(KERN_CONT "."); + } + printk(KERN_CONT "\n"); + debugf4("\tdimm->grain = %d\n", dimm->grain); + debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages); } static void edac_mc_dump_csrow(struct csrow_info *csrow) @@ -70,6 +86,8 @@ static void edac_mc_dump_mci(struct mem_ctl_info *mci) debugf4("\tmci->edac_check = %p\n", mci->edac_check); debugf3("\tmci->nr_csrows = %d, csrows = %p\n", mci->nr_csrows, mci->csrows); + debugf3("\tmci->nr_dimms = %d, dimms = %p\n", + mci->tot_dimms, mci->dimms); debugf3("\tdev = %p\n", mci->dev); debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name); debugf3("\tpvt_info = %p\n\n", mci->pvt_info); @@ -157,10 +175,12 @@ void *edac_align_ptr(void **p, unsigned size, int n_elems) } /** - * edac_mc_alloc: Allocate a struct mem_ctl_info structure - * @size_pvt: size of private storage needed - * @nr_csrows: Number of CWROWS needed for this MC - * @nr_chans: Number of channels for the MC + * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure + * @mc_num: Memory controller number + * @n_layers: Number of MC hierarchy layers + * layers: Describes each layer as seen by the Memory Controller + * @size_pvt: size of private storage needed + * * * Everything is kmalloc'ed as one big chunk - more efficient. * Only can be used if all structures have the same lifetime - otherwise @@ -168,22 +188,49 @@ void *edac_align_ptr(void **p, unsigned size, int n_elems) * * Use edac_mc_free() to free mc structures allocated by this function. * + * NOTE: drivers handle multi-rank memories in different ways: in some + * drivers, one multi-rank memory stick is mapped as one entry, while, in + * others, a single multi-rank memory stick would be mapped into several + * entries. Currently, this function will allocate multiple struct dimm_info + * on such scenarios, as grouping the multiple ranks require drivers change. + * * Returns: * NULL allocation failed * struct mem_ctl_info pointer */ -struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int edac_index) +struct mem_ctl_info *new_edac_mc_alloc(unsigned mc_num, + unsigned n_layers, + struct edac_mc_layer *layers, + unsigned sz_pvt) { - void *ptr = NULL; struct mem_ctl_info *mci; - struct csrow_info *csi, *csrow; + struct edac_mc_layer *layer; + struct csrow_info *csi, *csr; struct rank_info *chi, *chp, *chan; struct dimm_info *dimm; - void *pvt; - unsigned size; - int row, chn; - int err; + u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS]; + unsigned pos[EDAC_MAX_LAYERS]; + void *pvt, *ptr = NULL; + unsigned size, tot_dimms = 1, count = 1; + unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0; + int i, j, err, row, chn; + bool per_rank = false; + + BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0); + /* + * Calculate the total amount of dimms and csrows/cschannels while + * in the old API emulation mode + */ + for (i = 0; i < n_layers; i++) { + tot_dimms *= layers[i].size; + if (layers[i].is_virt_csrow) + tot_csrows *= layers[i].size; + else + tot_channels *= layers[i].size; + + if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT) + per_rank = true; + } /* Figure out the offsets of the various items from the start of an mc * structure. We want the alignment of each item to be at least as @@ -191,12 +238,27 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, * hardcode everything into a single struct. */ mci = edac_align_ptr(&ptr, sizeof(*mci), 1); - csi = edac_align_ptr(&ptr, sizeof(*csi), nr_csrows); - chi = edac_align_ptr(&ptr, sizeof(*chi), nr_csrows * nr_chans); - dimm = edac_align_ptr(&ptr, sizeof(*dimm), nr_csrows * nr_chans); + layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers); + csi = edac_align_ptr(&ptr, sizeof(*csi), tot_csrows); + chi = edac_align_ptr(&ptr, sizeof(*chi), tot_csrows * tot_channels); + dimm = edac_align_ptr(&ptr, sizeof(*dimm), tot_dimms); + for (i = 0; i < n_layers; i++) { + count *= layers[i].size; + debugf4("%s: errcount layer %d size %d\n", __func__, i, count); + ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count); + ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count); + tot_errcount += 2 * count; + } + + debugf4("%s: allocating %d error counters\n", __func__, tot_errcount); pvt = edac_align_ptr(&ptr, sz_pvt, 1); size = ((unsigned long)pvt) + sz_pvt; + debugf1("%s(): allocating %u bytes for mci data (%d %s, %d csrows/channels)\n", + __func__, size, + tot_dimms, + per_rank ? "ranks" : "dimms", + tot_csrows * tot_channels); mci = kzalloc(size, GFP_KERNEL); if (mci == NULL) return NULL; @@ -204,42 +266,87 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, /* Adjust pointers so they point within the memory we just allocated * rather than an imaginary chunk of memory located at address 0. */ + layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer)); csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi)); chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi)); dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm)); + for (i = 0; i < n_layers; i++) { + mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i])); + mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i])); + } pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL; /* setup index and various internal pointers */ - mci->mc_idx = edac_index; + mci->mc_idx = mc_num; mci->csrows = csi; mci->dimms = dimm; + mci->tot_dimms = tot_dimms; mci->pvt_info = pvt; - mci->nr_csrows = nr_csrows; + mci->n_layers = n_layers; + mci->layers = layer; + memcpy(mci->layers, layers, sizeof(*layer) * n_layers); + mci->nr_csrows = tot_csrows; + mci->num_cschannel = tot_channels; + mci->mem_is_per_rank = per_rank; /* - * For now, assumes that a per-csrow arrangement for dimms. - * This will be latter changed. + * Fill the csrow struct */ - dimm = mci->dimms; - - for (row = 0; row < nr_csrows; row++) { - csrow = &csi[row]; - csrow->csrow_idx = row; - csrow->mci = mci; - csrow->nr_channels = nr_chans; - chp = &chi[row * nr_chans]; - csrow->channels = chp; - - for (chn = 0; chn < nr_chans; chn++) { + for (row = 0; row < tot_csrows; row++) { + csr = &csi[row]; + csr->csrow_idx = row; + csr->mci = mci; + csr->nr_channels = tot_channels; + chp = &chi[row * tot_channels]; + csr->channels = chp; + + for (chn = 0; chn < tot_channels; chn++) { chan = &chp[chn]; chan->chan_idx = chn; - chan->csrow = csrow; + chan->csrow = csr; + } + } + + /* + * Fill the dimm struct + */ + memset(&pos, 0, sizeof(pos)); + row = 0; + chn = 0; + debugf4("%s: initializing %d %s\n", __func__, tot_dimms, + per_rank ? "ranks" : "dimms"); + for (i = 0; i < tot_dimms; i++) { + chan = &csi[row].channels[chn]; + dimm = EDAC_DIMM_PTR(layer, mci->dimms, n_layers, + pos[0], pos[1], pos[2]); + dimm->mci = mci; + + debugf2("%s: %d: %s%zd (%d:%d:%d): row %d, chan %d\n", __func__, + i, per_rank ? "rank" : "dimm", (dimm - mci->dimms), + pos[0], pos[1], pos[2], row, chn); + + /* Copy DIMM location */ + for (j = 0; j < n_layers; j++) + dimm->location[j] = pos[j]; + + /* Link it to the csrows old API data */ + chan->dimm = dimm; + dimm->csrow = row; + dimm->cschannel = chn; + + /* Increment csrow location */ + row++; + if (row == tot_csrows) { + row = 0; + chn++; + } - mci->csrows[row].channels[chn].dimm = dimm; - dimm->csrow = row; - dimm->csrow_channel = chn; - dimm++; - mci->nr_dimms++; + /* Increment dimm location */ + for (j = n_layers - 1; j >= 0; j--) { + pos[j]++; + if (pos[j] < layers[j].size) + break; + pos[j] = 0; } } @@ -263,6 +370,46 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, */ return mci; } +EXPORT_SYMBOL_GPL(new_edac_mc_alloc); + +/** + * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure + * @mc_num: Memory controller number + * @n_layers: Number of layers at the MC hierarchy + * layers: Describes each layer as seen by the Memory Controller + * @size_pvt: Size of private storage needed + * + * + * FIXME: drivers handle multi-rank memories in different ways: some + * drivers map multi-ranked DIMMs as one DIMM while others + * as several DIMMs. + * + * Everything is kmalloc'ed as one big chunk - more efficient. + * It can only be used if all structures have the same lifetime - otherwise + * you have to allocate and initialize your own structures. + * + * Use edac_mc_free() to free mc structures allocated by this function. + * + * Returns: + * On failure: NULL + * On success: struct mem_ctl_info pointer + */ + +struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, + unsigned nr_chans, int mc_num) +{ + unsigned n_layers = 2; + struct edac_mc_layer layers[n_layers]; + + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = nr_csrows; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = nr_chans; + layers[1].is_virt_csrow = false; + + return new_edac_mc_alloc(mc_num, ARRAY_SIZE(layers), layers, sz_pvt); +} EXPORT_SYMBOL_GPL(edac_mc_alloc); /** @@ -528,7 +675,6 @@ EXPORT_SYMBOL(edac_mc_find); * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and * create sysfs entries associated with mci structure * @mci: pointer to the mci structure to be added to the list - * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure. * * Return: * 0 Success @@ -555,6 +701,8 @@ int edac_mc_add_mc(struct mem_ctl_info *mci) edac_mc_dump_channel(&mci->csrows[i]. channels[j]); } + for (i = 0; i < mci->tot_dimms; i++) + edac_mc_dump_dimm(&mci->dimms[i]); } #endif mutex_lock(&mem_ctls_mutex); @@ -712,261 +860,307 @@ int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) } EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page); -/* FIXME - setable log (warning/emerg) levels */ -/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */ -void edac_mc_handle_ce(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, unsigned long syndrome, - int row, int channel, const char *msg) +const char *edac_layer_name[] = { + [EDAC_MC_LAYER_BRANCH] = "branch", + [EDAC_MC_LAYER_CHANNEL] = "channel", + [EDAC_MC_LAYER_SLOT] = "slot", + [EDAC_MC_LAYER_CHIP_SELECT] = "csrow", +}; +EXPORT_SYMBOL_GPL(edac_layer_name); + +static void edac_inc_ce_error(struct mem_ctl_info *mci, + bool enable_per_layer_report, + const int pos[EDAC_MAX_LAYERS]) { - unsigned long remapped_page; - char *label = NULL; - u32 grain; + int i, index = 0; - debugf3("MC%d: %s()\n", mci->mc_idx, __func__); + mci->ce_count++; - /* FIXME - maybe make panic on INTERNAL ERROR an option */ - if (row >= mci->nr_csrows || row < 0) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: row out of range " - "(%d >= %d)\n", row, mci->nr_csrows); - edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); + if (!enable_per_layer_report) { + mci->ce_noinfo_count++; return; } - if (channel >= mci->csrows[row].nr_channels || channel < 0) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: channel out of range " - "(%d >= %d)\n", channel, - mci->csrows[row].nr_channels); - edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); + for (i = 0; i < mci->n_layers; i++) { + if (pos[i] < 0) + break; + index += pos[i]; + mci->ce_per_layer[i][index]++; + + if (i < mci->n_layers - 1) + index *= mci->layers[i + 1].size; + } +} + +static void edac_inc_ue_error(struct mem_ctl_info *mci, + bool enable_per_layer_report, + const int pos[EDAC_MAX_LAYERS]) +{ + int i, index = 0; + + mci->ue_count++; + + if (!enable_per_layer_report) { + mci->ce_noinfo_count++; return; } - label = mci->csrows[row].channels[channel].dimm->label; - grain = mci->csrows[row].channels[channel].dimm->grain; + for (i = 0; i < mci->n_layers; i++) { + if (pos[i] < 0) + break; + index += pos[i]; + mci->ue_per_layer[i][index]++; - if (edac_mc_get_log_ce()) - /* FIXME - put in DIMM location */ - edac_mc_printk(mci, KERN_WARNING, - "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " - "0x%lx, row %d, channel %d, label \"%s\": %s\n", - page_frame_number, offset_in_page, - grain, syndrome, row, channel, - label, msg); + if (i < mci->n_layers - 1) + index *= mci->layers[i + 1].size; + } +} - mci->ce_count++; - mci->csrows[row].ce_count++; - mci->csrows[row].channels[channel].dimm->ce_count++; - mci->csrows[row].channels[channel].ce_count++; +static void edac_ce_error(struct mem_ctl_info *mci, + const int pos[EDAC_MAX_LAYERS], + const char *msg, + const char *location, + const char *label, + const char *detail, + const char *other_detail, + const bool enable_per_layer_report, + const unsigned long page_frame_number, + const unsigned long offset_in_page, + u32 grain) +{ + unsigned long remapped_page; + + if (edac_mc_get_log_ce()) { + if (other_detail && *other_detail) + edac_mc_printk(mci, KERN_WARNING, + "CE %s on %s (%s%s - %s)\n", + msg, label, location, + detail, other_detail); + else + edac_mc_printk(mci, KERN_WARNING, + "CE %s on %s (%s%s)\n", + msg, label, location, + detail); + } + edac_inc_ce_error(mci, enable_per_layer_report, pos); if (mci->scrub_mode & SCRUB_SW_SRC) { /* - * Some MC's can remap memory so that it is still available - * at a different address when PCI devices map into memory. - * MC's that can't do this lose the memory where PCI devices - * are mapped. This mapping is MC dependent and so we call - * back into the MC driver for it to map the MC page to - * a physical (CPU) page which can then be mapped to a virtual - * page - which can then be scrubbed. - */ + * Some memory controllers (called MCs below) can remap + * memory so that it is still available at a different + * address when PCI devices map into memory. + * MC's that can't do this, lose the memory where PCI + * devices are mapped. This mapping is MC-dependent + * and so we call back into the MC driver for it to + * map the MC page to a physical (CPU) page which can + * then be mapped to a virtual page - which can then + * be scrubbed. + */ remapped_page = mci->ctl_page_to_phys ? mci->ctl_page_to_phys(mci, page_frame_number) : page_frame_number; - edac_mc_scrub_block(remapped_page, offset_in_page, grain); + edac_mc_scrub_block(remapped_page, + offset_in_page, grain); } } -EXPORT_SYMBOL_GPL(edac_mc_handle_ce); -void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg) +static void edac_ue_error(struct mem_ctl_info *mci, + const int pos[EDAC_MAX_LAYERS], + const char *msg, + const char *location, + const char *label, + const char *detail, + const char *other_detail, + const bool enable_per_layer_report) { - if (edac_mc_get_log_ce()) - edac_mc_printk(mci, KERN_WARNING, - "CE - no information available: %s\n", msg); + if (edac_mc_get_log_ue()) { + if (other_detail && *other_detail) + edac_mc_printk(mci, KERN_WARNING, + "UE %s on %s (%s%s - %s)\n", + msg, label, location, detail, + other_detail); + else + edac_mc_printk(mci, KERN_WARNING, + "UE %s on %s (%s%s)\n", + msg, label, location, detail); + } - mci->ce_noinfo_count++; - mci->ce_count++; + if (edac_mc_get_panic_on_ue()) { + if (other_detail && *other_detail) + panic("UE %s on %s (%s%s - %s)\n", + msg, label, location, detail, other_detail); + else + panic("UE %s on %s (%s%s)\n", + msg, label, location, detail); + } + + edac_inc_ue_error(mci, enable_per_layer_report, pos); } -EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info); -void edac_mc_handle_ue(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, int row, const char *msg) +#define OTHER_LABEL " or " +void edac_mc_handle_error(const enum hw_event_mc_err_type type, + struct mem_ctl_info *mci, + const unsigned long page_frame_number, + const unsigned long offset_in_page, + const unsigned long syndrome, + const int layer0, + const int layer1, + const int layer2, + const char *msg, + const char *other_detail, + const void *mcelog) { - int len = EDAC_MC_LABEL_LEN * 4; - char labels[len + 1]; - char *pos = labels; - int chan; - int chars; - char *label = NULL; + /* FIXME: too much for stack: move it to some pre-alocated area */ + char detail[80], location[80]; + char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms]; + char *p; + int row = -1, chan = -1; + int pos[EDAC_MAX_LAYERS] = { layer0, layer1, layer2 }; + int i; u32 grain; + bool enable_per_layer_report = false; debugf3("MC%d: %s()\n", mci->mc_idx, __func__); - /* FIXME - maybe make panic on INTERNAL ERROR an option */ - if (row >= mci->nr_csrows || row < 0) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: row out of range " - "(%d >= %d)\n", row, mci->nr_csrows); - edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); - return; - } - - grain = mci->csrows[row].channels[0].dimm->grain; - label = mci->csrows[row].channels[0].dimm->label; - chars = snprintf(pos, len + 1, "%s", label); - len -= chars; - pos += chars; - - for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); - chan++) { - label = mci->csrows[row].channels[chan].dimm->label; - chars = snprintf(pos, len + 1, ":%s", label); - len -= chars; - pos += chars; + /* + * Check if the event report is consistent and if the memory + * location is known. If it is known, enable_per_layer_report will be + * true, the DIMM(s) label info will be filled and the per-layer + * error counters will be incremented. + */ + for (i = 0; i < mci->n_layers; i++) { + if (pos[i] >= (int)mci->layers[i].size) { + if (type == HW_EVENT_ERR_CORRECTED) + p = "CE"; + else + p = "UE"; + + edac_mc_printk(mci, KERN_ERR, + "INTERNAL ERROR: %s value is out of range (%d >= %d)\n", + edac_layer_name[mci->layers[i].type], + pos[i], mci->layers[i].size); + /* + * Instead of just returning it, let's use what's + * known about the error. The increment routines and + * the DIMM filter logic will do the right thing by + * pointing the likely damaged DIMMs. + */ + pos[i] = -1; + } + if (pos[i] >= 0) + enable_per_layer_report = true; } - if (edac_mc_get_log_ue()) - edac_mc_printk(mci, KERN_EMERG, - "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " - "labels \"%s\": %s\n", page_frame_number, - offset_in_page, grain, row, labels, msg); - - if (edac_mc_get_panic_on_ue()) - panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, " - "row %d, labels \"%s\": %s\n", mci->mc_idx, - page_frame_number, offset_in_page, - grain, row, labels, msg); - - mci->ue_count++; - mci->csrows[row].ue_count++; -} -EXPORT_SYMBOL_GPL(edac_mc_handle_ue); - -void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg) -{ - if (edac_mc_get_panic_on_ue()) - panic("EDAC MC%d: Uncorrected Error", mci->mc_idx); + /* + * Get the dimm label/grain that applies to the match criteria. + * As the error algorithm may not be able to point to just one memory + * stick, the logic here will get all possible labels that could + * pottentially be affected by the error. + * On FB-DIMM memory controllers, for uncorrected errors, it is common + * to have only the MC channel and the MC dimm (also called "branch") + * but the channel is not known, as the memory is arranged in pairs, + * where each memory belongs to a separate channel within the same + * branch. + */ + grain = 0; + p = label; + *p = '\0'; + for (i = 0; i < mci->tot_dimms; i++) { + struct dimm_info *dimm = &mci->dimms[i]; - if (edac_mc_get_log_ue()) - edac_mc_printk(mci, KERN_WARNING, - "UE - no information available: %s\n", msg); - mci->ue_noinfo_count++; - mci->ue_count++; -} -EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); + if (layer0 >= 0 && layer0 != dimm->location[0]) + continue; + if (layer1 >= 0 && layer1 != dimm->location[1]) + continue; + if (layer2 >= 0 && layer2 != dimm->location[2]) + continue; -/************************************************************* - * On Fully Buffered DIMM modules, this help function is - * called to process UE events - */ -void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, - unsigned int csrow, - unsigned int channela, - unsigned int channelb, char *msg) -{ - int len = EDAC_MC_LABEL_LEN * 4; - char labels[len + 1]; - char *pos = labels; - int chars; - char *label; - - if (csrow >= mci->nr_csrows) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: row out of range (%d >= %d)\n", - csrow, mci->nr_csrows); - edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); - return; - } + /* get the max grain, over the error match range */ + if (dimm->grain > grain) + grain = dimm->grain; - if (channela >= mci->csrows[csrow].nr_channels) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: channel-a out of range " - "(%d >= %d)\n", - channela, mci->csrows[csrow].nr_channels); - edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); - return; + /* + * If the error is memory-controller wide, there's no need to + * seek for the affected DIMMs because the whole + * channel/memory controller/... may be affected. + * Also, don't show errors for empty DIMM slots. + */ + if (enable_per_layer_report && dimm->nr_pages) { + if (p != label) { + strcpy(p, OTHER_LABEL); + p += strlen(OTHER_LABEL); + } + strcpy(p, dimm->label); + p += strlen(p); + *p = '\0'; + + /* + * get csrow/channel of the DIMM, in order to allow + * incrementing the compat API counters + */ + debugf4("%s: %s csrows map: (%d,%d)\n", + __func__, + mci->mem_is_per_rank ? "rank" : "dimm", + dimm->csrow, dimm->cschannel); + + if (row == -1) + row = dimm->csrow; + else if (row >= 0 && row != dimm->csrow) + row = -2; + + if (chan == -1) + chan = dimm->cschannel; + else if (chan >= 0 && chan != dimm->cschannel) + chan = -2; + } } - if (channelb >= mci->csrows[csrow].nr_channels) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: channel-b out of range " - "(%d >= %d)\n", - channelb, mci->csrows[csrow].nr_channels); - edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); - return; + if (!enable_per_layer_report) { + strcpy(label, "any memory"); + } else { + debugf4("%s: csrow/channel to increment: (%d,%d)\n", + __func__, row, chan); + if (p == label) + strcpy(label, "unknown memory"); + if (type == HW_EVENT_ERR_CORRECTED) { + if (row >= 0) { + mci->csrows[row].ce_count++; + if (chan >= 0) + mci->csrows[row].channels[chan].ce_count++; + } + } else + if (row >= 0) + mci->csrows[row].ue_count++; } - mci->ue_count++; - mci->csrows[csrow].ue_count++; - - /* Generate the DIMM labels from the specified channels */ - label = mci->csrows[csrow].channels[channela].dimm->label; - chars = snprintf(pos, len + 1, "%s", label); - len -= chars; - pos += chars; - - chars = snprintf(pos, len + 1, "-%s", - mci->csrows[csrow].channels[channelb].dimm->label); - - if (edac_mc_get_log_ue()) - edac_mc_printk(mci, KERN_EMERG, - "UE row %d, channel-a= %d channel-b= %d " - "labels \"%s\": %s\n", csrow, channela, channelb, - labels, msg); - - if (edac_mc_get_panic_on_ue()) - panic("UE row %d, channel-a= %d channel-b= %d " - "labels \"%s\": %s\n", csrow, channela, - channelb, labels, msg); -} -EXPORT_SYMBOL(edac_mc_handle_fbd_ue); - -/************************************************************* - * On Fully Buffered DIMM modules, this help function is - * called to process CE events - */ -void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, - unsigned int csrow, unsigned int channel, char *msg) -{ - char *label = NULL; + /* Fill the RAM location data */ + p = location; + for (i = 0; i < mci->n_layers; i++) { + if (pos[i] < 0) + continue; - /* Ensure boundary values */ - if (csrow >= mci->nr_csrows) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: row out of range (%d >= %d)\n", - csrow, mci->nr_csrows); - edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); - return; + p += sprintf(p, "%s:%d ", + edac_layer_name[mci->layers[i].type], + pos[i]); } - if (channel >= mci->csrows[csrow].nr_channels) { - /* something is wrong */ - edac_mc_printk(mci, KERN_ERR, - "INTERNAL ERROR: channel out of range (%d >= %d)\n", - channel, mci->csrows[csrow].nr_channels); - edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); - return; - } - - label = mci->csrows[csrow].channels[channel].dimm->label; - if (edac_mc_get_log_ce()) - /* FIXME - put in DIMM location */ - edac_mc_printk(mci, KERN_WARNING, - "CE row %d, channel %d, label \"%s\": %s\n", - csrow, channel, label, msg); + /* Memory type dependent details about the error */ + if (type == HW_EVENT_ERR_CORRECTED) { + snprintf(detail, sizeof(detail), + "page:0x%lx offset:0x%lx grain:%d syndrome:0x%lx", + page_frame_number, offset_in_page, + grain, syndrome); + edac_ce_error(mci, pos, msg, location, label, detail, + other_detail, enable_per_layer_report, + page_frame_number, offset_in_page, grain); + } else { + snprintf(detail, sizeof(detail), + "page:0x%lx offset:0x%lx grain:%d", + page_frame_number, offset_in_page, grain); - mci->ce_count++; - mci->csrows[csrow].ce_count++; - mci->csrows[csrow].channels[channel].dimm->ce_count++; - mci->csrows[csrow].channels[channel].ce_count++; + edac_ue_error(mci, pos, msg, location, label, detail, + other_detail, enable_per_layer_report); + } } -EXPORT_SYMBOL(edac_mc_handle_fbd_ce); +EXPORT_SYMBOL_GPL(edac_mc_handle_error); -- cgit v1.2.2 From ab5a503cb57c1acea3b67210f46ebc2cfb28945e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:03:50 -0300 Subject: amd64_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Doug Thompson Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 137 +++++++++++++++++++++++++++++++--------------- 1 file changed, 92 insertions(+), 45 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 1ceb8e276376..c431544519b1 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1039,6 +1039,37 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, int channel, csrow; u32 page, offset; + error_address_to_page_and_offset(sys_addr, &page, &offset); + + /* + * Find out which node the error address belongs to. This may be + * different from the node that detected the error. + */ + src_mci = find_mc_by_sys_addr(mci, sys_addr); + if (!src_mci) { + amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n", + (unsigned long)sys_addr); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset, syndrome, + -1, -1, -1, + EDAC_MOD_STR, + "failed to map error addr to a node", + NULL); + return; + } + + /* Now map the sys_addr to a CSROW */ + csrow = sys_addr_to_csrow(src_mci, sys_addr); + if (csrow < 0) { + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset, syndrome, + -1, -1, -1, + EDAC_MOD_STR, + "failed to map error addr to a csrow", + NULL); + return; + } + /* CHIPKILL enabled */ if (pvt->nbcfg & NBCFG_CHIPKILL) { channel = get_channel_from_ecc_syndrome(mci, syndrome); @@ -1048,9 +1079,15 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, * 2 DIMMs is in error. So we need to ID 'both' of them * as suspect. */ - amd64_mc_warn(mci, "unknown syndrome 0x%04x - possible " - "error reporting race\n", syndrome); - edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); + amd64_mc_warn(src_mci, "unknown syndrome 0x%04x - " + "possible error reporting race\n", + syndrome); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset, syndrome, + csrow, -1, -1, + EDAC_MOD_STR, + "unknown syndrome - possible error reporting race", + NULL); return; } } else { @@ -1065,28 +1102,10 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, channel = ((sys_addr & BIT(3)) != 0); } - /* - * Find out which node the error address belongs to. This may be - * different from the node that detected the error. - */ - src_mci = find_mc_by_sys_addr(mci, sys_addr); - if (!src_mci) { - amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n", - (unsigned long)sys_addr); - edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); - return; - } - - /* Now map the sys_addr to a CSROW */ - csrow = sys_addr_to_csrow(src_mci, sys_addr); - if (csrow < 0) { - edac_mc_handle_ce_no_info(src_mci, EDAC_MOD_STR); - } else { - error_address_to_page_and_offset(sys_addr, &page, &offset); - - edac_mc_handle_ce(src_mci, page, offset, syndrome, csrow, - channel, EDAC_MOD_STR); - } + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, src_mci, + page, offset, syndrome, + csrow, channel, -1, + EDAC_MOD_STR, "", NULL); } static int ddr2_cs_size(unsigned i, bool dct_width) @@ -1592,15 +1611,20 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, u32 page, offset; int nid, csrow, chan = 0; + error_address_to_page_and_offset(sys_addr, &page, &offset); + csrow = f1x_translate_sysaddr_to_cs(pvt, sys_addr, &nid, &chan); if (csrow < 0) { - edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset, syndrome, + -1, -1, -1, + EDAC_MOD_STR, + "failed to map error addr to a csrow", + NULL); return; } - error_address_to_page_and_offset(sys_addr, &page, &offset); - /* * We need the syndromes for channel detection only when we're * ganged. Otherwise @chan should already contain the channel at @@ -1609,16 +1633,10 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, if (dct_ganging_enabled(pvt)) chan = get_channel_from_ecc_syndrome(mci, syndrome); - if (chan >= 0) - edac_mc_handle_ce(mci, page, offset, syndrome, csrow, chan, - EDAC_MOD_STR); - else - /* - * Channel unknown, report all channels on this CSROW as failed. - */ - for (chan = 0; chan < mci->csrows[csrow].nr_channels; chan++) - edac_mc_handle_ce(mci, page, offset, syndrome, - csrow, chan, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset, syndrome, + csrow, chan, -1, + EDAC_MOD_STR, "", NULL); } /* @@ -1899,7 +1917,12 @@ static void amd64_handle_ce(struct mem_ctl_info *mci, struct mce *m) /* Ensure that the Error Address is VALID */ if (!(m->status & MCI_STATUS_ADDRV)) { amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n"); - edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, 0, + -1, -1, -1, + EDAC_MOD_STR, + "HW has no ERROR_ADDRESS available", + NULL); return; } @@ -1923,11 +1946,17 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m) if (!(m->status & MCI_STATUS_ADDRV)) { amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n"); - edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, 0, + -1, -1, -1, + EDAC_MOD_STR, + "HW has no ERROR_ADDRESS available", + NULL); return; } sys_addr = get_error_address(m); + error_address_to_page_and_offset(sys_addr, &page, &offset); /* * Find out which node the error address belongs to. This may be @@ -1937,7 +1966,11 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m) if (!src_mci) { amd64_mc_err(mci, "ERROR ADDRESS (0x%lx) NOT mapped to a MC\n", (unsigned long)sys_addr); - edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, offset, 0, + -1, -1, -1, + EDAC_MOD_STR, + "ERROR ADDRESS NOT mapped to a MC", NULL); return; } @@ -1947,10 +1980,17 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m) if (csrow < 0) { amd64_mc_err(mci, "ERROR_ADDRESS (0x%lx) NOT mapped to CS\n", (unsigned long)sys_addr); - edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, offset, 0, + -1, -1, -1, + EDAC_MOD_STR, + "ERROR ADDRESS NOT mapped to CS", + NULL); } else { - error_address_to_page_and_offset(sys_addr, &page, &offset); - edac_mc_handle_ue(log_mci, page, offset, csrow, EDAC_MOD_STR); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, offset, 0, + csrow, -1, -1, + EDAC_MOD_STR, "", NULL); } } @@ -2515,6 +2555,7 @@ static int amd64_init_one_instance(struct pci_dev *F2) struct amd64_pvt *pvt = NULL; struct amd64_family_type *fam_type = NULL; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; int err = 0, ret; u8 nid = get_node_id(F2); @@ -2549,7 +2590,13 @@ static int amd64_init_one_instance(struct pci_dev *F2) goto err_siblings; ret = -ENOMEM; - mci = edac_mc_alloc(0, pvt->csels[0].b_cnt, pvt->channel_count, nid); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = pvt->csels[0].b_cnt; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = pvt->channel_count; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); if (!mci) goto err_siblings; -- cgit v1.2.2 From d8c34af4d064c14686839119bd161628264c2819 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:05:27 -0300 Subject: amd76x_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Michal Marek Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd76x_edac.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index a2dde205f651..69f2b2ebb263 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -29,7 +29,6 @@ edac_mc_chipset_printk(mci, level, "amd76x", fmt, ##arg) #define AMD76X_NR_CSROWS 8 -#define AMD76X_NR_CHANS 1 #define AMD76X_NR_DIMMS 4 /* AMD 76x register addresses - device 0 function 0 - PCI bridge */ @@ -146,8 +145,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, if (handle_errors) { row = (info->ecc_mode_status >> 4) & 0xf; - edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0, - row, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + mci->csrows[row].first_page, 0, 0, + row, 0, -1, + mci->ctl_name, "", NULL); } } @@ -159,8 +160,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, if (handle_errors) { row = info->ecc_mode_status & 0xf; - edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0, - 0, row, 0, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + mci->csrows[row].first_page, 0, 0, + row, 0, -1, + mci->ctl_name, "", NULL); } } @@ -232,7 +235,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) EDAC_SECDED, EDAC_SECDED }; - struct mem_ctl_info *mci = NULL; + struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; u32 ems; u32 ems_mode; struct amd76x_error_info discard; @@ -240,11 +244,17 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) debugf0("%s()\n", __func__); pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems); ems_mode = (ems >> 10) & 0x3; - mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS, 0); - if (mci == NULL) { + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = AMD76X_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = 1; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + + if (mci == NULL) return -ENOMEM; - } debugf0("%s(): mci = %p\n", __func__, mci); mci->dev = &pdev->dev; -- cgit v1.2.2 From 6458fc08b648cb71db85376abc81feba46d61ca5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:06:25 -0300 Subject: cell_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Jiri Kosina Cc: Joe Perches Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/cell_edac.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 09e1b5d3df70..14aa17492757 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -48,8 +48,9 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar) syndrome = (ar & 0x000000001fe00000ul) >> 21; /* TODO: Decoding of the error address */ - edac_mc_handle_ce(mci, csrow->first_page + pfn, offset, - syndrome, 0, chan, ""); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + csrow->first_page + pfn, offset, syndrome, + 0, chan, -1, "", "", NULL); } static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar) @@ -69,7 +70,9 @@ static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar) offset = address & ~PAGE_MASK; /* TODO: Decoding of the error address */ - edac_mc_handle_ue(mci, csrow->first_page + pfn, offset, 0, ""); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + csrow->first_page + pfn, offset, 0, + 0, chan, -1, "", "", NULL); } static void cell_edac_check(struct mem_ctl_info *mci) @@ -156,7 +159,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) "Initialized on node %d, chanmask=0x%x," " first_page=0x%lx, nr_pages=0x%x\n", priv->node, priv->chanmask, - csrow->first_page, dimm->nr_pages); + csrow->first_page, nr_pages); break; } } @@ -165,9 +168,10 @@ static int __devinit cell_edac_probe(struct platform_device *pdev) { struct cbe_mic_tm_regs __iomem *regs; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct cell_edac_priv *priv; u64 reg; - int rc, chanmask; + int rc, chanmask, num_chans; regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev->id)); if (regs == NULL) @@ -192,8 +196,16 @@ static int __devinit cell_edac_probe(struct platform_device *pdev) in_be64(®s->mic_fir)); /* Allocate & init EDAC MC data structure */ - mci = edac_mc_alloc(sizeof(struct cell_edac_priv), 1, - chanmask == 3 ? 2 : 1, pdev->id); + num_chans = chanmask == 3 ? 2 : 1; + + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = 1; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = num_chans; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + sizeof(struct cell_edac_priv)); if (mci == NULL) return -ENOMEM; priv = mci->pvt_info; -- cgit v1.2.2 From df62b1e663904e257fd5b174a9b29e6be6d0e902 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:06:50 -0300 Subject: cpc925_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Michal Marek Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/cpc925_edac.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 7b764a882dae..2d94fa91c746 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -555,13 +555,18 @@ static void cpc925_mc_check(struct mem_ctl_info *mci) if (apiexcp & CECC_EXCP_DETECTED) { cpc925_mc_printk(mci, KERN_INFO, "DRAM CECC Fault\n"); channel = cpc925_mc_find_channel(mci, syndrome); - edac_mc_handle_ce(mci, pfn, offset, syndrome, - csrow, channel, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + pfn, offset, syndrome, + csrow, channel, -1, + mci->ctl_name, "", NULL); } if (apiexcp & UECC_EXCP_DETECTED) { cpc925_mc_printk(mci, KERN_INFO, "DRAM UECC Fault\n"); - edac_mc_handle_ue(mci, pfn, offset, csrow, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + pfn, offset, 0, + csrow, -1, -1, + mci->ctl_name, "", NULL); } cpc925_mc_printk(mci, KERN_INFO, "Dump registers:\n"); @@ -933,6 +938,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev) { static int edac_mc_idx; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; void __iomem *vbase; struct cpc925_mc_pdata *pdata; struct resource *r; @@ -969,8 +975,15 @@ static int __devinit cpc925_probe(struct platform_device *pdev) } nr_channels = cpc925_mc_get_channels(vbase) + 1; - mci = edac_mc_alloc(sizeof(struct cpc925_mc_pdata), - CPC925_NR_CSROWS, nr_channels, edac_mc_idx); + + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = CPC925_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = nr_channels; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + sizeof(struct cpc925_mc_pdata)); if (!mci) { cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n"); res = -ENOMEM; -- cgit v1.2.2 From ce11ce171047f43e30a9cef8eeccada8eceb2418 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:06:59 -0300 Subject: e752x_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Mark Gross Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/e752x_edac.c | 49 ++++++++++++++++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index cf17579ebc6d..aaa3bb8893c1 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -6,6 +6,9 @@ * * See "enum e752x_chips" below for supported chipsets * + * Datasheet: + * http://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html + * * Written by Tom Zimmerman * * Contributors: @@ -350,8 +353,10 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one, channel = !(error_one & 1); /* e752x mc reads 34:6 of the DRAM linear address */ - edac_mc_handle_ce(mci, page, offset_in_page(sec1_add << 4), - sec1_syndrome, row, channel, "e752x CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offset_in_page(sec1_add << 4), sec1_syndrome, + row, channel, -1, + "e752x CE", "", NULL); } static inline void process_ce(struct mem_ctl_info *mci, u16 error_one, @@ -385,9 +390,12 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, edac_mc_find_csrow_by_page(mci, block_page); /* e752x mc reads 34:6 of the DRAM linear address */ - edac_mc_handle_ue(mci, block_page, - offset_in_page(error_2b << 4), - row, "e752x UE from Read"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + block_page, + offset_in_page(error_2b << 4), 0, + row, -1, -1, + "e752x UE from Read", "", NULL); + } if (error_one & 0x0404) { error_2b = scrb_add; @@ -401,9 +409,11 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, edac_mc_find_csrow_by_page(mci, block_page); /* e752x mc reads 34:6 of the DRAM linear address */ - edac_mc_handle_ue(mci, block_page, - offset_in_page(error_2b << 4), - row, "e752x UE from Scruber"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + block_page, + offset_in_page(error_2b << 4), 0, + row, -1, -1, + "e752x UE from Scruber", "", NULL); } } @@ -426,7 +436,9 @@ static inline void process_ue_no_info_wr(struct mem_ctl_info *mci, return; debugf3("%s()\n", __func__); - edac_mc_handle_ue_no_info(mci, "e752x UE log memory write"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, + "e752x UE log memory write", "", NULL); } static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error, @@ -1081,10 +1093,11 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; - for (i = 0; i < drc_chan + 1; i++) { + for (i = 0; i < csrow->nr_channels; i++) { struct dimm_info *dimm = csrow->channels[i].dimm; - dimm->nr_pages = nr_pages / (drc_chan + 1); + debugf3("Initializing rank at (%i,%i)\n", index, i); + dimm->nr_pages = nr_pages / csrow->nr_channels; dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ dimm->mtype = MEM_RDDR; /* only one type supported */ dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; @@ -1232,6 +1245,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) u16 pci_data; u8 stat8; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct e752x_pvt *pvt; u16 ddrcsr; int drc_chan; /* Number of channels 0=1chan,1=2chan */ @@ -1258,11 +1272,16 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) /* Dual channel = 1, Single channel = 0 */ drc_chan = dual_channel_active(ddrcsr); - mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1, 0); - - if (mci == NULL) { + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = E752X_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = drc_chan + 1; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + sizeof(*pvt)); + if (mci == NULL) return -ENOMEM; - } debugf3("%s(): init mci\n", __func__); mci->mtype_cap = MEM_FLAG_RDDR; -- cgit v1.2.2 From 30ac44068121d7059bf025ed35b27caec408791e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:07:09 -0300 Subject: e7xxx_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/e7xxx_edac.c | 37 ++++++++++++++++++++++++++++++------- 1 file changed, 30 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 709aca216639..d4cfc24b2f8d 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -10,6 +10,9 @@ * Based on work by Dan Hollis and others. * http://www.anime.net/~goemon/linux-ecc/ * + * Datasheet: + * http://www.intel.com/content/www/us/en/chipsets/e7501-chipset-memory-controller-hub-datasheet.html + * * Contributors: * Eric Biederman (Linux Networx) * Tom Zimmerman (Linux Networx) @@ -71,7 +74,7 @@ #endif /* PCI_DEVICE_ID_INTEL_7505_1_ERR */ #define E7XXX_NR_CSROWS 8 /* number of csrows */ -#define E7XXX_NR_DIMMS 8 /* FIXME - is this correct? */ +#define E7XXX_NR_DIMMS 8 /* 2 channels, 4 dimms/channel */ /* E7XXX register addresses - device 0 function 0 */ #define E7XXX_DRB 0x60 /* DRAM row boundary register (8b) */ @@ -216,13 +219,15 @@ static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info) row = edac_mc_find_csrow_by_page(mci, page); /* convert syndrome to channel */ channel = e7xxx_find_channel(syndrome); - edac_mc_handle_ce(mci, page, 0, syndrome, row, channel, "e7xxx CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, page, 0, syndrome, + row, channel, -1, "e7xxx CE", "", NULL); } static void process_ce_no_info(struct mem_ctl_info *mci) { debugf3("%s()\n", __func__); - edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1, + "e7xxx CE log register overflow", "", NULL); } static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info) @@ -236,13 +241,17 @@ static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info) /* FIXME - should use PAGE_SHIFT */ block_page = error_2b >> 6; /* convert to 4k address */ row = edac_mc_find_csrow_by_page(mci, block_page); - edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE"); + + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, block_page, 0, 0, + row, -1, -1, "e7xxx UE", "", NULL); } static void process_ue_no_info(struct mem_ctl_info *mci) { debugf3("%s()\n", __func__); - edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow"); + + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1, + "e7xxx UE log register overflow", "", NULL); } static void e7xxx_get_error_info(struct mem_ctl_info *mci, @@ -413,6 +422,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) { u16 pci_data; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; struct e7xxx_pvt *pvt = NULL; u32 drc; int drc_chan; @@ -423,8 +433,21 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) pci_read_config_dword(pdev, E7XXX_DRC, &drc); drc_chan = dual_channel_active(drc, dev_idx); - mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1, 0); - + /* + * According with the datasheet, this device has a maximum of + * 4 DIMMS per channel, either single-rank or dual-rank. So, the + * total amount of dimms is 8 (E7XXX_NR_DIMMS). + * That means that the DIMM is mapped as CSROWs, and the channel + * will map the rank. So, an error to either channel should be + * attributed to the same dimm. + */ + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = E7XXX_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = drc_chan + 1; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From 884906f197ccfa75787dd908e215fc3fab9dde39 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:00 -0300 Subject: i3000_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Jason Uhlenkott Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i3000_edac.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 719ccbed7435..195a92e1c0ae 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -245,7 +245,9 @@ static int i3000_process_error_info(struct mem_ctl_info *mci, return 1; if ((info->errsts ^ info->errsts2) & I3000_ERRSTS_BITS) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, + "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } @@ -256,10 +258,15 @@ static int i3000_process_error_info(struct mem_ctl_info *mci, row = edac_mc_find_csrow_by_page(mci, pfn); if (info->errsts & I3000_ERRSTS_UE) - edac_mc_handle_ue(mci, pfn, offset, row, "i3000 UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + pfn, offset, 0, + row, -1, -1, + "i3000 UE", "", NULL); else - edac_mc_handle_ce(mci, pfn, offset, info->derrsyn, row, - multi_chan ? channel : 0, "i3000 CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + pfn, offset, info->derrsyn, + row, multi_chan ? channel : 0, -1, + "i3000 CE", "", NULL); return 1; } @@ -306,6 +313,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; unsigned long last_cumul_size, nr_pages; int interleaved, nr_channels; unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS]; @@ -347,7 +355,14 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) */ interleaved = i3000_is_interleaved(c0dra, c1dra, c0drb, c1drb); nr_channels = interleaved ? 2 : 1; - mci = edac_mc_alloc(0, I3000_RANKS / nr_channels, nr_channels, 0); + + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = I3000_RANKS / nr_channels; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = nr_channels; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; -- cgit v1.2.2 From 95b93287c6eac639538fb0a2689d3ecc2916c0ec Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:38 -0300 Subject: i3200_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Hitoshi Mitake Cc: Borislav Petkov Cc: Andrew Morton Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i3200_edac.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 3b3622209f3e..d152662ffc66 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -23,6 +23,7 @@ #define PCI_DEVICE_ID_INTEL_3200_HB 0x29f0 +#define I3200_DIMMS 4 #define I3200_RANKS 8 #define I3200_RANKS_PER_CHANNEL 4 #define I3200_CHANNELS 2 @@ -217,21 +218,25 @@ static void i3200_process_error_info(struct mem_ctl_info *mci, return; if ((info->errsts ^ info->errsts2) & I3200_ERRSTS_BITS) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } for (channel = 0; channel < nr_channels; channel++) { log = info->eccerrlog[channel]; if (log & I3200_ECCERRLOG_UE) { - edac_mc_handle_ue(mci, 0, 0, - eccerrlog_row(channel, log), - "i3200 UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, 0, + eccerrlog_row(channel, log), + -1, -1, + "i3000 UE", "", NULL); } else if (log & I3200_ECCERRLOG_CE) { - edac_mc_handle_ce(mci, 0, 0, - eccerrlog_syndrome(log), - eccerrlog_row(channel, log), 0, - "i3200 CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, eccerrlog_syndrome(log), + eccerrlog_row(channel, log), + -1, -1, + "i3000 UE", "", NULL); } } } @@ -321,6 +326,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -335,8 +341,14 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) i3200_get_drbs(window, drbs); nr_channels = how_many_channels(pdev); - mci = edac_mc_alloc(sizeof(struct i3200_priv), I3200_RANKS, - nr_channels, 0); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = I3200_DIMMS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = nr_channels; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + sizeof(struct i3200_priv)); if (!mci) return -ENOMEM; -- cgit v1.2.2 From 702df64053e440344ccb53035cb6959f17a97151 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:46 -0300 Subject: i5000_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5000_edac.c | 60 ++++++++++++++++++++++++++++++----------------- 1 file changed, 39 insertions(+), 21 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index f3a1a3e1e4e1..fdbc57cb7287 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -533,13 +533,14 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d " - "FATAL Err=0x%x (%s))", - branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, - allErrors, specific); + "Bank=%d RAS=%d CAS=%d FATAL Err=0x%x (%s)", + bank, ras, cas, allErrors, specific); /* Call the helper to output message */ - edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); + edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0, + branch >> 1, -1, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); } /* @@ -633,13 +634,14 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " - "CAS=%d, UE Err=0x%x (%s))", - branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, - ue_errors, specific); + "Rank=%d Bank=%d RAS=%d CAS=%d, UE Err=0x%x (%s)", + rank, bank, ras, cas, ue_errors, specific); /* Call the helper to output message */ - edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + channel >> 1, -1, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); } /* Check correctable errors */ @@ -685,13 +687,16 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " + "Rank=%d Bank=%d RDWR=%s RAS=%d " "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, ce_errors, specific); /* Call the helper to output message */ - edac_mc_handle_fbd_ce(mci, rank, channel, msg); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0, + channel >> 1, channel % 2, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); } if (!misc_messages) @@ -731,11 +736,12 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "(Branch=%d Err=%#x (%s))", branch >> 1, - misc_errors, specific); + "Err=%#x (%s)", misc_errors, specific); /* Call the helper to output message */ - edac_mc_handle_fbd_ce(mci, 0, 0, msg); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0, + branch >> 1, -1, -1, + "Misc error", msg, NULL); } } @@ -1251,6 +1257,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) empty = 1; /* Assume NO memory */ + /* + * TODO: it would be better to not use csrow here, filling + * directly the dimm_info structs, based on branch, channel, dim number + */ for (csrow = 0; csrow < max_csrows; csrow++) { p_csrow = &mci->csrows[csrow]; @@ -1312,7 +1322,7 @@ static void i5000_enable_error_reporting(struct mem_ctl_info *mci) } /* - * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels) + * i5000_get_dimm_and_channel_counts(pdev, &nr_csrows, &num_channels) * * ask the device how many channels are present and how many CSROWS * as well @@ -1343,10 +1353,10 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev, static int i5000_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[3]; struct i5000_pvt *pvt; int num_channels; int num_dimms_per_channel; - int num_csrows; debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n", __FILE__, __func__, @@ -1372,13 +1382,21 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) */ i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel, &num_channels); - num_csrows = num_dimms_per_channel * 2; - debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", - __func__, num_channels, num_dimms_per_channel, num_csrows); + debugf0("MC: %s(): Number of Branches=2 Channels= %d DIMMS= %d\n", + __func__, num_channels, num_dimms_per_channel); /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); + layers[0].type = EDAC_MC_LAYER_BRANCH; + layers[0].size = 2; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = num_channels; + layers[1].is_virt_csrow = false; + layers[2].type = EDAC_MC_LAYER_SLOT; + layers[2].size = num_dimms_per_channel; + layers[2].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From d1afaa0a6e578964eeb48a3ab207072293367041 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:52 -0300 Subject: i5100_edac: convert driver to use the new edac ABI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: "Niklas Söderlund" Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5100_edac.c | 90 +++++++++++++++++++++-------------------------- 1 file changed, 40 insertions(+), 50 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index c08e94064ef6..691cd49aa169 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -14,6 +14,11 @@ * rows for each respective channel are laid out one after another, * the first half belonging to channel 0, the second half belonging * to channel 1. + * + * This driver is for DDR2 DIMMs, and it uses chip select to select among the + * several ranks. However, instead of showing memories as ranks, it outputs + * them as DIMM's. An internal table creates the association between ranks + * and DIMM's. */ #include #include @@ -410,14 +415,6 @@ static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow) return csrow / priv->ranksperchan; } -static unsigned i5100_rank_to_csrow(const struct mem_ctl_info *mci, - int chan, int rank) -{ - const struct i5100_priv *priv = mci->pvt_info; - - return chan * priv->ranksperchan + rank; -} - static void i5100_handle_ce(struct mem_ctl_info *mci, int chan, unsigned bank, @@ -427,21 +424,17 @@ static void i5100_handle_ce(struct mem_ctl_info *mci, unsigned ras, const char *msg) { - const int csrow = i5100_rank_to_csrow(mci, chan, rank); - char *label = NULL; + char detail[80]; - if (mci->csrows[csrow].channels[0].dimm) - label = mci->csrows[csrow].channels[0].dimm->label; + /* Form out message */ + snprintf(detail, sizeof(detail), + "bank %u, cas %u, ras %u\n", + bank, cas, ras); - printk(KERN_ERR - "CE chan %d, bank %u, rank %u, syndrome 0x%lx, " - "cas %u, ras %u, csrow %u, label \"%s\": %s\n", - chan, bank, rank, syndrome, cas, ras, - csrow, label, msg); - - mci->ce_count++; - mci->csrows[csrow].ce_count++; - mci->csrows[csrow].channels[0].ce_count++; + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, syndrome, + chan, rank, -1, + msg, detail, NULL); } static void i5100_handle_ue(struct mem_ctl_info *mci, @@ -453,20 +446,17 @@ static void i5100_handle_ue(struct mem_ctl_info *mci, unsigned ras, const char *msg) { - const int csrow = i5100_rank_to_csrow(mci, chan, rank); - char *label = NULL; - - if (mci->csrows[csrow].channels[0].dimm) - label = mci->csrows[csrow].channels[0].dimm->label; + char detail[80]; - printk(KERN_ERR - "UE chan %d, bank %u, rank %u, syndrome 0x%lx, " - "cas %u, ras %u, csrow %u, label \"%s\": %s\n", - chan, bank, rank, syndrome, cas, ras, - csrow, label, msg); + /* Form out message */ + snprintf(detail, sizeof(detail), + "bank %u, cas %u, ras %u\n", + bank, cas, ras); - mci->ue_count++; - mci->csrows[csrow].ue_count++; + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, syndrome, + chan, rank, -1, + msg, detail, NULL); } static void i5100_read_log(struct mem_ctl_info *mci, int chan, @@ -843,11 +833,10 @@ static void __devinit i5100_init_interleaving(struct pci_dev *pdev, static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) { int i; - unsigned long total_pages = 0UL; struct i5100_priv *priv = mci->pvt_info; - struct dimm_info *dimm; - for (i = 0; i < mci->nr_csrows; i++) { + for (i = 0; i < mci->tot_dimms; i++) { + struct dimm_info *dimm; const unsigned long npages = i5100_npages(mci, i); const unsigned chan = i5100_csrow_to_chan(mci, i); const unsigned rank = i5100_csrow_to_rank(mci, i); @@ -855,30 +844,23 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) if (!npages) continue; - /* - * FIXME: these two are totally bogus -- I don't see how to - * map them correctly to this structure... - */ - mci->csrows[i].csrow_idx = i; - mci->csrows[i].mci = mci; - mci->csrows[i].nr_channels = 1; - mci->csrows[i].channels[0].csrow = mci->csrows + i; - total_pages += npages; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + chan, rank, 0); - dimm = mci->csrows[i].channels[0].dimm; dimm->nr_pages = npages; if (npages) { - total_pages += npages; - dimm->grain = 32; dimm->dtype = (priv->mtr[chan][rank].width == 4) ? - DEV_X4 : DEV_X8; + DEV_X4 : DEV_X8; dimm->mtype = MEM_RDDR2; dimm->edac_mode = EDAC_SECDED; snprintf(dimm->label, sizeof(dimm->label), "DIMM%u", i5100_rank_to_slot(mci, chan, rank)); } + + debugf2("dimm channel %d, rank %d, size %zd\n", + chan, rank, PAGES_TO_MiB(npages)); } } @@ -887,6 +869,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev, { int rc; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct i5100_priv *priv; struct pci_dev *ch0mm, *ch1mm; int ret = 0; @@ -947,7 +930,14 @@ static int __devinit i5100_init_one(struct pci_dev *pdev, goto bail_ch1; } - mci = edac_mc_alloc(sizeof(*priv), ranksperch * 2, 1, 0); + layers[0].type = EDAC_MC_LAYER_CHANNEL; + layers[0].size = 2; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_SLOT; + layers[1].size = ranksperch; + layers[1].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + sizeof(*priv)); if (!mci) { ret = -ENOMEM; goto bail_disable_ch1; -- cgit v1.2.2 From 296da591ea1d81b8d94d6e79b6c235bb820526b9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:58 -0300 Subject: i5400_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5400_edac.c | 217 +++++++++++++++++++++++++--------------------- 1 file changed, 119 insertions(+), 98 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 6543f4a8367b..508f369b1f6c 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -18,6 +18,10 @@ * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet * http://developer.intel.com/design/chipsets/datashts/313070.htm * + * This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each with + * 2 channels operating in lockstep no-mirror mode. Each channel can have up to + * 4 dimm's, each with up to 8GB. + * */ #include @@ -44,12 +48,10 @@ edac_mc_chipset_printk(mci, level, "i5400", fmt, ##arg) /* Limits for i5400 */ -#define NUM_MTRS_PER_BRANCH 4 +#define MAX_BRANCHES 2 #define CHANNELS_PER_BRANCH 2 -#define MAX_DIMMS_PER_CHANNEL NUM_MTRS_PER_BRANCH -#define MAX_CHANNELS 4 -/* max possible csrows per channel */ -#define MAX_CSROWS (MAX_DIMMS_PER_CHANNEL) +#define DIMMS_PER_CHANNEL 4 +#define MAX_CHANNELS (MAX_BRANCHES * CHANNELS_PER_BRANCH) /* Device 16, * Function 0: System Address @@ -347,16 +349,16 @@ struct i5400_pvt { u16 mir0, mir1; - u16 b0_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */ + u16 b0_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */ u16 b0_ambpresent0; /* Branch 0, Channel 0 */ u16 b0_ambpresent1; /* Brnach 0, Channel 1 */ - u16 b1_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */ + u16 b1_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */ u16 b1_ambpresent0; /* Branch 1, Channel 8 */ u16 b1_ambpresent1; /* Branch 1, Channel 1 */ /* DIMM information matrix, allocating architecture maximums */ - struct i5400_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS]; + struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS]; /* Actual values for this controller */ int maxch; /* Max channels */ @@ -532,13 +534,15 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, int ras, cas; int errnum; char *type = NULL; + enum hw_event_mc_err_type tp_event = HW_EVENT_ERR_UNCORRECTED; if (!allErrors) return; /* if no error, return now */ - if (allErrors & ERROR_FAT_MASK) + if (allErrors & ERROR_FAT_MASK) { type = "FATAL"; - else if (allErrors & FERR_NF_UNCORRECTABLE) + tp_event = HW_EVENT_ERR_FATAL; + } else if (allErrors & FERR_NF_UNCORRECTABLE) type = "NON-FATAL uncorrected"; else type = "NON-FATAL recoverable"; @@ -556,7 +560,7 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, ras = nrec_ras(info); cas = nrec_cas(info); - debugf0("\t\tCSROW= %d Channels= %d,%d (Branch= %d " + debugf0("\t\tDIMM= %d Channels= %d,%d (Branch= %d " "DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n", rank, channel, channel + 1, branch >> 1, bank, buf_id, rdwr_str(rdwr), ras, cas); @@ -566,13 +570,13 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "%s (Branch=%d DRAM-Bank=%d Buffer ID = %d RDWR=%s " - "RAS=%d CAS=%d %s Err=0x%lx (%s))", - type, branch >> 1, bank, buf_id, rdwr_str(rdwr), ras, cas, - type, allErrors, error_name[errnum]); + "Bank=%d Buffer ID = %d RAS=%d CAS=%d Err=0x%lx (%s)", + bank, buf_id, ras, cas, allErrors, error_name[errnum]); - /* Call the helper to output message */ - edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); + edac_mc_handle_error(tp_event, mci, 0, 0, 0, + branch >> 1, -1, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); } /* @@ -630,7 +634,7 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci, /* Only 1 bit will be on */ errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name)); - debugf0("\t\tCSROW= %d Channel= %d (Branch %d " + debugf0("\t\tDIMM= %d Channel= %d (Branch %d " "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", rank, channel, branch >> 1, bank, rdwr_str(rdwr), ras, cas); @@ -642,8 +646,10 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci, branch >> 1, bank, rdwr_str(rdwr), ras, cas, allErrors, error_name[errnum]); - /* Call the helper to output message */ - edac_mc_handle_fbd_ce(mci, rank, channel, msg); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0, + branch >> 1, channel % 2, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); return; } @@ -831,8 +837,8 @@ static int i5400_get_devices(struct mem_ctl_info *mci, int dev_idx) /* * determine_amb_present * - * the information is contained in NUM_MTRS_PER_BRANCH different - * registers determining which of the NUM_MTRS_PER_BRANCH requires + * the information is contained in DIMMS_PER_CHANNEL different + * registers determining which of the DIMMS_PER_CHANNEL requires * knowing which channel is in question * * 2 branches, each with 2 channels @@ -861,11 +867,11 @@ static int determine_amb_present_reg(struct i5400_pvt *pvt, int channel) } /* - * determine_mtr(pvt, csrow, channel) + * determine_mtr(pvt, dimm, channel) * - * return the proper MTR register as determine by the csrow and desired channel + * return the proper MTR register as determine by the dimm and desired channel */ -static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel) +static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel) { int mtr; int n; @@ -873,11 +879,11 @@ static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel) /* There is one MTR for each slot pair of FB-DIMMs, Each slot pair may be at branch 0 or branch 1. */ - n = csrow; + n = dimm; - if (n >= NUM_MTRS_PER_BRANCH) { - debugf0("ERROR: trying to access an invalid csrow: %d\n", - csrow); + if (n >= DIMMS_PER_CHANNEL) { + debugf0("ERROR: trying to access an invalid dimm: %d\n", + dimm); return 0; } @@ -913,19 +919,19 @@ static void decode_mtr(int slot_row, u16 mtr) debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); } -static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel, +static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel, struct i5400_dimm_info *dinfo) { int mtr; int amb_present_reg; int addrBits; - mtr = determine_mtr(pvt, csrow, channel); + mtr = determine_mtr(pvt, dimm, channel); if (MTR_DIMMS_PRESENT(mtr)) { amb_present_reg = determine_amb_present_reg(pvt, channel); /* Determine if there is a DIMM present in this DIMM slot */ - if (amb_present_reg & (1 << csrow)) { + if (amb_present_reg & (1 << dimm)) { /* Start with the number of bits for a Bank * on the DRAM */ addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); @@ -954,7 +960,7 @@ static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel, static void calculate_dimm_size(struct i5400_pvt *pvt) { struct i5400_dimm_info *dinfo; - int csrow, max_csrows; + int dimm, max_dimms; char *p, *mem_buffer; int space, n; int channel; @@ -968,32 +974,32 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) return; } - /* Scan all the actual CSROWS + /* Scan all the actual DIMMS * and calculate the information for each DIMM - * Start with the highest csrow first, to display it first - * and work toward the 0th csrow + * Start with the highest dimm first, to display it first + * and work toward the 0th dimm */ - max_csrows = pvt->maxdimmperch; - for (csrow = max_csrows - 1; csrow >= 0; csrow--) { + max_dimms = pvt->maxdimmperch; + for (dimm = max_dimms - 1; dimm >= 0; dimm--) { - /* on an odd csrow, first output a 'boundary' marker, + /* on an odd dimm, first output a 'boundary' marker, * then reset the message buffer */ - if (csrow & 0x1) { + if (dimm & 0x1) { n = snprintf(p, space, "---------------------------" - "--------------------------------"); + "-------------------------------"); p += n; space -= n; debugf2("%s\n", mem_buffer); p = mem_buffer; space = PAGE_SIZE; } - n = snprintf(p, space, "csrow %2d ", csrow); + n = snprintf(p, space, "dimm %2d ", dimm); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { - dinfo = &pvt->dimm_info[csrow][channel]; - handle_channel(pvt, csrow, channel, dinfo); + dinfo = &pvt->dimm_info[dimm][channel]; + handle_channel(pvt, dimm, channel, dinfo); n = snprintf(p, space, "%4d MB | ", dinfo->megabytes); p += n; space -= n; @@ -1005,7 +1011,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) /* Output the last bottom 'boundary' marker */ n = snprintf(p, space, "---------------------------" - "--------------------------------"); + "-------------------------------"); p += n; space -= n; debugf2("%s\n", mem_buffer); @@ -1013,7 +1019,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) space = PAGE_SIZE; /* now output the 'channel' labels */ - n = snprintf(p, space, " "); + n = snprintf(p, space, " "); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { @@ -1080,7 +1086,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) debugf2("MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0); /* Get the set of MTR[0-3] regs by each branch */ - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) { + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) { int where = MTR0 + (slot_row * sizeof(u16)); /* Branch 0 set of MTR registers */ @@ -1105,7 +1111,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) /* Read and dump branch 0's MTRs */ debugf2("\nMemory Technology Registers:\n"); debugf2(" Branch 0:\n"); - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) decode_mtr(slot_row, pvt->b0_mtr[slot_row]); pci_read_config_word(pvt->branch_0, AMBPRESENT_0, @@ -1122,7 +1128,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) } else { /* Read and dump branch 1's MTRs */ debugf2(" Branch 1:\n"); - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) decode_mtr(slot_row, pvt->b1_mtr[slot_row]); pci_read_config_word(pvt->branch_1, AMBPRESENT_0, @@ -1141,7 +1147,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) } /* - * i5400_init_csrows Initialize the 'csrows' table within + * i5400_init_dimms Initialize the 'dimms' table within * the mci control structure with the * addressing of memory. * @@ -1149,50 +1155,68 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) * 0 success * 1 no actual memory found on this MC */ -static int i5400_init_csrows(struct mem_ctl_info *mci) +static int i5400_init_dimms(struct mem_ctl_info *mci) { struct i5400_pvt *pvt; - struct csrow_info *p_csrow; - int empty, channel_count; - int max_csrows; + struct dimm_info *dimm; + int ndimms, channel_count; + int max_dimms; int mtr; int size_mb; - int channel; - int csrow; - struct dimm_info *dimm; + int channel, slot; pvt = mci->pvt_info; channel_count = pvt->maxch; - max_csrows = pvt->maxdimmperch; + max_dimms = pvt->maxdimmperch; - empty = 1; /* Assume NO memory */ + ndimms = 0; - for (csrow = 0; csrow < max_csrows; csrow++) { - p_csrow = &mci->csrows[csrow]; + /* + * FIXME: remove pvt->dimm_info[slot][channel] and use the 3 + * layers here. + */ + for (channel = 0; channel < mci->layers[0].size * mci->layers[1].size; + channel++) { + for (slot = 0; slot < mci->layers[2].size; slot++) { + mtr = determine_mtr(pvt, slot, channel); - /* use branch 0 for the basis */ - mtr = determine_mtr(pvt, csrow, 0); + /* if no DIMMS on this slot, continue */ + if (!MTR_DIMMS_PRESENT(mtr)) + continue; - /* if no DIMMS on this row, continue */ - if (!MTR_DIMMS_PRESENT(mtr)) - continue; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + channel / 2, channel % 2, slot); - for (channel = 0; channel < pvt->maxch; channel++) { - size_mb = pvt->dimm_info[csrow][channel].megabytes; + size_mb = pvt->dimm_info[slot][channel].megabytes; + + debugf2("%s: dimm%zd (branch %d channel %d slot %d): %d.%03d GB\n", + __func__, dimm - mci->dimms, + channel / 2, channel % 2, slot, + size_mb / 1000, size_mb % 1000); - dimm = p_csrow->channels[channel].dimm; dimm->nr_pages = size_mb << 8; dimm->grain = 8; dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; - dimm->mtype = MEM_RDDR2; - dimm->edac_mode = EDAC_SECDED; + dimm->mtype = MEM_FB_DDR2; + /* + * The eccc mechanism is SDDC (aka SECC), with + * is similar to Chipkill. + */ + dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ? + EDAC_S8ECD8ED : EDAC_S4ECD4ED; + ndimms++; } - - empty = 0; } - return empty; + /* + * When just one memory is provided, it should be at location (0,0,0). + * With such single-DIMM mode, the SDCC algorithm degrades to SECDEC+. + */ + if (ndimms == 1) + mci->dimms[0].edac_mode = EDAC_SECDED; + + return (ndimms == 0); } /* @@ -1228,9 +1252,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; struct i5400_pvt *pvt; - int num_channels; - int num_dimms_per_channel; - int num_csrows; + struct edac_mc_layer layers[3]; if (dev_idx >= ARRAY_SIZE(i5400_devs)) return -EINVAL; @@ -1244,22 +1266,21 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) if (PCI_FUNC(pdev->devfn) != 0) return -ENODEV; - /* As we don't have a motherboard identification routine to determine - * actual number of slots/dimms per channel, we thus utilize the - * resource as specified by the chipset. Thus, we might have - * have more DIMMs per channel than actually on the mobo, but this - * allows the driver to support up to the chipset max, without - * some fancy mobo determination. + /* + * allocate a new MC control structure + * + * This drivers uses the DIMM slot as "csrow" and the rest as "channel". */ - num_dimms_per_channel = MAX_DIMMS_PER_CHANNEL; - num_channels = MAX_CHANNELS; - num_csrows = num_dimms_per_channel; - - debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", - __func__, num_channels, num_dimms_per_channel, num_csrows); - - /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); + layers[0].type = EDAC_MC_LAYER_BRANCH; + layers[0].size = MAX_BRANCHES; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = CHANNELS_PER_BRANCH; + layers[1].is_virt_csrow = false; + layers[2].type = EDAC_MC_LAYER_SLOT; + layers[2].size = DIMMS_PER_CHANNEL; + layers[2].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; @@ -1270,8 +1291,8 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) pvt = mci->pvt_info; pvt->system_address = pdev; /* Record this device in our private */ - pvt->maxch = num_channels; - pvt->maxdimmperch = num_dimms_per_channel; + pvt->maxch = MAX_CHANNELS; + pvt->maxdimmperch = DIMMS_PER_CHANNEL; /* 'get' the pci devices we want to reserve for our use */ if (i5400_get_devices(mci, dev_idx)) @@ -1293,13 +1314,13 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) /* Set the function pointer to an actual operation function */ mci->edac_check = i5400_check_error; - /* initialize the MC control structure 'csrows' table + /* initialize the MC control structure 'dimms' table * with the mapping and control information */ - if (i5400_init_csrows(mci)) { + if (i5400_init_dimms(mci)) { debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" - " because i5400_init_csrows() returned nonzero " + " because i5400_init_dimms() returned nonzero " "value\n"); - mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ + mci->edac_cap = EDAC_FLAG_NONE; /* no dimms found */ } else { debugf1("MC: Enable error reporting now\n"); i5400_enable_error_reporting(mci); -- cgit v1.2.2 From 70e2a8379b6e704b2e8cdfcf151954171c36e779 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:05 -0300 Subject: i7300_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i7300_edac.c | 78 ++++++++++++++++++----------------------------- 1 file changed, 30 insertions(+), 48 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index d6f3a2d0f70a..c2cf9771692a 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -464,17 +464,14 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci) FERR_FAT_FBD, error_reg); snprintf(pvt->tmp_prt_buffer, PAGE_SIZE, - "FATAL (Branch=%d DRAM-Bank=%d %s " - "RAS=%d CAS=%d Err=0x%lx (%s))", - branch, bank, - is_wr ? "RDWR" : "RD", - ras, cas, - errors, specific); - - /* Call the helper to output message */ - edac_mc_handle_fbd_ue(mci, rank, branch << 1, - (branch << 1) + 1, - pvt->tmp_prt_buffer); + "Bank=%d RAS=%d CAS=%d Err=0x%lx (%s))", + bank, ras, cas, errors, specific); + + edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0, + branch, -1, rank, + is_wr ? "Write error" : "Read error", + pvt->tmp_prt_buffer, NULL); + } /* read in the 1st NON-FATAL error register */ @@ -513,23 +510,14 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci) /* Form out message */ snprintf(pvt->tmp_prt_buffer, PAGE_SIZE, - "Corrected error (Branch=%d, Channel %d), " - " DRAM-Bank=%d %s " - "RAS=%d CAS=%d, CE Err=0x%lx, Syndrome=0x%08x(%s))", - branch, channel, - bank, - is_wr ? "RDWR" : "RD", - ras, cas, - errors, syndrome, specific); - - /* - * Call the helper to output message - * NOTE: Errors are reported per-branch, and not per-channel - * Currently, we don't know how to identify the right - * channel. - */ - edac_mc_handle_fbd_ce(mci, rank, channel, - pvt->tmp_prt_buffer); + "DRAM-Bank=%d RAS=%d CAS=%d, Err=0x%lx (%s))", + bank, ras, cas, errors, specific); + + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, + syndrome, + branch >> 1, channel % 2, rank, + is_wr ? "Write error" : "Read error", + pvt->tmp_prt_buffer, NULL); } return; } @@ -807,9 +795,10 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) for (ch = 0; ch < MAX_CH_PER_BRANCH; ch++) { int channel = to_channel(ch, branch); - dinfo = &pvt->dimm_info[slot][channel]; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, + mci->n_layers, branch, ch, slot); - dimm = mci->csrows[slot].channels[branch * MAX_CH_PER_BRANCH + ch].dimm; + dinfo = &pvt->dimm_info[slot][channel]; mtr = decode_mtr(pvt, slot, ch, branch, dinfo, dimm); @@ -1034,10 +1023,8 @@ static int __devinit i7300_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[3]; struct i7300_pvt *pvt; - int num_channels; - int num_dimms_per_channel; - int num_csrows; int rc; /* wake up device */ @@ -1054,22 +1041,17 @@ static int __devinit i7300_init_one(struct pci_dev *pdev, if (PCI_FUNC(pdev->devfn) != 0) return -ENODEV; - /* As we don't have a motherboard identification routine to determine - * actual number of slots/dimms per channel, we thus utilize the - * resource as specified by the chipset. Thus, we might have - * have more DIMMs per channel than actually on the mobo, but this - * allows the driver to support up to the chipset max, without - * some fancy mobo determination. - */ - num_dimms_per_channel = MAX_SLOTS; - num_channels = MAX_CHANNELS; - num_csrows = MAX_SLOTS * MAX_CHANNELS; - - debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", - __func__, num_channels, num_dimms_per_channel, num_csrows); - /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); + layers[0].type = EDAC_MC_LAYER_BRANCH; + layers[0].size = MAX_BRANCHES; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = MAX_CH_PER_BRANCH; + layers[1].is_virt_csrow = true; + layers[2].type = EDAC_MC_LAYER_SLOT; + layers[2].size = MAX_SLOTS; + layers[2].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From 0975c16f4fa901403708a0d3f19b33a726b10326 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:12 -0300 Subject: i7core_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i7core_edac.c | 202 +++++++++++---------------------------------- 1 file changed, 50 insertions(+), 152 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 0e3cc34bcc22..bc2c04550b8b 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -257,7 +257,6 @@ struct i7core_pvt { struct i7core_channel channel[NUM_CHANS]; int ce_count_available; - int csrow_map[NUM_CHANS][MAX_DIMMS]; /* ECC corrected errors counts per udimm */ unsigned long udimm_ce_count[MAX_DIMMS]; @@ -492,113 +491,12 @@ static void free_i7core_dev(struct i7core_dev *i7core_dev) /**************************************************************************** Memory check routines ****************************************************************************/ -static struct pci_dev *get_pdev_slot_func(u8 socket, unsigned slot, - unsigned func) -{ - struct i7core_dev *i7core_dev = get_i7core_dev(socket); - int i; - - if (!i7core_dev) - return NULL; - - for (i = 0; i < i7core_dev->n_devs; i++) { - if (!i7core_dev->pdev[i]) - continue; - - if (PCI_SLOT(i7core_dev->pdev[i]->devfn) == slot && - PCI_FUNC(i7core_dev->pdev[i]->devfn) == func) { - return i7core_dev->pdev[i]; - } - } - - return NULL; -} - -/** - * i7core_get_active_channels() - gets the number of channels and csrows - * @socket: Quick Path Interconnect socket - * @channels: Number of channels that will be returned - * @csrows: Number of csrows found - * - * Since EDAC core needs to know in advance the number of available channels - * and csrows, in order to allocate memory for csrows/channels, it is needed - * to run two similar steps. At the first step, implemented on this function, - * it checks the number of csrows/channels present at one socket. - * this is used in order to properly allocate the size of mci components. - * - * It should be noticed that none of the current available datasheets explain - * or even mention how csrows are seen by the memory controller. So, we need - * to add a fake description for csrows. - * So, this driver is attributing one DIMM memory for one csrow. - */ -static int i7core_get_active_channels(const u8 socket, unsigned *channels, - unsigned *csrows) -{ - struct pci_dev *pdev = NULL; - int i, j; - u32 status, control; - - *channels = 0; - *csrows = 0; - - pdev = get_pdev_slot_func(socket, 3, 0); - if (!pdev) { - i7core_printk(KERN_ERR, "Couldn't find socket %d fn 3.0!!!\n", - socket); - return -ENODEV; - } - - /* Device 3 function 0 reads */ - pci_read_config_dword(pdev, MC_STATUS, &status); - pci_read_config_dword(pdev, MC_CONTROL, &control); - - for (i = 0; i < NUM_CHANS; i++) { - u32 dimm_dod[3]; - /* Check if the channel is active */ - if (!(control & (1 << (8 + i)))) - continue; - - /* Check if the channel is disabled */ - if (status & (1 << i)) - continue; - - pdev = get_pdev_slot_func(socket, i + 4, 1); - if (!pdev) { - i7core_printk(KERN_ERR, "Couldn't find socket %d " - "fn %d.%d!!!\n", - socket, i + 4, 1); - return -ENODEV; - } - /* Devices 4-6 function 1 */ - pci_read_config_dword(pdev, - MC_DOD_CH_DIMM0, &dimm_dod[0]); - pci_read_config_dword(pdev, - MC_DOD_CH_DIMM1, &dimm_dod[1]); - pci_read_config_dword(pdev, - MC_DOD_CH_DIMM2, &dimm_dod[2]); - - (*channels)++; - - for (j = 0; j < 3; j++) { - if (!DIMM_PRESENT(dimm_dod[j])) - continue; - (*csrows)++; - } - } - - debugf0("Number of active channels on socket %d: %d\n", - socket, *channels); - - return 0; -} static int get_dimm_config(struct mem_ctl_info *mci) { struct i7core_pvt *pvt = mci->pvt_info; - struct csrow_info *csr; struct pci_dev *pdev; int i, j; - int csrow = 0; enum edac_type mode; enum mem_type mtype; struct dimm_info *dimm; @@ -696,6 +594,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) if (!DIMM_PRESENT(dimm_dod[j])) continue; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + i, j, 0); banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j])); rows = numrow(MC_DOD_NUMROW(dimm_dod[j])); @@ -704,8 +604,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) /* DDR3 has 8 I/O banks */ size = (rows * cols * banks * ranks) >> (20 - 3); - pvt->channel[i].dimms++; - debugf0("\tdimm %d %d Mb offset: %x, " "bank: %d, rank: %d, row: %#x, col: %#x\n", j, size, @@ -714,11 +612,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) npages = MiB_TO_PAGES(size); - csr = &mci->csrows[csrow]; - - pvt->csrow_map[i][j] = csrow; - - dimm = csr->channels[0].dimm; dimm->nr_pages = npages; switch (banks) { @@ -741,7 +634,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) dimm->grain = 8; dimm->edac_mode = mode; dimm->mtype = mtype; - csrow++; } pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); @@ -1557,22 +1449,16 @@ error: /**************************************************************************** Error check routines ****************************************************************************/ -static void i7core_rdimm_update_csrow(struct mem_ctl_info *mci, +static void i7core_rdimm_update_errcount(struct mem_ctl_info *mci, const int chan, const int dimm, const int add) { - char *msg; - struct i7core_pvt *pvt = mci->pvt_info; - int row = pvt->csrow_map[chan][dimm], i; + int i; for (i = 0; i < add; i++) { - msg = kasprintf(GFP_KERNEL, "Corrected error " - "(Socket=%d channel=%d dimm=%d)", - pvt->i7core_dev->socket, chan, dimm); - - edac_mc_handle_fbd_ce(mci, row, 0, msg); - kfree (msg); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0, + chan, dimm, -1, "error", "", NULL); } } @@ -1613,11 +1499,11 @@ static void i7core_rdimm_update_ce_count(struct mem_ctl_info *mci, /*updated the edac core */ if (add0 != 0) - i7core_rdimm_update_csrow(mci, chan, 0, add0); + i7core_rdimm_update_errcount(mci, chan, 0, add0); if (add1 != 0) - i7core_rdimm_update_csrow(mci, chan, 1, add1); + i7core_rdimm_update_errcount(mci, chan, 1, add1); if (add2 != 0) - i7core_rdimm_update_csrow(mci, chan, 2, add2); + i7core_rdimm_update_errcount(mci, chan, 2, add2); } @@ -1738,19 +1624,29 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci, { struct i7core_pvt *pvt = mci->pvt_info; char *type, *optype, *err, *msg; + enum hw_event_mc_err_type tp_event; unsigned long error = m->status & 0x1ff0000l; + bool uncorrected_error = m->mcgstatus & 1ll << 61; + bool ripv = m->mcgstatus & 1; u32 optypenum = (m->status >> 4) & 0x07; u32 core_err_cnt = (m->status >> 38) & 0x7fff; u32 dimm = (m->misc >> 16) & 0x3; u32 channel = (m->misc >> 18) & 0x3; u32 syndrome = m->misc >> 32; u32 errnum = find_first_bit(&error, 32); - int csrow; - if (m->mcgstatus & 1) - type = "FATAL"; - else - type = "NON_FATAL"; + if (uncorrected_error) { + if (ripv) { + type = "FATAL"; + tp_event = HW_EVENT_ERR_FATAL; + } else { + type = "NON_FATAL"; + tp_event = HW_EVENT_ERR_UNCORRECTED; + } + } else { + type = "CORRECTED"; + tp_event = HW_EVENT_ERR_CORRECTED; + } switch (optypenum) { case 0: @@ -1805,25 +1701,23 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci, err = "unknown"; } - /* FIXME: should convert addr into bank and rank information */ msg = kasprintf(GFP_ATOMIC, - "%s (addr = 0x%08llx, cpu=%d, Dimm=%d, Channel=%d, " - "syndrome=0x%08x, count=%d, Err=%08llx:%08llx (%s: %s))\n", - type, (long long) m->addr, m->cpu, dimm, channel, - syndrome, core_err_cnt, (long long)m->status, - (long long)m->misc, optype, err); + "addr=0x%08llx cpu=%d count=%d Err=%08llx:%08llx (%s: %s))\n", + (long long) m->addr, m->cpu, core_err_cnt, + (long long)m->status, (long long)m->misc, optype, err); - debugf0("%s", msg); - - csrow = pvt->csrow_map[channel][dimm]; - - /* Call the helper to output message */ - if (m->mcgstatus & 1) - edac_mc_handle_fbd_ue(mci, csrow, 0, - 0 /* FIXME: should be channel here */, msg); - else if (!pvt->is_registered) - edac_mc_handle_fbd_ce(mci, csrow, - 0 /* FIXME: should be channel here */, msg); + /* + * Call the helper to output message + * FIXME: what to do if core_err_cnt > 1? Currently, it generates + * only one event + */ + if (uncorrected_error || !pvt->is_registered) + edac_mc_handle_error(tp_event, mci, + m->addr >> PAGE_SHIFT, + m->addr & ~PAGE_MASK, + syndrome, + channel, dimm, -1, + err, msg, m); kfree(msg); } @@ -2242,15 +2136,19 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev) { struct mem_ctl_info *mci; struct i7core_pvt *pvt; - int rc, channels, csrows; - - /* Check the number of active and not disabled channels */ - rc = i7core_get_active_channels(i7core_dev->socket, &channels, &csrows); - if (unlikely(rc < 0)) - return rc; + int rc; + struct edac_mc_layer layers[2]; /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), csrows, channels, i7core_dev->socket); + + layers[0].type = EDAC_MC_LAYER_CHANNEL; + layers[0].size = NUM_CHANS; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_SLOT; + layers[1].size = MAX_DIMMS; + layers[1].is_virt_csrow = true; + mci = new_edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, + sizeof(*pvt)); if (unlikely(!mci)) return -ENOMEM; -- cgit v1.2.2 From 40f562b1915937c146ffe3597b0bc627b5a996da Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:18 -0300 Subject: i82443bxgx_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Tim Small Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i82443bxgx_edac.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 02b252acd999..524f9a2c5707 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -156,19 +156,19 @@ static int i82443bxgx_edacmc_process_error_info(struct mem_ctl_info *mci, if (info->eap & I82443BXGX_EAP_OFFSET_SBE) { error_found = 1; if (handle_errors) - edac_mc_handle_ce(mci, page, pageoffset, - /* 440BX/GX don't make syndrome information - * available */ - 0, edac_mc_find_csrow_by_page(mci, page), 0, - mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, pageoffset, 0, + edac_mc_find_csrow_by_page(mci, page), + 0, -1, mci->ctl_name, "", NULL); } if (info->eap & I82443BXGX_EAP_OFFSET_MBE) { error_found = 1; if (handle_errors) - edac_mc_handle_ue(mci, page, pageoffset, - edac_mc_find_csrow_by_page(mci, page), - mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, pageoffset, 0, + edac_mc_find_csrow_by_page(mci, page), + 0, -1, mci->ctl_name, "", NULL); } return error_found; @@ -235,6 +235,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; u8 dramc; u32 nbxcfg, ecc_mode; enum mem_type mtype; @@ -248,8 +249,13 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg)) return -EIO; - mci = edac_mc_alloc(0, I82443BXGX_NR_CSROWS, I82443BXGX_NR_CHANS, 0); - + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = I82443BXGX_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = I82443BXGX_NR_CHANS; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From 84c3a684087a257c6d702272771709fe025823f6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:31 -0300 Subject: i82860_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Michal Marek Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i82860_edac.c | 42 +++++++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 8485bbf4379f..8834e4ed9802 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -99,6 +99,7 @@ static int i82860_process_error_info(struct mem_ctl_info *mci, struct i82860_error_info *info, int handle_errors) { + struct dimm_info *dimm; int row; if (!(info->errsts2 & 0x0003)) @@ -108,18 +109,25 @@ static int i82860_process_error_info(struct mem_ctl_info *mci, return 1; if ((info->errsts ^ info->errsts2) & 0x0003) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } info->eap >>= PAGE_SHIFT; row = edac_mc_find_csrow_by_page(mci, info->eap); + dimm = mci->csrows[row].channels[0].dimm; if (info->errsts & 0x0002) - edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + info->eap, 0, 0, + dimm->location[0], dimm->location[1], -1, + "i82860 UE", "", NULL); else - edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row, 0, - "i82860 UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + info->eap, 0, info->derrsyn, + dimm->location[0], dimm->location[1], -1, + "i82860 CE", "", NULL); return 1; } @@ -179,18 +187,26 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) static int i82860_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct i82860_error_info discard; - /* RDRAM has channels but these don't map onto the abstractions that - edac uses. - The device groups from the GRA registers seem to map reasonably - well onto the notion of a chip select row. - There are 16 GRA registers and since the name is associated with - the channel and the GRA registers map to physical devices so we are - going to make 1 channel for group. + /* + * RDRAM has channels but these don't map onto the csrow abstraction. + * According with the datasheet, there are 2 Rambus channels, supporting + * up to 16 direct RDRAM devices. + * The device groups from the GRA registers seem to map reasonably + * well onto the notion of a chip select row. + * There are 16 GRA registers and since the name is associated with + * the channel and the GRA registers map to physical devices so we are + * going to make 1 channel for group. */ - mci = edac_mc_alloc(0, 16, 1, 0); - + layers[0].type = EDAC_MC_LAYER_CHANNEL; + layers[0].size = 2; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_SLOT; + layers[1].size = 8; + layers[1].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; -- cgit v1.2.2 From 0a8a9ac9ca24536416eea3b94a7d83f31676adc9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:43 -0300 Subject: i82875p_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i82875p_edac.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index e16281b41f3b..89ca38a779a3 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -38,7 +38,8 @@ #endif /* PCI_DEVICE_ID_INTEL_82875_6 */ /* four csrows in dual channel, eight in single channel */ -#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans)) +#define I82875P_NR_DIMMS 8 +#define I82875P_NR_CSROWS(nr_chans) (I82875P_NR_DIMMS / (nr_chans)) /* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */ #define I82875P_EAP 0x58 /* Error Address Pointer (32b) @@ -235,7 +236,9 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci, return 1; if ((info->errsts ^ info->errsts2) & 0x0081) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, + "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } @@ -243,11 +246,15 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci, row = edac_mc_find_csrow_by_page(mci, info->eap); if (info->errsts & 0x0080) - edac_mc_handle_ue(mci, info->eap, 0, row, "i82875p UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + info->eap, 0, 0, + row, -1, -1, + "i82875p UE", "", NULL); else - edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row, - multi_chan ? (info->des & 0x1) : 0, - "i82875p CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + info->eap, 0, info->derrsyn, + row, multi_chan ? (info->des & 0x1) : 0, + -1, "i82875p CE", "", NULL); return 1; } @@ -390,6 +397,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) { int rc = -ENODEV; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct i82875p_pvt *pvt; struct pci_dev *ovrfl_pdev; void __iomem *ovrfl_window; @@ -405,9 +413,14 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) return -ENODEV; drc = readl(ovrfl_window + I82875P_DRC); nr_chans = dual_channel_active(drc) + 1; - mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans), - nr_chans, 0); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = I82875P_NR_CSROWS(nr_chans); + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = nr_chans; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail0; -- cgit v1.2.2 From 705213580b82090c1f4277d7d8fbee898d53895e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:10:55 -0300 Subject: i82975x_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Ranganathan Desikan Cc: "Arvind R." Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i82975x_edac.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 014a9483fccc..092fa5ab2e1a 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -29,7 +29,8 @@ #define PCI_DEVICE_ID_INTEL_82975_0 0x277c #endif /* PCI_DEVICE_ID_INTEL_82975_0 */ -#define I82975X_NR_CSROWS(nr_chans) (8/(nr_chans)) +#define I82975X_NR_DIMMS 8 +#define I82975X_NR_CSROWS(nr_chans) (I82975X_NR_DIMMS / (nr_chans)) /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */ #define I82975X_EAP 0x58 /* Dram Error Address Pointer (32b) @@ -287,7 +288,8 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci, return 1; if ((info->errsts ^ info->errsts2) & 0x0003) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } @@ -312,10 +314,15 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci, (1 << mci->csrows[row].channels[chan].dimm->grain)); if (info->errsts & 0x0002) - edac_mc_handle_ue(mci, page, offst , row, "i82975x UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, offst, 0, + row, -1, -1, + "i82975x UE", "", NULL); else - edac_mc_handle_ce(mci, page, offst, info->derrsyn, row, - chan, "i82975x CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, offst, info->derrsyn, + row, chan ? chan : 0, -1, + "i82975x CE", "", NULL); return 1; } @@ -473,6 +480,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) { int rc = -ENODEV; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct i82975x_pvt *pvt; void __iomem *mch_window; u32 mchbar; @@ -541,8 +549,13 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) chans = dual_channel_active(mch_window) + 1; /* assuming only one controller, index thus is 0 */ - mci = edac_mc_alloc(sizeof(*pvt), I82975X_NR_CSROWS(chans), - chans, 0); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = I82975X_NR_DIMMS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = I82975X_NR_CSROWS(chans); + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail1; -- cgit v1.2.2 From ad4d6e2311487299beaf36bd890c96569c691482 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:11:08 -0300 Subject: mpc85xx_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Andrew Morton Cc: Shaohui Xie Cc: Jiri Kosina Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/mpc85xx_edac.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index c1d9e158972c..a15141025a94 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -854,12 +854,16 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci) mpc85xx_mc_printk(mci, KERN_ERR, "PFN out of range!\n"); if (err_detect & DDR_EDE_SBE) - edac_mc_handle_ce(mci, pfn, err_addr & ~PAGE_MASK, - syndrome, row_index, 0, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + pfn, err_addr & ~PAGE_MASK, syndrome, + row_index, 0, -1, + mci->ctl_name, "", NULL); if (err_detect & DDR_EDE_MBE) - edac_mc_handle_ue(mci, pfn, err_addr & ~PAGE_MASK, - row_index, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + pfn, err_addr & ~PAGE_MASK, syndrome, + row_index, 0, -1, + mci->ctl_name, "", NULL); out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, err_detect); } @@ -961,6 +965,7 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct mpc85xx_mc_pdata *pdata; struct resource r; u32 sdram_ctl; @@ -969,7 +974,14 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) if (!devres_open_group(&op->dev, mpc85xx_mc_err_probe, GFP_KERNEL)) return -ENOMEM; - mci = edac_mc_alloc(sizeof(*pdata), 4, 1, edac_mc_idx); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = 4; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = 1; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + sizeof(*pdata)); if (!mci) { devres_release_group(&op->dev, mpc85xx_mc_err_probe); return -ENOMEM; -- cgit v1.2.2 From a583ac6ca809907dcf3e5e2dd12250b23ceda7c2 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:11:20 -0300 Subject: mv64x60_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/mv64x60_edac.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 281e24528599..289a6cc859b4 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -611,12 +611,17 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci) /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */ if (!(reg & 0x1)) - edac_mc_handle_ce(mci, err_addr >> PAGE_SHIFT, - err_addr & PAGE_MASK, syndrome, 0, 0, - mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + err_addr >> PAGE_SHIFT, + err_addr & PAGE_MASK, syndrome, + 0, 0, -1, + mci->ctl_name, "", NULL); else /* 2 bit error, UE */ - edac_mc_handle_ue(mci, err_addr >> PAGE_SHIFT, - err_addr & PAGE_MASK, 0, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + err_addr >> PAGE_SHIFT, + err_addr & PAGE_MASK, 0, + 0, 0, -1, + mci->ctl_name, "", NULL); /* clear the error */ out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0); @@ -695,6 +700,7 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct mv64x60_mc_pdata *pdata; struct resource *r; u32 ctl; @@ -703,7 +709,14 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL)) return -ENOMEM; - mci = edac_mc_alloc(sizeof(struct mv64x60_mc_pdata), 1, 1, edac_mc_idx); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = 1; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = 1; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + sizeof(struct mv64x60_mc_pdata)); if (!mci) { printk(KERN_ERR "%s: No memory for CPU err\n", __func__); devres_release_group(&pdev->dev, mv64x60_mc_err_probe); -- cgit v1.2.2 From f34575aca9ea92bf61e428fb4584d9ebbff9807c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:11:36 -0300 Subject: pasemi_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Olof Johansson Cc: Egor Martovetsky Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/pasemi_edac.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 3fcefda653fd..46aed62436b5 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -110,15 +110,16 @@ static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta) /* uncorrectable/multi-bit errors */ if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS | MCDEBUG_ERRSTA_RFL_STATUS)) { - edac_mc_handle_ue(mci, mci->csrows[cs].first_page, 0, - cs, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + mci->csrows[cs].first_page, 0, 0, + cs, 0, -1, mci->ctl_name, "", NULL); } /* correctable/single-bit errors */ - if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) { - edac_mc_handle_ce(mci, mci->csrows[cs].first_page, 0, - 0, cs, 0, mci->ctl_name); - } + if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + mci->csrows[cs].first_page, 0, 0, + cs, 0, -1, mci->ctl_name, "", NULL); } static void pasemi_edac_check(struct mem_ctl_info *mci) @@ -191,6 +192,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; u32 errctl1, errcor, scrub, mcen; pci_read_config_dword(pdev, MCCFG_MCEN, &mcen); @@ -207,9 +209,14 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, MCDEBUG_ERRCTL1_RFL_LOG_EN; pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1); - mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS, - system_mmc_id++); - + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = PASEMI_EDAC_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = PASEMI_EDAC_NR_CHANS; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, + 0); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From 94d933745928ad6d8c40da89b4d0ccb2511578fc Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:11:59 -0300 Subject: ppc4xx_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Josh Boyer Cc: Jiri Kosina Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/ppc4xx_edac.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index 95cfc0f8d46d..59f50b6f21d3 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -727,7 +727,10 @@ ppc4xx_edac_handle_ce(struct mem_ctl_info *mci, for (row = 0; row < mci->nr_csrows; row++) if (ppc4xx_edac_check_bank_error(status, row)) - edac_mc_handle_ce_no_info(mci, message); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, 0, + row, 0, -1, + message, "", NULL); } /** @@ -755,7 +758,10 @@ ppc4xx_edac_handle_ue(struct mem_ctl_info *mci, for (row = 0; row < mci->nr_csrows; row++) if (ppc4xx_edac_check_bank_error(status, row)) - edac_mc_handle_ue(mci, page, offset, row, message); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, offset, 0, + row, 0, -1, + message, "", NULL); } /** @@ -1233,6 +1239,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op) dcr_host_t dcr_host; const struct device_node *np = op->dev.of_node; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; static int ppc4xx_edac_instance; /* @@ -1278,12 +1285,14 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op) * controller instance and perform the appropriate * initialization. */ - - mci = edac_mc_alloc(sizeof(struct ppc4xx_edac_pdata), - ppc4xx_edac_nr_csrows, - ppc4xx_edac_nr_chans, - ppc4xx_edac_instance); - + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = ppc4xx_edac_nr_csrows; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = ppc4xx_edac_nr_chans; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, + sizeof(struct ppc4xx_edac_pdata)); if (mci == NULL) { ppc4xx_edac_printk(KERN_ERR, "%s: " "Failed to allocate EDAC MC instance!\n", -- cgit v1.2.2 From 63b5d1d9aa4b59847ce6279b8798ed28c686a459 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:12:13 -0300 Subject: r82600_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Tim Small Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/r82600_edac.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index c41b375e1f38..aea1a0c0eca3 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -179,10 +179,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci, error_found = 1; if (handle_errors) - edac_mc_handle_ce(mci, page, 0, /* not avail */ - syndrome, - edac_mc_find_csrow_by_page(mci, page), - 0, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + page, 0, syndrome, + edac_mc_find_csrow_by_page(mci, page), + 0, -1, + mci->ctl_name, "", NULL); } if (info->eapr & BIT(1)) { /* UE? */ @@ -190,9 +191,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci, if (handle_errors) /* 82600 doesn't give enough info */ - edac_mc_handle_ue(mci, page, 0, - edac_mc_find_csrow_by_page(mci, page), - mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + page, 0, 0, + edac_mc_find_csrow_by_page(mci, page), + 0, -1, + mci->ctl_name, "", NULL); } return error_found; @@ -267,6 +270,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, static int r82600_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; u8 dramcr; u32 eapr; u32 scrub_disabled; @@ -281,8 +285,13 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) debugf2("%s(): sdram refresh rate = %#0x\n", __func__, sdram_refresh_rate); debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr); - mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS, 0); - + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = R82600_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = R82600_NR_CHANS; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; -- cgit v1.2.2 From c36e3e77687b39073903f55461fc9417514e831e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:12:22 -0300 Subject: sb_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/sb_edac.c | 159 +++++++++++++++++-------------------------------- 1 file changed, 56 insertions(+), 103 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 2ce9bf5e354b..828647969124 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -314,8 +314,6 @@ struct sbridge_pvt { struct sbridge_info info; struct sbridge_channel channel[NUM_CHANNELS]; - int csrow_map[NUM_CHANNELS][MAX_DIMMS]; - /* Memory type detection */ bool is_mirrored, is_lockstep, is_close_pg; @@ -487,29 +485,14 @@ static struct pci_dev *get_pdev_slot_func(u8 bus, unsigned slot, } /** - * sbridge_get_active_channels() - gets the number of channels and csrows + * check_if_ecc_is_active() - Checks if ECC is active * bus: Device bus - * @channels: Number of channels that will be returned - * @csrows: Number of csrows found - * - * Since EDAC core needs to know in advance the number of available channels - * and csrows, in order to allocate memory for csrows/channels, it is needed - * to run two similar steps. At the first step, implemented on this function, - * it checks the number of csrows/channels present at one socket, identified - * by the associated PCI bus. - * this is used in order to properly allocate the size of mci components. - * Note: one csrow is one dimm. */ -static int sbridge_get_active_channels(const u8 bus, unsigned *channels, - unsigned *csrows) +static int check_if_ecc_is_active(const u8 bus) { struct pci_dev *pdev = NULL; - int i, j; u32 mcmtr; - *channels = 0; - *csrows = 0; - pdev = get_pdev_slot_func(bus, 15, 0); if (!pdev) { sbridge_printk(KERN_ERR, "Couldn't find PCI device " @@ -523,41 +506,14 @@ static int sbridge_get_active_channels(const u8 bus, unsigned *channels, sbridge_printk(KERN_ERR, "ECC is disabled. Aborting\n"); return -ENODEV; } - - for (i = 0; i < NUM_CHANNELS; i++) { - u32 mtr; - - /* Device 15 functions 2 - 5 */ - pdev = get_pdev_slot_func(bus, 15, 2 + i); - if (!pdev) { - sbridge_printk(KERN_ERR, "Couldn't find PCI device " - "%2x.%02d.%d!!!\n", - bus, 15, 2 + i); - return -ENODEV; - } - (*channels)++; - - for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { - pci_read_config_dword(pdev, mtr_regs[j], &mtr); - debugf1("Bus#%02x channel #%d MTR%d = %x\n", bus, i, j, mtr); - if (IS_DIMM_PRESENT(mtr)) - (*csrows)++; - } - } - - debugf0("Number of active channels: %d, number of active dimms: %d\n", - *channels, *csrows); - return 0; } static int get_dimm_config(struct mem_ctl_info *mci) { struct sbridge_pvt *pvt = mci->pvt_info; - struct csrow_info *csr; + struct dimm_info *dimm; int i, j, banks, ranks, rows, cols, size, npages; - int csrow = 0; - unsigned long last_page = 0; u32 reg; enum edac_type mode; enum mem_type mtype; @@ -616,7 +572,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) u32 mtr; for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { - struct dimm_info *dimm = &mci->dimms[j]; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + i, j, 0); pci_read_config_dword(pvt->pci_tad[i], mtr_regs[j], &mtr); debugf4("Channel #%d MTR%d = %x\n", i, j, mtr); @@ -636,16 +593,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) size, npages, banks, ranks, rows, cols); - /* - * Fake stuff. This controller doesn't see - * csrows. - */ - csr = &mci->csrows[csrow]; - pvt->csrow_map[i][j] = csrow; - last_page += npages; - csrow++; - - csr->channels[0].dimm = dimm; dimm->nr_pages = npages; dimm->grain = 32; dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; @@ -841,11 +788,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci, u8 *socket, long *channel_mask, u8 *rank, - char *area_type) + char *area_type, char *msg) { struct mem_ctl_info *new_mci; struct sbridge_pvt *pvt = mci->pvt_info; - char msg[256]; int n_rir, n_sads, n_tads, sad_way, sck_xch; int sad_interl, idx, base_ch; int interleave_mode; @@ -867,12 +813,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci, */ if ((addr > (u64) pvt->tolm) && (addr < (1LL << 32))) { sprintf(msg, "Error at TOLM area, on addr 0x%08Lx", addr); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } if (addr >= (u64)pvt->tohm) { sprintf(msg, "Error at MMIOH area, on addr 0x%016Lx", addr); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } @@ -889,7 +833,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, limit = SAD_LIMIT(reg); if (limit <= prv) { sprintf(msg, "Can't discover the memory socket"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } if (addr <= limit) @@ -898,7 +841,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, } if (n_sads == MAX_SAD) { sprintf(msg, "Can't discover the memory socket"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } area_type = get_dram_attr(reg); @@ -939,7 +881,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, break; default: sprintf(msg, "Can't discover socket interleave"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } *socket = sad_interleave[idx]; @@ -954,7 +895,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, if (!new_mci) { sprintf(msg, "Struct for socket #%u wasn't initialized", *socket); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } mci = new_mci; @@ -970,7 +910,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, limit = TAD_LIMIT(reg); if (limit <= prv) { sprintf(msg, "Can't discover the memory channel"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } if (addr <= limit) @@ -1010,7 +949,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, break; default: sprintf(msg, "Can't discover the TAD target"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } *channel_mask = 1 << base_ch; @@ -1024,7 +962,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, break; default: sprintf(msg, "Invalid mirror set. Can't decode addr"); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } } else @@ -1052,7 +989,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, if (offset > addr) { sprintf(msg, "Can't calculate ch addr: TAD offset 0x%08Lx is too high for addr 0x%08Lx!", offset, addr); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } addr -= offset; @@ -1092,7 +1028,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci, if (n_rir == MAX_RIR_RANGES) { sprintf(msg, "Can't discover the memory rank for ch addr 0x%08Lx", ch_addr); - edac_mc_handle_ce_no_info(mci, msg); return -EINVAL; } rir_way = RIR_WAY(reg); @@ -1406,7 +1341,8 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, { struct mem_ctl_info *new_mci; struct sbridge_pvt *pvt = mci->pvt_info; - char *type, *optype, *msg, *recoverable_msg; + enum hw_event_mc_err_type tp_event; + char *type, *optype, msg[256], *recoverable_msg; bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); bool overflow = GET_BITFIELD(m->status, 62, 62); bool uncorrected_error = GET_BITFIELD(m->status, 61, 61); @@ -1418,13 +1354,21 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, u32 optypenum = GET_BITFIELD(m->status, 4, 6); long channel_mask, first_channel; u8 rank, socket; - int csrow, rc, dimm; + int rc, dimm; char *area_type = "Unknown"; - if (ripv) - type = "NON_FATAL"; - else - type = "FATAL"; + if (uncorrected_error) { + if (ripv) { + type = "FATAL"; + tp_event = HW_EVENT_ERR_FATAL; + } else { + type = "NON_FATAL"; + tp_event = HW_EVENT_ERR_UNCORRECTED; + } + } else { + type = "CORRECTED"; + tp_event = HW_EVENT_ERR_CORRECTED; + } /* * According with Table 15-9 of the Intel Archictecture spec vol 3A, @@ -1442,19 +1386,19 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, } else { switch (optypenum) { case 0: - optype = "generic undef request"; + optype = "generic undef request error"; break; case 1: - optype = "memory read"; + optype = "memory read error"; break; case 2: - optype = "memory write"; + optype = "memory write error"; break; case 3: - optype = "addr/cmd"; + optype = "addr/cmd error"; break; case 4: - optype = "memory scrubbing"; + optype = "memory scrubbing error"; break; default: optype = "reserved"; @@ -1463,13 +1407,13 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, } rc = get_memory_error_data(mci, m->addr, &socket, - &channel_mask, &rank, area_type); + &channel_mask, &rank, area_type, msg); if (rc < 0) - return; + goto err_parsing; new_mci = get_mci_for_node_id(socket); if (!new_mci) { - edac_mc_handle_ce_no_info(mci, "Error: socket got corrupted!"); - return; + strcpy(msg, "Error: socket got corrupted!"); + goto err_parsing; } mci = new_mci; pvt = mci->pvt_info; @@ -1483,8 +1427,6 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, else dimm = 2; - csrow = pvt->csrow_map[first_channel][dimm]; - if (uncorrected_error && recoverable) recoverable_msg = " recoverable"; else @@ -1495,18 +1437,14 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, * Probably, we can just discard it, as the channel information * comes from the get_memory_error_data() address decoding */ - msg = kasprintf(GFP_ATOMIC, - "%d %s error(s): %s on %s area %s%s: cpu=%d Err=%04x:%04x (ch=%d), " - "addr = 0x%08llx => socket=%d, Channel=%ld(mask=%ld), rank=%d\n", + snprintf(msg, sizeof(msg), + "%d error(s)%s: %s%s: cpu=%d Err=%04x:%04x addr = 0x%08llx socket=%d Channel=%ld(mask=%ld), rank=%d\n", core_err_cnt, + overflow ? " OVERFLOW" : "", area_type, - optype, - type, recoverable_msg, - overflow ? "OVERFLOW" : "", m->cpu, mscod, errcode, - channel, /* 1111b means not specified */ (long long) m->addr, socket, first_channel, /* This is the real channel on SB */ @@ -1515,13 +1453,19 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, debugf0("%s", msg); + /* FIXME: need support for channel mask */ + /* Call the helper to output message */ - if (uncorrected_error) - edac_mc_handle_fbd_ue(mci, csrow, 0, 0, msg); - else - edac_mc_handle_fbd_ce(mci, csrow, 0, msg); + edac_mc_handle_error(tp_event, mci, + m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0, + channel, dimm, -1, + optype, msg, m); + return; +err_parsing: + edac_mc_handle_error(tp_event, mci, 0, 0, 0, + -1, -1, -1, + msg, "", m); - kfree(msg); } /* @@ -1680,16 +1624,25 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev) static int sbridge_register_mci(struct sbridge_dev *sbridge_dev) { struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct sbridge_pvt *pvt; - int rc, channels, csrows; + int rc; /* Check the number of active and not disabled channels */ - rc = sbridge_get_active_channels(sbridge_dev->bus, &channels, &csrows); + rc = check_if_ecc_is_active(sbridge_dev->bus); if (unlikely(rc < 0)) return rc; /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), csrows, channels, sbridge_dev->mc); + layers[0].type = EDAC_MC_LAYER_CHANNEL; + layers[0].size = NUM_CHANNELS; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_SLOT; + layers[1].size = MAX_DIMMS; + layers[1].is_virt_csrow = true; + mci = new_edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, + sizeof(*pvt)); + if (unlikely(!mci)) return -ENOMEM; -- cgit v1.2.2 From 40467db77050592cd514304db770739385b53cc6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:12:28 -0300 Subject: tile_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Acked-by: Chris Metcalf Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/tile_edac.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index 054c9bb3a5dc..bcdd1e4dc735 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -71,7 +71,10 @@ static void tile_edac_check(struct mem_ctl_info *mci) if (mem_error.sbe_count != priv->ce_count) { dev_dbg(mci->dev, "ECC CE err on node %d\n", priv->node); priv->ce_count = mem_error.sbe_count; - edac_mc_handle_ce(mci, 0, 0, 0, 0, 0, mci->ctl_name); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, 0, + 0, 0, -1, + mci->ctl_name, "", NULL); } } @@ -122,6 +125,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev) char hv_file[32]; int hv_devhdl; struct mem_ctl_info *mci; + struct edac_mc_layer layers[2]; struct tile_edac_priv *priv; int rc; @@ -131,8 +135,14 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev) return -EINVAL; /* A TILE MC has a single channel and one chip-select row. */ - mci = edac_mc_alloc(sizeof(struct tile_edac_priv), - TILE_EDAC_NR_CSROWS, TILE_EDAC_NR_CHANS, pdev->id); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = TILE_EDAC_NR_CSROWS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = TILE_EDAC_NR_CHANS; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + sizeof(struct tile_edac_priv)); if (mci == NULL) return -ENOMEM; priv = mci->pvt_info; -- cgit v1.2.2 From e2acc357ee9e77e543861b841aa47fc62c528543 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:12:35 -0300 Subject: x38_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/x38_edac.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index e3247997aa00..8f8cda914534 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -215,19 +215,26 @@ static void x38_process_error_info(struct mem_ctl_info *mci, return; if ((info->errsts ^ info->errsts2) & X38_ERRSTS_BITS) { - edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, + -1, -1, -1, + "UE overwrote CE", "", NULL); info->errsts = info->errsts2; } for (channel = 0; channel < x38_channel_num; channel++) { log = info->eccerrlog[channel]; if (log & X38_ECCERRLOG_UE) { - edac_mc_handle_ue(mci, 0, 0, - eccerrlog_row(channel, log), "x38 UE"); + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, + 0, 0, 0, + eccerrlog_row(channel, log), + -1, -1, + "x38 UE", "", NULL); } else if (log & X38_ECCERRLOG_CE) { - edac_mc_handle_ce(mci, 0, 0, - eccerrlog_syndrome(log), - eccerrlog_row(channel, log), 0, "x38 CE"); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, + 0, 0, eccerrlog_syndrome(log), + eccerrlog_row(channel, log), + -1, -1, + "x38 CE", "", NULL); } } } @@ -319,6 +326,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; + struct edac_mc_layer layers[2]; u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -334,7 +342,13 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) how_many_channel(pdev); /* FIXME: unconventional pvt_info usage */ - mci = edac_mc_alloc(0, X38_RANKS, x38_channel_num, 0); + layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; + layers[0].size = X38_RANKS; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = x38_channel_num; + layers[1].is_virt_csrow = false; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; -- cgit v1.2.2 From ca0907b9e413bb1d1f3ea123b663535b74928846 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 2 May 2012 14:37:00 -0300 Subject: edac: Remove the legacy EDAC ABI Now that all drivers got converted to use the new ABI, we can drop the old one. Acked-by: Chris Metcalf Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 2 +- drivers/edac/amd76x_edac.c | 2 +- drivers/edac/cell_edac.c | 2 +- drivers/edac/cpc925_edac.c | 2 +- drivers/edac/e752x_edac.c | 3 +- drivers/edac/e7xxx_edac.c | 2 +- drivers/edac/edac_core.h | 76 +----------------------------------------- drivers/edac/edac_mc.c | 52 ++++------------------------- drivers/edac/i3000_edac.c | 2 +- drivers/edac/i3200_edac.c | 2 +- drivers/edac/i5000_edac.c | 3 +- drivers/edac/i5100_edac.c | 2 +- drivers/edac/i5400_edac.c | 3 +- drivers/edac/i7300_edac.c | 3 +- drivers/edac/i7core_edac.c | 2 +- drivers/edac/i82443bxgx_edac.c | 2 +- drivers/edac/i82860_edac.c | 2 +- drivers/edac/i82875p_edac.c | 2 +- drivers/edac/i82975x_edac.c | 2 +- drivers/edac/mpc85xx_edac.c | 3 +- drivers/edac/mv64x60_edac.c | 2 +- drivers/edac/pasemi_edac.c | 2 +- drivers/edac/ppc4xx_edac.c | 2 +- drivers/edac/r82600_edac.c | 2 +- drivers/edac/sb_edac.c | 2 +- drivers/edac/tile_edac.c | 2 +- drivers/edac/x38_edac.c | 2 +- 27 files changed, 32 insertions(+), 151 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index c431544519b1..7be9b7288e90 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2596,7 +2596,7 @@ static int amd64_init_one_instance(struct pci_dev *F2) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = pvt->channel_count; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); if (!mci) goto err_siblings; diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 69f2b2ebb263..9774d443fa57 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -251,7 +251,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 14aa17492757..69ee6aab5c71 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -204,7 +204,7 @@ static int __devinit cell_edac_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = num_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, sizeof(struct cell_edac_priv)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 2d94fa91c746..e22030a9de66 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -982,7 +982,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, sizeof(struct cpc925_mc_pdata)); if (!mci) { cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n"); diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index aaa3bb8893c1..d28a6851bb18 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1278,8 +1278,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, - sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index d4cfc24b2f8d..9a9c1a546797 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -447,7 +447,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h index 1286c5e1bdc0..f06ce9ab692c 100644 --- a/drivers/edac/edac_core.h +++ b/drivers/edac/edac_core.h @@ -447,9 +447,7 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset, #endif /* CONFIG_PCI */ -struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int edac_index); -struct mem_ctl_info *new_edac_mc_alloc(unsigned edac_index, +struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, unsigned n_layers, struct edac_mc_layer *layers, unsigned sz_pvt); @@ -460,18 +458,6 @@ extern struct mem_ctl_info *find_mci_by_dev(struct device *dev); extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev); extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page); - -/* - * The no info errors are used when error overflows are reported. - * There are a limited number of error logging registers that can - * be exausted. When all registers are exhausted and an additional - * error occurs then an error overflow register records that an - * error occurred and the type of error, but doesn't have any - * further information. The ce/ue versions make for cleaner - * reporting logic and function interface - reduces conditional - * statement clutter and extra function arguments. - */ - void edac_mc_handle_error(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const unsigned long page_frame_number, @@ -484,66 +470,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, const char *other_detail, const void *mcelog); -static inline void edac_mc_handle_ce(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, - unsigned long syndrome, int row, int channel, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - page_frame_number, offset_in_page, syndrome, - row, channel, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - 0, 0, 0, -1, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ue(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, int row, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - page_frame_number, offset_in_page, 0, - row, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - 0, 0, 0, -1, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, - unsigned int csrow, - unsigned int channel0, - unsigned int channel1, - char *msg) -{ - /* - *FIXME: The error can also be at channel1 (e. g. at the second - * channel of the same branch). The fix is to push - * edac_mc_handle_error() call into each driver - */ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - 0, 0, 0, - csrow, channel0, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, - unsigned int csrow, - unsigned int channel, char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - 0, 0, 0, - csrow, channel, -1, msg, NULL, NULL); -} - /* * edac_device APIs */ diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 1bd237ee4ca7..06028de5fe1b 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -195,13 +195,13 @@ void *edac_align_ptr(void **p, unsigned size, int n_elems) * on such scenarios, as grouping the multiple ranks require drivers change. * * Returns: - * NULL allocation failed - * struct mem_ctl_info pointer + * On failure: NULL + * On success: struct mem_ctl_info pointer */ -struct mem_ctl_info *new_edac_mc_alloc(unsigned mc_num, - unsigned n_layers, - struct edac_mc_layer *layers, - unsigned sz_pvt) +struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, + unsigned n_layers, + struct edac_mc_layer *layers, + unsigned sz_pvt) { struct mem_ctl_info *mci; struct edac_mc_layer *layer; @@ -370,46 +370,6 @@ struct mem_ctl_info *new_edac_mc_alloc(unsigned mc_num, */ return mci; } -EXPORT_SYMBOL_GPL(new_edac_mc_alloc); - -/** - * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure - * @mc_num: Memory controller number - * @n_layers: Number of layers at the MC hierarchy - * layers: Describes each layer as seen by the Memory Controller - * @size_pvt: Size of private storage needed - * - * - * FIXME: drivers handle multi-rank memories in different ways: some - * drivers map multi-ranked DIMMs as one DIMM while others - * as several DIMMs. - * - * Everything is kmalloc'ed as one big chunk - more efficient. - * It can only be used if all structures have the same lifetime - otherwise - * you have to allocate and initialize your own structures. - * - * Use edac_mc_free() to free mc structures allocated by this function. - * - * Returns: - * On failure: NULL - * On success: struct mem_ctl_info pointer - */ - -struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int mc_num) -{ - unsigned n_layers = 2; - struct edac_mc_layer layers[n_layers]; - - layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; - layers[0].size = nr_csrows; - layers[0].is_virt_csrow = true; - layers[1].type = EDAC_MC_LAYER_CHANNEL; - layers[1].size = nr_chans; - layers[1].is_virt_csrow = false; - - return new_edac_mc_alloc(mc_num, ARRAY_SIZE(layers), layers, sz_pvt); -} EXPORT_SYMBOL_GPL(edac_mc_alloc); /** diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 195a92e1c0ae..8ad1744faacd 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -362,7 +362,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index d152662ffc66..bbe43ef71823 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -347,7 +347,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct i3200_priv)); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index fdbc57cb7287..82f3f4d2e7b8 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1396,8 +1396,7 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = num_dimms_per_channel; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 691cd49aa169..d9b4921707f8 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -936,7 +936,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev, layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = ranksperch; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*priv)); if (!mci) { ret = -ENOMEM; diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 508f369b1f6c..ff7bf8050c9c 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1280,8 +1280,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = DIMMS_PER_CHANNEL; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index c2cf9771692a..97c22fd650ee 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -1051,8 +1051,7 @@ static int __devinit i7300_init_one(struct pci_dev *pdev, layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = MAX_SLOTS; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index bc2c04550b8b..6d89c78a9b7a 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -2147,7 +2147,7 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (unlikely(!mci)) return -ENOMEM; diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 524f9a2c5707..52072c28a8a6 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -255,7 +255,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82443BXGX_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 8834e4ed9802..08045059d10b 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -206,7 +206,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = 8; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index 89ca38a779a3..b613e31c16e5 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -420,7 +420,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail0; diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 092fa5ab2e1a..9c346d7f707f 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -555,7 +555,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82975X_NR_CSROWS(chans); layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail1; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index a15141025a94..4c402353ba98 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -980,8 +980,7 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, - sizeof(*pdata)); + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), sizeof(*pdata)); if (!mci) { devres_release_group(&op->dev, mpc85xx_mc_err_probe); return -ENOMEM; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 289a6cc859b4..b0bb5a3d2527 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -715,7 +715,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, sizeof(struct mv64x60_mc_pdata)); if (!mci) { printk(KERN_ERR "%s: No memory for CPU err\n", __func__); diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 46aed62436b5..b095a906a994 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -215,7 +215,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = PASEMI_EDAC_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index 59f50b6f21d3..f3f9fed06ad7 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -1291,7 +1291,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = ppc4xx_edac_nr_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, sizeof(struct ppc4xx_edac_pdata)); if (mci == NULL) { ppc4xx_edac_printk(KERN_ERR, "%s: " diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index aea1a0c0eca3..e1cacd164f31 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -291,7 +291,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = R82600_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 828647969124..2f95a1b583dc 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -1640,7 +1640,7 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (unlikely(!mci)) diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index bcdd1e4dc735..7bb4614730db 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -141,7 +141,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = TILE_EDAC_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, sizeof(struct tile_edac_priv)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index 8f8cda914534..1ac7962d63ea 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -348,7 +348,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = x38_channel_num; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; -- cgit v1.2.2 From 5926ff502f6b93ca0c1654f8a5c5317ea236dbdb Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 9 Feb 2012 11:05:20 -0300 Subject: edac: Initialize the dimm label with the known information While userspace doesn't fill the dimm labels, add there the dimm location, as described by the used memory model. This could eventually match what is described at the dmidecode, making easier for people to identify the memory. For example, on an Intel motherboard where the DMI table is reliable, the first memory stick is described as: Memory Device Array Handle: 0x0029 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 2048 MB Form Factor: DIMM Set: 1 Locator: A1_DIMM0 Bank Locator: A1_Node0_Channel0_Dimm0 Type: Type Detail: Synchronous Speed: 800 MHz Manufacturer: A1_Manufacturer0 Serial Number: A1_SerNum0 Asset Tag: A1_AssetTagNum0 Part Number: A1_PartNum0 The memory named as "A1_DIMM0" is physically located at the first memory controller (node 0), at channel 0, dimm slot 0. After this patch, the memory label will be filled with: /sys/devices/system/edac/mc/csrow0/ch0_dimm_label:mc#0channel#0slot#0 And (after the new EDAC API patches) as: /sys/devices/system/edac/mc/mc0/dimm0/dimm_label:mc#0channel#0slot#0 So, even if the memory label is not initialized on userspace, an useful information with the error location is filled there, expecially since several systems/motherboards are provided with enough info to map from channel/slot (or branch/channel/slot) into the DIMM label. So, letting the EDAC core fill it by default is a good thing. It should noticed that, as the label filling happens at the edac_mc_alloc(), drivers can override it to better describe the memories (and some actually do it). Cc: Aristeu Rozanski Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/edac_mc.c | 28 ++++++++++++++++++++++------ drivers/edac/edac_mc_sysfs.c | 8 ++++---- 2 files changed, 26 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 06028de5fe1b..10f375032e96 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -210,10 +210,10 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, struct dimm_info *dimm; u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS]; unsigned pos[EDAC_MAX_LAYERS]; - void *pvt, *ptr = NULL; unsigned size, tot_dimms = 1, count = 1; unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0; - int i, j, err, row, chn; + void *pvt, *p, *ptr = NULL; + int i, j, err, row, chn, n, len; bool per_rank = false; BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0); @@ -325,10 +325,26 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, i, per_rank ? "rank" : "dimm", (dimm - mci->dimms), pos[0], pos[1], pos[2], row, chn); - /* Copy DIMM location */ - for (j = 0; j < n_layers; j++) + /* + * Copy DIMM location and initialize it. + */ + len = sizeof(dimm->label); + p = dimm->label; + n = snprintf(p, len, "mc#%u", mc_num); + p += n; + len -= n; + for (j = 0; j < n_layers; j++) { + n = snprintf(p, len, "%s#%u", + edac_layer_name[layers[j].type], + pos[j]); + p += n; + len -= n; dimm->location[j] = pos[j]; + if (len <= 0) + break; + } + /* Link it to the csrows old API data */ chan->dimm = dimm; dimm->csrow = row; @@ -834,7 +850,7 @@ static void edac_inc_ce_error(struct mem_ctl_info *mci, { int i, index = 0; - mci->ce_count++; + mci->ce_mc++; if (!enable_per_layer_report) { mci->ce_noinfo_count++; @@ -858,7 +874,7 @@ static void edac_inc_ue_error(struct mem_ctl_info *mci, { int i, index = 0; - mci->ue_count++; + mci->ue_mc++; if (!enable_per_layer_report) { mci->ce_noinfo_count++; diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 1dc1c6ca4308..f6a29b0eedc8 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -425,8 +425,8 @@ static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, mci->ue_noinfo_count = 0; mci->ce_noinfo_count = 0; - mci->ue_count = 0; - mci->ce_count = 0; + mci->ue_mc = 0; + mci->ce_mc = 0; for (row = 0; row < mci->nr_csrows; row++) { struct csrow_info *ri = &mci->csrows[row]; @@ -495,12 +495,12 @@ static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data) /* default attribute files for the MCI object */ static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) { - return sprintf(data, "%d\n", mci->ue_count); + return sprintf(data, "%d\n", mci->ue_mc); } static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data) { - return sprintf(data, "%d\n", mci->ce_count); + return sprintf(data, "%d\n", mci->ce_mc); } static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data) -- cgit v1.2.2 From e17a2f42a484562be48128c5b8dc9f7291e8c902 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 11 May 2012 11:41:45 -0300 Subject: edac: Cleanup the logs for i7core and sb edac drivers Remove some information that it is duplicated at the MCE log, and don't have much usage for the error. Those data will be added again, when creating a trace function that outputs both memory errors and MCE fields. Cc: Aristeu Rozanski Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i7core_edac.c | 9 ++------- drivers/edac/sb_edac.c | 42 ++++++++++++++++++------------------------ 2 files changed, 20 insertions(+), 31 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 6d89c78a9b7a..2aacd951d41c 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -1623,7 +1623,7 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci, const struct mce *m) { struct i7core_pvt *pvt = mci->pvt_info; - char *type, *optype, *err, *msg; + char *type, *optype, *err, msg[80]; enum hw_event_mc_err_type tp_event; unsigned long error = m->status & 0x1ff0000l; bool uncorrected_error = m->mcgstatus & 1ll << 61; @@ -1701,10 +1701,7 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci, err = "unknown"; } - msg = kasprintf(GFP_ATOMIC, - "addr=0x%08llx cpu=%d count=%d Err=%08llx:%08llx (%s: %s))\n", - (long long) m->addr, m->cpu, core_err_cnt, - (long long)m->status, (long long)m->misc, optype, err); + snprintf(msg, sizeof(msg), "count=%d %s", core_err_cnt, optype); /* * Call the helper to output message @@ -1718,8 +1715,6 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci, syndrome, channel, dimm, -1, err, msg, m); - - kfree(msg); } /* diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 2f95a1b583dc..e834dfd034d6 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -788,7 +788,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci, u8 *socket, long *channel_mask, u8 *rank, - char *area_type, char *msg) + char **area_type, char *msg) { struct mem_ctl_info *new_mci; struct sbridge_pvt *pvt = mci->pvt_info; @@ -843,7 +843,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci, sprintf(msg, "Can't discover the memory socket"); return -EINVAL; } - area_type = get_dram_attr(reg); + *area_type = get_dram_attr(reg); interleave_mode = INTERLEAVE_MODE(reg); pci_read_config_dword(pvt->pci_sad0, interleave_list[n_sads], @@ -1342,7 +1342,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, struct mem_ctl_info *new_mci; struct sbridge_pvt *pvt = mci->pvt_info; enum hw_event_mc_err_type tp_event; - char *type, *optype, msg[256], *recoverable_msg; + char *type, *optype, msg[256]; bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); bool overflow = GET_BITFIELD(m->status, 62, 62); bool uncorrected_error = GET_BITFIELD(m->status, 61, 61); @@ -1355,7 +1355,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, long channel_mask, first_channel; u8 rank, socket; int rc, dimm; - char *area_type = "Unknown"; + char *area_type = NULL; if (uncorrected_error) { if (ripv) { @@ -1407,7 +1407,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, } rc = get_memory_error_data(mci, m->addr, &socket, - &channel_mask, &rank, area_type, msg); + &channel_mask, &rank, &area_type, msg); if (rc < 0) goto err_parsing; new_mci = get_mci_for_node_id(socket); @@ -1427,29 +1427,23 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci, else dimm = 2; - if (uncorrected_error && recoverable) - recoverable_msg = " recoverable"; - else - recoverable_msg = ""; /* - * FIXME: What should we do with "channel" information on mcelog? - * Probably, we can just discard it, as the channel information - * comes from the get_memory_error_data() address decoding + * FIXME: On some memory configurations (mirror, lockstep), the + * Memory Controller can't point the error to a single DIMM. The + * EDAC core should be handling the channel mask, in order to point + * to the group of dimm's where the error may be happening. */ snprintf(msg, sizeof(msg), - "%d error(s)%s: %s%s: cpu=%d Err=%04x:%04x addr = 0x%08llx socket=%d Channel=%ld(mask=%ld), rank=%d\n", - core_err_cnt, - overflow ? " OVERFLOW" : "", - area_type, - recoverable_msg, - m->cpu, - mscod, errcode, - (long long) m->addr, - socket, - first_channel, /* This is the real channel on SB */ - channel_mask, - rank); + "count:%d%s%s area:%s err_code:%04x:%04x socket:%d channel_mask:%ld rank:%d", + core_err_cnt, + overflow ? " OVERFLOW" : "", + (uncorrected_error && recoverable) ? " recoverable" : "", + area_type, + mscod, errcode, + socket, + channel_mask, + rank); debugf0("%s", msg); -- cgit v1.2.2 From 68d086f89b8064d5576f8c1e47fa7ecb4fd6f141 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 12 Feb 2012 17:18:06 -0300 Subject: i5400_edac: improve debug messages to better represent the filled memory Improves the debug output message, in order to better represent the memory controller hierarchy, when outputing the debug messages. No functional changes when debug is disabled. Reviewed-by: Aristeu Rozanski Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5400_edac.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index ff7bf8050c9c..6640c29e1885 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -963,7 +963,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) int dimm, max_dimms; char *p, *mem_buffer; int space, n; - int channel; + int channel, branch; /* ================= Generate some debug output ================= */ space = PAGE_SIZE; @@ -1028,6 +1028,19 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) space -= n; } + space -= n; + debugf2("%s\n", mem_buffer); + p = mem_buffer; + space = PAGE_SIZE; + + n = snprintf(p, space, " "); + p += n; + for (branch = 0; branch < MAX_BRANCHES; branch++) { + n = snprintf(p, space, " branch %d | ", branch); + p += n; + space -= n; + } + /* output the last message and free buffer */ debugf2("%s\n", mem_buffer); kfree(mem_buffer); -- cgit v1.2.2 From 64e1fdaf55d61eb79ae970f78bb00edf6aa696fb Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 24 Feb 2012 09:34:54 -0300 Subject: i5000_edac: Fix the logic that retrieves memory information The logic there is broken: it basically creates two csrows for each DIMM and assumes that all DIMM's are dual rank. Only one of the csrows will contain the entire DIMM size. If single rank memories are found, they'll be marked with 0 bytes. The check if the AMB is present were also wrong. Yet, as the error reports don't use the memory size in order to credit an error to the right DIMM, that part of the driver seems to work. That's why probably nobody detected the issue yet. After this patch, the memory layout is now properly reported, when debug mode is enabled, and the number of ranks per dimm is now shown: calculate_dimm_size: ---------------------------------------------------------- calculate_dimm_size: slot 3 0 MB | 0 MB | 0 MB | 0 MB | calculate_dimm_size: slot 2 0 MB | 0 MB | 0 MB | 0 MB | calculate_dimm_size: ---------------------------------------------------------- calculate_dimm_size: slot 1 0 MB | 0 MB | 0 MB | 0 MB | calculate_dimm_size: slot 0 512 MB 1R| 512 MB 1R| 512 MB 1R| 512 MB 1R| calculate_dimm_size: ---------------------------------------------------------- calculate_dimm_size: channel 0 | channel 1 | channel 2 | channel 3 | calculate_dimm_size: branch 0 | branch 1 | (1R above means that all memories on my test machine are single-ranked) Reviewed-by: Aristeu Rozanski Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5000_edac.c | 150 ++++++++++++++++++++++++---------------------- 1 file changed, 79 insertions(+), 71 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 82f3f4d2e7b8..1c1aa7a23c3c 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -270,7 +270,8 @@ #define MTR3 0x8C #define NUM_MTRS 4 -#define CHANNELS_PER_BRANCH (2) +#define CHANNELS_PER_BRANCH 2 +#define MAX_BRANCHES 2 /* Defines to extract the vaious fields from the * MTRx - Memory Technology Registers @@ -962,14 +963,14 @@ static int determine_amb_present_reg(struct i5000_pvt *pvt, int channel) * * return the proper MTR register as determine by the csrow and channel desired */ -static int determine_mtr(struct i5000_pvt *pvt, int csrow, int channel) +static int determine_mtr(struct i5000_pvt *pvt, int slot, int channel) { int mtr; if (channel < CHANNELS_PER_BRANCH) - mtr = pvt->b0_mtr[csrow >> 1]; + mtr = pvt->b0_mtr[slot]; else - mtr = pvt->b1_mtr[csrow >> 1]; + mtr = pvt->b1_mtr[slot]; return mtr; } @@ -994,37 +995,34 @@ static void decode_mtr(int slot_row, u16 mtr) debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); } -static void handle_channel(struct i5000_pvt *pvt, int csrow, int channel, +static void handle_channel(struct i5000_pvt *pvt, int slot, int channel, struct i5000_dimm_info *dinfo) { int mtr; int amb_present_reg; int addrBits; - mtr = determine_mtr(pvt, csrow, channel); + mtr = determine_mtr(pvt, slot, channel); if (MTR_DIMMS_PRESENT(mtr)) { amb_present_reg = determine_amb_present_reg(pvt, channel); - /* Determine if there is a DIMM present in this DIMM slot */ - if (amb_present_reg & (1 << (csrow >> 1))) { + /* Determine if there is a DIMM present in this DIMM slot */ + if (amb_present_reg) { dinfo->dual_rank = MTR_DIMM_RANK(mtr); - if (!((dinfo->dual_rank == 0) && - ((csrow & 0x1) == 0x1))) { - /* Start with the number of bits for a Bank - * on the DRAM */ - addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); - /* Add thenumber of ROW bits */ - addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr); - /* add the number of COLUMN bits */ - addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); - - addrBits += 6; /* add 64 bits per DIMM */ - addrBits -= 20; /* divide by 2^^20 */ - addrBits -= 3; /* 8 bits per bytes */ - - dinfo->megabytes = 1 << addrBits; - } + /* Start with the number of bits for a Bank + * on the DRAM */ + addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); + /* Add the number of ROW bits */ + addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr); + /* add the number of COLUMN bits */ + addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); + + addrBits += 6; /* add 64 bits per DIMM */ + addrBits -= 20; /* divide by 2^^20 */ + addrBits -= 3; /* 8 bits per bytes */ + + dinfo->megabytes = 1 << addrBits; } } } @@ -1038,10 +1036,9 @@ static void handle_channel(struct i5000_pvt *pvt, int csrow, int channel, static void calculate_dimm_size(struct i5000_pvt *pvt) { struct i5000_dimm_info *dinfo; - int csrow, max_csrows; + int slot, channel, branch; char *p, *mem_buffer; int space, n; - int channel; /* ================= Generate some debug output ================= */ space = PAGE_SIZE; @@ -1052,22 +1049,17 @@ static void calculate_dimm_size(struct i5000_pvt *pvt) return; } - n = snprintf(p, space, "\n"); - p += n; - space -= n; - - /* Scan all the actual CSROWS (which is # of DIMMS * 2) + /* Scan all the actual slots * and calculate the information for each DIMM - * Start with the highest csrow first, to display it first - * and work toward the 0th csrow + * Start with the highest slot first, to display it first + * and work toward the 0th slot */ - max_csrows = pvt->maxdimmperch * 2; - for (csrow = max_csrows - 1; csrow >= 0; csrow--) { + for (slot = pvt->maxdimmperch - 1; slot >= 0; slot--) { - /* on an odd csrow, first output a 'boundary' marker, + /* on an odd slot, first output a 'boundary' marker, * then reset the message buffer */ - if (csrow & 0x1) { - n = snprintf(p, space, "---------------------------" + if (slot & 0x1) { + n = snprintf(p, space, "--------------------------" "--------------------------------"); p += n; space -= n; @@ -1075,30 +1067,39 @@ static void calculate_dimm_size(struct i5000_pvt *pvt) p = mem_buffer; space = PAGE_SIZE; } - n = snprintf(p, space, "csrow %2d ", csrow); + n = snprintf(p, space, "slot %2d ", slot); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { - dinfo = &pvt->dimm_info[csrow][channel]; - handle_channel(pvt, csrow, channel, dinfo); - n = snprintf(p, space, "%4d MB | ", dinfo->megabytes); + dinfo = &pvt->dimm_info[slot][channel]; + handle_channel(pvt, slot, channel, dinfo); + if (dinfo->megabytes) + n = snprintf(p, space, "%4d MB %dR| ", + dinfo->megabytes, dinfo->dual_rank + 1); + else + n = snprintf(p, space, "%4d MB | ", 0); p += n; space -= n; } - n = snprintf(p, space, "\n"); p += n; space -= n; + debugf2("%s\n", mem_buffer); + p = mem_buffer; + space = PAGE_SIZE; } /* Output the last bottom 'boundary' marker */ - n = snprintf(p, space, "---------------------------" - "--------------------------------\n"); + n = snprintf(p, space, "--------------------------" + "--------------------------------"); p += n; space -= n; + debugf2("%s\n", mem_buffer); + p = mem_buffer; + space = PAGE_SIZE; /* now output the 'channel' labels */ - n = snprintf(p, space, " "); + n = snprintf(p, space, " "); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { @@ -1106,9 +1107,17 @@ static void calculate_dimm_size(struct i5000_pvt *pvt) p += n; space -= n; } - n = snprintf(p, space, "\n"); + debugf2("%s\n", mem_buffer); + p = mem_buffer; + space = PAGE_SIZE; + + n = snprintf(p, space, " "); p += n; - space -= n; + for (branch = 0; branch < MAX_BRANCHES; branch++) { + n = snprintf(p, space, " branch %d | ", branch); + p += n; + space -= n; + } /* output the last message and free buffer */ debugf2("%s\n", mem_buffer); @@ -1241,14 +1250,13 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci) static int i5000_init_csrows(struct mem_ctl_info *mci) { struct i5000_pvt *pvt; - struct csrow_info *p_csrow; struct dimm_info *dimm; int empty, channel_count; int max_csrows; - int mtr, mtr1; + int mtr; int csrow_megs; int channel; - int csrow; + int slot; pvt = mci->pvt_info; @@ -1258,26 +1266,25 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) empty = 1; /* Assume NO memory */ /* - * TODO: it would be better to not use csrow here, filling - * directly the dimm_info structs, based on branch, channel, dim number + * FIXME: The memory layout used to map slot/channel into the + * real memory architecture is weird: branch+slot are "csrows" + * and channel is channel. That required an extra array (dimm_info) + * to map the dimms. A good cleanup would be to remove this array, + * and do a loop here with branch, channel, slot */ - for (csrow = 0; csrow < max_csrows; csrow++) { - p_csrow = &mci->csrows[csrow]; + for (slot = 0; slot < max_csrows; slot++) { + for (channel = 0; channel < pvt->maxch; channel++) { - p_csrow->csrow_idx = csrow; + mtr = determine_mtr(pvt, slot, channel); - /* use branch 0 for the basis */ - mtr = pvt->b0_mtr[csrow >> 1]; - mtr1 = pvt->b1_mtr[csrow >> 1]; + if (!MTR_DIMMS_PRESENT(mtr)) + continue; - /* if no DIMMS on this row, continue */ - if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) - continue; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + channel / MAX_BRANCHES, + channel % MAX_BRANCHES, slot); - csrow_megs = 0; - for (channel = 0; channel < pvt->maxch; channel++) { - dimm = p_csrow->channels[channel].dimm; - csrow_megs += pvt->dimm_info[csrow][channel].megabytes; + csrow_megs = pvt->dimm_info[slot][channel].megabytes; dimm->grain = 8; /* Assume DDR2 for now */ @@ -1290,7 +1297,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) dimm->dtype = DEV_X4; dimm->edac_mode = EDAC_S8ECD8ED; - dimm->nr_pages = (csrow_megs << 8) / pvt->maxch; + dimm->nr_pages = csrow_megs << 8; } empty = 0; @@ -1337,7 +1344,7 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev, * supported on this memory controller */ pci_read_config_byte(pdev, MAXDIMMPERCH, &value); - *num_dimms_per_channel = (int)value *2; + *num_dimms_per_channel = (int)value; pci_read_config_byte(pdev, MAXCH, &value); *num_channels = (int)value; @@ -1387,11 +1394,12 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) __func__, num_channels, num_dimms_per_channel); /* allocate a new MC control structure */ + layers[0].type = EDAC_MC_LAYER_BRANCH; - layers[0].size = 2; - layers[0].is_virt_csrow = true; + layers[0].size = MAX_BRANCHES; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_CHANNEL; - layers[1].size = num_channels; + layers[1].size = num_channels / MAX_BRANCHES; layers[1].is_virt_csrow = false; layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = num_dimms_per_channel; -- cgit v1.2.2 From 805afb6997ce45093981f27afbe4e21ccde3d990 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 15 Mar 2012 13:41:17 -0300 Subject: e752x_edac: provide more info about how DIMMS/ranks are mapped No funtional changes here. Only the comments got updated. Reviewed-by: Aristeu Rozanski Cc: Mark Gross Cc: Doug Thompson Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/e752x_edac.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index d28a6851bb18..3186512c9739 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -4,10 +4,11 @@ * This file may be distributed under the terms of the * GNU General Public License. * - * See "enum e752x_chips" below for supported chipsets + * Implement support for the e7520, E7525, e7320 and i3100 memory controllers. * - * Datasheet: + * Datasheets: * http://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html + * ftp://download.intel.com/design/intarch/datashts/31345803.pdf * * Written by Tom Zimmerman * @@ -16,8 +17,6 @@ * Wang Zhenyu at intel.com * Dave Jiang at mvista.com * - * $Id: edac_e752x.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $ - * */ #include @@ -190,6 +189,25 @@ enum e752x_chips { I3100 = 3 }; +/* + * Those chips Support single-rank and dual-rank memories only. + * + * On e752x chips, the odd rows are present only on dual-rank memories. + * Dividing the rank by two will provide the dimm# + * + * i3100 MC has a different mapping: it supports only 4 ranks. + * + * The mapping is (from 1 to n): + * slot single-ranked double-ranked + * dimm #1 -> rank #4 NA + * dimm #2 -> rank #3 NA + * dimm #3 -> rank #2 Ranks 2 and 3 + * dimm #4 -> rank $1 Ranks 1 and 4 + * + * FIXME: The current mapping for i3100 considers that it supports up to 8 + * ranks/chanel, but datasheet says that the MC supports only 4 ranks. + */ + struct e752x_pvt { struct pci_dev *bridge_ck; struct pci_dev *dev_d0f0; -- cgit v1.2.2 From 36683aab90373afd0cff0935bf886ebe6c7b0de6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 28 Mar 2012 20:13:36 -0300 Subject: i82975x_edac: Test nr_pages earlier to save a few CPU cycles Avoid test nr_pages twice, and initializing some data that won't be used. Cleanup patch only. Reported-by: Aristeu Rozanski Filho Reviewed-by: Aristeu Rozanski Cc: Ranganathan Desikan Cc: "Arvind R." Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i82975x_edac.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 9c346d7f707f..433332c7cdba 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -410,6 +410,9 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, cumul_size); nr_pages = cumul_size - last_cumul_size; + if (!nr_pages) + continue; + /* * Initialise dram labels * index values: @@ -420,9 +423,6 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, for (chan = 0; chan < csrow->nr_channels; chan++) { dimm = mci->csrows[index].channels[chan].dimm; - if (!nr_pages) - continue; - dimm->nr_pages = nr_pages / csrow->nr_channels; strncpy(csrow->channels[chan].dimm->label, labels[(index >> 1) + (chan * 2)], @@ -433,9 +433,6 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, dimm->edac_mode = EDAC_SECDED; /* only supported */ } - if (!nr_pages) - continue; /* not populated */ - csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; last_cumul_size = cumul_size; -- cgit v1.2.2 From 9f70d08a4c4581eee802563b709f710ad492d966 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 29 Mar 2012 08:41:08 -0300 Subject: i5100_edac: Fix a warning when compiled with 32 bits MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit drivers/edac/i5100_edac.c: In function ‘i5100_init_csrows’: drivers/edac/i5100_edac.c:862:3: warning: format ‘%zd’ expects argument of type ‘signed size_t’, but argument 5 has type ‘long unsigned int’ [-Wformat] Reviewed-by: Aristeu Rozanski Cc: "Niklas Söderlund" Cc: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5100_edac.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index d9b4921707f8..e9e7c2a29dc3 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -859,8 +859,8 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) i5100_rank_to_slot(mci, chan, rank)); } - debugf2("dimm channel %d, rank %d, size %zd\n", - chan, rank, PAGES_TO_MiB(npages)); + debugf2("dimm channel %d, rank %d, size %ld\n", + chan, rank, (long)PAGES_TO_MiB(npages)); } } -- cgit v1.2.2 From 486dfb1638bc49e9f3bbbefbe4832024ba6abe0d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Apr 2012 11:47:36 -0300 Subject: i5000: Fix the fatal error handling The fatal error channel bits point to a single channel, and not to a range of channels. Fix the code to properly report it, instead of printing messages like: kernel: EDAC MC0: INTERNAL ERROR: channel-b out of range (4 >= 4) Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5000_edac.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 1c1aa7a23c3c..11ea835f155a 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -474,7 +474,6 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, char msg[EDAC_MC_LABEL_LEN + 1 + 160]; char *specific = NULL; u32 allErrors; - int branch; int channel; int bank; int rank; @@ -486,8 +485,7 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, if (!allErrors) return; /* if no error, return now */ - branch = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd); - channel = branch; + channel = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd); /* Use the NON-Recoverable macros to extract data */ bank = NREC_BANK(info->nrecmema); @@ -496,9 +494,9 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, ras = NREC_RAS(info->nrecmemb); cas = NREC_CAS(info->nrecmemb); - debugf0("\t\tCSROW= %d Channels= %d,%d (Branch= %d " - "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", - rank, channel, channel + 1, branch >> 1, bank, + debugf0("\t\tCSROW= %d Channel= %d " + "(DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", + rank, channel, bank, rdwr ? "Write" : "Read", ras, cas); /* Only 1 bit will be on */ @@ -539,7 +537,7 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, /* Call the helper to output message */ edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0, - branch >> 1, -1, rank, + channel >> 1, channel & 1, rank, rdwr ? "Write error" : "Read error", msg, NULL); } -- cgit v1.2.2 From 0bf09e829dd4b07227ed5a8bc4ac85752a044458 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Apr 2012 11:47:29 -0300 Subject: i7core: fix ranks information at the per-channel struct There is a flag at the per-channel struct that indicates if there are any 4R dimm on it. The way the presence of this flag were reported is not ok, as it might give the false idea that the channel were filled with 2R memories: [ 580.588701] EDAC DEBUG: get_dimm_config: Ch1 phy rd1, wr1 (0x063f7431): 2 ranks, UDIMMs [ 580.588704] EDAC DEBUG: get_dimm_config: dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 (in this case, just one 1R memory is filled on channel 1) So, use a better way to represent the per-channel ranks information. After the patch, it will show: [ 2002.233978] EDAC DEBUG: get_dimm_config: Ch0 phy rd0, wr0 (0x063f7431): UDIMMs [ 2002.233982] EDAC DEBUG: get_dimm_config: dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 [ 2002.233988] EDAC DEBUG: get_dimm_config: dimm 1 1024 Mb offset: 4, bank: 8, rank: 1, row: 0x4000, col: 0x400 (in this case, there isn't any 4R memories) Reported-by: Borislav Petkov Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i7core_edac.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 2aacd951d41c..c05e1ada7a3d 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -221,7 +221,9 @@ struct i7core_inject { }; struct i7core_channel { - u32 ranks; + bool is_3dimms_present; + bool is_single_4rank; + bool has_4rank; u32 dimms; }; @@ -555,21 +557,20 @@ static int get_dimm_config(struct mem_ctl_info *mci) pci_read_config_dword(pvt->pci_ch[i][0], MC_CHANNEL_DIMM_INIT_PARAMS, &data); - pvt->channel[i].ranks = (data & QUAD_RANK_PRESENT) ? - 4 : 2; + + if (data & THREE_DIMMS_PRESENT) + pvt->channel[i].is_3dimms_present = true; + + if (data & SINGLE_QUAD_RANK_PRESENT) + pvt->channel[i].is_single_4rank = true; + + if (data & QUAD_RANK_PRESENT) + pvt->channel[i].has_4rank = true; if (data & REGISTERED_DIMM) mtype = MEM_RDDR3; else mtype = MEM_DDR3; -#if 0 - if (data & THREE_DIMMS_PRESENT) - pvt->channel[i].dimms = 3; - else if (data & SINGLE_QUAD_RANK_PRESENT) - pvt->channel[i].dimms = 1; - else - pvt->channel[i].dimms = 2; -#endif /* Devices 4-6 function 1 */ pci_read_config_dword(pvt->pci_ch[i][1], @@ -580,11 +581,13 @@ static int get_dimm_config(struct mem_ctl_info *mci) MC_DOD_CH_DIMM2, &dimm_dod[2]); debugf0("Ch%d phy rd%d, wr%d (0x%08x): " - "%d ranks, %cDIMMs\n", + "%s%s%s%cDIMMs\n", i, RDLCH(pvt->info.ch_map, i), WRLCH(pvt->info.ch_map, i), data, - pvt->channel[i].ranks, + pvt->channel[i].is_3dimms_present ? "3DIMMS " : "", + pvt->channel[i].is_3dimms_present ? "SINGLE_4R " : "", + pvt->channel[i].has_4rank ? "HAS_4R " : "", (data & REGISTERED_DIMM) ? 'R' : 'U'); for (j = 0; j < 3; j++) { -- cgit v1.2.2 From d3ca8b64b97ef4dc54d7bb0b88bbc01a1fca8cb9 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Tue, 29 May 2012 13:45:01 +0100 Subject: pty: Fix lock inversion The ptmx_open path takes the tty and devpts locks in the wrong order because tty_init_dev locks and returns a locked tty. As far as I can tell this is actually safe anyway because the tty being returned is new so nobody can get a reference to lock it at this point. However we don't even need the devpts lock at this point, it's only held as a byproduct of the way the locks were pushe down. Signed-off-by: Alan Cox Acked-by: Greg Kroah-Hartman Signed-off-by: Linus Torvalds --- drivers/tty/pty.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c index 59af3945ea85..65c7c62c7aae 100644 --- a/drivers/tty/pty.c +++ b/drivers/tty/pty.c @@ -633,7 +633,6 @@ static int ptmx_open(struct inode *inode, struct file *filp) mutex_unlock(&devpts_mutex); mutex_lock(&tty_mutex); - mutex_lock(&devpts_mutex); tty = tty_init_dev(ptm_driver, index); if (IS_ERR(tty)) { @@ -643,7 +642,6 @@ static int ptmx_open(struct inode *inode, struct file *filp) /* The tty returned here is locked so we can safely drop the mutex */ - mutex_unlock(&devpts_mutex); mutex_unlock(&tty_mutex); set_bit(TTY_PTY_LOCK, &tty->flags); /* LOCK THE SLAVE */ -- cgit v1.2.2 From 8f6576ad476b2a22d05ddafd2ddaee102577a4ed Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Tue, 29 May 2012 13:45:16 +0100 Subject: tty: fix ldisc lock inversion trace This is caused by tty_release using tty_lock_pair to lock both sides of the pty/tty pair, and then tty_ldisc_release dropping and relocking one side only. We can drop both fine, so drop both to avoid any lock ordering concerns. Rework the release path to fix the new locking model. Signed-off-by: Alan Cox Acked-by: Greg Kroah-Hartman Signed-off-by: Linus Torvalds --- drivers/tty/tty_ldisc.c | 41 +++++++++++++++++++++++++---------------- 1 file changed, 25 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c index 173a9000a6cb..ba8be396a621 100644 --- a/drivers/tty/tty_ldisc.c +++ b/drivers/tty/tty_ldisc.c @@ -894,6 +894,23 @@ int tty_ldisc_setup(struct tty_struct *tty, struct tty_struct *o_tty) tty_ldisc_enable(tty); return 0; } + +static void tty_ldisc_kill(struct tty_struct *tty) +{ + mutex_lock(&tty->ldisc_mutex); + /* + * Now kill off the ldisc + */ + tty_ldisc_close(tty, tty->ldisc); + tty_ldisc_put(tty->ldisc); + /* Force an oops if we mess this up */ + tty->ldisc = NULL; + + /* Ensure the next open requests the N_TTY ldisc */ + tty_set_termios_ldisc(tty, N_TTY); + mutex_unlock(&tty->ldisc_mutex); +} + /** * tty_ldisc_release - release line discipline * @tty: tty being shut down @@ -912,27 +929,19 @@ void tty_ldisc_release(struct tty_struct *tty, struct tty_struct *o_tty) * race with the set_ldisc code path. */ - tty_unlock(tty); + tty_unlock_pair(tty, o_tty); tty_ldisc_halt(tty); tty_ldisc_flush_works(tty); - tty_lock(tty); - - mutex_lock(&tty->ldisc_mutex); - /* - * Now kill off the ldisc - */ - tty_ldisc_close(tty, tty->ldisc); - tty_ldisc_put(tty->ldisc); - /* Force an oops if we mess this up */ - tty->ldisc = NULL; + if (o_tty) { + tty_ldisc_halt(o_tty); + tty_ldisc_flush_works(o_tty); + } + tty_lock_pair(tty, o_tty); - /* Ensure the next open requests the N_TTY ldisc */ - tty_set_termios_ldisc(tty, N_TTY); - mutex_unlock(&tty->ldisc_mutex); - /* This will need doing differently if we need to lock */ + tty_ldisc_kill(tty); if (o_tty) - tty_ldisc_release(o_tty, NULL); + tty_ldisc_kill(o_tty); /* And the memory resources remaining (buffers, termios) will be disposed of when the kref hits zero */ -- cgit v1.2.2 From f62388187207bea83f1865d507bf892a1f9152c3 Mon Sep 17 00:00:00 2001 From: Ryota Ozaki Date: Tue, 29 May 2012 15:06:20 -0700 Subject: mm: fix off-by-one bug in print_nodes_state() /sys/devices/system/node/{online,possible} outputs a garbage byte because print_nodes_state() returns content size + 1. To fix the bug, the patch changes the use of cpuset_sprintf_cpulist to follow the use at other places, which is clearer and safer. This bug was introduced in v2.6.24 (commit bde631a51876: "mm: add node states sysfs class attributeS"). Signed-off-by: Ryota Ozaki Cc: Lee Schermerhorn Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/base/node.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/base/node.c b/drivers/base/node.c index 90aa2a11a933..af1a177216f1 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -592,11 +592,9 @@ static ssize_t print_nodes_state(enum node_states state, char *buf) { int n; - n = nodelist_scnprintf(buf, PAGE_SIZE, node_states[state]); - if (n > 0 && PAGE_SIZE > n + 1) { - *(buf + n++) = '\n'; - *(buf + n++) = '\0'; - } + n = nodelist_scnprintf(buf, PAGE_SIZE-2, node_states[state]); + buf[n++] = '\n'; + buf[n] = '\0'; return n; } -- cgit v1.2.2 From 3f31d07571eeea18a7d34db9af21d2285b807a17 Mon Sep 17 00:00:00 2001 From: Hugh Dickins Date: Tue, 29 May 2012 15:06:40 -0700 Subject: mm/fs: route MADV_REMOVE to FALLOC_FL_PUNCH_HOLE Now tmpfs supports hole-punching via fallocate(), switch madvise_remove() to use do_fallocate() instead of vmtruncate_range(): which extends madvise(,,MADV_REMOVE) support from tmpfs to ext4, ocfs2 and xfs. There is one more user of vmtruncate_range() in our tree, staging/android's ashmem_shrink(): convert it to use do_fallocate() too (but if its unpinned areas are already unmapped - I don't know - then it would do better to use shmem_truncate_range() directly). Based-on-patch-by: Cong Wang Signed-off-by: Hugh Dickins Cc: Christoph Hellwig Cc: Al Viro Cc: Colin Cross Cc: John Stultz Cc: Greg Kroah-Hartman Cc: "Theodore Ts'o" Cc: Andreas Dilger Cc: Mark Fasheh Cc: Joel Becker Cc: Dave Chinner Cc: Ben Myers Cc: Michael Kerrisk Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/staging/android/ashmem.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c index 4511420849bc..e84dbecd0991 100644 --- a/drivers/staging/android/ashmem.c +++ b/drivers/staging/android/ashmem.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -363,11 +364,12 @@ static int ashmem_shrink(struct shrinker *s, struct shrink_control *sc) mutex_lock(&ashmem_mutex); list_for_each_entry_safe(range, next, &ashmem_lru_list, lru) { - struct inode *inode = range->asma->file->f_dentry->d_inode; loff_t start = range->pgstart * PAGE_SIZE; - loff_t end = (range->pgend + 1) * PAGE_SIZE - 1; + loff_t end = (range->pgend + 1) * PAGE_SIZE; - vmtruncate_range(inode, start, end); + do_fallocate(range->asma->file, + FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, + start, end - start); range->purged = ASHMEM_WAS_PURGED; lru_del(range); -- cgit v1.2.2 From aa523a82ee1be3f50560338e06151918fd8613e7 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 29 May 2012 15:07:12 -0700 Subject: blacklight: remove redundant spi driver bus initialization In ancient times it was necessary to manually initialize the bus field of an spi_driver to spi_bus_type. These days this is done in spi_driver_register() so we can drop the manual assignment. The patch was generated using the following coccinelle semantic patch: // @@ identifier _driver; @@ struct spi_driver _driver = { .driver = { - .bus = &spi_bus_type, }, }; // Signed-off-by: Lars-Peter Clausen Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/ams369fg06.c | 1 - drivers/video/backlight/ld9040.c | 1 - drivers/video/backlight/ltv350qv.c | 1 - drivers/video/backlight/s6e63m0.c | 1 - 4 files changed, 4 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/ams369fg06.c b/drivers/video/backlight/ams369fg06.c index 7bdadc790117..d2494c59e166 100644 --- a/drivers/video/backlight/ams369fg06.c +++ b/drivers/video/backlight/ams369fg06.c @@ -619,7 +619,6 @@ static void ams369fg06_shutdown(struct spi_device *spi) static struct spi_driver ams369fg06_driver = { .driver = { .name = "ams369fg06", - .bus = &spi_bus_type, .owner = THIS_MODULE, }, .probe = ams369fg06_probe, diff --git a/drivers/video/backlight/ld9040.c b/drivers/video/backlight/ld9040.c index efd352be21ae..2ea06a5fae55 100644 --- a/drivers/video/backlight/ld9040.c +++ b/drivers/video/backlight/ld9040.c @@ -846,7 +846,6 @@ static void ld9040_shutdown(struct spi_device *spi) static struct spi_driver ld9040_driver = { .driver = { .name = "ld9040", - .bus = &spi_bus_type, .owner = THIS_MODULE, }, .probe = ld9040_probe, diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c index 333949ff3265..d23922ff3354 100644 --- a/drivers/video/backlight/ltv350qv.c +++ b/drivers/video/backlight/ltv350qv.c @@ -310,7 +310,6 @@ static void ltv350qv_shutdown(struct spi_device *spi) static struct spi_driver ltv350qv_driver = { .driver = { .name = "ltv350qv", - .bus = &spi_bus_type, .owner = THIS_MODULE, }, diff --git a/drivers/video/backlight/s6e63m0.c b/drivers/video/backlight/s6e63m0.c index e264f55b2574..3ed05c76856e 100644 --- a/drivers/video/backlight/s6e63m0.c +++ b/drivers/video/backlight/s6e63m0.c @@ -899,7 +899,6 @@ static void s6e63m0_shutdown(struct spi_device *spi) static struct spi_driver s6e63m0_driver = { .driver = { .name = "s6e63m0", - .bus = &spi_bus_type, .owner = THIS_MODULE, }, .probe = s6e63m0_probe, -- cgit v1.2.2 From bf05929f41d6c3c79ec1961d90d808a634f09dd9 Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Tue, 29 May 2012 15:07:12 -0700 Subject: fbdev: add events for early fb event support Add FB_EARLY_EVENT_BLANK and FB_R_EARLY_EVENT_BLANK event mode supports. first, fb_notifier_call_chain() is called with FB_EARLY_EVENT_BLANK and fb_blank() of specific fb driver is called and then fb_notifier_call_chain() is called with FB_EVENT_BLANK again at fb_blank(). and if fb_blank() was failed then fb_nitifier_call_chain() would be called with FB_R_EARLY_EVENT_BLANK to revert the previous effects. Signed-off-by: Inki Dae Signed-off-by: Kyungmin Park Cc: Lars-Peter Clausen Acked-by: Florian Tobias Schandinat Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/fbmem.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index c6ce416ab587..0dff12a1daef 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c @@ -1046,20 +1046,29 @@ fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var) int fb_blank(struct fb_info *info, int blank) { - int ret = -EINVAL; + struct fb_event event; + int ret = -EINVAL, early_ret; if (blank > FB_BLANK_POWERDOWN) blank = FB_BLANK_POWERDOWN; + event.info = info; + event.data = ␣ + + early_ret = fb_notifier_call_chain(FB_EARLY_EVENT_BLANK, &event); + if (info->fbops->fb_blank) ret = info->fbops->fb_blank(blank, info); - if (!ret) { - struct fb_event event; - - event.info = info; - event.data = ␣ + if (!ret) fb_notifier_call_chain(FB_EVENT_BLANK, &event); + else { + /* + * if fb_blank is failed then revert effects of + * the early blank event. + */ + if (!early_ret) + fb_notifier_call_chain(FB_R_EARLY_EVENT_BLANK, &event); } return ret; -- cgit v1.2.2 From d54ad83f3d56228a42e1021b97fc52bfbad7d560 Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Tue, 29 May 2012 15:07:13 -0700 Subject: lcd: add callbacks for early fb event blank support This patchset adds early fb blank feature that a callback of lcd panel driver is called prior to specific fb driver's one. In the case of MIPI-DSI based video mode LCD Panel, for lcd power off, the power off commands should be transferred to lcd panel with display and mipi-dsi controller enabled because the commands is set to lcd panel at vsync porch period. and in opposite case, the callback of fb driver should be called prior to lcd panel driver's one because of same issue. Also if fb_blank mode is changed to FB_BLANK_POWERDOWN then display controller would be off(clock disable) but lcd panel would be still on. at this time, you could see some issue like sparkling on lcd panel because video clock to be delivered to ldi module of lcd panel was disabled. this issue could occurs for all lcd panels. The callback order is as the following: at fb_blank function of fbmem.c -> fb_notifier_call_chain(FB_EARLY_EVENT_BLANK) -> lcd panel driver's early_set_power() -> info->fbops->fb_blank() -> spcefic fb driver's fb_blank() -> fb_notifier_call_chain(FB_EVENT_BLANK) -> lcd panel driver's set_power() -> fb_notifier_call_chain(FB_R_EARLY_EVENT_BLANK) if info->fops->fb_blank() was failed. fb_notifier_call_chain(FB_R_EARLY_EVENT_BLANK) would be called to revert the effects of previous FB_EARLY_EVENT_BLANK call. and note that if early_set_power() of lcd_ops is NULL then early fb blank callback would be ignored. This patch: Add early_set_power and r_early_set_power callbacks. early_set_power callback is called prior to fb_blank() of fbmem.c and r_early_set_power callback is called if fb_blank() was failed to revert the effects of the early_set_power call of lcd panel driver. Signed-off-by: Inki Dae Signed-off-by: Kyungmin Park Cc: Lars-Peter Clausen Cc: Florian Tobias Schandinat Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/lcd.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c index 79c1b0d609a8..1c298d5bf3af 100644 --- a/drivers/video/backlight/lcd.c +++ b/drivers/video/backlight/lcd.c @@ -32,6 +32,8 @@ static int fb_notifier_callback(struct notifier_block *self, case FB_EVENT_BLANK: case FB_EVENT_MODE_CHANGE: case FB_EVENT_MODE_CHANGE_ALL: + case FB_EARLY_EVENT_BLANK: + case FB_R_EARLY_EVENT_BLANK: break; default: return 0; @@ -46,6 +48,14 @@ static int fb_notifier_callback(struct notifier_block *self, if (event == FB_EVENT_BLANK) { if (ld->ops->set_power) ld->ops->set_power(ld, *(int *)evdata->data); + } else if (event == FB_EARLY_EVENT_BLANK) { + if (ld->ops->early_set_power) + ld->ops->early_set_power(ld, + *(int *)evdata->data); + } else if (event == FB_R_EARLY_EVENT_BLANK) { + if (ld->ops->r_early_set_power) + ld->ops->r_early_set_power(ld, + *(int *)evdata->data); } else { if (ld->ops->set_mode) ld->ops->set_mode(ld, evdata->data); -- cgit v1.2.2 From 1615d210dbc9c67c38b66bcff53233452dbaae22 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 29 May 2012 15:07:14 -0700 Subject: drivers/video/backlight/apple_bl.c: include header for exported symbol prototypes Include the header to pickup the exported symbol prototype. Quiets the sparse warning: warning: symbol 'apple_bl_register' was not declared. Should it be static? warning: symbol 'apple_bl_unregister' was not declared. Should it be static? [akpm@linux-foundation.org: fix resulting build error] Signed-off-by: H Hartley Sweeten Cc: Richard Purdie Signed-off-by: Florian Tobias Schandinat Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/apple_bl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/video/backlight/apple_bl.c b/drivers/video/backlight/apple_bl.c index a523b255e124..ef5ca0d6cd20 100644 --- a/drivers/video/backlight/apple_bl.c +++ b/drivers/video/backlight/apple_bl.c @@ -25,6 +25,7 @@ #include #include #include +#include static struct backlight_device *apple_backlight_device; -- cgit v1.2.2 From 7f26c970b40b3e35ef699729b22d6915ca007135 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 29 May 2012 15:07:14 -0700 Subject: backlight: add LM3533 backlight driver Add sub-driver for the backlights on National Semiconductor / TI LM3533 lighting power chips. The chip provides 256 brightness levels and ambient-light-sensor and pwm input control. [akpm@linux-foundation.org: fix warning] [akpm@linux-foundation.org: fix the type of `mode'] Signed-off-by: Johan Hovold Cc: Richard Purdie Cc: Rob Landley Cc: Samuel Ortiz Cc: Jonathan Cameron Cc: Greg Kroah-Hartman Cc: Florian Tobias Schandinat Cc: Arnd Bergmann Cc: Mark Brown Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/Kconfig | 12 + drivers/video/backlight/Makefile | 1 + drivers/video/backlight/lm3533_bl.c | 423 ++++++++++++++++++++++++++++++++++++ 3 files changed, 436 insertions(+) create mode 100644 drivers/video/backlight/lm3533_bl.c (limited to 'drivers') diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index af16884491ed..fa2b03750316 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -184,6 +184,18 @@ config BACKLIGHT_GENERIC known as the Corgi backlight driver. If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y. +config BACKLIGHT_LM3533 + tristate "Backlight Driver for LM3533" + depends on BACKLIGHT_CLASS_DEVICE + depends on MFD_LM3533 + help + Say Y to enable the backlight driver for National Semiconductor / TI + LM3533 Lighting Power chips. + + The backlights can be controlled directly, through PWM input, or by + the ambient-light-sensor interface. The chip supports 256 brightness + levels. + config BACKLIGHT_LOCOMO tristate "Sharp LOCOMO LCD/Backlight Driver" depends on SHARP_LOCOMO diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 36855ae887d6..a2ac9cfbaf6b 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_BACKLIGHT_EP93XX) += ep93xx_bl.o obj-$(CONFIG_BACKLIGHT_GENERIC) += generic_bl.o obj-$(CONFIG_BACKLIGHT_HP700) += jornada720_bl.o obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o +obj-$(CONFIG_BACKLIGHT_LM3533) += lm3533_bl.o obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o obj-$(CONFIG_BACKLIGHT_LP855X) += lp855x_bl.o obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o diff --git a/drivers/video/backlight/lm3533_bl.c b/drivers/video/backlight/lm3533_bl.c new file mode 100644 index 000000000000..bebeb63607db --- /dev/null +++ b/drivers/video/backlight/lm3533_bl.c @@ -0,0 +1,423 @@ +/* + * lm3533-bl.c -- LM3533 Backlight driver + * + * Copyright (C) 2011-2012 Texas Instruments + * + * Author: Johan Hovold + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include + + +#define LM3533_HVCTRLBANK_COUNT 2 +#define LM3533_BL_MAX_BRIGHTNESS 255 + +#define LM3533_REG_CTRLBANK_AB_BCONF 0x1a + + +struct lm3533_bl { + struct lm3533 *lm3533; + struct lm3533_ctrlbank cb; + struct backlight_device *bd; + int id; +}; + + +static inline int lm3533_bl_get_ctrlbank_id(struct lm3533_bl *bl) +{ + return bl->id; +} + +static int lm3533_bl_update_status(struct backlight_device *bd) +{ + struct lm3533_bl *bl = bl_get_data(bd); + int brightness = bd->props.brightness; + + if (bd->props.power != FB_BLANK_UNBLANK) + brightness = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + brightness = 0; + + return lm3533_ctrlbank_set_brightness(&bl->cb, (u8)brightness); +} + +static int lm3533_bl_get_brightness(struct backlight_device *bd) +{ + struct lm3533_bl *bl = bl_get_data(bd); + u8 val; + int ret; + + ret = lm3533_ctrlbank_get_brightness(&bl->cb, &val); + if (ret) + return ret; + + return val; +} + +static const struct backlight_ops lm3533_bl_ops = { + .get_brightness = lm3533_bl_get_brightness, + .update_status = lm3533_bl_update_status, +}; + +static ssize_t show_id(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + + return scnprintf(buf, PAGE_SIZE, "%d\n", bl->id); +} + +static ssize_t show_als_channel(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + unsigned channel = lm3533_bl_get_ctrlbank_id(bl); + + return scnprintf(buf, PAGE_SIZE, "%u\n", channel); +} + +static ssize_t show_als_en(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + int ctrlbank = lm3533_bl_get_ctrlbank_id(bl); + u8 val; + u8 mask; + bool enable; + int ret; + + ret = lm3533_read(bl->lm3533, LM3533_REG_CTRLBANK_AB_BCONF, &val); + if (ret) + return ret; + + mask = 1 << (2 * ctrlbank); + enable = val & mask; + + return scnprintf(buf, PAGE_SIZE, "%d\n", enable); +} + +static ssize_t store_als_en(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + int ctrlbank = lm3533_bl_get_ctrlbank_id(bl); + int enable; + u8 val; + u8 mask; + int ret; + + if (kstrtoint(buf, 0, &enable)) + return -EINVAL; + + mask = 1 << (2 * ctrlbank); + + if (enable) + val = mask; + else + val = 0; + + ret = lm3533_update(bl->lm3533, LM3533_REG_CTRLBANK_AB_BCONF, val, + mask); + if (ret) + return ret; + + return len; +} + +static ssize_t show_linear(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + u8 val; + u8 mask; + int linear; + int ret; + + ret = lm3533_read(bl->lm3533, LM3533_REG_CTRLBANK_AB_BCONF, &val); + if (ret) + return ret; + + mask = 1 << (2 * lm3533_bl_get_ctrlbank_id(bl) + 1); + + if (val & mask) + linear = 1; + else + linear = 0; + + return scnprintf(buf, PAGE_SIZE, "%x\n", linear); +} + +static ssize_t store_linear(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + unsigned long linear; + u8 mask; + u8 val; + int ret; + + if (kstrtoul(buf, 0, &linear)) + return -EINVAL; + + mask = 1 << (2 * lm3533_bl_get_ctrlbank_id(bl) + 1); + + if (linear) + val = mask; + else + val = 0; + + ret = lm3533_update(bl->lm3533, LM3533_REG_CTRLBANK_AB_BCONF, val, + mask); + if (ret) + return ret; + + return len; +} + +static ssize_t show_pwm(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + u8 val; + int ret; + + ret = lm3533_ctrlbank_get_pwm(&bl->cb, &val); + if (ret) + return ret; + + return scnprintf(buf, PAGE_SIZE, "%u\n", val); +} + +static ssize_t store_pwm(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct lm3533_bl *bl = dev_get_drvdata(dev); + u8 val; + int ret; + + if (kstrtou8(buf, 0, &val)) + return -EINVAL; + + ret = lm3533_ctrlbank_set_pwm(&bl->cb, val); + if (ret) + return ret; + + return len; +} + +static LM3533_ATTR_RO(als_channel); +static LM3533_ATTR_RW(als_en); +static LM3533_ATTR_RO(id); +static LM3533_ATTR_RW(linear); +static LM3533_ATTR_RW(pwm); + +static struct attribute *lm3533_bl_attributes[] = { + &dev_attr_als_channel.attr, + &dev_attr_als_en.attr, + &dev_attr_id.attr, + &dev_attr_linear.attr, + &dev_attr_pwm.attr, + NULL, +}; + +static umode_t lm3533_bl_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct lm3533_bl *bl = dev_get_drvdata(dev); + umode_t mode = attr->mode; + + if (attr == &dev_attr_als_channel.attr || + attr == &dev_attr_als_en.attr) { + if (!bl->lm3533->have_als) + mode = 0; + } + + return mode; +}; + +static struct attribute_group lm3533_bl_attribute_group = { + .is_visible = lm3533_bl_attr_is_visible, + .attrs = lm3533_bl_attributes +}; + +static int __devinit lm3533_bl_setup(struct lm3533_bl *bl, + struct lm3533_bl_platform_data *pdata) +{ + int ret; + + ret = lm3533_ctrlbank_set_max_current(&bl->cb, pdata->max_current); + if (ret) + return ret; + + return lm3533_ctrlbank_set_pwm(&bl->cb, pdata->pwm); +} + +static int __devinit lm3533_bl_probe(struct platform_device *pdev) +{ + struct lm3533 *lm3533; + struct lm3533_bl_platform_data *pdata; + struct lm3533_bl *bl; + struct backlight_device *bd; + struct backlight_properties props; + int ret; + + dev_dbg(&pdev->dev, "%s\n", __func__); + + lm3533 = dev_get_drvdata(pdev->dev.parent); + if (!lm3533) + return -EINVAL; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "no platform data\n"); + return -EINVAL; + } + + if (pdev->id < 0 || pdev->id >= LM3533_HVCTRLBANK_COUNT) { + dev_err(&pdev->dev, "illegal backlight id %d\n", pdev->id); + return -EINVAL; + } + + bl = kzalloc(sizeof(*bl), GFP_KERNEL); + if (!bl) { + dev_err(&pdev->dev, + "failed to allocate memory for backlight\n"); + return -ENOMEM; + } + + bl->lm3533 = lm3533; + bl->id = pdev->id; + + bl->cb.lm3533 = lm3533; + bl->cb.id = lm3533_bl_get_ctrlbank_id(bl); + bl->cb.dev = NULL; /* until registered */ + + memset(&props, 0, sizeof(props)); + props.type = BACKLIGHT_RAW; + props.max_brightness = LM3533_BL_MAX_BRIGHTNESS; + props.brightness = pdata->default_brightness; + bd = backlight_device_register(pdata->name, pdev->dev.parent, bl, + &lm3533_bl_ops, &props); + if (IS_ERR(bd)) { + dev_err(&pdev->dev, "failed to register backlight device\n"); + ret = PTR_ERR(bd); + goto err_free; + } + + bl->bd = bd; + bl->cb.dev = &bl->bd->dev; + + platform_set_drvdata(pdev, bl); + + ret = sysfs_create_group(&bd->dev.kobj, &lm3533_bl_attribute_group); + if (ret < 0) { + dev_err(&pdev->dev, "failed to create sysfs attributes\n"); + goto err_unregister; + } + + backlight_update_status(bd); + + ret = lm3533_bl_setup(bl, pdata); + if (ret) + goto err_sysfs_remove; + + ret = lm3533_ctrlbank_enable(&bl->cb); + if (ret) + goto err_sysfs_remove; + + return 0; + +err_sysfs_remove: + sysfs_remove_group(&bd->dev.kobj, &lm3533_bl_attribute_group); +err_unregister: + backlight_device_unregister(bd); +err_free: + kfree(bl); + + return ret; +} + +static int __devexit lm3533_bl_remove(struct platform_device *pdev) +{ + struct lm3533_bl *bl = platform_get_drvdata(pdev); + struct backlight_device *bd = bl->bd; + + dev_dbg(&bd->dev, "%s\n", __func__); + + bd->props.power = FB_BLANK_POWERDOWN; + bd->props.brightness = 0; + + lm3533_ctrlbank_disable(&bl->cb); + sysfs_remove_group(&bd->dev.kobj, &lm3533_bl_attribute_group); + backlight_device_unregister(bd); + kfree(bl); + + return 0; +} + +#ifdef CONFIG_PM +static int lm3533_bl_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct lm3533_bl *bl = platform_get_drvdata(pdev); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + return lm3533_ctrlbank_disable(&bl->cb); +} + +static int lm3533_bl_resume(struct platform_device *pdev) +{ + struct lm3533_bl *bl = platform_get_drvdata(pdev); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + return lm3533_ctrlbank_enable(&bl->cb); +} +#else +#define lm3533_bl_suspend NULL +#define lm3533_bl_resume NULL +#endif + +static void lm3533_bl_shutdown(struct platform_device *pdev) +{ + struct lm3533_bl *bl = platform_get_drvdata(pdev); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + lm3533_ctrlbank_disable(&bl->cb); +} + +static struct platform_driver lm3533_bl_driver = { + .driver = { + .name = "lm3533-backlight", + .owner = THIS_MODULE, + }, + .probe = lm3533_bl_probe, + .remove = __devexit_p(lm3533_bl_remove), + .shutdown = lm3533_bl_shutdown, + .suspend = lm3533_bl_suspend, + .resume = lm3533_bl_resume, +}; +module_platform_driver(lm3533_bl_driver); + +MODULE_AUTHOR("Johan Hovold "); +MODULE_DESCRIPTION("LM3533 Backlight driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:lm3533-backlight"); -- cgit v1.2.2 From 8dd9d7f2df9f3a29e438e5c50100dad08b9b4215 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:15 -0700 Subject: drivers/video/backlight/adp8860_bl.c: use kstrtoul() The usage of strict_strtoul() is not preferred. Thus, kstrtoul should be used. Signed-off-by: Jingoo Han Cc: Michael Hennerich Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/adp8860_bl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/adp8860_bl.c b/drivers/video/backlight/adp8860_bl.c index 550dbf0bb896..6c0951c931d4 100644 --- a/drivers/video/backlight/adp8860_bl.c +++ b/drivers/video/backlight/adp8860_bl.c @@ -451,7 +451,7 @@ static ssize_t adp8860_store(struct device *dev, const char *buf, unsigned long val; int ret; - ret = strict_strtoul(buf, 10, &val); + ret = kstrtoul(buf, 10, &val); if (ret) return ret; @@ -501,7 +501,7 @@ static ssize_t adp8860_bl_l1_daylight_max_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct adp8860_bl *data = dev_get_drvdata(dev); - int ret = strict_strtoul(buf, 10, &data->cached_daylight_max); + int ret = kstrtoul(buf, 10, &data->cached_daylight_max); if (ret) return ret; @@ -608,7 +608,7 @@ static ssize_t adp8860_bl_ambient_light_zone_store(struct device *dev, uint8_t reg_val; int ret; - ret = strict_strtoul(buf, 10, &val); + ret = kstrtoul(buf, 10, &val); if (ret) return ret; -- cgit v1.2.2 From dc406f56313a4d1fae8461db894a871232043810 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:15 -0700 Subject: drivers/video/backlight/adp8870_bl.c: use kstrtoul() The usage of strict_strtoul() is not preferred. Thus, kstrtoul should be used. Signed-off-by: Jingoo Han Cc: Michael Hennerich Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/adp8870_bl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/adp8870_bl.c b/drivers/video/backlight/adp8870_bl.c index 9be58c6f18f1..c90539bb429f 100644 --- a/drivers/video/backlight/adp8870_bl.c +++ b/drivers/video/backlight/adp8870_bl.c @@ -572,7 +572,7 @@ static ssize_t adp8870_store(struct device *dev, const char *buf, unsigned long val; int ret; - ret = strict_strtoul(buf, 10, &val); + ret = kstrtoul(buf, 10, &val); if (ret) return ret; @@ -652,7 +652,7 @@ static ssize_t adp8870_bl_l1_daylight_max_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct adp8870_bl *data = dev_get_drvdata(dev); - int ret = strict_strtoul(buf, 10, &data->cached_daylight_max); + int ret = kstrtoul(buf, 10, &data->cached_daylight_max); if (ret) return ret; @@ -794,7 +794,7 @@ static ssize_t adp8870_bl_ambient_light_zone_store(struct device *dev, uint8_t reg_val; int ret; - ret = strict_strtoul(buf, 10, &val); + ret = kstrtoul(buf, 10, &val); if (ret) return ret; -- cgit v1.2.2 From 71d7225cd4275e7fd7003dd6ec42320905eacc7d Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:15 -0700 Subject: drivers/video/backlight/adp5520_bl.c: use kstrtoul() The usage of strict_strtoul() is not preferred. Thus, kstrtoul should be used. Signed-off-by: Jingoo Han Cc: Michael Hennerich Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/adp5520_bl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/adp5520_bl.c b/drivers/video/backlight/adp5520_bl.c index 4911ea7989c8..df5db99af23d 100644 --- a/drivers/video/backlight/adp5520_bl.c +++ b/drivers/video/backlight/adp5520_bl.c @@ -160,7 +160,7 @@ static ssize_t adp5520_store(struct device *dev, const char *buf, unsigned long val; int ret; - ret = strict_strtoul(buf, 10, &val); + ret = kstrtoul(buf, 10, &val); if (ret) return ret; @@ -214,7 +214,7 @@ static ssize_t adp5520_bl_daylight_max_store(struct device *dev, struct adp5520_bl *data = dev_get_drvdata(dev); int ret; - ret = strict_strtoul(buf, 10, &data->cached_daylight_max); + ret = kstrtoul(buf, 10, &data->cached_daylight_max); if (ret < 0) return ret; -- cgit v1.2.2 From 35f961623cee5212d4ee0baa8c34b1766913b36b Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:16 -0700 Subject: backlight: use pr_warn() and pr_debug() instead of printk() Use pr_warn() and pr_debug() instead of printk to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: Prefer pr_warn(... to printk(KERN_WARNING, ... [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/backlight.c | 11 ++++++----- drivers/video/backlight/lcd.c | 10 ++++++---- 2 files changed, 12 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index bf5b1ece7160..297db2fa91f5 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c @@ -5,6 +5,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -123,7 +125,7 @@ static ssize_t backlight_store_power(struct device *dev, rc = -ENXIO; mutex_lock(&bd->ops_lock); if (bd->ops) { - pr_debug("backlight: set power to %lu\n", power); + pr_debug("set power to %lu\n", power); if (bd->props.power != power) { bd->props.power = power; backlight_update_status(bd); @@ -161,8 +163,7 @@ static ssize_t backlight_store_brightness(struct device *dev, if (brightness > bd->props.max_brightness) rc = -EINVAL; else { - pr_debug("backlight: set brightness to %lu\n", - brightness); + pr_debug("set brightness to %lu\n", brightness); bd->props.brightness = brightness; backlight_update_status(bd); rc = count; @@ -378,8 +379,8 @@ static int __init backlight_class_init(void) { backlight_class = class_create(THIS_MODULE, "backlight"); if (IS_ERR(backlight_class)) { - printk(KERN_WARNING "Unable to create backlight class; errno = %ld\n", - PTR_ERR(backlight_class)); + pr_warn("Unable to create backlight class; errno = %ld\n", + PTR_ERR(backlight_class)); return PTR_ERR(backlight_class); } diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c index 1c298d5bf3af..a5d0d024bb92 100644 --- a/drivers/video/backlight/lcd.c +++ b/drivers/video/backlight/lcd.c @@ -5,6 +5,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -116,7 +118,7 @@ static ssize_t lcd_store_power(struct device *dev, mutex_lock(&ld->ops_lock); if (ld->ops && ld->ops->set_power) { - pr_debug("lcd: set power to %lu\n", power); + pr_debug("set power to %lu\n", power); ld->ops->set_power(ld, power); rc = count; } @@ -152,7 +154,7 @@ static ssize_t lcd_store_contrast(struct device *dev, mutex_lock(&ld->ops_lock); if (ld->ops && ld->ops->set_contrast) { - pr_debug("lcd: set contrast to %lu\n", contrast); + pr_debug("set contrast to %lu\n", contrast); ld->ops->set_contrast(ld, contrast); rc = count; } @@ -263,8 +265,8 @@ static int __init lcd_class_init(void) { lcd_class = class_create(THIS_MODULE, "lcd"); if (IS_ERR(lcd_class)) { - printk(KERN_WARNING "Unable to create backlight class; errno = %ld\n", - PTR_ERR(lcd_class)); + pr_warn("Unable to create backlight class; errno = %ld\n", + PTR_ERR(lcd_class)); return PTR_ERR(lcd_class); } -- cgit v1.2.2 From 7b12c1b9ee6f66c12f9dc16f76474caa74dbc01f Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:16 -0700 Subject: backlight: apple_bl: use pr_debug()/pr_err() instead of printk() Use pr_debug()/pr_err() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: Prefer pr_debug(... to printk(KERN_DEBUG, ... WARNING: Prefer pr_err(... to printk(KERN_ERR, ... [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Matthew Garrett Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/apple_bl.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/apple_bl.c b/drivers/video/backlight/apple_bl.c index ef5ca0d6cd20..9dc73ac3709a 100644 --- a/drivers/video/backlight/apple_bl.c +++ b/drivers/video/backlight/apple_bl.c @@ -16,6 +16,8 @@ * get at the firmware code in order to figure out what it's actually doing. */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -40,8 +42,6 @@ struct hw_data { static const struct hw_data *hw_data; -#define DRIVER "apple_backlight: " - /* Module parameters. */ static int debug; module_param_named(debug, debug, int, 0644); @@ -61,8 +61,7 @@ static int intel_chipset_send_intensity(struct backlight_device *bd) int intensity = bd->props.brightness; if (debug) - printk(KERN_DEBUG DRIVER "setting brightness to %d\n", - intensity); + pr_debug("setting brightness to %d\n", intensity); intel_chipset_set_brightness(intensity); return 0; @@ -77,8 +76,7 @@ static int intel_chipset_get_intensity(struct backlight_device *bd) intensity = inb(0xb3) >> 4; if (debug) - printk(KERN_DEBUG DRIVER "read brightness of %d\n", - intensity); + pr_debug("read brightness of %d\n", intensity); return intensity; } @@ -108,8 +106,7 @@ static int nvidia_chipset_send_intensity(struct backlight_device *bd) int intensity = bd->props.brightness; if (debug) - printk(KERN_DEBUG DRIVER "setting brightness to %d\n", - intensity); + pr_debug("setting brightness to %d\n", intensity); nvidia_chipset_set_brightness(intensity); return 0; @@ -124,8 +121,7 @@ static int nvidia_chipset_get_intensity(struct backlight_device *bd) intensity = inb(0x52f) >> 4; if (debug) - printk(KERN_DEBUG DRIVER "read brightness of %d\n", - intensity); + pr_debug("read brightness of %d\n", intensity); return intensity; } @@ -150,7 +146,7 @@ static int __devinit apple_bl_add(struct acpi_device *dev) host = pci_get_bus_and_slot(0, 0); if (!host) { - printk(KERN_ERR DRIVER "unable to find PCI host\n"); + pr_err("unable to find PCI host\n"); return -ENODEV; } @@ -162,7 +158,7 @@ static int __devinit apple_bl_add(struct acpi_device *dev) pci_dev_put(host); if (!hw_data) { - printk(KERN_ERR DRIVER "unknown hardware\n"); + pr_err("unknown hardware\n"); return -ENODEV; } -- cgit v1.2.2 From 31e6432b3210e89a520fe17b9b29877780355b69 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:17 -0700 Subject: backlight: cr_bllcd: use pr_err()/pr_info() instead of printk() Use pr_err()/pr_info() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: printk() should include KERN_ facility level WARNING: Prefer pr_err(... to printk(KERN_ERR, ... [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/cr_bllcd.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c index 22489eb5f3e0..37bae801e23b 100644 --- a/drivers/video/backlight/cr_bllcd.c +++ b/drivers/video/backlight/cr_bllcd.c @@ -27,6 +27,8 @@ * Alan Hourihane */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -180,14 +182,13 @@ static int cr_backlight_probe(struct platform_device *pdev) lpc_dev = pci_get_device(PCI_VENDOR_ID_INTEL, CRVML_DEVICE_LPC, NULL); if (!lpc_dev) { - printk("INTEL CARILLO RANCH LPC not found.\n"); + pr_err("INTEL CARILLO RANCH LPC not found.\n"); return -ENODEV; } pci_read_config_byte(lpc_dev, CRVML_REG_GPIOEN, &dev_en); if (!(dev_en & CRVML_GPIOEN_BIT)) { - printk(KERN_ERR - "Carillo Ranch GPIO device was not enabled.\n"); + pr_err("Carillo Ranch GPIO device was not enabled.\n"); pci_dev_put(lpc_dev); return -ENODEV; } @@ -270,7 +271,7 @@ static int __init cr_backlight_init(void) return PTR_ERR(crp); } - printk("Carillo Ranch Backlight Driver Initialized.\n"); + pr_info("Carillo Ranch Backlight Driver Initialized.\n"); return 0; } -- cgit v1.2.2 From 8c7610f3b47c5027719c12c9af4dfdfc294afa6f Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:18 -0700 Subject: backlight: generic_bl: use pr_info() instead of printk() Use pr_info() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: printk() should include KERN_ facility level [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/generic_bl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c index 9ce6170c1860..8c660fcd250d 100644 --- a/drivers/video/backlight/generic_bl.c +++ b/drivers/video/backlight/generic_bl.c @@ -9,6 +9,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -106,7 +108,7 @@ static int genericbl_probe(struct platform_device *pdev) generic_backlight_device = bd; - printk("Generic Backlight Driver Initialized.\n"); + pr_info("Generic Backlight Driver Initialized.\n"); return 0; } @@ -120,7 +122,7 @@ static int genericbl_remove(struct platform_device *pdev) backlight_device_unregister(bd); - printk("Generic Backlight Driver Unloaded\n"); + pr_info("Generic Backlight Driver Unloaded\n"); return 0; } -- cgit v1.2.2 From 20c225cbb679e12edac3c335357245112152a158 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:18 -0700 Subject: backlight: jornada720: use pr_err()/pr_info() instead of printk() Use pr_err()/pr_info() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: Prefer pr_err(... to printk(KERN_ERR, ... WARNING: Prefer pr_info(... to printk(KERN_INFO, ... [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Acked-by: Kristoffer Ericson Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/jornada720_bl.c | 14 ++++++++------ drivers/video/backlight/jornada720_lcd.c | 8 +++++--- 2 files changed, 13 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c index 2f8af5d786ab..16f593b64427 100644 --- a/drivers/video/backlight/jornada720_bl.c +++ b/drivers/video/backlight/jornada720_bl.c @@ -9,6 +9,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -38,7 +40,7 @@ static int jornada_bl_get_brightness(struct backlight_device *bd) ret = jornada_ssp_byte(GETBRIGHTNESS); if (jornada_ssp_byte(GETBRIGHTNESS) != TXDUMMY) { - printk(KERN_ERR "bl : get brightness timeout\n"); + pr_err("get brightness timeout\n"); jornada_ssp_end(); return -ETIMEDOUT; } else /* exchange txdummy for value */ @@ -59,7 +61,7 @@ static int jornada_bl_update_status(struct backlight_device *bd) if ((bd->props.power != FB_BLANK_UNBLANK) || (bd->props.fb_blank != FB_BLANK_UNBLANK)) { ret = jornada_ssp_byte(BRIGHTNESSOFF); if (ret != TXDUMMY) { - printk(KERN_INFO "bl : brightness off timeout\n"); + pr_info("brightness off timeout\n"); /* turn off backlight */ PPSR &= ~PPC_LDD1; PPDR |= PPC_LDD1; @@ -70,7 +72,7 @@ static int jornada_bl_update_status(struct backlight_device *bd) /* send command to our mcu */ if (jornada_ssp_byte(SETBRIGHTNESS) != TXDUMMY) { - printk(KERN_INFO "bl : failed to set brightness\n"); + pr_info("failed to set brightness\n"); ret = -ETIMEDOUT; goto out; } @@ -81,7 +83,7 @@ static int jornada_bl_update_status(struct backlight_device *bd) but due to physical layout it is equal to 0, so we simply invert the value (MAX VALUE - NEW VALUE). */ if (jornada_ssp_byte(BL_MAX_BRIGHT - bd->props.brightness) != TXDUMMY) { - printk(KERN_ERR "bl : set brightness failed\n"); + pr_err("set brightness failed\n"); ret = -ETIMEDOUT; } @@ -113,7 +115,7 @@ static int jornada_bl_probe(struct platform_device *pdev) if (IS_ERR(bd)) { ret = PTR_ERR(bd); - printk(KERN_ERR "bl : failed to register device, err=%x\n", ret); + pr_err("failed to register device, err=%x\n", ret); return ret; } @@ -125,7 +127,7 @@ static int jornada_bl_probe(struct platform_device *pdev) jornada_bl_update_status(bd); platform_set_drvdata(pdev, bd); - printk(KERN_INFO "HP Jornada 700 series backlight driver\n"); + pr_info("HP Jornada 700 series backlight driver\n"); return 0; } diff --git a/drivers/video/backlight/jornada720_lcd.c b/drivers/video/backlight/jornada720_lcd.c index 22d231a17e3c..635b30523fd5 100644 --- a/drivers/video/backlight/jornada720_lcd.c +++ b/drivers/video/backlight/jornada720_lcd.c @@ -9,6 +9,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -44,7 +46,7 @@ static int jornada_lcd_get_contrast(struct lcd_device *dev) jornada_ssp_start(); if (jornada_ssp_byte(GETCONTRAST) != TXDUMMY) { - printk(KERN_ERR "lcd: get contrast failed\n"); + pr_err("get contrast failed\n"); jornada_ssp_end(); return -ETIMEDOUT; } else { @@ -65,7 +67,7 @@ static int jornada_lcd_set_contrast(struct lcd_device *dev, int value) /* push the new value */ if (jornada_ssp_byte(value) != TXDUMMY) { - printk(KERN_ERR "lcd : set contrast failed\n"); + pr_err("set contrast failed\n"); jornada_ssp_end(); return -ETIMEDOUT; } @@ -103,7 +105,7 @@ static int jornada_lcd_probe(struct platform_device *pdev) if (IS_ERR(lcd_device)) { ret = PTR_ERR(lcd_device); - printk(KERN_ERR "lcd : failed to register device\n"); + pr_err("failed to register device\n"); return ret; } -- cgit v1.2.2 From 95e93132e4df461b6344256ae7f16d3c28a4c0f3 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:19 -0700 Subject: backlight: omap1: use pr_info() instead of printk() Use pr_info() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warning as below: WARNING: Prefer pr_info(... to printk(KERN_INFO, ... [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Andrzej Zaborowski Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/omap1_bl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c index 0175bfb08a1c..bfdc5fbeaa11 100644 --- a/drivers/video/backlight/omap1_bl.c +++ b/drivers/video/backlight/omap1_bl.c @@ -18,6 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -168,7 +170,7 @@ static int omapbl_probe(struct platform_device *pdev) dev->props.brightness = pdata->default_intensity; omapbl_update_status(dev); - printk(KERN_INFO "OMAP LCD backlight initialised\n"); + pr_info("OMAP LCD backlight initialised\n"); return 0; } -- cgit v1.2.2 From c3539731c22bea311c49c4df97887800c91cca83 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:19 -0700 Subject: backlight: progear: use pr_err() instead of printk() Use pr_err() instead of printk() to allow dynamic debugging. The pr_fmt prefix for pr_ macros is used. Also fix checkpatch warnings as below: WARNING: printk() should include KERN_ facility level [akpm@linux-foundation.org: use KBUILD_MODNAME, per Joe] Signed-off-by: Jingoo Han Cc: Marcin Juszkiewicz Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/progear_bl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/progear_bl.c b/drivers/video/backlight/progear_bl.c index 6af183d6465e..69b35f02929e 100644 --- a/drivers/video/backlight/progear_bl.c +++ b/drivers/video/backlight/progear_bl.c @@ -15,6 +15,8 @@ * */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -68,13 +70,13 @@ static int progearbl_probe(struct platform_device *pdev) pmu_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, NULL); if (!pmu_dev) { - printk("ALI M7101 PMU not found.\n"); + pr_err("ALI M7101 PMU not found.\n"); return -ENODEV; } sb_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); if (!sb_dev) { - printk("ALI 1533 SB not found.\n"); + pr_err("ALI 1533 SB not found.\n"); ret = -ENODEV; goto put_pmu; } -- cgit v1.2.2 From 6677110b748aa1fe92d039b09d34ac7f35391fb0 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:20 -0700 Subject: drivers/video/backlight/l4f00242t03.c: use pr_fmt This driver uses pr_debug(), so provide it with the appropriate prefixing. Signed-off-by: Jingoo Han Cc: Alberto Panizzo Cc: Richard Purdie Cc: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/l4f00242t03.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/video/backlight/l4f00242t03.c b/drivers/video/backlight/l4f00242t03.c index 6022b67285ec..83decca4a692 100644 --- a/drivers/video/backlight/l4f00242t03.c +++ b/drivers/video/backlight/l4f00242t03.c @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include -- cgit v1.2.2 From f5f4fd451634e5295cc807684a0eabd264b9db4d Mon Sep 17 00:00:00 2001 From: Corentin Chary Date: Tue, 29 May 2012 15:07:20 -0700 Subject: backlight: initialize struct backlight_properties properly In all these files, the .power field was never correctly initialized. Signed-off-by: Corentin Chary Cc: Jingoo Han Cc: Dave Airlie Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/platform/x86/toshiba_acpi.c | 1 + drivers/video/backlight/da903x_bl.c | 1 + drivers/video/backlight/pcf50633-backlight.c | 1 + drivers/video/backlight/wm831x_bl.c | 1 + drivers/video/omap2/displays/panel-acx565akm.c | 1 + 5 files changed, 5 insertions(+) (limited to 'drivers') diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c index ee79ce64d9df..57787d87d9a4 100644 --- a/drivers/platform/x86/toshiba_acpi.c +++ b/drivers/platform/x86/toshiba_acpi.c @@ -1104,6 +1104,7 @@ static int __devinit toshiba_acpi_add(struct acpi_device *acpi_dev) mutex_init(&dev->mutex); + memset(&props, 0, sizeof(props)); props.type = BACKLIGHT_PLATFORM; props.max_brightness = HCI_LCD_BRIGHTNESS_LEVELS - 1; dev->backlight_dev = backlight_device_register("toshiba", diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c index 30e19681a30b..573c7ece0fde 100644 --- a/drivers/video/backlight/da903x_bl.c +++ b/drivers/video/backlight/da903x_bl.c @@ -136,6 +136,7 @@ static int da903x_backlight_probe(struct platform_device *pdev) da903x_write(data->da903x_dev, DA9034_WLED_CONTROL2, DA9034_WLED_ISET(pdata->output_current)); + memset(&props, 0, sizeof(props)); props.type = BACKLIGHT_RAW; props.max_brightness = max_brightness; bl = backlight_device_register(pdev->name, data->da903x_dev, data, diff --git a/drivers/video/backlight/pcf50633-backlight.c b/drivers/video/backlight/pcf50633-backlight.c index c65853cb9740..c092159f4383 100644 --- a/drivers/video/backlight/pcf50633-backlight.c +++ b/drivers/video/backlight/pcf50633-backlight.c @@ -111,6 +111,7 @@ static int __devinit pcf50633_bl_probe(struct platform_device *pdev) if (!pcf_bl) return -ENOMEM; + memset(&bl_props, 0, sizeof(bl_props)); bl_props.type = BACKLIGHT_RAW; bl_props.max_brightness = 0x3f; bl_props.power = FB_BLANK_UNBLANK; diff --git a/drivers/video/backlight/wm831x_bl.c b/drivers/video/backlight/wm831x_bl.c index 5d365deb5f82..9e5517a3a52b 100644 --- a/drivers/video/backlight/wm831x_bl.c +++ b/drivers/video/backlight/wm831x_bl.c @@ -194,6 +194,7 @@ static int wm831x_backlight_probe(struct platform_device *pdev) data->current_brightness = 0; data->isink_reg = isink_reg; + memset(&props, 0, sizeof(props)); props.type = BACKLIGHT_RAW; props.max_brightness = max_isel; bl = backlight_device_register("wm831x", &pdev->dev, data, diff --git a/drivers/video/omap2/displays/panel-acx565akm.c b/drivers/video/omap2/displays/panel-acx565akm.c index d26f37ac69d8..74e7cf078505 100644 --- a/drivers/video/omap2/displays/panel-acx565akm.c +++ b/drivers/video/omap2/displays/panel-acx565akm.c @@ -532,6 +532,7 @@ static int acx_panel_probe(struct omap_dss_device *dssdev) /*------- Backlight control --------*/ + memset(&props, 0, sizeof(props)); props.fb_blank = FB_BLANK_UNBLANK; props.power = FB_BLANK_UNBLANK; props.type = BACKLIGHT_RAW; -- cgit v1.2.2 From 58875ea925763e99b8862dc07bcdebde774d830b Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:21 -0700 Subject: backlight: adp8860: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Acked-by: Michael Hennerich Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/adp8860_bl.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/adp8860_bl.c b/drivers/video/backlight/adp8860_bl.c index 6c0951c931d4..77d1fdba597f 100644 --- a/drivers/video/backlight/adp8860_bl.c +++ b/drivers/video/backlight/adp8860_bl.c @@ -222,7 +222,8 @@ static int __devinit adp8860_led_probe(struct i2c_client *client) struct led_info *cur_led; int ret, i; - led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL); + led = devm_kzalloc(&client->dev, sizeof(*led) * pdata->num_leds, + GFP_KERNEL); if (led == NULL) { dev_err(&client->dev, "failed to alloc memory\n"); return -ENOMEM; @@ -236,7 +237,7 @@ static int __devinit adp8860_led_probe(struct i2c_client *client) if (ret) { dev_err(&client->dev, "failed to write\n"); - goto err_free; + return ret; } for (i = 0; i < pdata->num_leds; ++i) { @@ -291,9 +292,6 @@ static int __devinit adp8860_led_probe(struct i2c_client *client) cancel_work_sync(&led[i].work); } - err_free: - kfree(led); - return ret; } @@ -309,7 +307,6 @@ static int __devexit adp8860_led_remove(struct i2c_client *client) cancel_work_sync(&data->led[i].work); } - kfree(data->led); return 0; } #else @@ -675,13 +672,13 @@ static int __devinit adp8860_probe(struct i2c_client *client, return -EINVAL; } - data = kzalloc(sizeof(*data), GFP_KERNEL); + data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); if (data == NULL) return -ENOMEM; ret = adp8860_read(client, ADP8860_MFDVID, ®_val); if (ret < 0) - goto out2; + return ret; switch (ADP8860_MANID(reg_val)) { case ADP8863_MANUFID: @@ -694,8 +691,7 @@ static int __devinit adp8860_probe(struct i2c_client *client, break; default: dev_err(&client->dev, "failed to probe\n"); - ret = -ENODEV; - goto out2; + return -ENODEV; } /* It's confirmed that the DEVID field is actually a REVID */ @@ -717,8 +713,7 @@ static int __devinit adp8860_probe(struct i2c_client *client, &client->dev, data, &adp8860_bl_ops, &props); if (IS_ERR(bl)) { dev_err(&client->dev, "failed to register backlight\n"); - ret = PTR_ERR(bl); - goto out2; + return PTR_ERR(bl); } bl->props.brightness = ADP8860_MAX_BRIGHTNESS; @@ -756,8 +751,6 @@ out: &adp8860_bl_attr_group); out1: backlight_device_unregister(bl); -out2: - kfree(data); return ret; } @@ -776,7 +769,6 @@ static int __devexit adp8860_remove(struct i2c_client *client) &adp8860_bl_attr_group); backlight_device_unregister(data->bl); - kfree(data); return 0; } -- cgit v1.2.2 From 91cdb239905ea98fbcd373254ea0de86ca16c1e0 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:21 -0700 Subject: backlight: adp8870: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Acked-by: Michael Hennerich Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/adp8870_bl.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/adp8870_bl.c b/drivers/video/backlight/adp8870_bl.c index c90539bb429f..edf7f91c8e61 100644 --- a/drivers/video/backlight/adp8870_bl.c +++ b/drivers/video/backlight/adp8870_bl.c @@ -244,8 +244,8 @@ static int __devinit adp8870_led_probe(struct i2c_client *client) struct led_info *cur_led; int ret, i; - - led = kcalloc(pdata->num_leds, sizeof(*led), GFP_KERNEL); + led = devm_kzalloc(&client->dev, pdata->num_leds * sizeof(*led), + GFP_KERNEL); if (led == NULL) { dev_err(&client->dev, "failed to alloc memory\n"); return -ENOMEM; @@ -253,17 +253,17 @@ static int __devinit adp8870_led_probe(struct i2c_client *client) ret = adp8870_write(client, ADP8870_ISCLAW, pdata->led_fade_law); if (ret) - goto err_free; + return ret; ret = adp8870_write(client, ADP8870_ISCT1, (pdata->led_on_time & 0x3) << 6); if (ret) - goto err_free; + return ret; ret = adp8870_write(client, ADP8870_ISCF, FADE_VAL(pdata->led_fade_in, pdata->led_fade_out)); if (ret) - goto err_free; + return ret; for (i = 0; i < pdata->num_leds; ++i) { cur_led = &pdata->leds[i]; @@ -317,9 +317,6 @@ static int __devinit adp8870_led_probe(struct i2c_client *client) cancel_work_sync(&led[i].work); } - err_free: - kfree(led); - return ret; } @@ -335,7 +332,6 @@ static int __devexit adp8870_led_remove(struct i2c_client *client) cancel_work_sync(&data->led[i].work); } - kfree(data->led); return 0; } #else @@ -874,7 +870,7 @@ static int __devinit adp8870_probe(struct i2c_client *client, return -ENODEV; } - data = kzalloc(sizeof(*data), GFP_KERNEL); + data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); if (data == NULL) return -ENOMEM; @@ -894,8 +890,7 @@ static int __devinit adp8870_probe(struct i2c_client *client, &client->dev, data, &adp8870_bl_ops, &props); if (IS_ERR(bl)) { dev_err(&client->dev, "failed to register backlight\n"); - ret = PTR_ERR(bl); - goto out2; + return PTR_ERR(bl); } data->bl = bl; @@ -930,8 +925,6 @@ out: &adp8870_bl_attr_group); out1: backlight_device_unregister(bl); -out2: - kfree(data); return ret; } @@ -950,7 +943,6 @@ static int __devexit adp8870_remove(struct i2c_client *client) &adp8870_bl_attr_group); backlight_device_unregister(data->bl); - kfree(data); return 0; } -- cgit v1.2.2 From 80629efcae09c5d80a9fdeea5226cd81b4fec7f3 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:21 -0700 Subject: backlight: ams369fg06: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/ams369fg06.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/ams369fg06.c b/drivers/video/backlight/ams369fg06.c index d2494c59e166..3729238e7096 100644 --- a/drivers/video/backlight/ams369fg06.c +++ b/drivers/video/backlight/ams369fg06.c @@ -482,7 +482,7 @@ static int __devinit ams369fg06_probe(struct spi_device *spi) struct backlight_device *bd = NULL; struct backlight_properties props; - lcd = kzalloc(sizeof(struct ams369fg06), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct ams369fg06), GFP_KERNEL); if (!lcd) return -ENOMEM; @@ -492,7 +492,7 @@ static int __devinit ams369fg06_probe(struct spi_device *spi) ret = spi_setup(spi); if (ret < 0) { dev_err(&spi->dev, "spi setup failed.\n"); - goto out_free_lcd; + return ret; } lcd->spi = spi; @@ -501,15 +501,13 @@ static int __devinit ams369fg06_probe(struct spi_device *spi) lcd->lcd_pd = spi->dev.platform_data; if (!lcd->lcd_pd) { dev_err(&spi->dev, "platform data is NULL\n"); - goto out_free_lcd; + return -EFAULT; } ld = lcd_device_register("ams369fg06", &spi->dev, lcd, &ams369fg06_lcd_ops); - if (IS_ERR(ld)) { - ret = PTR_ERR(ld); - goto out_free_lcd; - } + if (IS_ERR(ld)) + return PTR_ERR(ld); lcd->ld = ld; @@ -547,8 +545,6 @@ static int __devinit ams369fg06_probe(struct spi_device *spi) out_lcd_unregister: lcd_device_unregister(ld); -out_free_lcd: - kfree(lcd); return ret; } @@ -559,7 +555,6 @@ static int __devexit ams369fg06_remove(struct spi_device *spi) ams369fg06_power(lcd, FB_BLANK_POWERDOWN); backlight_device_unregister(lcd->bd); lcd_device_unregister(lcd->ld); - kfree(lcd); return 0; } -- cgit v1.2.2 From 06c96f189bf94448779db66944836a827517d6c9 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:22 -0700 Subject: backlight: corgi_lcd: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Eric Miao Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/corgi_lcd.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c index 6dab13fe562e..23d732677ba1 100644 --- a/drivers/video/backlight/corgi_lcd.c +++ b/drivers/video/backlight/corgi_lcd.c @@ -544,7 +544,7 @@ static int __devinit corgi_lcd_probe(struct spi_device *spi) return -EINVAL; } - lcd = kzalloc(sizeof(struct corgi_lcd), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct corgi_lcd), GFP_KERNEL); if (!lcd) { dev_err(&spi->dev, "failed to allocate memory\n"); return -ENOMEM; @@ -554,10 +554,9 @@ static int __devinit corgi_lcd_probe(struct spi_device *spi) lcd->lcd_dev = lcd_device_register("corgi_lcd", &spi->dev, lcd, &corgi_lcd_ops); - if (IS_ERR(lcd->lcd_dev)) { - ret = PTR_ERR(lcd->lcd_dev); - goto err_free_lcd; - } + if (IS_ERR(lcd->lcd_dev)) + return PTR_ERR(lcd->lcd_dev); + lcd->power = FB_BLANK_POWERDOWN; lcd->mode = (pdata) ? pdata->init_mode : CORGI_LCD_MODE_VGA; @@ -591,8 +590,6 @@ err_unregister_bl: backlight_device_unregister(lcd->bl_dev); err_unregister_lcd: lcd_device_unregister(lcd->lcd_dev); -err_free_lcd: - kfree(lcd); return ret; } @@ -613,7 +610,6 @@ static int __devexit corgi_lcd_remove(struct spi_device *spi) corgi_lcd_set_power(lcd->lcd_dev, FB_BLANK_POWERDOWN); lcd_device_unregister(lcd->lcd_dev); - kfree(lcd); return 0; } -- cgit v1.2.2 From 9828eb09bf5a450bd40a6931a751a122a4c66e2b Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:22 -0700 Subject: backlight: ili9320: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Ben Dooks Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/ili9320.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/ili9320.c b/drivers/video/backlight/ili9320.c index 5118a9f029ab..6c9399341bcf 100644 --- a/drivers/video/backlight/ili9320.c +++ b/drivers/video/backlight/ili9320.c @@ -220,7 +220,7 @@ int __devinit ili9320_probe_spi(struct spi_device *spi, /* allocate and initialse our state */ - ili = kzalloc(sizeof(struct ili9320), GFP_KERNEL); + ili = devm_kzalloc(&spi->dev, sizeof(struct ili9320), GFP_KERNEL); if (ili == NULL) { dev_err(dev, "no memory for device\n"); return -ENOMEM; @@ -240,8 +240,7 @@ int __devinit ili9320_probe_spi(struct spi_device *spi, lcd = lcd_device_register("ili9320", dev, ili, &ili9320_ops); if (IS_ERR(lcd)) { dev_err(dev, "failed to register lcd device\n"); - ret = PTR_ERR(lcd); - goto err_free; + return PTR_ERR(lcd); } ili->lcd = lcd; @@ -259,9 +258,6 @@ int __devinit ili9320_probe_spi(struct spi_device *spi, err_unregister: lcd_device_unregister(lcd); - err_free: - kfree(ili); - return ret; } @@ -272,7 +268,6 @@ int __devexit ili9320_remove(struct ili9320 *ili) ili9320_power(ili, FB_BLANK_POWERDOWN); lcd_device_unregister(ili->lcd); - kfree(ili); return 0; } -- cgit v1.2.2 From ba4a887ac3ff2e3ce876115a3e0828caa9c6f428 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:23 -0700 Subject: backlight: l4f00242t03: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Alberto Panizzo Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/l4f00242t03.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/l4f00242t03.c b/drivers/video/backlight/l4f00242t03.c index 83decca4a692..40f606a86093 100644 --- a/drivers/video/backlight/l4f00242t03.c +++ b/drivers/video/backlight/l4f00242t03.c @@ -161,7 +161,8 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) return -EINVAL; } - priv = kzalloc(sizeof(struct l4f00242t03_priv), GFP_KERNEL); + priv = devm_kzalloc(&spi->dev, sizeof(struct l4f00242t03_priv), + GFP_KERNEL); if (priv == NULL) { dev_err(&spi->dev, "No memory for this device.\n"); @@ -179,7 +180,7 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) if (ret) { dev_err(&spi->dev, "Unable to get the lcd l4f00242t03 reset gpio.\n"); - goto err; + return ret; } ret = gpio_request_one(pdata->data_enable_gpio, GPIOF_OUT_INIT_LOW, @@ -187,7 +188,7 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) if (ret) { dev_err(&spi->dev, "Unable to get the lcd l4f00242t03 data en gpio.\n"); - goto err2; + goto err; } priv->io_reg = regulator_get(&spi->dev, "vdd"); @@ -195,7 +196,7 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) ret = PTR_ERR(priv->io_reg); dev_err(&spi->dev, "%s: Unable to get the IO regulator\n", __func__); - goto err3; + goto err2; } priv->core_reg = regulator_get(&spi->dev, "vcore"); @@ -203,14 +204,14 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) ret = PTR_ERR(priv->core_reg); dev_err(&spi->dev, "%s: Unable to get the core regulator\n", __func__); - goto err4; + goto err3; } priv->ld = lcd_device_register("l4f00242t03", &spi->dev, priv, &l4f_ops); if (IS_ERR(priv->ld)) { ret = PTR_ERR(priv->ld); - goto err5; + goto err4; } /* Init the LCD */ @@ -222,16 +223,14 @@ static int __devinit l4f00242t03_probe(struct spi_device *spi) return 0; -err5: - regulator_put(priv->core_reg); err4: - regulator_put(priv->io_reg); + regulator_put(priv->core_reg); err3: - gpio_free(pdata->data_enable_gpio); + regulator_put(priv->io_reg); err2: - gpio_free(pdata->reset_gpio); + gpio_free(pdata->data_enable_gpio); err: - kfree(priv); + gpio_free(pdata->reset_gpio); return ret; } @@ -252,8 +251,6 @@ static int __devexit l4f00242t03_remove(struct spi_device *spi) regulator_put(priv->io_reg); regulator_put(priv->core_reg); - kfree(priv); - return 0; } -- cgit v1.2.2 From 86f6be4fae7aeaeb038dc809b232ebe76b2e1dd2 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:23 -0700 Subject: backlight: ld9040: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Donghwa Lee Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/ld9040.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/ld9040.c b/drivers/video/backlight/ld9040.c index 2ea06a5fae55..58f517fb7d40 100644 --- a/drivers/video/backlight/ld9040.c +++ b/drivers/video/backlight/ld9040.c @@ -707,7 +707,7 @@ static int ld9040_probe(struct spi_device *spi) struct backlight_device *bd = NULL; struct backlight_properties props; - lcd = kzalloc(sizeof(struct ld9040), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct ld9040), GFP_KERNEL); if (!lcd) return -ENOMEM; @@ -717,7 +717,7 @@ static int ld9040_probe(struct spi_device *spi) ret = spi_setup(spi); if (ret < 0) { dev_err(&spi->dev, "spi setup failed.\n"); - goto out_free_lcd; + return ret; } lcd->spi = spi; @@ -726,7 +726,7 @@ static int ld9040_probe(struct spi_device *spi) lcd->lcd_pd = spi->dev.platform_data; if (!lcd->lcd_pd) { dev_err(&spi->dev, "platform data is NULL.\n"); - goto out_free_lcd; + return -EFAULT; } mutex_init(&lcd->lock); @@ -734,13 +734,13 @@ static int ld9040_probe(struct spi_device *spi) ret = regulator_bulk_get(lcd->dev, ARRAY_SIZE(supplies), supplies); if (ret) { dev_err(lcd->dev, "Failed to get regulators: %d\n", ret); - goto out_free_lcd; + return ret; } ld = lcd_device_register("ld9040", &spi->dev, lcd, &ld9040_lcd_ops); if (IS_ERR(ld)) { ret = PTR_ERR(ld); - goto out_free_lcd; + goto out_free_regulator; } lcd->ld = ld; @@ -782,10 +782,9 @@ static int ld9040_probe(struct spi_device *spi) out_unregister_lcd: lcd_device_unregister(lcd->ld); -out_free_lcd: +out_free_regulator: regulator_bulk_free(ARRAY_SIZE(supplies), supplies); - kfree(lcd); return ret; } @@ -797,7 +796,6 @@ static int __devexit ld9040_remove(struct spi_device *spi) backlight_device_unregister(lcd->bd); lcd_device_unregister(lcd->ld); regulator_bulk_free(ARRAY_SIZE(supplies), supplies); - kfree(lcd); return 0; } -- cgit v1.2.2 From 26f2b35c1e1463c851be23c9774bd24caae7b517 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:23 -0700 Subject: backlight: lms283gf05: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Acked-by: Marek Vasut Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/lms283gf05.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/lms283gf05.c b/drivers/video/backlight/lms283gf05.c index 4161f9e3982a..a9f2c36966f1 100644 --- a/drivers/video/backlight/lms283gf05.c +++ b/drivers/video/backlight/lms283gf05.c @@ -168,7 +168,8 @@ static int __devinit lms283gf05_probe(struct spi_device *spi) goto err; } - st = kzalloc(sizeof(struct lms283gf05_state), GFP_KERNEL); + st = devm_kzalloc(&spi->dev, sizeof(struct lms283gf05_state), + GFP_KERNEL); if (st == NULL) { dev_err(&spi->dev, "No memory for device state\n"); ret = -ENOMEM; @@ -178,7 +179,7 @@ static int __devinit lms283gf05_probe(struct spi_device *spi) ld = lcd_device_register("lms283gf05", &spi->dev, st, &lms_ops); if (IS_ERR(ld)) { ret = PTR_ERR(ld); - goto err2; + goto err; } st->spi = spi; @@ -193,8 +194,6 @@ static int __devinit lms283gf05_probe(struct spi_device *spi) return 0; -err2: - kfree(st); err: if (pdata != NULL) gpio_free(pdata->reset_gpio); @@ -212,8 +211,6 @@ static int __devexit lms283gf05_remove(struct spi_device *spi) if (pdata != NULL) gpio_free(pdata->reset_gpio); - kfree(st); - return 0; } -- cgit v1.2.2 From ab03e04741fc7a5747daabc57d15cb1a3e2fd289 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:24 -0700 Subject: backlight: ltv350qv: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Haavard Skinnemoen Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/ltv350qv.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c index d23922ff3354..6c0f1ac0d32a 100644 --- a/drivers/video/backlight/ltv350qv.c +++ b/drivers/video/backlight/ltv350qv.c @@ -232,23 +232,20 @@ static int __devinit ltv350qv_probe(struct spi_device *spi) struct lcd_device *ld; int ret; - lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct ltv350qv), GFP_KERNEL); if (!lcd) return -ENOMEM; lcd->spi = spi; lcd->power = FB_BLANK_POWERDOWN; - lcd->buffer = kzalloc(8, GFP_KERNEL); - if (!lcd->buffer) { - ret = -ENOMEM; - goto out_free_lcd; - } + lcd->buffer = devm_kzalloc(&spi->dev, 8, GFP_KERNEL); + if (!lcd->buffer) + return -ENOMEM; ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); - if (IS_ERR(ld)) { - ret = PTR_ERR(ld); - goto out_free_buffer; - } + if (IS_ERR(ld)) + return PTR_ERR(ld); + lcd->ld = ld; ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK); @@ -261,10 +258,6 @@ static int __devinit ltv350qv_probe(struct spi_device *spi) out_unregister: lcd_device_unregister(ld); -out_free_buffer: - kfree(lcd->buffer); -out_free_lcd: - kfree(lcd); return ret; } @@ -274,8 +267,6 @@ static int __devexit ltv350qv_remove(struct spi_device *spi) ltv350qv_power(lcd, FB_BLANK_POWERDOWN); lcd_device_unregister(lcd->ld); - kfree(lcd->buffer); - kfree(lcd); return 0; } -- cgit v1.2.2 From 541f936f5d3993c5bbed33bdb53acd6de2403b04 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:24 -0700 Subject: backlight: s6e63m0: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: InKi Dae Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/s6e63m0.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/s6e63m0.c b/drivers/video/backlight/s6e63m0.c index 3ed05c76856e..6437ae474cf2 100644 --- a/drivers/video/backlight/s6e63m0.c +++ b/drivers/video/backlight/s6e63m0.c @@ -741,7 +741,7 @@ static int __devinit s6e63m0_probe(struct spi_device *spi) struct backlight_device *bd = NULL; struct backlight_properties props; - lcd = kzalloc(sizeof(struct s6e63m0), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct s6e63m0), GFP_KERNEL); if (!lcd) return -ENOMEM; @@ -751,7 +751,7 @@ static int __devinit s6e63m0_probe(struct spi_device *spi) ret = spi_setup(spi); if (ret < 0) { dev_err(&spi->dev, "spi setup failed.\n"); - goto out_free_lcd; + return ret; } lcd->spi = spi; @@ -760,14 +760,12 @@ static int __devinit s6e63m0_probe(struct spi_device *spi) lcd->lcd_pd = (struct lcd_platform_data *)spi->dev.platform_data; if (!lcd->lcd_pd) { dev_err(&spi->dev, "platform data is NULL.\n"); - goto out_free_lcd; + return -EFAULT; } ld = lcd_device_register("s6e63m0", &spi->dev, lcd, &s6e63m0_lcd_ops); - if (IS_ERR(ld)) { - ret = PTR_ERR(ld); - goto out_free_lcd; - } + if (IS_ERR(ld)) + return PTR_ERR(ld); lcd->ld = ld; @@ -824,8 +822,6 @@ static int __devinit s6e63m0_probe(struct spi_device *spi) out_lcd_unregister: lcd_device_unregister(ld); -out_free_lcd: - kfree(lcd); return ret; } @@ -838,7 +834,6 @@ static int __devexit s6e63m0_remove(struct spi_device *spi) device_remove_file(&spi->dev, &dev_attr_gamma_mode); backlight_device_unregister(lcd->bd); lcd_device_unregister(lcd->ld); - kfree(lcd); return 0; } -- cgit v1.2.2 From d073adc5caf03a928a230baf2d8a86b1f9a03710 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:24 -0700 Subject: backlight: tdo24m: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Eric Miao Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/tdo24m.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/tdo24m.c b/drivers/video/backlight/tdo24m.c index 2368b8e5f89e..02444d042cd5 100644 --- a/drivers/video/backlight/tdo24m.c +++ b/drivers/video/backlight/tdo24m.c @@ -349,7 +349,7 @@ static int __devinit tdo24m_probe(struct spi_device *spi) if (err) return err; - lcd = kzalloc(sizeof(struct tdo24m), GFP_KERNEL); + lcd = devm_kzalloc(&spi->dev, sizeof(struct tdo24m), GFP_KERNEL); if (!lcd) return -ENOMEM; @@ -357,11 +357,9 @@ static int __devinit tdo24m_probe(struct spi_device *spi) lcd->power = FB_BLANK_POWERDOWN; lcd->mode = MODE_VGA; /* default to VGA */ - lcd->buf = kmalloc(TDO24M_SPI_BUFF_SIZE, GFP_KERNEL); - if (lcd->buf == NULL) { - kfree(lcd); + lcd->buf = devm_kzalloc(&spi->dev, TDO24M_SPI_BUFF_SIZE, GFP_KERNEL); + if (lcd->buf == NULL) return -ENOMEM; - } m = &lcd->msg; x = &lcd->xfer; @@ -383,15 +381,13 @@ static int __devinit tdo24m_probe(struct spi_device *spi) break; default: dev_err(&spi->dev, "Unsupported model"); - goto out_free; + return -EINVAL; } lcd->lcd_dev = lcd_device_register("tdo24m", &spi->dev, lcd, &tdo24m_ops); - if (IS_ERR(lcd->lcd_dev)) { - err = PTR_ERR(lcd->lcd_dev); - goto out_free; - } + if (IS_ERR(lcd->lcd_dev)) + return PTR_ERR(lcd->lcd_dev); dev_set_drvdata(&spi->dev, lcd); err = tdo24m_power(lcd, FB_BLANK_UNBLANK); @@ -402,9 +398,6 @@ static int __devinit tdo24m_probe(struct spi_device *spi) out_unregister: lcd_device_unregister(lcd->lcd_dev); -out_free: - kfree(lcd->buf); - kfree(lcd); return err; } @@ -414,8 +407,6 @@ static int __devexit tdo24m_remove(struct spi_device *spi) tdo24m_power(lcd, FB_BLANK_POWERDOWN); lcd_device_unregister(lcd->lcd_dev); - kfree(lcd->buf); - kfree(lcd); return 0; } -- cgit v1.2.2 From f072c8900c11bc91eb3fa9287bab4ce606632be5 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:25 -0700 Subject: backlight: tosa_bl: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Dmitry Baryshkov Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/tosa_bl.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c index 2b241abced43..0d54e607e82d 100644 --- a/drivers/video/backlight/tosa_bl.c +++ b/drivers/video/backlight/tosa_bl.c @@ -82,8 +82,11 @@ static int __devinit tosa_bl_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct backlight_properties props; - struct tosa_bl_data *data = kzalloc(sizeof(struct tosa_bl_data), GFP_KERNEL); + struct tosa_bl_data *data; int ret = 0; + + data = devm_kzalloc(&client->dev, sizeof(struct tosa_bl_data), + GFP_KERNEL); if (!data) return -ENOMEM; @@ -92,7 +95,7 @@ static int __devinit tosa_bl_probe(struct i2c_client *client, ret = gpio_request(TOSA_GPIO_BL_C20MA, "backlight"); if (ret) { dev_dbg(&data->bl->dev, "Unable to request gpio!\n"); - goto err_gpio_bl; + return ret; } ret = gpio_direction_output(TOSA_GPIO_BL_C20MA, 0); if (ret) @@ -122,8 +125,6 @@ err_reg: data->bl = NULL; err_gpio_dir: gpio_free(TOSA_GPIO_BL_C20MA); -err_gpio_bl: - kfree(data); return ret; } @@ -136,8 +137,6 @@ static int __devexit tosa_bl_remove(struct i2c_client *client) gpio_free(TOSA_GPIO_BL_C20MA); - kfree(data); - return 0; } -- cgit v1.2.2 From c8515294a31ec63536eb1a2ba7a38797435dda4f Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 29 May 2012 15:07:25 -0700 Subject: backlight: tosa_lcd: use devm_ functions The devm_ functions allocate memory that is released when a driver detaches. This patch uses devm_kzalloc of these functions. Signed-off-by: Jingoo Han Cc: Dmitry Baryshkov Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/backlight/tosa_lcd.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/video/backlight/tosa_lcd.c b/drivers/video/backlight/tosa_lcd.c index 2231aec23918..47823b8efff0 100644 --- a/drivers/video/backlight/tosa_lcd.c +++ b/drivers/video/backlight/tosa_lcd.c @@ -174,7 +174,8 @@ static int __devinit tosa_lcd_probe(struct spi_device *spi) int ret; struct tosa_lcd_data *data; - data = kzalloc(sizeof(struct tosa_lcd_data), GFP_KERNEL); + data = devm_kzalloc(&spi->dev, sizeof(struct tosa_lcd_data), + GFP_KERNEL); if (!data) return -ENOMEM; @@ -187,7 +188,7 @@ static int __devinit tosa_lcd_probe(struct spi_device *spi) ret = spi_setup(spi); if (ret < 0) - goto err_spi; + return ret; data->spi = spi; dev_set_drvdata(&spi->dev, data); @@ -224,8 +225,6 @@ err_gpio_dir: gpio_free(TOSA_GPIO_TG_ON); err_gpio_tg: dev_set_drvdata(&spi->dev, NULL); -err_spi: - kfree(data); return ret; } @@ -242,7 +241,6 @@ static int __devexit tosa_lcd_remove(struct spi_device *spi) gpio_free(TOSA_GPIO_TG_ON); dev_set_drvdata(&spi->dev, NULL); - kfree(data); return 0; } -- cgit v1.2.2 From 5bc9ad774c063f6b41965e7314f2c26aa5e465a0 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 29 May 2012 15:07:26 -0700 Subject: drivers/leds/leds-lp5521.c: fix lp5521_read() error handling Gcc 4.6.2 complains that: drivers/leds/leds-lp5521.c: In function `lp5521_load_program': drivers/leds/leds-lp5521.c:214:21: warning: `mode' may be used uninitialized in this function [-Wuninitialized] drivers/leds/leds-lp5521.c: In function `lp5521_probe': drivers/leds/leds-lp5521.c:788:5: warning: `buf' may be used uninitialized in this function [-Wuninitialized] drivers/leds/leds-lp5521.c:740:6: warning: `ret' may be used uninitialized in this function [-Wuninitialized] These are real problems if lp5521_read() returns an error. When that happens we should handle it, instead of ignoring it or doing a bitwise OR with all the other error codes and continuing. Signed-off-by: Dan Carpenter Cc: Milo Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/leds-lp5521.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/leds-lp5521.c b/drivers/leds/leds-lp5521.c index 410a723b8691..23815624f35e 100644 --- a/drivers/leds/leds-lp5521.c +++ b/drivers/leds/leds-lp5521.c @@ -193,9 +193,14 @@ static int lp5521_load_program(struct lp5521_engine *eng, const u8 *pattern) /* move current engine to direct mode and remember the state */ ret = lp5521_set_engine_mode(eng, LP5521_CMD_DIRECT); + if (ret) + return ret; + /* Mode change requires min 500 us delay. 1 - 2 ms with margin */ usleep_range(1000, 2000); - ret |= lp5521_read(client, LP5521_REG_OP_MODE, &mode); + ret = lp5521_read(client, LP5521_REG_OP_MODE, &mode); + if (ret) + return ret; /* For loading, all the engines to load mode */ lp5521_write(client, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); @@ -211,8 +216,7 @@ static int lp5521_load_program(struct lp5521_engine *eng, const u8 *pattern) LP5521_PROG_MEM_SIZE, pattern); - ret |= lp5521_write(client, LP5521_REG_OP_MODE, mode); - return ret; + return lp5521_write(client, LP5521_REG_OP_MODE, mode); } static int lp5521_set_led_current(struct lp5521_chip *chip, int led, u8 curr) @@ -785,7 +789,7 @@ static int __devinit lp5521_probe(struct i2c_client *client, * LP5521_REG_ENABLE register will not have any effect - strange! */ ret = lp5521_read(client, LP5521_REG_R_CURRENT, &buf); - if (buf != LP5521_REG_R_CURR_DEFAULT) { + if (ret || buf != LP5521_REG_R_CURR_DEFAULT) { dev_err(&client->dev, "error in resetting chip\n"); goto fail2; } -- cgit v1.2.2 From 5ba736311bf6fea25c97e868b7de6d3de8800aba Mon Sep 17 00:00:00 2001 From: David Dajun Chen Date: Tue, 29 May 2012 15:07:26 -0700 Subject: leds: driver for DA9052/53 PMIC v2 LED Driver for Dialog Semiconductor DA9052/53 PMICs. [akpm@linux-foundation.org: make led_reg static] Signed-off-by: David Dajun Chen Signed-off-by: Ashish Jangam Reviewed-by: Lars-Peter Clausen Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/Kconfig | 8 ++ drivers/leds/Makefile | 1 + drivers/leds/leds-da9052.c | 214 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 223 insertions(+) create mode 100644 drivers/leds/leds-da9052.c (limited to 'drivers') diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index ff4b8cfda585..cede3397bb12 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -259,6 +259,14 @@ config LEDS_DA903X This option enables support for on-chip LED drivers found on Dialog Semiconductor DA9030/DA9034 PMICs. +config LEDS_DA9052 + tristate "Dialog DA9052/DA9053 LEDS" + depends on LEDS_CLASS + depends on PMIC_DA9052 + help + This option enables support for on-chip LED drivers found + on Dialog Semiconductor DA9052-BC and DA9053-AA/Bx PMICs. + config LEDS_DAC124S085 tristate "LED Support for DAC124S085 SPI DAC" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 890481cb09f6..900f9294bd8c 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_LEDS_FSG) += leds-fsg.o obj-$(CONFIG_LEDS_PCA955X) += leds-pca955x.o obj-$(CONFIG_LEDS_PCA9633) += leds-pca9633.o obj-$(CONFIG_LEDS_DA903X) += leds-da903x.o +obj-$(CONFIG_LEDS_DA9052) += leds-da9052.o obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o obj-$(CONFIG_LEDS_PWM) += leds-pwm.o diff --git a/drivers/leds/leds-da9052.c b/drivers/leds/leds-da9052.c new file mode 100644 index 000000000000..58a5244c437e --- /dev/null +++ b/drivers/leds/leds-da9052.c @@ -0,0 +1,214 @@ +/* + * LED Driver for Dialog DA9052 PMICs. + * + * Copyright(c) 2012 Dialog Semiconductor Ltd. + * + * Author: David Dajun Chen + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DA9052_OPENDRAIN_OUTPUT 2 +#define DA9052_SET_HIGH_LVL_OUTPUT (1 << 3) +#define DA9052_MASK_UPPER_NIBBLE 0xF0 +#define DA9052_MASK_LOWER_NIBBLE 0x0F +#define DA9052_NIBBLE_SHIFT 4 +#define DA9052_MAX_BRIGHTNESS 0x5f + +struct da9052_led { + struct led_classdev cdev; + struct work_struct work; + struct da9052 *da9052; + unsigned char led_index; + unsigned char id; + int brightness; +}; + +static unsigned char led_reg[] = { + DA9052_LED_CONT_4_REG, + DA9052_LED_CONT_5_REG, +}; + +static int da9052_set_led_brightness(struct da9052_led *led) +{ + u8 val; + int error; + + val = (led->brightness & 0x7f) | DA9052_LED_CONT_DIM; + + error = da9052_reg_write(led->da9052, led_reg[led->led_index], val); + if (error < 0) + dev_err(led->da9052->dev, "Failed to set led brightness, %d\n", + error); + return error; +} + +static void da9052_led_work(struct work_struct *work) +{ + struct da9052_led *led = container_of(work, struct da9052_led, work); + + da9052_set_led_brightness(led); +} + +static void da9052_led_set(struct led_classdev *led_cdev, + enum led_brightness value) +{ + struct da9052_led *led; + + led = container_of(led_cdev, struct da9052_led, cdev); + led->brightness = value; + schedule_work(&led->work); +} + +static int da9052_configure_leds(struct da9052 *da9052) +{ + int error; + unsigned char register_value = DA9052_OPENDRAIN_OUTPUT + | DA9052_SET_HIGH_LVL_OUTPUT; + + error = da9052_reg_update(da9052, DA9052_GPIO_14_15_REG, + DA9052_MASK_LOWER_NIBBLE, + register_value); + + if (error < 0) { + dev_err(da9052->dev, "Failed to write GPIO 14-15 reg, %d\n", + error); + return error; + } + + error = da9052_reg_update(da9052, DA9052_GPIO_14_15_REG, + DA9052_MASK_UPPER_NIBBLE, + register_value << DA9052_NIBBLE_SHIFT); + if (error < 0) + dev_err(da9052->dev, "Failed to write GPIO 14-15 reg, %d\n", + error); + + return error; +} + +static int __devinit da9052_led_probe(struct platform_device *pdev) +{ + struct da9052_pdata *pdata; + struct da9052 *da9052; + struct led_platform_data *pled; + struct da9052_led *led = NULL; + int error = -ENODEV; + int i; + + da9052 = dev_get_drvdata(pdev->dev.parent); + pdata = da9052->dev->platform_data; + if (pdata == NULL) { + dev_err(&pdev->dev, "No platform data\n"); + goto err; + } + + pled = pdata->pled; + if (pled == NULL) { + dev_err(&pdev->dev, "No platform data for LED\n"); + goto err; + } + + led = devm_kzalloc(&pdev->dev, + sizeof(struct da9052_led) * pled->num_leds, + GFP_KERNEL); + if (led == NULL) { + dev_err(&pdev->dev, "Failed to alloc memory\n"); + error = -ENOMEM; + goto err; + } + + for (i = 0; i < pled->num_leds; i++) { + led[i].cdev.name = pled->leds[i].name; + led[i].cdev.brightness_set = da9052_led_set; + led[i].cdev.brightness = LED_OFF; + led[i].cdev.max_brightness = DA9052_MAX_BRIGHTNESS; + led[i].brightness = LED_OFF; + led[i].led_index = pled->leds[i].flags; + led[i].da9052 = dev_get_drvdata(pdev->dev.parent); + INIT_WORK(&led[i].work, da9052_led_work); + + error = led_classdev_register(pdev->dev.parent, &led[i].cdev); + if (error) { + dev_err(&pdev->dev, "Failed to register led %d\n", + led[i].led_index); + goto err_register; + } + + error = da9052_set_led_brightness(&led[i]); + if (error) { + dev_err(&pdev->dev, "Unable to init led %d\n", + led[i].led_index); + continue; + } + } + error = da9052_configure_leds(led->da9052); + if (error) { + dev_err(&pdev->dev, "Failed to configure GPIO LED%d\n", error); + goto err_register; + } + + platform_set_drvdata(pdev, led); + + return 0; + +err_register: + for (i = i - 1; i >= 0; i--) { + led_classdev_unregister(&led[i].cdev); + cancel_work_sync(&led[i].work); + } +err: + return error; +} + +static int __devexit da9052_led_remove(struct platform_device *pdev) +{ + struct da9052_led *led = platform_get_drvdata(pdev); + struct da9052_pdata *pdata; + struct da9052 *da9052; + struct led_platform_data *pled; + int i; + + da9052 = dev_get_drvdata(pdev->dev.parent); + pdata = da9052->dev->platform_data; + pled = pdata->pled; + + for (i = 0; i < pled->num_leds; i++) { + led[i].brightness = 0; + da9052_set_led_brightness(&led[i]); + led_classdev_unregister(&led[i].cdev); + cancel_work_sync(&led[i].work); + } + + return 0; +} + +static struct platform_driver da9052_led_driver = { + .driver = { + .name = "da9052-leds", + .owner = THIS_MODULE, + }, + .probe = da9052_led_probe, + .remove = __devexit_p(da9052_led_remove), +}; + +module_platform_driver(da9052_led_driver); + +MODULE_AUTHOR("Dialog Semiconductor Ltd "); +MODULE_DESCRIPTION("LED driver for Dialog DA9052 PMIC"); +MODULE_LICENSE("GPL"); -- cgit v1.2.2 From 872b86be0a285b11b03614456b67fdaf78e86f3d Mon Sep 17 00:00:00 2001 From: Shuah Khan Date: Tue, 29 May 2012 15:07:26 -0700 Subject: leds: simple_strtoul() cleanup led-class.c and ledtrig-timer.c still use simple_strtoul(). Change them to use kstrtoul() instead of obsolete simple_strtoul(). Also fix the existing int ret declaration to be ssize_t to match the return type for _store functions in ledtrig-timer.c. Signed-off-by: Shuah Khan Cc: Joe Perches Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/led-class.c | 21 ++++++++----------- drivers/leds/ledtrig-timer.c | 48 ++++++++++++++++++-------------------------- 2 files changed, 28 insertions(+), 41 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index 5bff8439dc68..8ee92c81aec2 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c @@ -44,23 +44,18 @@ static ssize_t led_brightness_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) { struct led_classdev *led_cdev = dev_get_drvdata(dev); + unsigned long state; ssize_t ret = -EINVAL; - char *after; - unsigned long state = simple_strtoul(buf, &after, 10); - size_t count = after - buf; - if (isspace(*after)) - count++; + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; - if (count == size) { - ret = count; + if (state == LED_OFF) + led_trigger_remove(led_cdev); + led_set_brightness(led_cdev, state); - if (state == LED_OFF) - led_trigger_remove(led_cdev); - led_set_brightness(led_cdev, state); - } - - return ret; + return size; } static ssize_t led_max_brightness_show(struct device *dev, diff --git a/drivers/leds/ledtrig-timer.c b/drivers/leds/ledtrig-timer.c index 328c64c0841c..b32d5eae8227 100644 --- a/drivers/leds/ledtrig-timer.c +++ b/drivers/leds/ledtrig-timer.c @@ -31,21 +31,17 @@ static ssize_t led_delay_on_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - int ret = -EINVAL; - char *after; - unsigned long state = simple_strtoul(buf, &after, 10); - size_t count = after - buf; - - if (isspace(*after)) - count++; - - if (count == size) { - led_blink_set(led_cdev, &state, &led_cdev->blink_delay_off); - led_cdev->blink_delay_on = state; - ret = count; - } + unsigned long state; + ssize_t ret = -EINVAL; + + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; + + led_blink_set(led_cdev, &state, &led_cdev->blink_delay_off); + led_cdev->blink_delay_on = state; - return ret; + return size; } static ssize_t led_delay_off_show(struct device *dev, @@ -60,21 +56,17 @@ static ssize_t led_delay_off_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - int ret = -EINVAL; - char *after; - unsigned long state = simple_strtoul(buf, &after, 10); - size_t count = after - buf; - - if (isspace(*after)) - count++; - - if (count == size) { - led_blink_set(led_cdev, &led_cdev->blink_delay_on, &state); - led_cdev->blink_delay_off = state; - ret = count; - } + unsigned long state; + ssize_t ret = -EINVAL; + + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; + + led_blink_set(led_cdev, &led_cdev->blink_delay_on, &state); + led_cdev->blink_delay_off = state; - return ret; + return size; } static DEVICE_ATTR(delay_on, 0644, led_delay_on_show, led_delay_on_store); -- cgit v1.2.2 From 1daef6d27b558d0bde72302ba7062b746887a643 Mon Sep 17 00:00:00 2001 From: Thomas Meyer Date: Tue, 29 May 2012 15:07:27 -0700 Subject: leds: Use kcalloc instead of kzalloc to allocate array The advantage of kcalloc is that will prevent integer overflows which could result from the multiplication of number of elements and size and it is also a bit nicer to read. The semantic patch that makes this change is available in https://lkml.org/lkml/2011/11/25/107 Signed-off-by: Thomas Meyer Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/leds-mc13783.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/leds/leds-mc13783.c b/drivers/leds/leds-mc13783.c index 8bc491541550..4cc6a2e3df34 100644 --- a/drivers/leds/leds-mc13783.c +++ b/drivers/leds/leds-mc13783.c @@ -280,7 +280,7 @@ static int __devinit mc13783_led_probe(struct platform_device *pdev) return -EINVAL; } - led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL); + led = kcalloc(pdata->num_leds, sizeof(*led), GFP_KERNEL); if (led == NULL) { dev_err(&pdev->dev, "failed to alloc memory\n"); return -ENOMEM; -- cgit v1.2.2 From 03c091e5b726ada6aaf9af1d0e973679099101e4 Mon Sep 17 00:00:00 2001 From: Shuah Khan Date: Tue, 29 May 2012 15:07:28 -0700 Subject: leds: change existing triggers to use activated flag Change existing triggers backlight, gpio, and heartbeat to use the new ->activated flag to set activate successful status in their activate routines and check it in their deactivate routines to do cleanup. Signed-off-by: Shuah Khan Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/ledtrig-backlight.c | 4 +++- drivers/leds/ledtrig-gpio.c | 4 +++- drivers/leds/ledtrig-heartbeat.c | 4 +++- 3 files changed, 9 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/ledtrig-backlight.c b/drivers/leds/ledtrig-backlight.c index 2b513a2ad7de..e2726867c5d4 100644 --- a/drivers/leds/ledtrig-backlight.c +++ b/drivers/leds/ledtrig-backlight.c @@ -120,6 +120,7 @@ static void bl_trig_activate(struct led_classdev *led) ret = fb_register_client(&n->notifier); if (ret) dev_err(led->dev, "unable to register backlight trigger\n"); + led->activated = true; return; @@ -133,10 +134,11 @@ static void bl_trig_deactivate(struct led_classdev *led) struct bl_trig_notifier *n = (struct bl_trig_notifier *) led->trigger_data; - if (n) { + if (led->activated) { device_remove_file(led->dev, &dev_attr_inverted); fb_unregister_client(&n->notifier); kfree(n); + led->activated = false; } } diff --git a/drivers/leds/ledtrig-gpio.c b/drivers/leds/ledtrig-gpio.c index ecc4bf3f37a9..f057c101b896 100644 --- a/drivers/leds/ledtrig-gpio.c +++ b/drivers/leds/ledtrig-gpio.c @@ -200,6 +200,7 @@ static void gpio_trig_activate(struct led_classdev *led) gpio_data->led = led; led->trigger_data = gpio_data; INIT_WORK(&gpio_data->work, gpio_trig_work); + led->activated = true; return; @@ -217,7 +218,7 @@ static void gpio_trig_deactivate(struct led_classdev *led) { struct gpio_trig_data *gpio_data = led->trigger_data; - if (gpio_data) { + if (led->activated) { device_remove_file(led->dev, &dev_attr_gpio); device_remove_file(led->dev, &dev_attr_inverted); device_remove_file(led->dev, &dev_attr_desired_brightness); @@ -225,6 +226,7 @@ static void gpio_trig_deactivate(struct led_classdev *led) if (gpio_data->gpio != 0) free_irq(gpio_to_irq(gpio_data->gpio), led); kfree(gpio_data); + led->activated = false; } } diff --git a/drivers/leds/ledtrig-heartbeat.c b/drivers/leds/ledtrig-heartbeat.c index 759c0bba4a8f..1aacf4c6c3e4 100644 --- a/drivers/leds/ledtrig-heartbeat.c +++ b/drivers/leds/ledtrig-heartbeat.c @@ -83,15 +83,17 @@ static void heartbeat_trig_activate(struct led_classdev *led_cdev) led_heartbeat_function, (unsigned long) led_cdev); heartbeat_data->phase = 0; led_heartbeat_function(heartbeat_data->timer.data); + led_cdev->activated = true; } static void heartbeat_trig_deactivate(struct led_classdev *led_cdev) { struct heartbeat_trig_data *heartbeat_data = led_cdev->trigger_data; - if (heartbeat_data) { + if (led_cdev->activated) { del_timer_sync(&heartbeat_data->timer); kfree(heartbeat_data); + led_cdev->activated = false; } } -- cgit v1.2.2 From 1381187991a196a8a7d046e97bd50eec6c37e8df Mon Sep 17 00:00:00 2001 From: Shuah Khan Date: Tue, 29 May 2012 15:07:28 -0700 Subject: leds: change ledtrig-timer to use activated flag Change existing timer trigger to use the new ->activated flag to set activate successful status in activate routine and check it in deactivate routine to do cleanup. Signed-off-by: Shuah Khan Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/ledtrig-timer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/ledtrig-timer.c b/drivers/leds/ledtrig-timer.c index b32d5eae8227..9010f7abaf2c 100644 --- a/drivers/leds/ledtrig-timer.c +++ b/drivers/leds/ledtrig-timer.c @@ -87,8 +87,7 @@ static void timer_trig_activate(struct led_classdev *led_cdev) led_blink_set(led_cdev, &led_cdev->blink_delay_on, &led_cdev->blink_delay_off); - - led_cdev->trigger_data = (void *)1; + led_cdev->activated = true; return; @@ -98,9 +97,10 @@ err_out_delayon: static void timer_trig_deactivate(struct led_classdev *led_cdev) { - if (led_cdev->trigger_data) { + if (led_cdev->activated) { device_remove_file(led_cdev->dev, &dev_attr_delay_on); device_remove_file(led_cdev->dev, &dev_attr_delay_off); + led_cdev->activated = false; } /* Stop blinking */ -- cgit v1.2.2 From 6335f8fa974bc284da0f55877935538e1d7b55eb Mon Sep 17 00:00:00 2001 From: "Kim, Milo" Date: Tue, 29 May 2012 15:07:29 -0700 Subject: drivers/leds/leds-lm3530.c: simplify als configuration on initialization For better code readability, ALS code is moved to new a function - lm3530_als_configure() Signed-off-by: Milo(Woogyom) Kim Acked-by: Linus Walleij Cc: Shreshtha Kumar SAHU Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/leds-lm3530.c | 100 ++++++++++++++++++++++++++------------------- 1 file changed, 58 insertions(+), 42 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/leds-lm3530.c b/drivers/leds/leds-lm3530.c index 968fd5fef4fc..84ba6de8039c 100644 --- a/drivers/leds/leds-lm3530.c +++ b/drivers/leds/leds-lm3530.c @@ -113,6 +113,18 @@ struct lm3530_data { bool enable; }; +/* + * struct lm3530_als_data + * @config : value of ALS configuration register + * @imp_sel : value of ALS resistor select register + * @zone : values of ALS ZB(Zone Boundary) registers + */ +struct lm3530_als_data { + u8 config; + u8 imp_sel; + u8 zones[LM3530_ALS_ZB_MAX]; +}; + static const u8 lm3530_reg[LM3530_REG_MAX] = { LM3530_GEN_CONFIG, LM3530_ALS_CONFIG, @@ -141,29 +153,65 @@ static int lm3530_get_mode_from_str(const char *str) return -1; } +static void lm3530_als_configure(struct lm3530_platform_data *pdata, + struct lm3530_als_data *als) +{ + int i; + u32 als_vmin, als_vmax, als_vstep; + + if (pdata->als_vmax == 0) { + pdata->als_vmin = 0; + pdata->als_vmax = LM3530_ALS_WINDOW_mV; + } + + als_vmin = pdata->als_vmin; + als_vmax = pdata->als_vmax; + + if ((als_vmax - als_vmin) > LM3530_ALS_WINDOW_mV) + pdata->als_vmax = als_vmax = als_vmin + LM3530_ALS_WINDOW_mV; + + /* n zone boundary makes n+1 zones */ + als_vstep = (als_vmax - als_vmin) / (LM3530_ALS_ZB_MAX + 1); + + for (i = 0; i < LM3530_ALS_ZB_MAX; i++) + als->zones[i] = (((als_vmin + LM3530_ALS_OFFSET_mV) + + als_vstep + (i * als_vstep)) * LED_FULL) / 1000; + + als->config = + (pdata->als_avrg_time << LM3530_ALS_AVG_TIME_SHIFT) | + (LM3530_ENABLE_ALS) | + (pdata->als_input_mode << LM3530_ALS_SEL_SHIFT); + + als->imp_sel = + (pdata->als1_resistor_sel << LM3530_ALS1_IMP_SHIFT) | + (pdata->als2_resistor_sel << LM3530_ALS2_IMP_SHIFT); +} + static int lm3530_init_registers(struct lm3530_data *drvdata) { int ret = 0; int i; u8 gen_config; - u8 als_config = 0; u8 brt_ramp; - u8 als_imp_sel = 0; u8 brightness; u8 reg_val[LM3530_REG_MAX]; - u8 zones[LM3530_ALS_ZB_MAX]; - u32 als_vmin, als_vmax, als_vstep; struct lm3530_platform_data *pdata = drvdata->pdata; struct i2c_client *client = drvdata->client; struct lm3530_pwm_data *pwm = &pdata->pwm_data; + struct lm3530_als_data als; + + memset(&als, 0, sizeof(struct lm3530_als_data)); gen_config = (pdata->brt_ramp_law << LM3530_RAMP_LAW_SHIFT) | ((pdata->max_current & 7) << LM3530_MAX_CURR_SHIFT); switch (drvdata->mode) { case LM3530_BL_MODE_MANUAL: + gen_config |= LM3530_ENABLE_I2C; + break; case LM3530_BL_MODE_ALS: gen_config |= LM3530_ENABLE_I2C; + lm3530_als_configure(pdata, &als); break; case LM3530_BL_MODE_PWM: gen_config |= LM3530_ENABLE_PWM | LM3530_ENABLE_PWM_SIMPLE | @@ -171,38 +219,6 @@ static int lm3530_init_registers(struct lm3530_data *drvdata) break; } - if (drvdata->mode == LM3530_BL_MODE_ALS) { - if (pdata->als_vmax == 0) { - pdata->als_vmin = 0; - pdata->als_vmax = LM3530_ALS_WINDOW_mV; - } - - als_vmin = pdata->als_vmin; - als_vmax = pdata->als_vmax; - - if ((als_vmax - als_vmin) > LM3530_ALS_WINDOW_mV) - pdata->als_vmax = als_vmax = - als_vmin + LM3530_ALS_WINDOW_mV; - - /* n zone boundary makes n+1 zones */ - als_vstep = (als_vmax - als_vmin) / (LM3530_ALS_ZB_MAX + 1); - - for (i = 0; i < LM3530_ALS_ZB_MAX; i++) - zones[i] = (((als_vmin + LM3530_ALS_OFFSET_mV) + - als_vstep + (i * als_vstep)) * LED_FULL) - / 1000; - - als_config = - (pdata->als_avrg_time << LM3530_ALS_AVG_TIME_SHIFT) | - (LM3530_ENABLE_ALS) | - (pdata->als_input_mode << LM3530_ALS_SEL_SHIFT); - - als_imp_sel = - (pdata->als1_resistor_sel << LM3530_ALS1_IMP_SHIFT) | - (pdata->als2_resistor_sel << LM3530_ALS2_IMP_SHIFT); - - } - brt_ramp = (pdata->brt_ramp_fall << LM3530_BRT_RAMP_FALL_SHIFT) | (pdata->brt_ramp_rise << LM3530_BRT_RAMP_RISE_SHIFT); @@ -215,14 +231,14 @@ static int lm3530_init_registers(struct lm3530_data *drvdata) brightness = drvdata->led_dev.max_brightness; reg_val[0] = gen_config; /* LM3530_GEN_CONFIG */ - reg_val[1] = als_config; /* LM3530_ALS_CONFIG */ + reg_val[1] = als.config; /* LM3530_ALS_CONFIG */ reg_val[2] = brt_ramp; /* LM3530_BRT_RAMP_RATE */ - reg_val[3] = als_imp_sel; /* LM3530_ALS_IMP_SELECT */ + reg_val[3] = als.imp_sel; /* LM3530_ALS_IMP_SELECT */ reg_val[4] = brightness; /* LM3530_BRT_CTRL_REG */ - reg_val[5] = zones[0]; /* LM3530_ALS_ZB0_REG */ - reg_val[6] = zones[1]; /* LM3530_ALS_ZB1_REG */ - reg_val[7] = zones[2]; /* LM3530_ALS_ZB2_REG */ - reg_val[8] = zones[3]; /* LM3530_ALS_ZB3_REG */ + reg_val[5] = als.zones[0]; /* LM3530_ALS_ZB0_REG */ + reg_val[6] = als.zones[1]; /* LM3530_ALS_ZB1_REG */ + reg_val[7] = als.zones[2]; /* LM3530_ALS_ZB2_REG */ + reg_val[8] = als.zones[3]; /* LM3530_ALS_ZB3_REG */ reg_val[9] = LM3530_DEF_ZT_0; /* LM3530_ALS_Z0T_REG */ reg_val[10] = LM3530_DEF_ZT_1; /* LM3530_ALS_Z1T_REG */ reg_val[11] = LM3530_DEF_ZT_2; /* LM3530_ALS_Z2T_REG */ -- cgit v1.2.2 From 49dca5aebfdeadd4bf27b6cb4c60392147dc35a4 Mon Sep 17 00:00:00 2001 From: Alexander Holler Date: Tue, 29 May 2012 15:07:29 -0700 Subject: leds: heartbeat: stop on shutdown A halted kernel should not show a heartbeat. [akpm@linux-foundation.org: checkpatch fixes] Signed-off-by: Alexander Holler Cc: Shuah Khan Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/ledtrig-heartbeat.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/leds/ledtrig-heartbeat.c b/drivers/leds/ledtrig-heartbeat.c index 1aacf4c6c3e4..41dc76db4311 100644 --- a/drivers/leds/ledtrig-heartbeat.c +++ b/drivers/leds/ledtrig-heartbeat.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "leds.h" struct heartbeat_trig_data { @@ -103,13 +104,38 @@ static struct led_trigger heartbeat_led_trigger = { .deactivate = heartbeat_trig_deactivate, }; +static int heartbeat_reboot_notifier(struct notifier_block *nb, + unsigned long code, void *unused) +{ + led_trigger_unregister(&heartbeat_led_trigger); + return NOTIFY_DONE; +} + +static struct notifier_block heartbeat_reboot_nb = { + .notifier_call = heartbeat_reboot_notifier, +}; + +static struct notifier_block heartbeat_panic_nb = { + .notifier_call = heartbeat_reboot_notifier, +}; + static int __init heartbeat_trig_init(void) { - return led_trigger_register(&heartbeat_led_trigger); + int rc = led_trigger_register(&heartbeat_led_trigger); + + if (!rc) { + atomic_notifier_chain_register(&panic_notifier_list, + &heartbeat_panic_nb); + register_reboot_notifier(&heartbeat_reboot_nb); + } + return rc; } static void __exit heartbeat_trig_exit(void) { + unregister_reboot_notifier(&heartbeat_reboot_nb); + atomic_notifier_chain_unregister(&panic_notifier_list, + &heartbeat_panic_nb); led_trigger_unregister(&heartbeat_led_trigger); } -- cgit v1.2.2 From 44e1e9f8e70506728b02a18e6d03599a6485d67f Mon Sep 17 00:00:00 2001 From: Shuah Khan Date: Tue, 29 May 2012 15:07:30 -0700 Subject: leds: add new transient trigger for one shot timer activation The leds timer trigger does not currently have an interface to activate a one shot timer. The current support allows for setting two timers, one for specifying how long a state to be on, and the second for how long the state to be off. The delay_on value specifies the time period an LED should stay in on state, followed by a delay_off value that specifies how long the LED should stay in off state. The on and off cycle repeats until the trigger gets deactivated. There is no provision for one time activation to implement features that require an on or off state to be held just once and then stay in the original state forever. Without one shot timer interface, user space can still use timer trigger to set a timer to hold a state, however when user space application crashes or goes away without deactivating the timer, the hardware will be left in that state permanently. As a specific example of this use-case, let's look at vibrate feature on phones. Vibrate function on phones is implemented using PWM pins on SoC or PMIC. There is a need to activate one shot timer to control the vibrate feature, to prevent user space crashes leaving the phone in vibrate mode permanently causing the battery to drain. This trigger exports three properties, activate, state, and duration When transient trigger is activated these properties are set to default values. - duration allows setting timer value in msecs. The initial value is 0. - activate allows activating and deactivating the timer specified by duration as needed. The initial and default value is 0. This will allow duration to be set after trigger activation. - state allows user to specify a transient state to be held for the specified duration. Signed-off-by: Shuah Khan Cc: Jonas Bonn Cc: Richard Purdie Cc: NeilBrown Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/Kconfig | 8 ++ drivers/leds/Makefile | 1 + drivers/leds/ledtrig-transient.c | 237 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 246 insertions(+) create mode 100644 drivers/leds/ledtrig-transient.c (limited to 'drivers') diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index cede3397bb12..6b2e1e4fdeb8 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -479,4 +479,12 @@ config LEDS_TRIGGER_DEFAULT_ON comment "iptables trigger is under Netfilter config (LED target)" depends on LEDS_TRIGGERS +config LEDS_TRIGGER_TRANSIENT + tristate "LED Transient Trigger" + depends on LEDS_TRIGGERS + help + This allows one time activation of a transient state on + GPIO/PWM based hadrware. + If unsure, say Y. + endif # NEW_LEDS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 900f9294bd8c..4a4b96e8c3eb 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -57,3 +57,4 @@ obj-$(CONFIG_LEDS_TRIGGER_HEARTBEAT) += ledtrig-heartbeat.o obj-$(CONFIG_LEDS_TRIGGER_BACKLIGHT) += ledtrig-backlight.o obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledtrig-gpio.o obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o +obj-$(CONFIG_LEDS_TRIGGER_TRANSIENT) += ledtrig-transient.o diff --git a/drivers/leds/ledtrig-transient.c b/drivers/leds/ledtrig-transient.c new file mode 100644 index 000000000000..83179f435e1e --- /dev/null +++ b/drivers/leds/ledtrig-transient.c @@ -0,0 +1,237 @@ +/* + * LED Kernel Transient Trigger + * + * Copyright (C) 2012 Shuah Khan + * + * Based on Richard Purdie's ledtrig-timer.c and Atsushi Nemoto's + * ledtrig-heartbeat.c + * Design and use-case input from Jonas Bonn and + * Neil Brown + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +/* + * Transient trigger allows one shot timer activation. Please refer to + * Documentation/leds/ledtrig-transient.txt for details +*/ + +#include +#include +#include +#include +#include +#include +#include +#include "leds.h" + +struct transient_trig_data { + int activate; + int state; + int restore_state; + unsigned long duration; + struct timer_list timer; +}; + +static void transient_timer_function(unsigned long data) +{ + struct led_classdev *led_cdev = (struct led_classdev *) data; + struct transient_trig_data *transient_data = led_cdev->trigger_data; + + transient_data->activate = 0; + led_set_brightness(led_cdev, transient_data->restore_state); +} + +static ssize_t transient_activate_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + + return sprintf(buf, "%d\n", transient_data->activate); +} + +static ssize_t transient_activate_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + unsigned long state; + ssize_t ret; + + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; + + if (state != 1 && state != 0) + return -EINVAL; + + /* cancel the running timer */ + if (state == 0 && transient_data->activate == 1) { + del_timer(&transient_data->timer); + transient_data->activate = state; + led_set_brightness(led_cdev, transient_data->restore_state); + return size; + } + + /* start timer if there is no active timer */ + if (state == 1 && transient_data->activate == 0 && + transient_data->duration != 0) { + transient_data->activate = state; + led_set_brightness(led_cdev, transient_data->state); + transient_data->restore_state = + (transient_data->state == LED_FULL) ? LED_OFF : LED_FULL; + mod_timer(&transient_data->timer, + jiffies + transient_data->duration); + } + + /* state == 0 && transient_data->activate == 0 + timer is not active - just return */ + /* state == 1 && transient_data->activate == 1 + timer is already active - just return */ + + return size; +} + +static ssize_t transient_duration_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + + return sprintf(buf, "%lu\n", transient_data->duration); +} + +static ssize_t transient_duration_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + unsigned long state; + ssize_t ret; + + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; + + transient_data->duration = state; + return size; +} + +static ssize_t transient_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + int state; + + state = (transient_data->state == LED_FULL) ? 1 : 0; + return sprintf(buf, "%d\n", state); +} + +static ssize_t transient_state_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct transient_trig_data *transient_data = led_cdev->trigger_data; + unsigned long state; + ssize_t ret; + + ret = kstrtoul(buf, 10, &state); + if (ret) + return ret; + + if (state != 1 && state != 0) + return -EINVAL; + + transient_data->state = (state == 1) ? LED_FULL : LED_OFF; + return size; +} + +static DEVICE_ATTR(activate, 0644, transient_activate_show, + transient_activate_store); +static DEVICE_ATTR(duration, 0644, transient_duration_show, + transient_duration_store); +static DEVICE_ATTR(state, 0644, transient_state_show, transient_state_store); + +static void transient_trig_activate(struct led_classdev *led_cdev) +{ + int rc; + struct transient_trig_data *tdata; + + tdata = kzalloc(sizeof(struct transient_trig_data), GFP_KERNEL); + if (!tdata) { + dev_err(led_cdev->dev, + "unable to allocate transient trigger\n"); + return; + } + led_cdev->trigger_data = tdata; + + rc = device_create_file(led_cdev->dev, &dev_attr_activate); + if (rc) + goto err_out; + + rc = device_create_file(led_cdev->dev, &dev_attr_duration); + if (rc) + goto err_out_duration; + + rc = device_create_file(led_cdev->dev, &dev_attr_state); + if (rc) + goto err_out_state; + + setup_timer(&tdata->timer, transient_timer_function, + (unsigned long) led_cdev); + led_cdev->activated = true; + + return; + +err_out_state: + device_remove_file(led_cdev->dev, &dev_attr_duration); +err_out_duration: + device_remove_file(led_cdev->dev, &dev_attr_activate); +err_out: + dev_err(led_cdev->dev, "unable to register transient trigger\n"); + led_cdev->trigger_data = NULL; + kfree(tdata); +} + +static void transient_trig_deactivate(struct led_classdev *led_cdev) +{ + struct transient_trig_data *transient_data = led_cdev->trigger_data; + + if (led_cdev->activated) { + del_timer_sync(&transient_data->timer); + led_set_brightness(led_cdev, transient_data->restore_state); + device_remove_file(led_cdev->dev, &dev_attr_activate); + device_remove_file(led_cdev->dev, &dev_attr_duration); + device_remove_file(led_cdev->dev, &dev_attr_state); + led_cdev->trigger_data = NULL; + led_cdev->activated = false; + kfree(transient_data); + } +} + +static struct led_trigger transient_trigger = { + .name = "transient", + .activate = transient_trig_activate, + .deactivate = transient_trig_deactivate, +}; + +static int __init transient_trig_init(void) +{ + return led_trigger_register(&transient_trigger); +} + +static void __exit transient_trig_exit(void) +{ + led_trigger_unregister(&transient_trigger); +} + +module_init(transient_trig_init); +module_exit(transient_trig_exit); + +MODULE_AUTHOR("Shuah Khan "); +MODULE_DESCRIPTION("Transient LED trigger"); +MODULE_LICENSE("GPL"); -- cgit v1.2.2 From e7e11d8ba807d451857b5c68abe249c7fc2b980f Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Tue, 29 May 2012 15:07:30 -0700 Subject: drivers/leds/leds-pca955x.c: fix race condition while setting brightness on several LEDs When issuing the following command: for I in 0 1 2 3 4 5 6 7; do echo 0 > /sys/class/leds/pca955x\:${I}/brightness; done It is possible that all the pca955x_read_ls calls are done sequentially before any pca955x_write_ls call is done. This updates the LS only to the last LED update in its set. Fix this by using a global lock for the pca995x device during pca955x_led_work. Also used a struct for shared data betreen all LEDs. [akpm@linux-foundation.org: revert unintentional rename of pca955x_ledsel()] Signed-off-by: Alexander Stein Cc: Richard Purdie Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/leds-pca955x.c | 95 ++++++++++++++++++++++++++++----------------- 1 file changed, 59 insertions(+), 36 deletions(-) (limited to 'drivers') diff --git a/drivers/leds/leds-pca955x.c b/drivers/leds/leds-pca955x.c index dcc3bc3d38db..5f462dbf0dbb 100644 --- a/drivers/leds/leds-pca955x.c +++ b/drivers/leds/leds-pca955x.c @@ -101,11 +101,16 @@ static const struct i2c_device_id pca955x_id[] = { }; MODULE_DEVICE_TABLE(i2c, pca955x_id); -struct pca955x_led { +struct pca955x { + struct mutex lock; + struct pca955x_led *leds; struct pca955x_chipdef *chipdef; struct i2c_client *client; +}; + +struct pca955x_led { + struct pca955x *pca955x; struct work_struct work; - spinlock_t lock; enum led_brightness brightness; struct led_classdev led_cdev; int led_num; /* 0 .. 15 potentially */ @@ -140,7 +145,7 @@ static inline u8 pca955x_ledsel(u8 oldval, int led_num, int state) */ static void pca955x_write_psc(struct i2c_client *client, int n, u8 val) { - struct pca955x_led *pca955x = i2c_get_clientdata(client); + struct pca955x *pca955x = i2c_get_clientdata(client); i2c_smbus_write_byte_data(client, pca95xx_num_input_regs(pca955x->chipdef->bits) + 2*n, @@ -156,7 +161,7 @@ static void pca955x_write_psc(struct i2c_client *client, int n, u8 val) */ static void pca955x_write_pwm(struct i2c_client *client, int n, u8 val) { - struct pca955x_led *pca955x = i2c_get_clientdata(client); + struct pca955x *pca955x = i2c_get_clientdata(client); i2c_smbus_write_byte_data(client, pca95xx_num_input_regs(pca955x->chipdef->bits) + 1 + 2*n, @@ -169,7 +174,7 @@ static void pca955x_write_pwm(struct i2c_client *client, int n, u8 val) */ static void pca955x_write_ls(struct i2c_client *client, int n, u8 val) { - struct pca955x_led *pca955x = i2c_get_clientdata(client); + struct pca955x *pca955x = i2c_get_clientdata(client); i2c_smbus_write_byte_data(client, pca95xx_num_input_regs(pca955x->chipdef->bits) + 4 + n, @@ -182,7 +187,7 @@ static void pca955x_write_ls(struct i2c_client *client, int n, u8 val) */ static u8 pca955x_read_ls(struct i2c_client *client, int n) { - struct pca955x_led *pca955x = i2c_get_clientdata(client); + struct pca955x *pca955x = i2c_get_clientdata(client); return (u8) i2c_smbus_read_byte_data(client, pca95xx_num_input_regs(pca955x->chipdef->bits) + 4 + n); @@ -190,18 +195,23 @@ static u8 pca955x_read_ls(struct i2c_client *client, int n) static void pca955x_led_work(struct work_struct *work) { - struct pca955x_led *pca955x; + struct pca955x_led *pca955x_led; + struct pca955x *pca955x; u8 ls; int chip_ls; /* which LSx to use (0-3 potentially) */ int ls_led; /* which set of bits within LSx to use (0-3) */ - pca955x = container_of(work, struct pca955x_led, work); - chip_ls = pca955x->led_num / 4; - ls_led = pca955x->led_num % 4; + pca955x_led = container_of(work, struct pca955x_led, work); + pca955x = pca955x_led->pca955x; + + chip_ls = pca955x_led->led_num / 4; + ls_led = pca955x_led->led_num % 4; + + mutex_lock(&pca955x->lock); ls = pca955x_read_ls(pca955x->client, chip_ls); - switch (pca955x->brightness) { + switch (pca955x_led->brightness) { case LED_FULL: ls = pca955x_ledsel(ls, ls_led, PCA955X_LS_LED_ON); break; @@ -219,12 +229,15 @@ static void pca955x_led_work(struct work_struct *work) * OFF, HALF, or FULL. But, this is probably better than * just turning off for all other values. */ - pca955x_write_pwm(pca955x->client, 1, 255-pca955x->brightness); + pca955x_write_pwm(pca955x->client, 1, + 255 - pca955x_led->brightness); ls = pca955x_ledsel(ls, ls_led, PCA955X_LS_BLINK1); break; } pca955x_write_ls(pca955x->client, chip_ls, ls); + + mutex_unlock(&pca955x->lock); } static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness value) @@ -233,7 +246,6 @@ static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness v pca955x = container_of(led_cdev, struct pca955x_led, led_cdev); - spin_lock(&pca955x->lock); pca955x->brightness = value; /* @@ -241,14 +253,13 @@ static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness v * can sleep. */ schedule_work(&pca955x->work); - - spin_unlock(&pca955x->lock); } static int __devinit pca955x_probe(struct i2c_client *client, const struct i2c_device_id *id) { - struct pca955x_led *pca955x; + struct pca955x *pca955x; + struct pca955x_led *pca955x_led; struct pca955x_chipdef *chip; struct i2c_adapter *adapter; struct led_platform_data *pdata; @@ -282,39 +293,48 @@ static int __devinit pca955x_probe(struct i2c_client *client, } } - pca955x = kzalloc(sizeof(*pca955x) * chip->bits, GFP_KERNEL); + pca955x = kzalloc(sizeof(*pca955x), GFP_KERNEL); if (!pca955x) return -ENOMEM; + pca955x->leds = kzalloc(sizeof(*pca955x_led) * chip->bits, GFP_KERNEL); + if (!pca955x->leds) { + err = -ENOMEM; + goto exit_nomem; + } + i2c_set_clientdata(client, pca955x); + mutex_init(&pca955x->lock); + pca955x->client = client; + pca955x->chipdef = chip; + for (i = 0; i < chip->bits; i++) { - pca955x[i].chipdef = chip; - pca955x[i].client = client; - pca955x[i].led_num = i; + pca955x_led = &pca955x->leds[i]; + pca955x_led->led_num = i; + pca955x_led->pca955x = pca955x; /* Platform data can specify LED names and default triggers */ if (pdata) { if (pdata->leds[i].name) - snprintf(pca955x[i].name, - sizeof(pca955x[i].name), "pca955x:%s", - pdata->leds[i].name); + snprintf(pca955x_led->name, + sizeof(pca955x_led->name), "pca955x:%s", + pdata->leds[i].name); if (pdata->leds[i].default_trigger) - pca955x[i].led_cdev.default_trigger = + pca955x_led->led_cdev.default_trigger = pdata->leds[i].default_trigger; } else { - snprintf(pca955x[i].name, sizeof(pca955x[i].name), + snprintf(pca955x_led->name, sizeof(pca955x_led->name), "pca955x:%d", i); } - spin_lock_init(&pca955x[i].lock); - - pca955x[i].led_cdev.name = pca955x[i].name; - pca955x[i].led_cdev.brightness_set = pca955x_led_set; + pca955x_led->led_cdev.name = pca955x_led->name; + pca955x_led->led_cdev.brightness_set = pca955x_led_set; - INIT_WORK(&pca955x[i].work, pca955x_led_work); + INIT_WORK(&pca955x_led->work, pca955x_led_work); - err = led_classdev_register(&client->dev, &pca955x[i].led_cdev); + err = led_classdev_register(&client->dev, + &pca955x_led->led_cdev); if (err < 0) goto exit; } @@ -337,10 +357,12 @@ static int __devinit pca955x_probe(struct i2c_client *client, exit: while (i--) { - led_classdev_unregister(&pca955x[i].led_cdev); - cancel_work_sync(&pca955x[i].work); + led_classdev_unregister(&pca955x->leds[i].led_cdev); + cancel_work_sync(&pca955x->leds[i].work); } + kfree(pca955x->leds); +exit_nomem: kfree(pca955x); return err; @@ -348,14 +370,15 @@ exit: static int __devexit pca955x_remove(struct i2c_client *client) { - struct pca955x_led *pca955x = i2c_get_clientdata(client); + struct pca955x *pca955x = i2c_get_clientdata(client); int i; for (i = 0; i < pca955x->chipdef->bits; i++) { - led_classdev_unregister(&pca955x[i].led_cdev); - cancel_work_sync(&pca955x[i].work); + led_classdev_unregister(&pca955x->leds[i].led_cdev); + cancel_work_sync(&pca955x->leds[i].work); } + kfree(pca955x->leds); kfree(pca955x); return 0; -- cgit v1.2.2 From 401dea7f7ade662b77c33ce2498fb5b4f97cb29c Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 29 May 2012 15:07:31 -0700 Subject: leds: add LM3533 LED driver Add sub-driver for the LEDs on National Semiconductor / TI LM3533 lighting power chips. The chip provides 256 brightness levels, hardware accelerated blinking as well as ambient-light-sensor and pwm input control. Signed-off-by: Johan Hovold Cc: Richard Purdie Cc: Rob Landley Cc: Samuel Ortiz Cc: Jonathan Cameron Cc: Greg Kroah-Hartman Cc: Florian Tobias Schandinat Cc: Arnd Bergmann Cc: Mark Brown Cc: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/leds/Kconfig | 13 + drivers/leds/Makefile | 1 + drivers/leds/leds-lm3533.c | 785 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 799 insertions(+) create mode 100644 drivers/leds/leds-lm3533.c (limited to 'drivers') diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 6b2e1e4fdeb8..04cb8c88d74b 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -50,6 +50,19 @@ config LEDS_LM3530 controlled manually or using PWM input or using ambient light automatically. +config LEDS_LM3533 + tristate "LED support for LM3533" + depends on LEDS_CLASS + depends on MFD_LM3533 + help + This option enables support for the LEDs on National Semiconductor / + TI LM3533 Lighting Power chips. + + The LEDs can be controlled directly, through PWM input, or by the + ambient-light-sensor interface. The chip supports + hardware-accelerated blinking with maximum on and off periods of 9.8 + and 77 seconds respectively. + config LEDS_LOCOMO tristate "LED Support for Locomo device" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 4a4b96e8c3eb..f8958cd6cf6e 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o obj-$(CONFIG_LEDS_BD2802) += leds-bd2802.o obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o obj-$(CONFIG_LEDS_LM3530) += leds-lm3530.o +obj-$(CONFIG_LEDS_LM3533) += leds-lm3533.o obj-$(CONFIG_LEDS_MIKROTIK_RB532) += leds-rb532.o obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o obj-$(CONFIG_LEDS_NET48XX) += leds-net48xx.o diff --git a/drivers/leds/leds-lm3533.c b/drivers/leds/leds-lm3533.c new file mode 100644 index 000000000000..f56b6e7ffdac --- /dev/null +++ b/drivers/leds/leds-lm3533.c @@ -0,0 +1,785 @@ +/* + * leds-lm3533.c -- LM3533 LED driver + * + * Copyright (C) 2011-2012 Texas Instruments + * + * Author: Johan Hovold + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + + +#define LM3533_LVCTRLBANK_MIN 2 +#define LM3533_LVCTRLBANK_MAX 5 +#define LM3533_LVCTRLBANK_COUNT 4 +#define LM3533_RISEFALLTIME_MAX 7 +#define LM3533_ALS_CHANNEL_LV_MIN 1 +#define LM3533_ALS_CHANNEL_LV_MAX 2 + +#define LM3533_REG_CTRLBANK_BCONF_BASE 0x1b +#define LM3533_REG_PATTERN_ENABLE 0x28 +#define LM3533_REG_PATTERN_LOW_TIME_BASE 0x71 +#define LM3533_REG_PATTERN_HIGH_TIME_BASE 0x72 +#define LM3533_REG_PATTERN_RISETIME_BASE 0x74 +#define LM3533_REG_PATTERN_FALLTIME_BASE 0x75 + +#define LM3533_REG_PATTERN_STEP 0x10 + +#define LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK 0x04 +#define LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK 0x02 +#define LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK 0x01 + +#define LM3533_LED_FLAG_PATTERN_ENABLE 1 + + +struct lm3533_led { + struct lm3533 *lm3533; + struct lm3533_ctrlbank cb; + struct led_classdev cdev; + int id; + + struct mutex mutex; + unsigned long flags; + + struct work_struct work; + u8 new_brightness; +}; + + +static inline struct lm3533_led *to_lm3533_led(struct led_classdev *cdev) +{ + return container_of(cdev, struct lm3533_led, cdev); +} + +static inline int lm3533_led_get_ctrlbank_id(struct lm3533_led *led) +{ + return led->id + 2; +} + +static inline u8 lm3533_led_get_lv_reg(struct lm3533_led *led, u8 base) +{ + return base + led->id; +} + +static inline u8 lm3533_led_get_pattern(struct lm3533_led *led) +{ + return led->id; +} + +static inline u8 lm3533_led_get_pattern_reg(struct lm3533_led *led, + u8 base) +{ + return base + lm3533_led_get_pattern(led) * LM3533_REG_PATTERN_STEP; +} + +static int lm3533_led_pattern_enable(struct lm3533_led *led, int enable) +{ + u8 mask; + u8 val; + int pattern; + int state; + int ret = 0; + + dev_dbg(led->cdev.dev, "%s - %d\n", __func__, enable); + + mutex_lock(&led->mutex); + + state = test_bit(LM3533_LED_FLAG_PATTERN_ENABLE, &led->flags); + if ((enable && state) || (!enable && !state)) + goto out; + + pattern = lm3533_led_get_pattern(led); + mask = 1 << (2 * pattern); + + if (enable) + val = mask; + else + val = 0; + + ret = lm3533_update(led->lm3533, LM3533_REG_PATTERN_ENABLE, val, mask); + if (ret) { + dev_err(led->cdev.dev, "failed to enable pattern %d (%d)\n", + pattern, enable); + goto out; + } + + __change_bit(LM3533_LED_FLAG_PATTERN_ENABLE, &led->flags); +out: + mutex_unlock(&led->mutex); + + return ret; +} + +static void lm3533_led_work(struct work_struct *work) +{ + struct lm3533_led *led = container_of(work, struct lm3533_led, work); + + dev_dbg(led->cdev.dev, "%s - %u\n", __func__, led->new_brightness); + + if (led->new_brightness == 0) + lm3533_led_pattern_enable(led, 0); /* disable blink */ + + lm3533_ctrlbank_set_brightness(&led->cb, led->new_brightness); +} + +static void lm3533_led_set(struct led_classdev *cdev, + enum led_brightness value) +{ + struct lm3533_led *led = to_lm3533_led(cdev); + + dev_dbg(led->cdev.dev, "%s - %d\n", __func__, value); + + led->new_brightness = value; + schedule_work(&led->work); +} + +static enum led_brightness lm3533_led_get(struct led_classdev *cdev) +{ + struct lm3533_led *led = to_lm3533_led(cdev); + u8 val; + int ret; + + ret = lm3533_ctrlbank_get_brightness(&led->cb, &val); + if (ret) + return ret; + + dev_dbg(led->cdev.dev, "%s - %u\n", __func__, val); + + return val; +} + +/* Pattern generator defines (delays in us). */ +#define LM3533_LED_DELAY1_VMIN 0x00 +#define LM3533_LED_DELAY2_VMIN 0x3d +#define LM3533_LED_DELAY3_VMIN 0x80 + +#define LM3533_LED_DELAY1_VMAX (LM3533_LED_DELAY2_VMIN - 1) +#define LM3533_LED_DELAY2_VMAX (LM3533_LED_DELAY3_VMIN - 1) +#define LM3533_LED_DELAY3_VMAX 0xff + +#define LM3533_LED_DELAY1_TMIN 16384U +#define LM3533_LED_DELAY2_TMIN 1130496U +#define LM3533_LED_DELAY3_TMIN 10305536U + +#define LM3533_LED_DELAY1_TMAX 999424U +#define LM3533_LED_DELAY2_TMAX 9781248U +#define LM3533_LED_DELAY3_TMAX 76890112U + +/* t_step = (t_max - t_min) / (v_max - v_min) */ +#define LM3533_LED_DELAY1_TSTEP 16384 +#define LM3533_LED_DELAY2_TSTEP 131072 +#define LM3533_LED_DELAY3_TSTEP 524288 + +/* Delay limits for hardware accelerated blinking (in ms). */ +#define LM3533_LED_DELAY_ON_MAX \ + ((LM3533_LED_DELAY2_TMAX + LM3533_LED_DELAY2_TSTEP / 2) / 1000) +#define LM3533_LED_DELAY_OFF_MAX \ + ((LM3533_LED_DELAY3_TMAX + LM3533_LED_DELAY3_TSTEP / 2) / 1000) + +/* + * Returns linear map of *t from [t_min,t_max] to [v_min,v_max] with a step + * size of t_step, where + * + * t_step = (t_max - t_min) / (v_max - v_min) + * + * and updates *t to reflect the mapped value. + */ +static u8 time_to_val(unsigned *t, unsigned t_min, unsigned t_step, + u8 v_min, u8 v_max) +{ + unsigned val; + + val = (*t + t_step / 2 - t_min) / t_step + v_min; + + *t = t_step * (val - v_min) + t_min; + + return (u8)val; +} + +/* + * Returns time code corresponding to *delay (in ms) and updates *delay to + * reflect actual hardware delay. + * + * Hardware supports 256 discrete delay times, divided into three groups with + * the following ranges and step-sizes: + * + * [ 16, 999] [0x00, 0x3e] step 16 ms + * [ 1130, 9781] [0x3d, 0x7f] step 131 ms + * [10306, 76890] [0x80, 0xff] step 524 ms + * + * Note that delay group 3 is only available for delay_off. + */ +static u8 lm3533_led_get_hw_delay(unsigned *delay) +{ + unsigned t; + u8 val; + + t = *delay * 1000; + + if (t >= (LM3533_LED_DELAY2_TMAX + LM3533_LED_DELAY3_TMIN) / 2) { + t = clamp(t, LM3533_LED_DELAY3_TMIN, LM3533_LED_DELAY3_TMAX); + val = time_to_val(&t, LM3533_LED_DELAY3_TMIN, + LM3533_LED_DELAY3_TSTEP, + LM3533_LED_DELAY3_VMIN, + LM3533_LED_DELAY3_VMAX); + } else if (t >= (LM3533_LED_DELAY1_TMAX + LM3533_LED_DELAY2_TMIN) / 2) { + t = clamp(t, LM3533_LED_DELAY2_TMIN, LM3533_LED_DELAY2_TMAX); + val = time_to_val(&t, LM3533_LED_DELAY2_TMIN, + LM3533_LED_DELAY2_TSTEP, + LM3533_LED_DELAY2_VMIN, + LM3533_LED_DELAY2_VMAX); + } else { + t = clamp(t, LM3533_LED_DELAY1_TMIN, LM3533_LED_DELAY1_TMAX); + val = time_to_val(&t, LM3533_LED_DELAY1_TMIN, + LM3533_LED_DELAY1_TSTEP, + LM3533_LED_DELAY1_VMIN, + LM3533_LED_DELAY1_VMAX); + } + + *delay = (t + 500) / 1000; + + return val; +} + +/* + * Set delay register base to *delay (in ms) and update *delay to reflect + * actual hardware delay used. + */ +static u8 lm3533_led_delay_set(struct lm3533_led *led, u8 base, + unsigned long *delay) +{ + unsigned t; + u8 val; + u8 reg; + int ret; + + t = (unsigned)*delay; + + /* Delay group 3 is only available for low time (delay off). */ + if (base != LM3533_REG_PATTERN_LOW_TIME_BASE) + t = min(t, LM3533_LED_DELAY2_TMAX / 1000); + + val = lm3533_led_get_hw_delay(&t); + + dev_dbg(led->cdev.dev, "%s - %lu: %u (0x%02x)\n", __func__, + *delay, t, val); + reg = lm3533_led_get_pattern_reg(led, base); + ret = lm3533_write(led->lm3533, reg, val); + if (ret) + dev_err(led->cdev.dev, "failed to set delay (%02x)\n", reg); + + *delay = t; + + return ret; +} + +static int lm3533_led_delay_on_set(struct lm3533_led *led, unsigned long *t) +{ + return lm3533_led_delay_set(led, LM3533_REG_PATTERN_HIGH_TIME_BASE, t); +} + +static int lm3533_led_delay_off_set(struct lm3533_led *led, unsigned long *t) +{ + return lm3533_led_delay_set(led, LM3533_REG_PATTERN_LOW_TIME_BASE, t); +} + +static int lm3533_led_blink_set(struct led_classdev *cdev, + unsigned long *delay_on, + unsigned long *delay_off) +{ + struct lm3533_led *led = to_lm3533_led(cdev); + int ret; + + dev_dbg(led->cdev.dev, "%s - on = %lu, off = %lu\n", __func__, + *delay_on, *delay_off); + + if (*delay_on > LM3533_LED_DELAY_ON_MAX || + *delay_off > LM3533_LED_DELAY_OFF_MAX) + return -EINVAL; + + if (*delay_on == 0 && *delay_off == 0) { + *delay_on = 500; + *delay_off = 500; + } + + ret = lm3533_led_delay_on_set(led, delay_on); + if (ret) + return ret; + + ret = lm3533_led_delay_off_set(led, delay_off); + if (ret) + return ret; + + return lm3533_led_pattern_enable(led, 1); +} + +static ssize_t show_id(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + + return scnprintf(buf, PAGE_SIZE, "%d\n", led->id); +} + +/* + * Pattern generator rise/fall times: + * + * 0 - 2048 us (default) + * 1 - 262 ms + * 2 - 524 ms + * 3 - 1.049 s + * 4 - 2.097 s + * 5 - 4.194 s + * 6 - 8.389 s + * 7 - 16.78 s + */ +static ssize_t show_risefalltime(struct device *dev, + struct device_attribute *attr, + char *buf, u8 base) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + ssize_t ret; + u8 reg; + u8 val; + + reg = lm3533_led_get_pattern_reg(led, base); + ret = lm3533_read(led->lm3533, reg, &val); + if (ret) + return ret; + + return scnprintf(buf, PAGE_SIZE, "%x\n", val); +} + +static ssize_t show_risetime(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return show_risefalltime(dev, attr, buf, + LM3533_REG_PATTERN_RISETIME_BASE); +} + +static ssize_t show_falltime(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return show_risefalltime(dev, attr, buf, + LM3533_REG_PATTERN_FALLTIME_BASE); +} + +static ssize_t store_risefalltime(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len, u8 base) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + u8 val; + u8 reg; + int ret; + + if (kstrtou8(buf, 0, &val) || val > LM3533_RISEFALLTIME_MAX) + return -EINVAL; + + reg = lm3533_led_get_pattern_reg(led, base); + ret = lm3533_write(led->lm3533, reg, val); + if (ret) + return ret; + + return len; +} + +static ssize_t store_risetime(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + return store_risefalltime(dev, attr, buf, len, + LM3533_REG_PATTERN_RISETIME_BASE); +} + +static ssize_t store_falltime(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + return store_risefalltime(dev, attr, buf, len, + LM3533_REG_PATTERN_FALLTIME_BASE); +} + +static ssize_t show_als_channel(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + unsigned channel; + u8 reg; + u8 val; + int ret; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + ret = lm3533_read(led->lm3533, reg, &val); + if (ret) + return ret; + + channel = (val & LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK) + 1; + + return scnprintf(buf, PAGE_SIZE, "%u\n", channel); +} + +static ssize_t store_als_channel(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + unsigned channel; + u8 reg; + u8 val; + u8 mask; + int ret; + + if (kstrtouint(buf, 0, &channel)) + return -EINVAL; + + if (channel < LM3533_ALS_CHANNEL_LV_MIN || + channel > LM3533_ALS_CHANNEL_LV_MAX) + return -EINVAL; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + mask = LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK; + val = channel - 1; + + ret = lm3533_update(led->lm3533, reg, val, mask); + if (ret) + return ret; + + return len; +} + +static ssize_t show_als_en(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + bool enable; + u8 reg; + u8 val; + int ret; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + ret = lm3533_read(led->lm3533, reg, &val); + if (ret) + return ret; + + enable = val & LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK; + + return scnprintf(buf, PAGE_SIZE, "%d\n", enable); +} + +static ssize_t store_als_en(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + unsigned enable; + u8 reg; + u8 mask; + u8 val; + int ret; + + if (kstrtouint(buf, 0, &enable)) + return -EINVAL; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + mask = LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK; + + if (enable) + val = mask; + else + val = 0; + + ret = lm3533_update(led->lm3533, reg, val, mask); + if (ret) + return ret; + + return len; +} + +static ssize_t show_linear(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + u8 reg; + u8 val; + int linear; + int ret; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + ret = lm3533_read(led->lm3533, reg, &val); + if (ret) + return ret; + + if (val & LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK) + linear = 1; + else + linear = 0; + + return scnprintf(buf, PAGE_SIZE, "%x\n", linear); +} + +static ssize_t store_linear(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + unsigned long linear; + u8 reg; + u8 mask; + u8 val; + int ret; + + if (kstrtoul(buf, 0, &linear)) + return -EINVAL; + + reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE); + mask = LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK; + + if (linear) + val = mask; + else + val = 0; + + ret = lm3533_update(led->lm3533, reg, val, mask); + if (ret) + return ret; + + return len; +} + +static ssize_t show_pwm(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + u8 val; + int ret; + + ret = lm3533_ctrlbank_get_pwm(&led->cb, &val); + if (ret) + return ret; + + return scnprintf(buf, PAGE_SIZE, "%u\n", val); +} + +static ssize_t store_pwm(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + u8 val; + int ret; + + if (kstrtou8(buf, 0, &val)) + return -EINVAL; + + ret = lm3533_ctrlbank_set_pwm(&led->cb, val); + if (ret) + return ret; + + return len; +} + +static LM3533_ATTR_RW(als_channel); +static LM3533_ATTR_RW(als_en); +static LM3533_ATTR_RW(falltime); +static LM3533_ATTR_RO(id); +static LM3533_ATTR_RW(linear); +static LM3533_ATTR_RW(pwm); +static LM3533_ATTR_RW(risetime); + +static struct attribute *lm3533_led_attributes[] = { + &dev_attr_als_channel.attr, + &dev_attr_als_en.attr, + &dev_attr_falltime.attr, + &dev_attr_id.attr, + &dev_attr_linear.attr, + &dev_attr_pwm.attr, + &dev_attr_risetime.attr, + NULL, +}; + +static umode_t lm3533_led_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct lm3533_led *led = to_lm3533_led(led_cdev); + umode_t mode = attr->mode; + + if (attr == &dev_attr_als_channel.attr || + attr == &dev_attr_als_en.attr) { + if (!led->lm3533->have_als) + mode = 0; + } + + return mode; +}; + +static struct attribute_group lm3533_led_attribute_group = { + .is_visible = lm3533_led_attr_is_visible, + .attrs = lm3533_led_attributes +}; + +static int __devinit lm3533_led_setup(struct lm3533_led *led, + struct lm3533_led_platform_data *pdata) +{ + int ret; + + ret = lm3533_ctrlbank_set_max_current(&led->cb, pdata->max_current); + if (ret) + return ret; + + return lm3533_ctrlbank_set_pwm(&led->cb, pdata->pwm); +} + +static int __devinit lm3533_led_probe(struct platform_device *pdev) +{ + struct lm3533 *lm3533; + struct lm3533_led_platform_data *pdata; + struct lm3533_led *led; + int ret; + + dev_dbg(&pdev->dev, "%s\n", __func__); + + lm3533 = dev_get_drvdata(pdev->dev.parent); + if (!lm3533) + return -EINVAL; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "no platform data\n"); + return -EINVAL; + } + + if (pdev->id < 0 || pdev->id >= LM3533_LVCTRLBANK_COUNT) { + dev_err(&pdev->dev, "illegal LED id %d\n", pdev->id); + return -EINVAL; + } + + led = devm_kzalloc(&pdev->dev, sizeof(*led), GFP_KERNEL); + if (!led) + return -ENOMEM; + + led->lm3533 = lm3533; + led->cdev.name = pdata->name; + led->cdev.default_trigger = pdata->default_trigger; + led->cdev.brightness_set = lm3533_led_set; + led->cdev.brightness_get = lm3533_led_get; + led->cdev.blink_set = lm3533_led_blink_set; + led->cdev.brightness = LED_OFF; + led->id = pdev->id; + + mutex_init(&led->mutex); + INIT_WORK(&led->work, lm3533_led_work); + + /* The class framework makes a callback to get brightness during + * registration so use parent device (for error reporting) until + * registered. + */ + led->cb.lm3533 = lm3533; + led->cb.id = lm3533_led_get_ctrlbank_id(led); + led->cb.dev = lm3533->dev; + + platform_set_drvdata(pdev, led); + + ret = led_classdev_register(pdev->dev.parent, &led->cdev); + if (ret) { + dev_err(&pdev->dev, "failed to register LED %d\n", pdev->id); + return ret; + } + + led->cb.dev = led->cdev.dev; + + ret = sysfs_create_group(&led->cdev.dev->kobj, + &lm3533_led_attribute_group); + if (ret < 0) { + dev_err(&pdev->dev, "failed to create sysfs attributes\n"); + goto err_unregister; + } + + ret = lm3533_led_setup(led, pdata); + if (ret) + goto err_sysfs_remove; + + ret = lm3533_ctrlbank_enable(&led->cb); + if (ret) + goto err_sysfs_remove; + + return 0; + +err_sysfs_remove: + sysfs_remove_group(&led->cdev.dev->kobj, &lm3533_led_attribute_group); +err_unregister: + led_classdev_unregister(&led->cdev); + flush_work_sync(&led->work); + + return ret; +} + +static int __devexit lm3533_led_remove(struct platform_device *pdev) +{ + struct lm3533_led *led = platform_get_drvdata(pdev); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + lm3533_ctrlbank_disable(&led->cb); + sysfs_remove_group(&led->cdev.dev->kobj, &lm3533_led_attribute_group); + led_classdev_unregister(&led->cdev); + flush_work_sync(&led->work); + + return 0; +} + +static void lm3533_led_shutdown(struct platform_device *pdev) +{ + + struct lm3533_led *led = platform_get_drvdata(pdev); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + lm3533_ctrlbank_disable(&led->cb); + lm3533_led_set(&led->cdev, LED_OFF); /* disable blink */ + flush_work_sync(&led->work); +} + +static struct platform_driver lm3533_led_driver = { + .driver = { + .name = "lm3533-leds", + .owner = THIS_MODULE, + }, + .probe = lm3533_led_probe, + .remove = __devexit_p(lm3533_led_remove), + .shutdown = lm3533_led_shutdown, +}; +module_platform_driver(lm3533_led_driver); + +MODULE_AUTHOR("Johan Hovold "); +MODULE_DESCRIPTION("LM3533 LED driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:lm3533-leds"); -- cgit v1.2.2 From 0108c4ff62a0ee324c58175ff6b7000865023498 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 29 May 2012 15:07:35 -0700 Subject: rtc/spear: add Device Tree probing capability SPEAr platforms now support DT and so must convert all drivers support DT. This patch adds DT probing support for rtc and updates its documentation too. Signed-off-by: Viresh Kumar Cc: Stefan Roese Cc: Arnd Bergmann Cc: Alessandro Zummo Cc: Rajeev Kumar Cc: Rob Herring Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-spear.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/rtc/rtc-spear.c b/drivers/rtc/rtc-spear.c index e38da0dc4187..1f76320e545b 100644 --- a/drivers/rtc/rtc-spear.c +++ b/drivers/rtc/rtc-spear.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -519,6 +520,14 @@ static void spear_rtc_shutdown(struct platform_device *pdev) clk_disable(config->clk); } +#ifdef CONFIG_OF +static const struct of_device_id spear_rtc_id_table[] = { + { .compatible = "st,spear600-rtc" }, + {} +}; +MODULE_DEVICE_TABLE(of, spear_rtc_id_table); +#endif + static struct platform_driver spear_rtc_driver = { .probe = spear_rtc_probe, .remove = __devexit_p(spear_rtc_remove), @@ -527,6 +536,7 @@ static struct platform_driver spear_rtc_driver = { .shutdown = spear_rtc_shutdown, .driver = { .name = "rtc-spear", + .of_match_table = of_match_ptr(spear_rtc_id_table), }, }; -- cgit v1.2.2 From 84d56b38b9abd36565f74cbf68501cee6206761e Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 29 May 2012 15:07:36 -0700 Subject: drivers/rtc/rtc-ep93xx.c: convert to use module_platform_driver() Use module_platform_driver() to remove the boilerplate code. Also, change the probe and remove functions to __devinit/__devexit. Signed-off-by: H Hartley Sweeten Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-ep93xx.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c index 14a42a1edc66..9602278ff988 100644 --- a/drivers/rtc/rtc-ep93xx.c +++ b/drivers/rtc/rtc-ep93xx.c @@ -127,7 +127,7 @@ static const struct attribute_group ep93xx_rtc_sysfs_files = { .attrs = ep93xx_rtc_attrs, }; -static int __init ep93xx_rtc_probe(struct platform_device *pdev) +static int __devinit ep93xx_rtc_probe(struct platform_device *pdev) { struct ep93xx_rtc *ep93xx_rtc; struct resource *res; @@ -174,7 +174,7 @@ exit: return err; } -static int __exit ep93xx_rtc_remove(struct platform_device *pdev) +static int __devexit ep93xx_rtc_remove(struct platform_device *pdev) { struct ep93xx_rtc *ep93xx_rtc = platform_get_drvdata(pdev); @@ -186,31 +186,19 @@ static int __exit ep93xx_rtc_remove(struct platform_device *pdev) return 0; } -/* work with hotplug and coldplug */ -MODULE_ALIAS("platform:ep93xx-rtc"); - static struct platform_driver ep93xx_rtc_driver = { .driver = { .name = "ep93xx-rtc", .owner = THIS_MODULE, }, - .remove = __exit_p(ep93xx_rtc_remove), + .probe = ep93xx_rtc_probe, + .remove = __devexit_p(ep93xx_rtc_remove), }; -static int __init ep93xx_rtc_init(void) -{ - return platform_driver_probe(&ep93xx_rtc_driver, ep93xx_rtc_probe); -} - -static void __exit ep93xx_rtc_exit(void) -{ - platform_driver_unregister(&ep93xx_rtc_driver); -} +module_platform_driver(ep93xx_rtc_driver); MODULE_AUTHOR("Alessandro Zummo "); MODULE_DESCRIPTION("EP93XX RTC driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); - -module_init(ep93xx_rtc_init); -module_exit(ep93xx_rtc_exit); +MODULE_ALIAS("platform:ep93xx-rtc"); -- cgit v1.2.2 From 0f20b767e20a800030f51712b699a5c557f2514b Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Tue, 29 May 2012 15:07:36 -0700 Subject: drivers/rtc/rtc-pcf8563.c: add RTC_VL_READ/RTC_VL_CLR ioctl feature Changes are based on arch/cris/arch-v10/drivers/pcf8563.c [akpm@linux-foundation.org: fix sparse warning] Signed-off-by: Alexander Stein Cc: Alessandro Zummo Cc: Mikael Starvik Acked-by: Jesper Nilsson Cc: Wu Fengguang Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-pcf8563.c | 44 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c index bc0677de1996..97a3284bb7c6 100644 --- a/drivers/rtc/rtc-pcf8563.c +++ b/drivers/rtc/rtc-pcf8563.c @@ -64,6 +64,7 @@ struct pcf8563 { * 1970...2069. */ int c_polarity; /* 0: MO_C=1 means 19xx, otherwise MO_C=1 means 20xx */ + int voltage_low; /* incicates if a low_voltage was detected */ }; /* @@ -86,9 +87,11 @@ static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm) return -EIO; } - if (buf[PCF8563_REG_SC] & PCF8563_SC_LV) + if (buf[PCF8563_REG_SC] & PCF8563_SC_LV) { + pcf8563->voltage_low = 1; dev_info(&client->dev, "low voltage detected, date/time is not reliable.\n"); + } dev_dbg(&client->dev, "%s: raw data is st1=%02x, st2=%02x, sec=%02x, min=%02x, hr=%02x, " @@ -173,6 +176,44 @@ static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm) return 0; } +#ifdef CONFIG_RTC_INTF_DEV +static int pcf8563_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) +{ + struct pcf8563 *pcf8563 = i2c_get_clientdata(to_i2c_client(dev)); + struct rtc_time tm; + + switch (cmd) { + case RTC_VL_READ: + if (pcf8563->voltage_low) + dev_info(dev, "low voltage detected, date/time is not reliable.\n"); + + if (copy_to_user((void __user *)arg, &pcf8563->voltage_low, + sizeof(int))) + return -EFAULT; + return 0; + case RTC_VL_CLR: + /* + * Clear the VL bit in the seconds register in case + * the time has not been set already (which would + * have cleared it). This does not really matter + * because of the cached voltage_low value but do it + * anyway for consistency. + */ + if (pcf8563_get_datetime(to_i2c_client(dev), &tm)) + pcf8563_set_datetime(to_i2c_client(dev), &tm); + + /* Clear the cached value. */ + pcf8563->voltage_low = 0; + + return 0; + default: + return -ENOIOCTLCMD; + } +} +#else +#define pcf8563_rtc_ioctl NULL +#endif + static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm) { return pcf8563_get_datetime(to_i2c_client(dev), tm); @@ -184,6 +225,7 @@ static int pcf8563_rtc_set_time(struct device *dev, struct rtc_time *tm) } static const struct rtc_class_ops pcf8563_rtc_ops = { + .ioctl = pcf8563_rtc_ioctl, .read_time = pcf8563_rtc_read_time, .set_time = pcf8563_rtc_set_time, }; -- cgit v1.2.2 From b224b9ac8c42afc40cba170187df3d0cdbb13c20 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 29 May 2012 15:07:37 -0700 Subject: drivers/rtc/Kconfig: place RTC_DRV_IMXDI and RTC_MXC under "on-CPU RTC drivers" RTC_DRV_IMXDI and RTC_MXC are on-chip RTC modules, so move them under "on-CPU RTC drivers" selection menu. While at it change the dependency of RTC_DRV_IMXDI from ARCH_MX25 to SOC_IMX25. Signed-off-by: Fabio Estevam Acked-by: Wolfram Sang Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/Kconfig | 42 +++++++++++++++++++++--------------------- 1 file changed, 21 insertions(+), 21 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 4161bfe462cd..83fb48fa7cf4 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -620,27 +620,6 @@ config RTC_DRV_MSM6242 This driver can also be built as a module. If so, the module will be called rtc-msm6242. -config RTC_DRV_IMXDI - tristate "Freescale IMX DryIce Real Time Clock" - depends on ARCH_MX25 - depends on RTC_CLASS - help - Support for Freescale IMX DryIce RTC - - This driver can also be built as a module, if so, the module - will be called "rtc-imxdi". - -config RTC_MXC - tristate "Freescale MXC Real Time Clock" - depends on ARCH_MXC - depends on RTC_CLASS - help - If you say yes here you get support for the Freescale MXC - RTC module. - - This driver can also be built as a module, if so, the module - will be called "rtc-mxc". - config RTC_DRV_BQ4802 tristate "TI BQ4802" help @@ -738,6 +717,16 @@ config RTC_DRV_DAVINCI This driver can also be built as a module. If so, the module will be called rtc-davinci. +config RTC_DRV_IMXDI + tristate "Freescale IMX DryIce Real Time Clock" + depends on SOC_IMX25 + depends on RTC_CLASS + help + Support for Freescale IMX DryIce RTC + + This driver can also be built as a module, if so, the module + will be called "rtc-imxdi". + config RTC_DRV_OMAP tristate "TI OMAP1" depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX @@ -1087,4 +1076,15 @@ config RTC_DRV_LOONGSON1 This driver can also be built as a module. If so, the module will be called rtc-ls1x. +config RTC_MXC + tristate "Freescale MXC Real Time Clock" + depends on ARCH_MXC + depends on RTC_CLASS + help + If you say yes here you get support for the Freescale MXC + RTC module. + + This driver can also be built as a module, if so, the module + will be called "rtc-mxc". + endif # RTC_CLASS -- cgit v1.2.2 From 798115958967c8223f3d17e829a891564e8ea4cb Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 29 May 2012 15:07:37 -0700 Subject: rtc: rename CONFIG_RTC_MXC to CONFIG_RTC_DRV_MXC In order to keep consistency with other rtc drivers,rename CONFIG_RTC_MXC to CONFIG_RTC_DRV_MXC. Signed-off-by: Fabio Estevam Acked-by: Wolfram Sang Cc: Alessandro Zummo [akpm@linux-foundation.org: fix missed arch/arm/configs/imx_v6_v7_defconfig] Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/Kconfig | 2 +- drivers/rtc/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 83fb48fa7cf4..08cbdb900a18 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1076,7 +1076,7 @@ config RTC_DRV_LOONGSON1 This driver can also be built as a module. If so, the module will be called rtc-ls1x. -config RTC_MXC +config RTC_DRV_MXC tristate "Freescale MXC Real Time Clock" depends on ARCH_MXC depends on RTC_CLASS diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 727ae7786e6c..2973921c30d8 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -61,7 +61,7 @@ obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o obj-$(CONFIG_RTC_DRV_M48T35) += rtc-m48t35.o obj-$(CONFIG_RTC_DRV_M48T59) += rtc-m48t59.o obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o -obj-$(CONFIG_RTC_MXC) += rtc-mxc.o +obj-$(CONFIG_RTC_DRV_MXC) += rtc-mxc.o obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o -- cgit v1.2.2 From f8ae97019ff79559416dc2ae9c14af92c2054cba Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 29 May 2012 15:07:38 -0700 Subject: rtc: ds1307: remove superfluous initialization ds1307 was kzalloced, so no need to zero members of the struct. Signed-off-by: Wolfram Sang Acked-by: Joakim Tjernlund Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-ds1307.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index c293d0cdb104..5dc1c7941199 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c @@ -637,7 +637,6 @@ static int __devinit ds1307_probe(struct i2c_client *client, ds1307->client = client; ds1307->type = id->driver_data; - ds1307->offset = 0; buf = ds1307->regs; if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { -- cgit v1.2.2 From eb86c3064b3c53837fdfea17df1483d825919894 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 29 May 2012 15:07:38 -0700 Subject: rtc: ds1307: add trickle charger support Some DS13XX devices have "trickle chargers". Its configuration register is at different locations, the setup is the same, though. Since the configuration is board specific, introduce a platform_data to this driver. Tested with a DS1339 on a custom board. Signed-off-by: Wolfram Sang Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-ds1307.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index 5dc1c7941199..836710ce750e 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c @@ -17,8 +17,7 @@ #include #include #include - - +#include /* * We can't determine type by probing, but if we expect pre-Linux code @@ -92,7 +91,8 @@ enum ds_type { # define DS1337_BIT_A2I 0x02 # define DS1337_BIT_A1I 0x01 #define DS1339_REG_ALARM1_SECS 0x07 -#define DS1339_REG_TRICKLE 0x10 + +#define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0 #define RX8025_REG_CTRL1 0x0e # define RX8025_BIT_2412 0x20 @@ -124,6 +124,7 @@ struct chip_desc { unsigned alarm:1; u16 nvram_offset; u16 nvram_size; + u16 trickle_charger_reg; }; static const struct chip_desc chips[last_ds_type] = { @@ -140,6 +141,13 @@ static const struct chip_desc chips[last_ds_type] = { }, [ds_1339] = { .alarm = 1, + .trickle_charger_reg = 0x10, + }, + [ds_1340] = { + .trickle_charger_reg = 0x08, + }, + [ds_1388] = { + .trickle_charger_reg = 0x0a, }, [ds_3231] = { .alarm = 1, @@ -619,6 +627,7 @@ static int __devinit ds1307_probe(struct i2c_client *client, struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); int want_irq = false; unsigned char *buf; + struct ds1307_platform_data *pdata = client->dev.platform_data; static const int bbsqi_bitpos[] = { [ds_1337] = 0, [ds_1339] = DS1339_BIT_BBSQI, @@ -638,6 +647,10 @@ static int __devinit ds1307_probe(struct i2c_client *client, ds1307->client = client; ds1307->type = id->driver_data; + if (pdata && pdata->trickle_charger_setup && chip->trickle_charger_reg) + i2c_smbus_write_byte_data(client, chip->trickle_charger_reg, + DS13XX_TRICKLE_CHARGER_MAGIC | pdata->trickle_charger_setup); + buf = ds1307->regs; if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { ds1307->read_block_data = i2c_smbus_read_i2c_block_data; -- cgit v1.2.2 From bcffb10f287c89ca6e4f89ef748301a9e22384d0 Mon Sep 17 00:00:00 2001 From: Nikolaus Voss Date: Tue, 29 May 2012 15:07:39 -0700 Subject: drivers/rtc/rtc-m41t93.c: don't let get_time() reset M41T93_FLAG_OF If the rtc reports the time might be invalid due to oscillator failure, M41T93_FLAG_OF flag must not be reset by get_time() as the read operation doesn't make the time valid. Without this patch, only the first get_time() reported an invalid time, the second get_time() reported a valid time althought the reported time is probably wrong due to oscillator failure. Instead of resetting in get_time(), with this patch M41T93_FLAG_OF is reset in set_time() when a valid time is to be written. Signed-off-by: Nikolaus Voss Cc: Alessandro Zummo Cc: Grant Likely Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-m41t93.c | 46 +++++++++++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 19 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-m41t93.c b/drivers/rtc/rtc-m41t93.c index 10f1c29436ec..efab3d48cb15 100644 --- a/drivers/rtc/rtc-m41t93.c +++ b/drivers/rtc/rtc-m41t93.c @@ -48,6 +48,7 @@ static inline int m41t93_set_reg(struct spi_device *spi, u8 addr, u8 data) static int m41t93_set_time(struct device *dev, struct rtc_time *tm) { struct spi_device *spi = to_spi_device(dev); + int tmp; u8 buf[9] = {0x80}; /* write cmd + 8 data bytes */ u8 * const data = &buf[1]; /* ptr to first data byte */ @@ -62,6 +63,30 @@ static int m41t93_set_time(struct device *dev, struct rtc_time *tm) return -EINVAL; } + tmp = spi_w8r8(spi, M41T93_REG_FLAGS); + if (tmp < 0) + return tmp; + + if (tmp & M41T93_FLAG_OF) { + dev_warn(&spi->dev, "OF bit is set, resetting.\n"); + m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp & ~M41T93_FLAG_OF); + + tmp = spi_w8r8(spi, M41T93_REG_FLAGS); + if (tmp < 0) { + return tmp; + } else if (tmp & M41T93_FLAG_OF) { + /* OF cannot be immediately reset: oscillator has to be + * restarted. */ + u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST; + + dev_warn(&spi->dev, + "OF bit is still set, kickstarting clock.\n"); + m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); + reset_osc &= ~M41T93_FLAG_ST; + m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); + } + } + data[M41T93_REG_SSEC] = 0; data[M41T93_REG_ST_SEC] = bin2bcd(tm->tm_sec); data[M41T93_REG_MIN] = bin2bcd(tm->tm_min); @@ -89,10 +114,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm) 1. halt bit (HT) is set: the clock is running but update of readout registers has been disabled due to power failure. This is normal case after poweron. Time is valid after resetting HT bit. - 2. oscillator fail bit (OF) is set. Oscillator has be stopped and - time is invalid: - a) OF can be immeditely reset. - b) OF cannot be immediately reset: oscillator has to be restarted. + 2. oscillator fail bit (OF) is set: time is invalid. */ tmp = spi_w8r8(spi, M41T93_REG_ALM_HOUR_HT); if (tmp < 0) @@ -110,21 +132,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm) if (tmp & M41T93_FLAG_OF) { ret = -EINVAL; - dev_warn(&spi->dev, "OF bit is set, resetting.\n"); - m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp & ~M41T93_FLAG_OF); - - tmp = spi_w8r8(spi, M41T93_REG_FLAGS); - if (tmp < 0) - return tmp; - else if (tmp & M41T93_FLAG_OF) { - u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST; - - dev_warn(&spi->dev, - "OF bit is still set, kickstarting clock.\n"); - m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); - reset_osc &= ~M41T93_FLAG_ST; - m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); - } + dev_warn(&spi->dev, "OF bit is set, write time to restart.\n"); } if (tmp & M41T93_FLAG_BL) -- cgit v1.2.2 From e862e7c4ee52c2d1a0af37a8c3a2bda079042b06 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Tue, 29 May 2012 15:07:39 -0700 Subject: drivers/rtc/rtc-lpc32xx.c: add device tree support Adds device tree support for rtc-lpc32xx.c Signed-off-by: Roland Stigge Acked-by: Rob Herring Acked-by: Arnd Bergmann Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-lpc32xx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-lpc32xx.c b/drivers/rtc/rtc-lpc32xx.c index 63c72189c64b..d5218553741f 100644 --- a/drivers/rtc/rtc-lpc32xx.c +++ b/drivers/rtc/rtc-lpc32xx.c @@ -19,6 +19,7 @@ #include #include #include +#include /* * Clock and Power control register offsets @@ -386,13 +387,22 @@ static const struct dev_pm_ops lpc32xx_rtc_pm_ops = { #define LPC32XX_RTC_PM_OPS NULL #endif +#ifdef CONFIG_OF +static const struct of_device_id lpc32xx_rtc_match[] = { + { .compatible = "nxp,lpc3220-rtc" }, + { } +}; +MODULE_DEVICE_TABLE(of, lpc32xx_rtc_match); +#endif + static struct platform_driver lpc32xx_rtc_driver = { .probe = lpc32xx_rtc_probe, .remove = __devexit_p(lpc32xx_rtc_remove), .driver = { .name = RTC_NAME, .owner = THIS_MODULE, - .pm = LPC32XX_RTC_PM_OPS + .pm = LPC32XX_RTC_PM_OPS, + .of_match_table = of_match_ptr(lpc32xx_rtc_match), }, }; -- cgit v1.2.2 From ac2dee5984bc78c8ff1893142f7322320d2baf05 Mon Sep 17 00:00:00 2001 From: Rajkumar Kasirajan Date: Tue, 29 May 2012 15:07:40 -0700 Subject: drivers/rtc/rtc-pl031.c: remove RTC timer interrupt handling Remove RTT interrupt handling, since PIE mode interrupts are now better emulated in generic code via an hrtimer we have no need for this, and there is no codepath in the driver that enables these periodic interrupts anyway. Signed-off-by: Rajkumar Kasirajan Signed-off-by: Linus Walleij Cc: Mattias Wallin Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-pl031.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index f027c063fb20..cc0533994f6e 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c @@ -220,17 +220,9 @@ static irqreturn_t pl031_interrupt(int irq, void *dev_id) unsigned long events = 0; rtcmis = readl(ldata->base + RTC_MIS); - if (rtcmis) { - writel(rtcmis, ldata->base + RTC_ICR); - - if (rtcmis & RTC_BIT_AI) - events |= (RTC_AF | RTC_IRQF); - - /* Timer interrupt is only available in ST variants */ - if ((rtcmis & RTC_BIT_PI) && - (ldata->hw_designer == AMBA_VENDOR_ST)) - events |= (RTC_PF | RTC_IRQF); - + if (rtcmis & RTC_BIT_AI) { + writel(RTC_BIT_AI, ldata->base + RTC_ICR); + events |= (RTC_AF | RTC_IRQF); rtc_update_irq(ldata->rtc, 1, events); return IRQ_HANDLED; -- cgit v1.2.2 From 621bae79f1a250e443eb83d1f473c533bea493dc Mon Sep 17 00:00:00 2001 From: Hannu Heikkinen Date: Tue, 29 May 2012 15:07:40 -0700 Subject: drivers/rtc/rtc-tegra.c: clean up probe/remove routines Use the devres managed resource functions in the probe routine. Also affects the remove routine where the previously used free and release functions are not needed. The devm_* functions eliminate the need for manual resource releasing and simplify error handling. Resources allocated by devm_* are freed automatically on driver detach. Signed-off-by: Hannu Heikkinen Acked-by: Stephen Warren Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-tegra.c | 50 +++++++++++++------------------------------------ 1 file changed, 13 insertions(+), 37 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-tegra.c b/drivers/rtc/rtc-tegra.c index 75259fe38602..c006025cecc8 100644 --- a/drivers/rtc/rtc-tegra.c +++ b/drivers/rtc/rtc-tegra.c @@ -309,7 +309,8 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev) struct resource *res; int ret; - info = kzalloc(sizeof(struct tegra_rtc_info), GFP_KERNEL); + info = devm_kzalloc(&pdev->dev, sizeof(struct tegra_rtc_info), + GFP_KERNEL); if (!info) return -ENOMEM; @@ -317,29 +318,18 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev) if (!res) { dev_err(&pdev->dev, "Unable to allocate resources for device.\n"); - ret = -EBUSY; - goto err_free_info; + return -EBUSY; } - if (!request_mem_region(res->start, resource_size(res), pdev->name)) { - dev_err(&pdev->dev, - "Unable to request mem region for device.\n"); - ret = -EBUSY; - goto err_free_info; + info->rtc_base = devm_request_and_ioremap(&pdev->dev, res); + if (!info->rtc_base) { + dev_err(&pdev->dev, "Unable to request mem region and grab IOs for device.\n"); + return -EBUSY; } info->tegra_rtc_irq = platform_get_irq(pdev, 0); - if (info->tegra_rtc_irq <= 0) { - ret = -EBUSY; - goto err_release_mem_region; - } - - info->rtc_base = ioremap_nocache(res->start, resource_size(res)); - if (!info->rtc_base) { - dev_err(&pdev->dev, "Unable to grab IOs for device.\n"); - ret = -EBUSY; - goto err_release_mem_region; - } + if (info->tegra_rtc_irq <= 0) + return -EBUSY; /* set context info. */ info->pdev = pdev; @@ -362,11 +352,12 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Unable to register device (err=%d).\n", ret); - goto err_iounmap; + return ret; } - ret = request_irq(info->tegra_rtc_irq, tegra_rtc_irq_handler, - IRQF_TRIGGER_HIGH, "rtc alarm", &pdev->dev); + ret = devm_request_irq(&pdev->dev, info->tegra_rtc_irq, + tegra_rtc_irq_handler, IRQF_TRIGGER_HIGH, + "rtc alarm", &pdev->dev); if (ret) { dev_err(&pdev->dev, "Unable to request interrupt for device (err=%d).\n", @@ -380,12 +371,6 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev) err_dev_unreg: rtc_device_unregister(info->rtc_dev); -err_iounmap: - iounmap(info->rtc_base); -err_release_mem_region: - release_mem_region(res->start, resource_size(res)); -err_free_info: - kfree(info); return ret; } @@ -393,17 +378,8 @@ err_free_info: static int __devexit tegra_rtc_remove(struct platform_device *pdev) { struct tegra_rtc_info *info = platform_get_drvdata(pdev); - struct resource *res; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -EBUSY; - free_irq(info->tegra_rtc_irq, &pdev->dev); rtc_device_unregister(info->rtc_dev); - iounmap(info->rtc_base); - release_mem_region(res->start, resource_size(res)); - kfree(info); platform_set_drvdata(pdev, NULL); -- cgit v1.2.2 From ecb41a77411358d385e3fde5b4e98a5f3d9cfdd5 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 29 May 2012 15:07:40 -0700 Subject: drivers/rtc/rtc-s3c.c: fix compiler warning rtc-s3c.c:673:32: warning: `s3c_rtc_drv_data_array' defined but not used [-Wunused-variable] Signed-off-by: Sachin Kamat Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-s3c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 3f3a29752369..7e6af0b22f17 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -670,6 +670,7 @@ static int s3c_rtc_resume(struct platform_device *pdev) #define s3c_rtc_resume NULL #endif +#ifdef CONFIG_OF static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = { [TYPE_S3C2410] = { TYPE_S3C2410 }, [TYPE_S3C2416] = { TYPE_S3C2416 }, @@ -677,7 +678,6 @@ static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = { [TYPE_S3C64XX] = { TYPE_S3C64XX }, }; -#ifdef CONFIG_OF static const struct of_device_id s3c_rtc_dt_match[] = { { .compatible = "samsung,s3c2410-rtc", -- cgit v1.2.2 From 319b6ffc6df892e4ccffff823cc5521a4a5d2dca Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 30 May 2012 12:33:41 +0300 Subject: x86, realmode: Unbreak the ia64 build of drivers/acpi/sleep.c Revert usage of acpi_wakeup_address and move definition to x86 architecture code in order to make compilation work in ia64. [jsakkine: tested compilation in ia64/x86-64 and added proper commit message] Reported-by: Paul Gortmaker Originally-by: H. Peter Anvin Signed-off-by: Jarkko Sakkinen Link: http://lkml.kernel.org/r/1338370421-27735-1-git-send-email-jarkko.sakkinen@intel.com Cc: Tony Luck Cc: Len Brown Signed-off-by: H. Peter Anvin --- drivers/acpi/sleep.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index ebaa04593236..74ee4ab577b6 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c @@ -25,8 +25,6 @@ #include #include -#include - #include "internal.h" #include "sleep.h" @@ -93,13 +91,11 @@ static struct notifier_block tts_notifier = { static int acpi_sleep_prepare(u32 acpi_state) { #ifdef CONFIG_ACPI_SLEEP - unsigned long wakeup_pa = real_mode_header->wakeup_start; /* do we have a wakeup address for S2 and S3? */ if (acpi_state == ACPI_STATE_S3) { - if (!wakeup_pa) + if (!acpi_wakeup_address) return -EFAULT; - acpi_set_firmware_waking_vector( - (acpi_physical_address)wakeup_pa); + acpi_set_firmware_waking_vector(acpi_wakeup_address); } ACPI_FLUSH_CPU_CACHE(); -- cgit v1.2.2