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* ENGR00324009 Revert "ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after ↵Nicolin Chen2014-07-23
| | | | | | | | | | | | | | | disabling TE/RE" Patch "ASoC: fsl_sai: Reset FIFOs after disabling TE/RE" may accidentally increase the underrun rate of SAI. To keep an equal quality as previous release, we decide to revert this patch and find a thorough way to reset the FIFO later. This reverts commit b85f840a60de8d0a5ca8fbe7eda15f611ff5b622. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00323404-2 ASoC: fsl_sai: Fix incorrect register writing in fsl_sai_isr()Nicolin Chen2014-07-18
| | | | | | | In the rx irq handling part, we should clear the flags in RCSR not TCSR. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after disabling TE/RENicolin Chen2014-07-18
| | | | | | | | SAI will not clear their FIFOs after disabling TE/RE. Therfore, the driver should take care the task so as not to let useless data remain in the FIFO. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample RateShengjiu Wang2014-07-09
| | | | | | The SRPC register should be volatile, LOCK bit is set by the hardware. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00320849-2 ASoC: imx-cs42888: disable the delay powerdownShengjiu Wang2014-07-03
| | | | | | | | | | When test asrc p2p first, then test no asrc p2p, There is no sound after 5s. The reason is that the substream is not same for this two case, then delay powerdown will close the widget for cs42888. But the second will also use the cs42888. So set ignore_pmdown_time to 1. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00320241 ASoC: fsl_spdif: Complete the volatile register listNicolin Chen2014-06-27
| | | | | | | | | Not only SIS but also other read-only or write-only reigsters should be marked as volatile register so as not to let regcache cache them. So this patch just adds those missing registers. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 56ad235ba23274fc05422ad4b13153d1c56801c4)
* ENGR00319687 ASoC: fsl_esai: esai reset can't work after adding regcacheShengjiu Wang2014-06-24
| | | | | | | | | The reason is that PRRC and PCRC isn't cleared in restore_reg(), then update_bits for PCRC and PRRC will fail for cache is not updated. In other side, remove the store_reg() and restore_reg for adding regcache, and use regcache_sync to restore the registers. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00318773-10 ASoC: imx-audmux: Add driver suspend and resume to support ↵Nicolin Chen2014-06-19
| | | | | | | | | | | | MEGA Fast For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, AUDMUX needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00318773-9 ASoC: fsl_ssi: Add driver suspend and resume to support MEGA FastNicolin Chen2014-06-19
| | | | | | | | | | For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, SSI needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00318773-8 ASoC: fsl_spdif: Add driver suspend and resume to support ↵Nicolin Chen2014-06-19
| | | | | | | | | | | | MEGA Fast For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, SPDIF needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00318773-7 ASoC: fsl_esai: Add driver suspend and resume to support MEGA ↵Nicolin Chen2014-06-19
| | | | | | | | | | | | Fast For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, ESAI needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA FastNicolin Chen2014-06-19
| | | | | | | | | | For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, SAI needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00317675-1 ASoC: fsl: esai: refine esai for tdm supportShengjiu Wang2014-06-10
| | | | | | | Add parameter for slots, and caculate the number of TX/RX pins with slots. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00317636 ASoC: fsl: hdmi: Disable NEON optimizationShengjiu Wang2014-06-10
| | | | | | | | Enable NEON optimization will cause pulseaudio crash in the user space. Which is caused by using the NEON instruction, if only use "VPUSH, VPOP" in the function, crash will be happened also. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00313535-2 ASoC: fsl: Register two kcontrol for asrc p2pShengjiu Wang2014-05-15
| | | | | | | Register p2p width amd p2p rate tow kcontrol for asrc p2p, use can get/change these parameter with amixer. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00313535-1 ASoC: fsl: Refine imx-cs42888 machine driverShengjiu Wang2014-05-15
| | | | | | | Remove local parameter for p2p_width, p2p_rate, which will be get from the cpu driver of fe directly. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00313280-2 ASoC: fsl: Merge upsteamed cs42xx8 driver.Shengjiu Wang2014-05-13
| | | | | | | | | | | | | | | | | | The upsteamed commit is 0c516b4ff85c0be4cee5b30ae59c9565c7f91a00 ASoC: cs42xx8: Add codec driver support for CS42448/CS42888 This patch adds support for the Cirrus Logic CS42448/CS42888 Audio CODEC that has six/four 24-bit AD and eight 24-bit DA converters. [ CS42448/CS42888 supports both I2C and SPI control ports. As initial patch, this patch only adds the support for I2C. ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Brian Austin <brian.austin@cirrus.com> Acked-by: Paul Handrigan <Paul.Handrigan@cirrus.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00313280-1 ASoC: fsl: refine cs42888 machine driverShengjiu Wang2014-05-13
| | | | | | | Move rate constraint from codec driver to machine driver. Because fe and be use same runtime structure, so be needn't startup function. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00312217-1 ASoC: fsl: pop noise with wm8962Shengjiu Wang2014-05-07
| | | | | | | | | The reason of pop noise is that we change the sysclk in hw_free, which is for another wm8962 issue. So in currently the pop noise can't be resolved with no confliction. So for Android, because the samplerate is fixed. we can use other workaround for this issue: change the sysclk in the set_bias(). Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ASoC: fsl-esai: fix ESAI TDM slot settingXiubo Li2014-04-30
| | | | | | | | Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 236014ac7a6524f9f466139c2e47af70cb340ba3) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00311068 ASoC: fsl_hdmi: passthrough can't work for androidShengjiu Wang2014-04-30
| | | | | | | Android need driver to export several kcontrol. "Support channels", "Support Rates", "Support Formats". Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00311007 ASoC: fsl: mclk changed for slxShengjiu Wang2014-04-29
| | | | | | mclk of cs42888 is changed for slx. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00310878-2 ASoC: fsl_esai: cherry-pick from upstream and merge to mainlineShengjiu Wang2014-04-29
| | | | | | | | | | | | | | | cherry-picked commit is 43d24e76b69826ce32292f47060ad78cdd0197fa Header of this commit is "ASoC: fsl_esai: Add ESAI CPU DAI driver", use upstream driver to replace current one. Merged feature is: 1. Move setting of PRRC and PCRC to the end of hw_params, and disable it in shutdown function. 2. Merged the xrun handler with this commit. 3. Use dma init with NO_RESIDUE|NO_DT|COMPAT. 4. Add spba clock for ESAI Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00310878-1 Asoc: fsl: refine clock tree for ESAIShengjiu Wang2014-04-29
| | | | | | | There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Make the clock for ESAI more clear. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00309468-3 ASoC: fsl_spdif: Print selected rate for debugNicolin Chen2014-04-21
| | | | | | | It'd better to tell people what's the current rate from the clock selecting function against the required sample rate. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309468-2 ASoC: fsl_spdif: Add sysclk_df divsor support for sysclk usageNicolin Chen2014-04-21
| | | | | | | | | | | | | | | The sysclk, which could be connected to IPG clock, is one of the eight clocks on the inner clock mux of SPDIF. Previously we forbade the usage of this clock due to imperfect clock selecting function. This patch adds the sysclk_df divisor so as to complete sysclk function. [ In order to potect those clocks from other modules and the situation when SPDIF root clock is shared with other module (ASRC on imx6sx for example) that demands us to fix the clock and not to change its rate, starting from now on, we no longer use clk_round() and clk_set_rate(). ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309468-1 ASoC: fsl_spdif: Add coreclk control for DMA accessNicolin Chen2014-04-21
| | | | | | | | | | Even if we assign regmap to manage the coreclk control, we still need to open the clock if we are going to run the driver because DMA access would not be detected by regmap. So this patch adds clock control for coreclk. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309566 ASoC: fsl: fix maxburst is not accurateShengjiu Wang2014-04-21
| | | | | | | The src_maxburst and dst_maxburst means the watermark level for p2p, no need to be scaled. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ASoC: fsl_spdif: Fix wrong OFFSET of STC_SYSCLK_DIVNicolin Chen2014-04-20
| | | | | | | | It should use STC_SYSCLK_DIV_OFFSET. Thus fix it. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 6ae6698276ca36f37afc2ad38054092021519ad4)
* ENGR00309297-1 ASoC: imx-cs42888: Error out if failed to get p2p paramsNicolin Chen2014-04-18
| | | | | | | | | | | There's a possiblity that ASRC P2P would error out during its probe() due to missing some DT bindings for example. If that happens, this asrc_p2p would be a NULL pointer and accessing it would cause Kernel Panic. Thus this patch adds an error out here to keep it safe. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309073-3 ASoC: fsl: Support recording with asrc p2pShengjiu Wang2014-04-17
| | | | | | update asrc p2p to support recording, which use ideal ratio mode. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00309073-2 ASoC: fsl: Add new p2p struct for code ligibilityShengjiu Wang2014-04-17
| | | | | | improve code ligibility. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00309073-1 ASoC: fsl: Naming of p2p item is not properShengjiu Wang2014-04-17
| | | | | | Change the output-rate, output-width to p2p-rate, p2p-width. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ASoC: fsl_sai: Use FSL_SAI_xXR() and regmap_update_bits() to simplify codeNicolin Chen2014-04-16
| | | | | | | | By doing this, the driver can drop around 50 lines and become neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 2a266f8b2ae790454edb79cb8c707c9305e0307a)
* ASoC: fsl_sai: Fix incorrect condition check in trigger()Nicolin Chen2014-04-16
| | | | | | | | | | | | | Patch ASoC: fsl_sai: Fix buggy configurations in trigger() doesn't entirely fix the condition: FRDE of the current substream direction is being cleared while the code is still using the non-updated one. Thus this patch fixes this issue by checking the opposite one's FRDE alone since the current one's is absolutely disabled. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit f84526cfae46672308a361333c76b724384b61ee)
* ENGR00307835-4 ASoC: fsl: implement ASRC P2P xrun handlerShengjiu Wang2014-04-16
| | | | | | | When ASRC P2P is working, it will check the xrun status of cpu dai in the back end bistream. then will do Whole route stop and restart. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307835-3 ASoC: fsl: implement the ESAI xrun handler.Shengjiu Wang2014-04-16
| | | | | | | When esai xrun happened, there is possibility of channel swap. So ESAI need to be reset. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307835-1 ASoC: fsl: refine esai driver for sync modeShengjiu Wang2014-04-16
| | | | | | | 1. PCRC and PRRC should be set after the setting of control register according the RM. Then no need init TCCR and RCCR in init function. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307635-6 ASoC: fsl: Enable SAI for imx-sgtl5000 and imx-wm8962Nicolin Chen2014-04-16
| | | | | | | | Since we are able to link SAI and sgtl5000 and wm8962, we should update the Kconfig to make it build-in if enabling their machine drivers. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai supportNicolin Chen2014-04-16
| | | | | | | | | | | | The current imx-wm8962 machine driver is designed for SSI as CPU DAI only while as its name we should make the driver more generic to any other CPU DAI on i.MX serires -- ESAI, SAI for example. So this patch makes the driver more general so as to support those non-SSI cases. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-1 ASoC: fsl_sai: Specify buffer size for SAINicolin Chen2014-04-16
| | | | | | | Add a new micro for SAI so as to make further define flexible. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Add clock controls for SAINicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | The SAI mainly has the following clocks: bus clock control and configure registers and to generate synchronous interrupts and DMA requests. mclk1, mclk2, mclk3 to generate the bit clock when the receiver or transmitter is configured for an internally generated bit clock. So this patch adds these clocks and their clock controls to the driver. [ To concern the old DTB cases, I've added a bit of extra code to make the driver compatible with them. And by marking clock NULL if failed to get, the clk_prepare() or clk_get_rate() would easily return 0 so no further path should be broken. -- by Nicolin ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 17d1eb6628e70488c44c46003dcfe583696bb7b7)
* ENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2pNicolin Chen2014-04-16
| | | | | | | | | | | When using ASRC p2p as a for-end with other back-end modules like ESAI, it'd be safer to add 1ms delay, less might be futile for extreme cases, after enabling ASRC so as to keep ASRC output FIFO with enough data to content the DMA burstsize of back-ends and accordingly prevent underrun that might happen to them. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Fix Bit Clock Polarity configurationsNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | The BCP bit in TCR4/RCR4 register rules as followings: 0 Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge. 1 Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge. For all formats currently supported in the fsl_sai driver, they're exactly sending data on the falling edge and sampling on the rising edge. However, the driver clears this BCP bit for all of them which results click noise when working with SGTL5000 and big noise with WM8962. Thus this patch corrects the BCP settings for all the formats here to fix the nosie issue. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit ef33bc3217c7aa9868f497c4f797cc50ad3ce357)
* ENGR00306857 pulseaudio5.0 mute Headphone volume when Headphone pluggedShengjiu Wang2014-04-16
| | | | | | | Pulseaudio will detect the Headphone Jack, then swith to Headphone. So register new Jack for Headphone, the iface=CARD. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00306875-1 Revert "ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl ↵Nicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | pointer" After change the pointer, ALSA lib would re-copy the initial data to DMA buffer because the pointer is pointing the zero position at the beginning, which results an audiable duplicated playback at the first eight periods. Even though dropping this patch would cause pointer being incorrectly estimated. But to maintain the sanity of basic playback, we revert the previous patch. This reverts commit 5d0d4e1558fa0c235691436e1c5d26d9c8950775. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit cb6cd68b00fbb52852101ca2f3bc93ae45310b66)
* ASoC: fsl_sai: Add imx6sx platform supportNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | The next coming i.MX6 Solo X SoC also contains SAI module while we use imp_pcm_init() for i.MX platform. So this patch adds one compatible route for imx6sx and updates the DT doc accordingly. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 30c35252aadb460e009ca8a3fdc8891903bdfc66) [ Added essential parameters to imx_pcm_init() calling due to build error, resulted from the define change of the function on the upstream. ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streamsNicolin Chen2014-04-16
| | | | | | | | | | | | We only enable one side interrupt for each stream since over/underrun on the opposite stream would be resulted from what we previously did, enabling TERE but remaining FRDE disabled, even though the xrun on the opposite direction will not break the current stream. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 20ea0d31528f7a461a4ecfb5924ca228bf3ca3c5)
* ASoC: fsl_sai: Fix buggy configurations in trigger()Nicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current trigger() has two crucial problems: 1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx are now totally exclusive: It would fail to run simultaneous Tx-Rx cases. 2) The TERE disabling operation depends on an incorrect condition -- active reference count that only gets increased in snd_pcm_open() and decreased in snd_pcm_close(): The TERE would never get cleared. So this patch overwrites the trigger function by following these rules: A) We continue to support tx-async-while-rx-sync-to-tx case alone, which's originally limited by this fsl_sai driver, but we make the code easy to modify for the further support of the opposite case. B) We enable both TE and RE for PLAYBACK stream or CAPTURE stream but only enabling the DMA request bit (FSL_SAI_CSR_FRDE) of the current direction due to the requirement of SAI -- For tx-async-while-rx-sync-to-tx case, the receiver is enabled only when both the transmitter and receiver are enabled. Tested cases: a) aplay test.wav -d5 b) arecord -r44100 -c2 -fS16_LE test.wav -d5 c) arecord -r44100 -c2 -fS16_LE -d5 | aplay d) (aplay test2.wav &); sleep 1; arecord -r44100 -c2 -fS16_LE test.wav -d1 e) (arecord -r44100 -c2 -fS16_LE test.wav -d5 &); sleep 1; aplay test.wav -d1 Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit d827786ea623da7ceadaa037f2574a19cbeb90e5)
* ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl pointerNicolin Chen2014-04-16
| | | | | | | | | | | | We might not be able to get appl_ptr, so we estimated it by using hw_ptr, while the distance between then should not be 2 * priv->period_bytes initially but 8 * priv->period_bytes as we pri-filled one entire buffer size at the beginning. The driver's memory access might be overlapped with ALSA's buffer updating. So this patch fixes this inaccurate distance. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 5d0d4e1558fa0c235691436e1c5d26d9c8950775)
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