| Commit message (Collapse) | Author | Age |
|
|
|
|
|
|
|
|
| |
The reason is that PRRC and PCRC isn't cleared in restore_reg(), then
update_bits for PCRC and PRRC will fail for cache is not updated.
In other side, remove the store_reg() and restore_reg for adding regcache,
and use regcache_sync to restore the registers.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, ESAI needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
|
|
|
|
|
|
|
| |
Add parameter for slots, and caculate the number of TX/RX pins with
slots.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
|
| |
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 236014ac7a6524f9f466139c2e47af70cb340ba3)
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
cherry-picked commit is 43d24e76b69826ce32292f47060ad78cdd0197fa
Header of this commit is "ASoC: fsl_esai: Add ESAI CPU DAI driver", use upstream
driver to replace current one.
Merged feature is:
1. Move setting of PRRC and PCRC to the end of hw_params, and disable it in
shutdown function.
2. Merged the xrun handler with this commit.
3. Use dma init with NO_RESIDUE|NO_DT|COMPAT.
4. Add spba clock for ESAI
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
| |
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem.
Make the clock for ESAI more clear.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
| |
When esai xrun happened, there is possibility of channel swap. So ESAI
need to be reset.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
| |
1. PCRC and PRRC should be set after the setting of control register
according the RM. Then no need init TCCR and RCCR in init function.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|
|
|
|
|
|
|
|
| |
This patch extracts the register init code for ESAI along with the default slot
number which is more common to I2S and LEFT_J mode.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
|
|
|
|
|
|
|
|
|
| |
All of these functions might be called before we enable the core clock in the
startup() by set_bias_level() or late_probe() in machine driver for example.
To make it safe, we here add pair of clock en/disabling to each function.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
|
|
|
|
|
|
|
|
| |
Both esai and spdif are using SDMA script to transmit and receive data while
the essential spba clock is missed in the current two drivers. Thus add them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
|
|
|
|
|
|
|
|
|
| |
Each CPU DAI driver has its own defined DMA buffer size, so this patch just
drops the original one that uses a fixed size for all drivers and implements
a different DMA buffer size to each driver.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
|
|
add esai driver.
add bindings documentation of esai
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
|