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Most SPI drivers that implement runtime PM support use identical code to
do so: they acquire a runtime PM lock in prepare_transfer_hardware() and
then they release it in unprepare_transfer_hardware(). The variations in
this are mostly missing error checking and the choice to use autosuspend.
Since these runtime PM calls are normally the only thing in the prepare
and unprepare callbacks and the autosuspend API transparently does the
right thing on devices with autosuspend disabled factor all of this out
into the core with a flag to enable the behaviour.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Make spi core calculate the message length while
populating the other transfer parameters.
Usecase, driver can use it to populate framelength filed in their
controller.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Allow drivers to avoid implementing their own checks for simple rates by
specifying the limits in the master structure.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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SPI_BPW_RANGE_MASK is intended to work by calculating two masks; one
representing support for all bits up-to-and-including the "max" supported
value, and one representing support for all bits up-to-but-not-including
the "min" supported value, and then taking the difference between the
two, resulting in a mask representing support for all bits between
(inclusive) the min and max values.
However, the second mask ended up representing all bits up-to-and-
including rather up-to-but-not-including. Fix this bug.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The parameters to SPI_BPW_RANGE_MASK() are in the range 1..32. If 32 is
used as a parameter, part of the expression is "1 << 32". Since 32 is >=
the size of the type in use, such a shift is undefined behaviour. Add
macro SPI_BIT_MASK to Implement a special case and thus avoid undefined
behaviour. Use this new macro rather than BIT() when implementing
SPI_BPW_RANGE_MASK().
This fixes build warnings such as:
drivers/spi/spi-gpio.c:446:2: warning: left shift count >= width of type [enabled by default]
SPI_BPW_MASK() already avoids this, since its parameter is also in range
1..32, yet it only shifts by up to one less than the input parameter.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Introduce two macros to make setting up spi_master.bits_per_word_mask
easier, and avoid mistakes like writing BIT(n) instead of BIT(n - 1).
SPI_BPW_MASK is for a single supported value of bits_per_word_mask.
SPI_BPW_RANGE_MASK represents a contiguous set of bit lengths.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Convert drivers using bitbang to use the core mesasge pump infrastructure,
saving some code and meaning that these drivers get to take advantage of
work done on improving the core implementation.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Currently no drivers use the ability to override spi_bitbang_transfer()
and if any started this would make it harder to convert the bitbang code
to use transfer_one_message() so remove the export in order to prevent
anyone starting.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).
This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long. User can manually set delay line to find a suitable data sampling
window for card to work properly.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
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In order to optmize low power IDLE numbers all PLLs should be in bypass.
On imx6sl, UART can be sourced directly from the 24MHz XTAL. Its frequency
is limited to 4MHz due to an internal divide by 6 divider.
For customer who don't require higher uart speeds add "uart_at_4M"
to the kernel command line.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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This patch add MLB150 driver support.Copy files from 3.0.35 kernel.
* Using of_xxx API to get resource from dts
* Using devm_xxx API to simply the code
* Change clk_enable()/clk_disable() to clk_prepare_enable()/
clk_disable_unprepare()
* Fix some warning when compiling
* Fix issue when handling errors in mxc_mlb150_probe()
* Remove declaration of gpio_mlb_active(), gpio_mlb_inactive()
out of mxc_mlb.h, because the functions are not invoked.
* Add UAPI support.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
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If a device have sleep and idle states in addition to the
default state, look up these in the core and stash them in
the pinctrl state container.
Add accessor functions for pinctrl consumers to put the pins
into "default", "sleep" and "idle" states passing nothing but
the struct device * affected.
Solution suggested by Kevin Hilman, Mark Brown and Dmitry
Torokhov in response to a patch series from Hebbar
Gururaja.
Cc: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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There's a enet clock gate missing in clock tree, thus add it.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Previously, we used sdma's event pending to forcibly re-schedule sdma
for work round, because sdma channel for ASRC input task would fail to
be opened due to its dma request always keeping high after ASRC opens
the pair, which cause sdma miss the trigger point of dma request.
Now, instead of using event pending, we clear the dma request on ASRC
driver side by setting its thresholds to an impossible trigger area
during its stall state. Since ASRC would stall its process when input
fifo is near empty or output fifo is near full, during the stall state,
the specific thresholds, 0 for input fifo and 63 for output fifo, would
never let asrc meet this condition. So dma request can be cleared and
raised again after we restore the true required thresholds.
Accordingly, since we don't need event pending any more, we dropped the
code from the sdma driver.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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We don't need to set ASRC to STALL level everytime, instead we only need
to do that at the beginning. If we insert null data into input fifo during
the sequence of valid datas, there would be a noise occur to it.
By doing this, we can assure ASRC would keep each period's perturbation of
output dma task within 8 sample sizes, which is the default value for last
period number. Thus we don't need to expand the last period number any more.
This patch also dropped some unused functions since the driver no long needs
them and replaced wrapped function for channel number configuration with direct
regmap_update_bits() to make the driver clean.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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We can determine the IP version from DT compatible name to decide which
clock map and channel bits should be used.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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* Dropped unused header files.
* Use pair-explicit error massage.
* Fixed some coding style issue.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Use completion instead of counter to make driver clean and drop
implicit mdelay by using wait_for_completion().
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Dropped the legency readl/writel() and use regmap instead. Also removed
core clock's clk_prepare() and spin_lock()/unlock() outside regmap due to
regmap already has these features.
This patch also added a missing writable register to the regmap in order
to assure the regsiter updating success.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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ASRC is using shp_2_mcu and mcu_2_shp sdma scripts that use spba bus to
transfer data, while the driver hasn't include the control code of spba
clock.
This would cause multiple pair conversion failed in most of time. Thus
we need to add its support.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Remove HDCP register define from HDMI kernel driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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IPUv3 IC task downsize scaling ratio cannot exceed or be
equal to 8:1. This patch makes the code return error code
if the ratio overflows.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Add support to scale the DDR frequency between 400MHz and 24MHz.
Add support to scale AHB between 132MHz and 24MHz.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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* Add missing clock control
* Set ASRC clock to 7.5MHz as 3.0.35 does
* Use the same divisor for ideal ratio mode as 3.0.35 does
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.
This patch add pinctrl state switch code according to different
uhs mode include 100mhz sate, 200mhz sate and normal state
(50Mhz and below).
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Copied mipi_csi.h from:
commit 50ca92f4010a93be265de7aad501b4dcae095a63
Author: Sheng Nan <b38800@freescale.com>
Date: Thu Mar 7 13:39:54 2013 +0800
ARM: include: remove definition of mipi-csi2 platform data
Other files copied files from:
commit 1fb93870965b7d8d67b4db6233a30c06d82f84fc
Author: Liu Ying <Ying.Liu@freescale.com>
Date: Thu Mar 21 12:15:52 2013 +0800
MIPI-CSI2:Fix a build warning
- Changed includes files for 3.10
- Dropped deprecated __devexit
- Added generic error message if probe fails
- Added configuration and set default to 'n'
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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The auto cmd23 function on some platforms may not work well,
add a quirk to allow them to work without auto cmd23.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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There's a dividor for pll4_audio clock missing in clock tree, thus add it.
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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It is used to let the PHY enters low power mode at
controller suspend routine.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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There's a missing script for hdmi audio support in current sdma driver,
thus add it.
This HDMI script doesn't use bd to copy memory like a normal one does
but only to update the memory address for HDMI internal AHB DMA and
then trigger its procedure automatically.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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merge the mach/epdc.h into linux/mxcfb_epdc.h
drop VM_RESERVED flag as deprecated.
drop VM_IO flag as it's automatically set in remap_pfn_range()
use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
use module_platform_driver()
add binding dts document for epdc fb driver
change the devname for interrupt from 'fb_dma' to 'epdc' to make it clear
Signed-off-by: Robby Cai <R63905@freescale.com>
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It's ported from v3.5.7 kernel, which contains a sensor driver
and regulator driver. It's used for E-Ink panel.
add a parameter for mfd_add_devices() due to the propotype change.
use IS_ERR() to check the return value for devm_regulator_get().
Signed-off-by: Robby Cai <R63905@freescale.com>
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devicetrees may have a linux,stdout-path property in the chosen
node describing the console device. This adds a helper function
to match a device against this property so a driver can call
add_preferred_console for a matching device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Add the pcie bits definitons of gpr12 and gpr8 registers.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This will make it easier to write archiecture independent host bridge
drivers and mitigate against further duplication of DT parsing code.
This patch can be used in the following way:
struct of_pci_range_parser parser;
struct of_pci_range range;
if (of_pci_range_parser_init(&parser, np))
; //no ranges property
for_each_of_pci_range(&parser, &range) {
/*
directly access properties of the address range, e.g.:
range.pci_space, range.pci_addr, range.cpu_addr,
range.size, range.flags
alternatively obtain a struct resource, e.g.:
struct resource res;
of_pci_range_to_resource(&range, np, &res);
*/
}
Additionally the implementation takes care of adjacent ranges and merges them
into a single range (as was the case with powerpc and microblaze).
Signed-off-by: Andrew Murray <Andrew.Murray@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Cherry-pick isl29023.h from 3.0.35.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
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- Remove chip revision check code.
- Set HDMI event as SDMA event2 for HDMI audio.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add support to drop DDR and AHB frequency to 24MHz in
system IDLE state.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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This patch is a fastforward porting for mipi dsi driver and
TRULY-WVGA mipi panel driver.
* Add devicetree support for the mipi dsi driver.
* Get mipi config clock source in the mipi dsi driver.
* Change clk_enable()/clk_disable() to clk_prepare_enable()/
clk_disable_unprepare().
* Move mipi dsi driver initialization stuff to mipi_dsi_probe()
from mipi_dsi_disp_init().
* Move mach/mipi_dsi.h to linux/mipi_dsi.h.
* Remove __devexit_p and __devexit since 3.10 kernel doesn't
support them.
* Remove struct mipi_dsi_platform_data from mach/mipi_dsi.h.
* Remove mach/hardware.h, mach/clock.h, linux/fsl_device.h
and linux/regulator/consumer.h in the drivers.
* Remove special pixel clock setting for imx6sdl since no
issue is found without it.
* Remove unused reset, lcd_power and backlight_power interfaces
in struct mipi_dsi_info.
* Remove unused regulator related entries in struct mipi_dsi_info.
* Remove the IOMUX_GPR3_OFFSET macro from mipi dsi driver since
the muxing is done with common regmap APIs.
* Rename ipu_id to dev_id since i.MX6DL RM tells that lcdif can
connect with mipi dsi.
* Add mipi dsi related information in the devicetree binding
documentation.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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During the read of NOR, the kernel actually calls the inline_map_copy_from()
to read the data out. And inline_map_copy_from() will use the memcpy_fromio()
to do the real job.
The memcpy_fromio macro maps _memcpy_fromio() in the current code.
But the _memcpy_fromio() will use readb() to do the copy work one byte
by one byte. This makes the read performance of NOR very slow(about 2~3MB/s).
A similiar discussion could be found in:
http://lists.infradead.org/pipermail/linux-arm-kernel/2009-November/003860.html
This patch replace the memcpy_fromio with memcpy which is optimized by the
kernel.
The following is the result from mtd_speedtest with M29W256GL7AN6E:
=================================================
mtd_speedtest: MTD device: 2
mtd_speedtest: not NAND flash, assume page size is 512 bytes.
mtd_speedtest: MTD device size 4194304, eraseblock size 131072, page size 512,
count of eraseblocks 32, pages per eraseblock 256, OOB size 0
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 845 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 19504 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 845 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 19140 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 846 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 19320 KiB/s
mtd_speedtest: Testing erase speed
mtd_speedtest: erase speed is 233 KiB/s
mtd_speedtest: Testing 2x multi-block erase speed
mtd_speedtest: 2x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 4x multi-block erase speed
mtd_speedtest: 4x multi-block erase speed is 224 KiB/s
mtd_speedtest: Testing 8x multi-block erase speed
mtd_speedtest: 8x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 16x multi-block erase speed
mtd_speedtest: 16x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 32x multi-block erase speed
mtd_speedtest: 32x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 64x multi-block erase speed
mtd_speedtest: 64x multi-block erase speed is 224 KiB/s
mtd_speedtest: finished
=================================================
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Currently, the controller only runs when the ci->vbus_active is true.
So the flag CI_HDRC_PULLUP_ON_VBUS is useless no longer.
If the user doesn't have otgsc, he/she needs to change ci_handle_vbus_change
to update ci->vbus_active.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
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Since we need otgsc to know vbus's status at some chipidea
controllers even it is peripheral-only mode. Besides, some
SoCs (eg, AR9331 SoC) don't have otgsc register even
the DCCPARAMS_DC and DCCPARAMS_HC are both 1 at CAP_DCCPARAMS.
We inroduce flag CI_HDRC_DUAL_ROLE_NOT_OTG to indicate if the
controller is dual role, but not supports OTG. If this flag is
not set, we follow the rule that if DCCPARAMS_DC and DCCPARAMS_HC
are both 1 at CAP_DCCPARAMS, then this controller is otg capable.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
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The vbus regulator is a common element for USB vbus operation,
So, move it from glue layer to core.
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
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Add sabresd battery driver which based on Max8903 charger IC.
Signed-off-by: Robin Gong <b38343@freescale.com>
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add asrc uapi header to Kbuild.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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For the sake of support asrc p2p, the sdma driver need to be updated.
1. Add another dma_request, p2p need two dma_request.
2. There are some cases which need to change the config after the
dma_request_channel. add dma_request config in dmaengine_slave_config().
3. add dma_request0 and dma_request1 in dma_slave_config for runtime config
in dmaengine_slave_config.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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It's ported from v3.5.7, which contains ePxP DMAENGINE driver and
a client driver named pxp_device. This patch also includes the changes:
- use uapi header file
- remove VM_RESERVED since it's deprecated, and drop redundant VM_IO flag
since it's automatically set in remap_pfn_range()
- use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
- use devm_kzalloc() instead in pxp_probe()
- use macro __KERNEL__ in pxp_dma uapi header to avoid definition conflict
Signed-off-by: Robby Cai <R63905@freescale.com>
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- Add prefix "fsl" to mxc specific dts properties.
- imx_hdmi_type will been referenced by app move it to mxc_hdmi.h.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Some hardware modules need strict flows according
to regulator's enable/disable, such as for i.MX6
SOC's PU regulator, there is another power gate
in GPC module, it needs to disable PU modules' clock
before PU regulator is disabled and need to enable
clock right after PU regulator is enabled, then it
can do GPC's power gate operation.
So we need to add REGULATOR_EVENT_PRE_DISABLE and
REGULATOR_EVENT_ENABLE for regulator's notifier events.
Signed-off-by: Anson Huang <b20788@freescale.com>
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