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* ENGR00298524-4 pinctrl: imx: add pinctrl driver for imx6sxAnson Huang2014-04-16
| | | | | | | Add a pinctrl driver for i.MX6 SoloX based on pinctrl-imx core driver. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00283508-5 pinctrl: imx: support pin sleep mode in suspendAnson Huang2014-04-16
| | | | | | | | When system suspend, need to switch pwm pin to sleep mode, this is to save IO power. Using pinctrl mode switch framework to make it happen. Signed-off-by: Anson Huang <b20788@freescale.com>
* drivers: pinctrl sleep and idle states in the coreLinus Walleij2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | If a device have sleep and idle states in addition to the default state, look up these in the core and stash them in the pinctrl state container. Add accessor functions for pinctrl consumers to put the pins into "default", "sleep" and "idle" states passing nothing but the struct device * affected. Solution suggested by Kevin Hilman, Mark Brown and Dmitry Torokhov in response to a patch series from Hebbar Gururaja. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: work around select input quirkShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | The select input for some pin may not be implemented using the regular select input register but the general purpose register. A real example is that imx6q designers found the select input for USB OTG ID pin is missing at the very late stage, and can not add a new select input register but have to use a general purpose register bit to implement it. The patch adds a workaround for such select input quirk by interpreting the input_val cell of pin function ID in a different way, so that all the info that needed for setting up select input bits in general purpose register could be decoded from there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ENGR00269945: pinctrl: support pinctrl setting assertion via gpiosShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | It's pretty common that on some reference design or validation boards, one pin could be used by two devices on board, and the pin route is controlled by a GPIO. So to assert the pin for given device, not only the pinmux controller in SoC needs to be set up properly but also the GPIO needs to be pulled up/down. The patch adds support of a device tree property "pinctrl-assert-gpios" under client device node. It plays pretty much like a board level pin multiplexer, and steers the pin route by controlling the GPIOs. When client device has the property represent in its node, pinctrl device tree mapping function will firstly pull up/down the GPIOs to assert the pins for the device at board level. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* pinctrl: add VF610 pinctrl driverJingchang Lu2014-04-16
| | | | | | | | | | | | Commit 78bafc66180d42f972b443b0b573a1b6ff9aa522 upstream. Adds Freescale Vybrid VF610 pin controller driver to IMX common pinctrl driver framework. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* pinctrl: imx: add VF610 support to imx pinctrl frameworkJingchang Lu2014-04-16
| | | | | | | | | | | | | | Commit bf5a530971afbe959348af4d84d17636108e6abf upstream. On some platforms such as VF610, offset of mux and pad ctrl register may be zero, and the mux_mode and config_val are in one 32-bit register. This patch adds support to imx core pinctrl framework to handle these cases. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* pinctrl: enable build of pinctrl-imx6sl driverShawn Guo2014-04-16
| | | | | | | | | | Commit 4fdf774fc924d48e3f789243950854c87e05c26c upstream. The pinctrl-imx6sl is in place. Enable the build of it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* pinctrl: protect pinctrl_list addStanislaw Gruszka2014-02-20
| | | | | | | | | | | | | | | | | | commit 7b320cb1ed2dbd2c5f2a778197baf76fd6bf545a upstream. We have few fedora bug reports about list corruption on pinctrl, for example: https://bugzilla.redhat.com/show_bug.cgi?id=1051918 Most likely corruption happen due lack of protection of pinctrl_list when adding new nodes to it. Patch corrects that. Fixes: 42fed7ba44e ("pinctrl: move subsystem mutex to pinctrl_dev struct") Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pinctrl: vt8500: Change devicetree data parsingTony Prisk2014-02-20
| | | | | | | | | | | | | | | | | | | commit f17248ed868767567298e1cdf06faf8159a81f7c upstream. Due to an assumption in the VT8500 pinctrl driver, the value passed from devicetree for 'wm,pull' was not explicitly translated before being passed to pinconf. Since v3.10, changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN) no longer map 1-to-1 with the expected values in devicetree. This patch adds a small translation between the devicetree values (0..2) and the enum pin_config_param equivalent values. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pinctrl: sunxi: Honor GPIO output initial vaulesChen-Yu Tsai2014-02-06
| | | | | | | | | | | | | commit fa8cf57c923e86a693a85aff1df579245a27cbb3 upstream. Some GPIO users, such as fixed-regulator, request GPIO output with initial value of 1. This was ignored by sunxi driver. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pinctrl: dove: unset twsi option3 for gconfig as wellRoel Kluin2013-12-04
| | | | | | | | | | | | commit 6d0a4ed2b90a12e1403d3e7d9d8c2cc7fdc301b5 upstream. This fixes a typo which left twsi config3 option enabled. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pinctrl: at91: fix get_pullup/down function returnBoris BREZILLON2013-09-26
| | | | | | | | | | | | | | commit 05d3534a321d7fe4524b3b83bb20318282f3ec2c upstream. In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the pullup/down for this pin (pin is represented as a bit position) is disabled. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'renesas-fixes-for-v3.10' of ↵Olof Johansson2013-06-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes From Simon Horman, Renesas ARM based SoC fixes for v3.10: - Correction to USB OVC and PENC pin groupings on r8a7779 SoC. This avoids conflicts when the USB_OVCn pins are used by another function. This has been observed to be a problem in v3.10-rc1. - Update CMT clock rating for sh73a0 SoC to resolve boot failure on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1. * tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: sh73a0: Update CMT clockevent rating to 80 sh-pfc: r8a7779: Don't group USB OVC and PENC pins Signed-off-by: Olof Johansson <olof@lixom.net>
| * sh-pfc: r8a7779: Don't group USB OVC and PENC pinsLaurent Pinchart2013-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | The USB_OVCn pins are alternate options for USB over-current detection when using a 3.3V USB interface. As they're not mandatory they can be used independently of the USB PENC pins. Don't group the USB_OVCn and PENC pins to avoid conflicts when the USB_OVCn pins are used by another function. Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: pinconf: take the right mutexLinus Walleij2013-05-27
| | | | | | | | | | | | | | | | | | | | The pinconf_dgb_config_print() takes the per-pincontroller mutex, when what it wants to take is actually the pin maps mutex. Reported-by: James Hogan <james.hogan@imgtec.com> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: fix error return code in sunxi_pinctrl_probe()Wei Yongjun2013-05-27
| | | | | | | | | | | | | | | | | | | | | | Fix to return a negative error code from the devm_clk_get() error handling case instead of 0, as done elsewhere in this function. Introduced by commit 950707c0eb5c7aeaa2c446a04c824f4be686d2f6 (pinctrl: sunxi: add clock support) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: exynos: Handle suspend/resume of GPIO EINT registersTomasz Figa2013-05-27
| | | | | | | | | | | | | | | | | | | | Some GPIO EINT control registers needs to be preserved across suspend/resume cycle. This patch extends the driver to take care of this. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Allow per-bank SoC-specific private dataTomasz Figa2013-05-27
| | | | | | | | | | | | | | | | | | | | | | This patch extends pin bank descriptor structure with SoC-specific private data field that allows SoC-specific drivers to store their own private data. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Add support for SoC-specific suspend/resume callbacksTomasz Figa2013-05-27
| | | | | | | | | | | | | | | | | | | | | | SoC-specific driver might require additional save and restore of registers. This patch adds pair of SoC-specific callbacks per pinctrl device to account for this. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Don't override the error code in probe error handlingAxel Lin2013-05-27
| | | | | | | | | | | | | | | | | | | | Otherwise, we return 0 in probe error paths when gpiochip_remove() returns 0. Also show error message if gpiochip_remove() fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: exynos: Add support for set_irq_wake of wake-up EINTsTomasz Figa2013-05-27
| | | | | | | | | | | | | | | | | | | | This patch adds support of IRQ wake-up ability configuration for wake-up EINTs on Exynos SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: fix suspend/resume functionalityDoug Anderson2013-05-27
|/ | | | | | | | | | | | | | | | | | The GPIO states need to be restored after s2r and this is not currently supported in the pinctrl driver. This patch saves the gpio states before suspend and restores them after resume. Saving and restoring is done very early using syscore_ops and must happen before pins are released from their powerdown state. Patch originally from Prathyush K <prathyush.k@samsung.com> but rewritten by Doug Anderson <dianders@chromium.org>. Signed-off-by: Prathyush K <prathyush.k@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-fixes-v3.10-2' of ↵Linus Torvalds2013-05-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl fixes from Linus Walleij: - Three fixes to make the boot path for device tree work properly on the Nomadik pin controller. - Compile warning fix for the vt8500 driver. - Fix error path in pinctrl-single. - Free mappings in error path of the Lantiq controller. - Documentation fixes. * tag 'pinctrl-fixes-v3.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl/lantiq: Free mapping configs for both pin and groups pinctrl: single: fix error return code in pcs_parse_one_pinctrl_entry() pinctrl: generic: Fix typos and clarify comments pinctrl: vt8500: Fix incorrect data in WM8750 pinctrl table pinctrl: abx500: Rejiggle platform data and DT initialisation pinctrl: abx500: Specify failed sub-driver by ID instead of driver_data
| * pinctrl/lantiq: Free mapping configs for both pin and groupsLaurent Pinchart2013-05-15
| | | | | | | | | | | | | | | | | | When creating mappings from DT both pin config and group config mappings are allocated. Free them both when destroying the mappings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: single: fix error return code in pcs_parse_one_pinctrl_entry()Wei Yongjun2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Introduced by commit 9dddb4df90d136429b6d6ddefceb49a9b93f6cd1 (pinctrl: single: support generic pinconf) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: vt8500: Fix incorrect data in WM8750 pinctrl tableTony Prisk2013-05-14
| | | | | | | | | | | | | | | | | | WMT_PIN_WAKEUP1 should be declared as WMT_PIN(0, 17) rather than WMT_PIN(0, 16). This currently generates a runtime warning because WMT_PIN_WAKEUP0 is already defined as WMT_PIN(0, 16). Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: Rejiggle platform data and DT initialisationLee Jones2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platform Data is invariably populated for this driver, even when booting with Device Tree. Thus the Device Tree probing code encased within the first check for Platform Data will never executed, causing the driver to fail when DT is enabled. This patch fixes the aforementioned regression by rejigging the probe() semantics to attempt to extract a platform ID from Device Tree if one can not be sourced from platform data. A pointer to GPIO platform data is always passed to the driver now, so there's little point in checking for 'pdata' and executing the DT case if it's not there. The difference between booting with DT and !DT is when booting with DT, plat_id is not populated. Thus, in the DT case we have to use a DT match table in order to find out which platform we're executing on. So, we're changing the semantics here to only use the match table if no plat_id is supplied though platform data. Signed-off-by: Lee Jones <lee.jones@linaro.org> [edited commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: Specify failed sub-driver by ID instead of driver_dataLee Jones2013-05-14
| | | | | | | | | | | | | | | | | | | | If a sub-driver has not been specified correctly, there is a good chance that plat_id is NULL, hence using an attribute of plat_id in the error message is likely to not only fail the driver but Oops the kernel. Use the failed ID instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | drivers/pinctrl: don't check resource with devm_ioremap_resourceWolfram Sang2013-05-18
|/ | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds2013-05-09
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select
| * Convert selectors of GENERIC_GPIO to GPIOLIBAlexandre Courbot2013-04-16
| | | | | | | | | | | | | | | | | | GENERIC_GPIO is now equivalent to GPIOLIB and features that depended on GENERIC_GPIO can now depend on GPIOLIB to allow removal of this option. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* | Merge tag 'soc-for-linus-3' of ↵Linus Torvalds2013-05-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates (part 3) from Arnd Bergmann: "This is the third and smallest of the SoC specific updates. Changes include: - SMP support for the Xilinx zynq platform - Smaller imx changes - LPAE support for mvebu - Moving the orion5x, kirkwood, dove and mvebu platforms to a common "mbus" driver for their internal devices. It would be good to get feedback on the location of the "mbus" driver. Since this is used on multiple platforms may potentially get shared with other architectures (powerpc and arm64), it was moved to drivers/bus/. We expect other similar drivers to get moved to the same place in order to avoid creating more top-level directories under drivers/ or cluttering up the messy drivers/misc/ even more." * tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: imx: reset_controller may be disabled ARM: mvebu: Align the internal registers virtual base to support LPAE ARM: mvebu: Limit the DMA zone when LPAE is selected arm: plat-orion: remove addr-map code arm: mach-mv78xx0: convert to use the mvebu-mbus driver arm: mach-orion5x: convert to use mvebu-mbus driver arm: mach-dove: convert to use mvebu-mbus driver arm: mach-kirkwood: convert to use mvebu-mbus driver arm: mach-mvebu: convert to use mvebu-mbus driver ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock ARM i.MX53: tve_di clock is not part of the CCM, but of TVE ARM i.MX53: make tve_ext_sel propagate rate change to PLL ARM i.MX53: Remove unused tve_gate clkdev entry ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree ARM: i.MX5: Add PATA and SRTC clocks ARM: imx: do not bring up unavailable cores ARM: imx: add initial imx6dl support ARM: imx1: mm: add call to mxc_device_init ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS ...
| * \ Merge tag 'renesas-pinmux-fixes-for-v3.10' of ↵Olof Johansson2013-04-11
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 From Simon Horman: Renesas ARM and SH based SoC pinmux fixes for v3.10 Correct a typo in sh-pfc r8a7779 * tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh-pfc: r8a7779: tidyup intc_irq3_b typo Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | sh-pfc: r8a7779: tidyup intc_irq3_b typoKuninori Morimoto2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms@verge.net.au>
| * | | Merge branch 'gic/cleanup' into next/soc2Arnd Bergmann2013-04-08
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both zynq and shmobile have conflicts against the gic cleanup series, resolved here. Conflicts: arch/arm/mach-shmobile/smp-emev2.c arch/arm/mach-shmobile/smp-r8a7779.c arch/arm/mach-shmobile/smp-sh73a0.c arch/arm/mach-zynq/platsmp.c drivers/gpio/gpio-pl061.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * \ \ \ Merge tag 'renesas-pinmux2-for-v3.10' of ↵Olof Johansson2013-04-03
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 * tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits) sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support sh-pfc: r8a73a4: GPIO IRQ support sh-pfc: r8a73a4: Support sparse GPIO numbers sh-pfc: Add r8a73a4 pinmux support sh-pfc: r8a7779: Split DU input and output pixel clocks sh-pfc: r8a7779: Remove GPIO data ARM: shmobile: r8a7779: Register GPIO devices sh-pfc: Configure pins as GPIOs at request time when handled externally sh-pfc: Skip gpiochip registration when no GPIO resource is found sh-pfc: Make GPIO support optional sh-pfc: Make function GPIOs support optional ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | Merge tag 'renesas-soc2-for-v3.10' of ↵Olof Johansson2013-04-03
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM SoC updates for v3.10 Some Highlights: * Add r8a7790 SoC * Add r8a73a4 SoC * Migrate r8a7740 SoC from INTC to GIC * Add thermal driver support to r8a73a4 SoC * Add irqpin DT nodes to sh73a0 SoC * Add SCIF support to r8a7778 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10 * tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits) ARM: shmobile: r8a7790 SoC 64-bit DT support ARM: shmobile: r8a73a4 SoC 64-bit DT support ARM: shmobile: r8a7790 PFC support ARM: shmobile: r8a7790 IRQC support ARM: shmobile: r8a7790 SCIF support ARM: shmobile: Initial r8a7790 SoC support ARM: shmobile: r8a7779: move global functions to r8a7779.h ARM: shmobile: r8a7740: move global functions to r8a7740.h ARM: shmobile: sh73a0: move global functions to sh73a0.h ARM: shmobile: sh7372: move global functions to sh7372.h ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock ARM: shmobile: r8a7740: use fixed ratio clock ARM: shmobile: r8a7740: tidyup comment/implementation mismatch ARM: shmobile: sh73a0: use fixed ratio clock ARM: shmobile: sh7372: use fixed ratio clock ARM: shmobile: add struct clk_ratio and fixed ratio clock macro ARM: shmobile: sh7372: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: add a TWD clock ARM: shmobile: r8a7740: Migrate from INTC to GIC ... Signed-off-by: Olof Johansson <olof@lixom.net>
* | \ \ \ \ Merge tag 'soc-for-linus-2' of ↵Linus Torvalds2013-05-07
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates (part 2) from Arnd Bergmann: "These patches are all for Renesas shmobile, and depend on the earlier pinctrl updates. Remarkably, this adds support for three new SoCs: r8a73a4, r8a73a4 and r8a7778. The bulk of the code added for these is for pinctrl (using the new subsystem) and for clocks (not yet using the common clock subsystem). The latter will have to get converted in one of the upcoming releases, but shmobile is not ready for that yet. The series also contains Renesas shmobile board changes, adding one board file for each of the three new SoCs. These boards are using a mix of classic and device-tree based probing, as there is still a lot of infrastructure in shmobile that has not been converted to DT yet. Once those are resolved to the degree that no board specific setup code is needed, they can get folded into the respective SoC setup files." * tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits) ARM: shmobile: use r8a7790 timer setup code on Lager ARM: shmobile: force enable of r8a7790 arch timer ARM: shmobile: Add second I/O range for r8a7790 PFC ARM: shmobile: bockw: enable network settings on bootargs ARM: shmobile: bockw: add SMSC ethernet support ARM: shmobile: R8A7778: add Ether support ARM: shmobile: bockw: enable SMSC ethernet on defconfig ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin() ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO() ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection ARM: shmobile: mackerel: add interrupt names for SDHI0 ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio ARM: shmobile: mackerel: remove OCR masks, where regulators are used ARM: shmobile: mackerel: SDHI resources do not have to be numbered ARM: shmobile: Initial r8a7790 Lager board support ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support ARM: shmobile: APE6EVM base support ARM: shmobile: kzm9g-reference: add ethernet support ARM: shmobile: add R-Car M1A Bock-W platform support ...
| * \ \ \ \ \ Merge tag 'renesas-boards3-for-v3.10' of ↵Olof Johansson2013-04-03
| |\ \ \ \ \ \ | | | |_|/ / / | | |/| | | / | | |_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 Third round of Renesas ARM SoC board updates for v3.10 Highlights: * Add Lager board support * Add ape6evm board support * Add Bock-W board support * Mackerel MMCIF/SDHI clean ups * Add ethernet support to kzm9g-reference This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10 The merge with renesas-pinmux2-for-v3.10 was made to provide run-time dependencies for the following changes: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support * tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits) ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection ARM: shmobile: mackerel: add interrupt names for SDHI0 ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio ARM: shmobile: mackerel: remove OCR masks, where regulators are used ARM: shmobile: mackerel: SDHI resources do not have to be numbered ARM: shmobile: Initial r8a7790 Lager board support ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support ARM: shmobile: APE6EVM base support ARM: shmobile: kzm9g-reference: add ethernet support ARM: shmobile: add R-Car M1A Bock-W platform support sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | sh-pfc: r8a73a4: Remove unused GPIO bias dataMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Remove function GPIOsMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Remove IRQC function GPIOSMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Remove SCIF function GPIOSMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Add IRQC pin groups and functionsMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Add SCIF pin groups and functionsMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf supportMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: GPIO IRQ supportMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: r8a73a4: Support sparse GPIO numbersMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | sh-pfc: Add r8a73a4 pinmux supportMagnus Damm2013-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-17 22:40:54 -0400