aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
Commit message (Collapse)AuthorAge
* drm/i915: Use the direct mapping of pipe->crtcChris Wilson2010-09-09
| | | | | | | | Why iterate all the crtcs to find the pipe, when we already know which crtc is attached to which pipe? Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Rename intel_encoder->enc to base for consistencyChris Wilson2010-09-09
| | | | | | | | [Patch is slightly larger than is strictly necessary to fixup surrounding checkpatch.pl errors.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915/dp: Flush the PLL register write before sleepingChris Wilson2010-09-08
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: make sure panel is sequenced off when starting a mode setJesse Barnes2010-09-08
| | | | | | | Otherwise we may not be able to train the DP link. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: make sure VDD AUX power has time to settleJesse Barnes2010-09-08
| | | | | | | | When turning on or off the VDD AUX bit, we need to give the panel time to start or stop or AUX transactions may fail. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: don't change VDD AUX status in panel power functionsJesse Barnes2010-09-08
| | | | | | | | Mode set sequence outlines when the AUX VDD bit should be set and cleared, and it's separate from the panel power sequence. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: split DP link training across panel power sequencingJesse Barnes2010-09-08
| | | | | | | | | | | | | | Mode set sequence requires that we start training, then enable the panel, then complete training. So split the DP training function into two parts; the first enables the DP port and sets training pattern 1 and the second completes the training. As part of this, remove some redundant function args from the various DP handling functions and use the intel_dp fields everywhere we can. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: removed first ironlake_edp_backlight_on() on advice of jbarnes] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use VDD AUX for panel power around detection and in prepareJesse Barnes2010-09-08
| | | | | | | | | | Mode setting sequence specifies that we use VDD AUX for configuration and detection, and early in the mode set sequence. Only later (after DP_A has started training) should we actually enable panel power. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: checkpatch.pl complaining about whitespace] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use 125MHz reference clock for PCH attached eDPJesse Barnes2010-09-08
| | | | | | | | | | | Fix the test so we don't try to use the 450MHz refclk on PCH attached eDP. References: https://bugs.freedesktop.org/show_bug.cgi?id=29141 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: fix eDP detectionJesse Barnes2010-09-08
| | | | | | | Panel needs to be powered up. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* i915: snprintf returns large valuesDan Carpenter2010-09-08
| | | | | | | | | | | snprintf() returns the number of bytes which would have been used if there was enough space. It can be larger than the size of the buffer. Obviously in this case the buffer is large enough but everyone just copy and pastes this code so it's better to limit it and set a good example. Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: die, i915_probe_agp, dieDaniel Vetter2010-09-08
| | | | | | | | | | | | | | | Use the detection from intel-gtt.ko instead. Hooray! Also move the stolen mem allocator to the other gtt stuff in dev_prv->mem. v2: Chris Wilson noted that my error handling was crap. Fix it. He also said that this fixes a problem on his i845. Indeed, i915_probe_agp misses a special case for i830/i845 stolen mem detection. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=25476 Cc: stable@kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: drop prealloc_start from i915_dma gtt initDaniel Vetter2010-09-08
| | | | | | | Not used and simply confusing. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: introduce drm/intel-gtt.hDaniel Vetter2010-09-08
| | | | | | | | | Add a few definitions to it that are already shared and that will be shared in the future (like the number of stolen entries). No functional changes in here. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Don't disable panel for modesetting if pfit hasn't changedMatthew Garrett2010-09-08
| | | | | | | | | It seems to be possible to program a new mode without disabling the panel if the panel fitter setup doesn't change. Add support for that. Signed-off-by: Matthew Garrett <mjg@redhat.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: set dither bits on eDP panels tooJesse Barnes2010-09-08
| | | | | | | | | | We really need a macro to test whether a given connector has a panel attached rather than sprinkling HAS_PCH_SPLIT/IS_eDP/has_edp_encoder etc all over. In the meantime, fix the bug... Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: tidy up the duplicity in the conditionals] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: fix pipeconf dither bit definitionsJesse Barnes2010-09-08
| | | | | | | Make them match the others and add BPP definitions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Remove impossible error handling from bit17 swizzlingChris Wilson2010-09-08
| | | | | | | Our usage of kmap() cannot return NULL here, so remove the unnecessary error handling. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Add ringbuffer wait reset to hangcheckChris Wilson2010-09-08
| | | | | | | | | | | | | | The GPU records whether it is currently waiting for a completion of a WAIT_FOR_EVENT in the RB_WAIT bit in the ringbuffer control registers. On third generation chipsets and later, a write of 1 to this bit breaks the hang and returns the GPU to arbitration, i.e. the GPU should continue executing the reminder of the batchbuffer and return to normal operations. By adding this to hangcheck we can avoid a full GPU reset under these conditions. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Clear scanline waits after disabling the pipe.Chris Wilson2010-09-08
| | | | | | | | | | | | | | | | | | | | If we disable the pipe and the GPU is currently waiting on a scanline WAIT_FOR_EVENT, the GPU will hang. Fortunately, there is a magic bit which we can write on i915+ to break this wait after disabling the pipe. References: Bug 29252 - [Arrandale] Hung WAIT_FOR_EVENT when running rss-glx-skyrocket https://bugs.freedesktop.org/show_bug.cgi?id=29252 Bug 28964 - [i965gm] GPU infinite MI_WAIT_FOR_EVENT while watching video in Totem https://bugs.freedesktop.org/show_bug.cgi?id=28964 and many others. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Show framebuffer info in debugfsChris Wilson2010-09-08
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Show device capabilities in debugfsChris Wilson2010-09-08
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/tv: After disabling the pipe, use wait_for_vblank_off()Chris Wilson2010-09-08
| | | | | | | | | | | | | | Hopefully this is a contributing factor to the spurious TV detection repoted by Ivan Bulatovic and others. References: Bug 16871 - "TV1 connected" with no tv https://bugzilla.kernel.org/show_bug.cgi?id=16871 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reported-by: Ivan Bulatovic <combuster@gmx.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Refactor panel backlight controlsChris Wilson2010-09-08
| | | | | | | | | | | | | | | | | | There were two instances of code to control the panel backlight and neither handled the complete set of device variations. Fixes: Bug 29716 - [GM965] Regression: Backlight resets to minimum when changing resolution https://bugs.freedesktop.org/show_bug.cgi?id=29716 And a bug on one of my PineView boxes which overflowed the backlight value. Incorporates part of a similar patch by Matthew Garrett that exposes a native Intel backlight controller. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Remove redundant initialisation of fb_baseChris Wilson2010-09-08
| | | | | | | We do it whilst configuring dev->mode_config, so remove the out-of-place earlier initialisation. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Quieten sparse warnings for missing prototypes.Chris Wilson2010-09-08
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Kill the active list spinlockChris Wilson2010-09-08
| | | | | | | | | | This spinlock only served debugging purposes in a time when we could not be sure of the mutex ever being released upon a GPU hang. As we now should be able rely on hangcheck to do the job for us (and that error reporting should not itself require the struct mutex) we can kill the incomplete attempt at protection. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Remove the random SyncFlush during initialisationChris Wilson2010-09-08
| | | | | | | We have no idea why we request a SyncFlush via INSTPM at that point in time -- we certainly never check for its completion... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Compile out error state without DEBUG_FSChris Wilson2010-09-08
| | | | | | | | | | | Alexander reported that the compilation of intel_overlay.c was failing due to an inclusion that was only valid with CONFIG_DEBUG_FS. As the whole error reporting is only useful with debugfs enabled, remove all the redundant error state collection code when compiling without CONFIG_DEBUG_FS. Reported-by: Alexander Lam <lambchop468@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/overlay: Use a continuation hook to finish work after a flip.Chris Wilson2010-09-08
| | | | | | | | Slightly easier to follow than the state machine and now possible as the control structure is opaque and hw_wedged is no longer interferred with. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Make the overlay control struct opaque.Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Pass interruptible to switch_off()Chris Wilson2010-09-08
| | | | | | | | | During DPMS we currently do not want the overlay code to be interruptible, so pass that information down and only take the uninterrruptible paths. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Workaround i830 overlay activation bug.Chris Wilson2010-09-08
| | | | | | | | | | | | | On i830, there exists a bug where an overlay on pipe B requires the mode clock on pipe A in order to activate. So workaround this by activating pipe A when trying to enable the overlay on pipe B. References: [Bug 29007] GPU hang on video playback with overlay https://bugs.freedesktop.org/show_bug.cgi?id=29007 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/overlay: Make do_put_image() as staticChris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Preallocate requestsChris Wilson2010-09-08
| | | | | | | | By allocating the request prior to writing to the ringbuffer, we can abort the operation without leaving the GPU in an inconsistent state. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Tidy release_old_vid()Chris Wilson2010-09-08
| | | | | | | Inline the call to wait_flip() and simplify the resulting code. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Combine SWITCH_OFF into a single stepChris Wilson2010-09-08
| | | | | | | | | We can program the h/w to first wait on the flip and then switch off without relying on s/w intervention. This removes the need for a double step switch off, bringing much rejoicing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Explicitly pass regs from map to unmapChris Wilson2010-09-08
| | | | | | | The scoping of the validity of the mapping is thus clarified. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Refactor do_wait_request()Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Tidy check_overlay_dst()Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Tidy update_pfit_vscale_ratio()Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Remove duplicated definition of OFC_UPDATEChris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Destroy reg_bo on shutdown.Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Use the recommended page alignment for physical regsChris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Tidy attribute checking.Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Use non-atomic mappings for the common case.Chris Wilson2010-09-08
| | | | | | | | | | The only time where an atomic mapping is required is during error-capture and there we cannot use the default slot, but need to specifically use one of the IRQ slots. So separate out the two conditions and use the atomic mapping only when appropriate. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Move capabilities bits to common info block.Chris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing.Chris Wilson2010-09-08
| | | | | | | | | | Just makes sure that writes are not being aliased by the CPU cache and do make it out to main memory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24977 Cc: stable@kernel.org
* drm/i915/overlay: Missing breaks between case statements for color depthChris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/overlay: WhitespaceChris Wilson2010-09-08
| | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 13:45:26 -0500